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1da177e4
LT
1/*
2 * linux/drivers/char/serial_core.h
3 *
4 * Copyright (C) 2000 Deep Blue Solutions Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef LINUX_SERIAL_CORE_H
21#define LINUX_SERIAL_CORE_H
22
23/*
24 * The type definitions. These are from Ted Ts'o's serial.h
25 */
26#define PORT_UNKNOWN 0
27#define PORT_8250 1
28#define PORT_16450 2
29#define PORT_16550 3
30#define PORT_16550A 4
31#define PORT_CIRRUS 5
32#define PORT_16650 6
33#define PORT_16650V2 7
34#define PORT_16750 8
35#define PORT_STARTECH 9
36#define PORT_16C950 10
37#define PORT_16654 11
38#define PORT_16850 12
39#define PORT_RSA 13
40#define PORT_NS16550A 14
41#define PORT_XSCALE 15
913ade51 42#define PORT_MAX_8250 15 /* max port ID */
1da177e4
LT
43
44/*
45 * ARM specific type numbers. These are not currently guaranteed
46 * to be implemented, and will change in the future. These are
47 * separate so any additions to the old serial.c that occur before
48 * we are merged can be easily merged here.
49 */
50#define PORT_PXA 31
51#define PORT_AMBA 32
52#define PORT_CLPS711X 33
53#define PORT_SA1100 34
54#define PORT_UART00 35
55#define PORT_21285 37
56
57/* Sparc type numbers. */
58#define PORT_SUNZILOG 38
59#define PORT_SUNSAB 39
60
61/* NEC v850. */
62#define PORT_V850E_UART 40
63
64/* DZ */
65#define PORT_DZ 47
66
67/* Parisc type numbers. */
68#define PORT_MUX 48
69
1e6c9c28
AV
70/* Atmel AT91RM9200 SoC */
71#define PORT_AT91RM9200 49
72
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73/* Macintosh Zilog type numbers */
74#define PORT_MAC_ZILOG 50 /* m68k : not yet implemented */
75#define PORT_PMAC_ZILOG 51
76
77/* SH-SCI */
78#define PORT_SCI 52
79#define PORT_SCIF 53
80#define PORT_IRDA 54
81
82/* Samsung S3C2410 SoC and derivatives thereof */
83#define PORT_S3C2410 55
84
85/* SGI IP22 aka Indy / Challenge S / Indigo 2 */
86#define PORT_IP22ZILOG 56
87
88/* Sharp LH7a40x -- an ARM9 SoC series */
89#define PORT_LH7A40X 57
90
91/* PPC CPM type number */
92#define PORT_CPM 58
93
94/* MPC52xx type numbers */
95#define PORT_MPC52xx 59
96
97/* IBM icom */
98#define PORT_ICOM 60
99
100/* Samsung S3C2440 SoC */
101#define PORT_S3C2440 61
102
103/* Motorola i.MX SoC */
104#define PORT_IMX 62
105
106/* Marvell MPSC */
107#define PORT_MPSC 63
108
109/* TXX9 type number */
e5c2d749 110#define PORT_TXX9 64
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111
112/* NEC VR4100 series SIU/DSIU */
113#define PORT_VR41XX_SIU 65
114#define PORT_VR41XX_DSIU 66
115
116/* Samsung S3C2400 SoC */
117#define PORT_S3C2400 67
118
119/* M32R SIO */
120#define PORT_M32R_SIO 68
121
122/*Digi jsm */
913ade51
RK
123#define PORT_JSM 69
124
125#define PORT_IP3106 70
1da177e4 126
f5417612
SH
127/* Hilscher netx */
128#define PORT_NETX 71
129
02fd473b
DM
130/* SUN4V Hypervisor Console */
131#define PORT_SUNHV 72
132
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133#ifdef __KERNEL__
134
135#include <linux/config.h>
661f83a6 136#include <linux/compiler.h>
1da177e4
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137#include <linux/interrupt.h>
138#include <linux/circ_buf.h>
139#include <linux/spinlock.h>
140#include <linux/sched.h>
141#include <linux/tty.h>
e2862f6a 142#include <linux/mutex.h>
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143
144struct uart_port;
145struct uart_info;
146struct serial_struct;
147struct device;
148
149/*
150 * This structure describes all the operations that can be
151 * done on the physical hardware.
152 */
153struct uart_ops {
154 unsigned int (*tx_empty)(struct uart_port *);
155 void (*set_mctrl)(struct uart_port *, unsigned int mctrl);
156 unsigned int (*get_mctrl)(struct uart_port *);
b129a8cc
RK
157 void (*stop_tx)(struct uart_port *);
158 void (*start_tx)(struct uart_port *);
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159 void (*send_xchar)(struct uart_port *, char ch);
160 void (*stop_rx)(struct uart_port *);
161 void (*enable_ms)(struct uart_port *);
162 void (*break_ctl)(struct uart_port *, int ctl);
163 int (*startup)(struct uart_port *);
164 void (*shutdown)(struct uart_port *);
165 void (*set_termios)(struct uart_port *, struct termios *new,
166 struct termios *old);
167 void (*pm)(struct uart_port *, unsigned int state,
168 unsigned int oldstate);
169 int (*set_wake)(struct uart_port *, unsigned int state);
170
171 /*
172 * Return a string describing the type of the port
173 */
174 const char *(*type)(struct uart_port *);
175
176 /*
177 * Release IO and memory resources used by the port.
178 * This includes iounmap if necessary.
179 */
180 void (*release_port)(struct uart_port *);
181
182 /*
183 * Request IO and memory resources used by the port.
184 * This includes iomapping the port if necessary.
185 */
186 int (*request_port)(struct uart_port *);
187 void (*config_port)(struct uart_port *, int);
188 int (*verify_port)(struct uart_port *, struct serial_struct *);
189 int (*ioctl)(struct uart_port *, unsigned int, unsigned long);
190};
191
192#define UART_CONFIG_TYPE (1 << 0)
193#define UART_CONFIG_IRQ (1 << 1)
194
195struct uart_icount {
196 __u32 cts;
197 __u32 dsr;
198 __u32 rng;
199 __u32 dcd;
200 __u32 rx;
201 __u32 tx;
202 __u32 frame;
203 __u32 overrun;
204 __u32 parity;
205 __u32 brk;
206 __u32 buf_overrun;
207};
208
0077d45e
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209typedef unsigned int __bitwise__ upf_t;
210
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211struct uart_port {
212 spinlock_t lock; /* port lock */
213 unsigned int iobase; /* in/out[bwl] */
214 unsigned char __iomem *membase; /* read/write[bwl] */
215 unsigned int irq; /* irq number */
216 unsigned int uartclk; /* base uart clock */
217 unsigned char fifosize; /* tx fifo size */
218 unsigned char x_char; /* xon/xoff char */
219 unsigned char regshift; /* reg offset shift */
220 unsigned char iotype; /* io access style */
221
222#define UPIO_PORT (0)
223#define UPIO_HUB6 (1)
224#define UPIO_MEM (2)
225#define UPIO_MEM32 (3)
21c614a7 226#define UPIO_AU (4) /* Au1x00 type IO */
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227
228 unsigned int read_status_mask; /* driver specific */
229 unsigned int ignore_status_mask; /* driver specific */
230 struct uart_info *info; /* pointer to parent info */
231 struct uart_icount icount; /* statistics */
232
233 struct console *cons; /* struct console, if any */
234#ifdef CONFIG_SERIAL_CORE_CONSOLE
235 unsigned long sysrq; /* sysrq timeout */
236#endif
237
0077d45e
RK
238 upf_t flags;
239
240#define UPF_FOURPORT ((__force upf_t) (1 << 1))
241#define UPF_SAK ((__force upf_t) (1 << 2))
242#define UPF_SPD_MASK ((__force upf_t) (0x1030))
243#define UPF_SPD_HI ((__force upf_t) (0x0010))
244#define UPF_SPD_VHI ((__force upf_t) (0x0020))
245#define UPF_SPD_CUST ((__force upf_t) (0x0030))
246#define UPF_SPD_SHI ((__force upf_t) (0x1000))
247#define UPF_SPD_WARP ((__force upf_t) (0x1010))
248#define UPF_SKIP_TEST ((__force upf_t) (1 << 6))
249#define UPF_AUTO_IRQ ((__force upf_t) (1 << 7))
250#define UPF_HARDPPS_CD ((__force upf_t) (1 << 11))
251#define UPF_LOW_LATENCY ((__force upf_t) (1 << 13))
252#define UPF_BUGGY_UART ((__force upf_t) (1 << 14))
253#define UPF_MAGIC_MULTIPLIER ((__force upf_t) (1 << 16))
254#define UPF_CONS_FLOW ((__force upf_t) (1 << 23))
255#define UPF_SHARE_IRQ ((__force upf_t) (1 << 24))
256#define UPF_BOOT_AUTOCONF ((__force upf_t) (1 << 28))
257#define UPF_IOREMAP ((__force upf_t) (1 << 31))
258
259#define UPF_CHANGE_MASK ((__force upf_t) (0x17fff))
260#define UPF_USR_MASK ((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
1da177e4
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261
262 unsigned int mctrl; /* current modem ctrl settings */
263 unsigned int timeout; /* character-based timeout */
264 unsigned int type; /* port type */
ba899dbc 265 const struct uart_ops *ops;
1da177e4
LT
266 unsigned int custom_divisor;
267 unsigned int line; /* port index */
268 unsigned long mapbase; /* for ioremap */
269 struct device *dev; /* parent device */
270 unsigned char hub6; /* this should be in the 8250 driver */
271 unsigned char unused[3];
272};
273
274/*
275 * This is the state information which is persistent across opens.
276 * The low level driver must not to touch any elements contained
277 * within.
278 */
279struct uart_state {
280 unsigned int close_delay; /* msec */
281 unsigned int closing_wait; /* msec */
282
283#define USF_CLOSING_WAIT_INF (0)
284#define USF_CLOSING_WAIT_NONE (~0U)
285
286 int count;
287 int pm_state;
288 struct uart_info *info;
289 struct uart_port *port;
290
e2862f6a 291 struct mutex mutex;
1da177e4
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292};
293
294#define UART_XMIT_SIZE PAGE_SIZE
747c8a55
RK
295
296typedef unsigned int __bitwise__ uif_t;
297
1da177e4
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298/*
299 * This is the state information which is only valid when the port
300 * is open; it may be freed by the core driver once the device has
301 * been closed. Either the low level driver or the core can modify
302 * stuff here.
303 */
304struct uart_info {
305 struct tty_struct *tty;
306 struct circ_buf xmit;
747c8a55 307 uif_t flags;
1da177e4
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308
309/*
747c8a55
RK
310 * Definitions for info->flags. These are _private_ to serial_core, and
311 * are specific to this structure. They may be queried by low level drivers.
1da177e4 312 */
747c8a55
RK
313#define UIF_CHECK_CD ((__force uif_t) (1 << 25))
314#define UIF_CTS_FLOW ((__force uif_t) (1 << 26))
315#define UIF_NORMAL_ACTIVE ((__force uif_t) (1 << 29))
316#define UIF_INITIALIZED ((__force uif_t) (1 << 31))
1da177e4
LT
317
318 int blocked_open;
319
320 struct tasklet_struct tlet;
321
322 wait_queue_head_t open_wait;
323 wait_queue_head_t delta_msr_wait;
324};
325
326/* number of characters left in xmit buffer before we ask for more */
327#define WAKEUP_CHARS 256
328
329struct module;
330struct tty_driver;
331
332struct uart_driver {
333 struct module *owner;
334 const char *driver_name;
335 const char *dev_name;
336 const char *devfs_name;
337 int major;
338 int minor;
339 int nr;
340 struct console *cons;
341
342 /*
343 * these are private; the low level driver should not
344 * touch these; they should be initialised to NULL
345 */
346 struct uart_state *state;
347 struct tty_driver *tty_driver;
348};
349
350void uart_write_wakeup(struct uart_port *port);
351
352/*
353 * Baud rate helpers.
354 */
355void uart_update_timeout(struct uart_port *port, unsigned int cflag,
356 unsigned int baud);
357unsigned int uart_get_baud_rate(struct uart_port *port, struct termios *termios,
358 struct termios *old, unsigned int min,
359 unsigned int max);
360unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
361
362/*
363 * Console helpers.
364 */
365struct uart_port *uart_get_console(struct uart_port *ports, int nr,
366 struct console *c);
367void uart_parse_options(char *options, int *baud, int *parity, int *bits,
368 int *flow);
369int uart_set_options(struct uart_port *port, struct console *co, int baud,
370 int parity, int bits, int flow);
371struct tty_driver *uart_console_device(struct console *co, int *index);
d358788f
RK
372void uart_console_write(struct uart_port *port, const char *s,
373 unsigned int count,
374 void (*putchar)(struct uart_port *, int));
1da177e4
LT
375
376/*
377 * Port/driver registration/removal
378 */
379int uart_register_driver(struct uart_driver *uart);
380void uart_unregister_driver(struct uart_driver *uart);
1da177e4
LT
381int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
382int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
383int uart_match_port(struct uart_port *port1, struct uart_port *port2);
384
385/*
386 * Power Management
387 */
388int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
389int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
390
391#define uart_circ_empty(circ) ((circ)->head == (circ)->tail)
392#define uart_circ_clear(circ) ((circ)->head = (circ)->tail = 0)
393
394#define uart_circ_chars_pending(circ) \
395 (CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
396
397#define uart_circ_chars_free(circ) \
398 (CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
399
400#define uart_tx_stopped(port) \
401 ((port)->info->tty->stopped || (port)->info->tty->hw_stopped)
402
403/*
404 * The following are helper functions for the low level drivers.
405 */
1da177e4
LT
406static inline int
407uart_handle_sysrq_char(struct uart_port *port, unsigned int ch,
408 struct pt_regs *regs)
409{
93c37f29 410#ifdef SUPPORT_SYSRQ
1da177e4
LT
411 if (port->sysrq) {
412 if (ch && time_before(jiffies, port->sysrq)) {
413 handle_sysrq(ch, regs, NULL);
414 port->sysrq = 0;
415 return 1;
416 }
417 port->sysrq = 0;
418 }
93c37f29 419#endif
1da177e4
LT
420 return 0;
421}
4e149184
LT
422#ifndef SUPPORT_SYSRQ
423#define uart_handle_sysrq_char(port,ch,regs) uart_handle_sysrq_char(port, 0, NULL)
424#endif
1da177e4
LT
425
426/*
427 * We do the SysRQ and SAK checking like this...
428 */
429static inline int uart_handle_break(struct uart_port *port)
430{
431 struct uart_info *info = port->info;
432#ifdef SUPPORT_SYSRQ
433 if (port->cons && port->cons->index == port->line) {
434 if (!port->sysrq) {
435 port->sysrq = jiffies + HZ*5;
436 return 1;
437 }
438 port->sysrq = 0;
439 }
440#endif
27ae7a74 441 if (port->flags & UPF_SAK)
1da177e4
LT
442 do_SAK(info->tty);
443 return 0;
444}
445
446/**
447 * uart_handle_dcd_change - handle a change of carrier detect state
448 * @port: uart_port structure for the open port
449 * @status: new carrier detect status, nonzero if active
450 */
451static inline void
452uart_handle_dcd_change(struct uart_port *port, unsigned int status)
453{
454 struct uart_info *info = port->info;
455
456 port->icount.dcd++;
457
458#ifdef CONFIG_HARD_PPS
459 if ((port->flags & UPF_HARDPPS_CD) && status)
460 hardpps();
461#endif
462
463 if (info->flags & UIF_CHECK_CD) {
464 if (status)
465 wake_up_interruptible(&info->open_wait);
466 else if (info->tty)
467 tty_hangup(info->tty);
468 }
469}
470
471/**
472 * uart_handle_cts_change - handle a change of clear-to-send state
473 * @port: uart_port structure for the open port
474 * @status: new clear to send status, nonzero if active
475 */
476static inline void
477uart_handle_cts_change(struct uart_port *port, unsigned int status)
478{
479 struct uart_info *info = port->info;
480 struct tty_struct *tty = info->tty;
481
482 port->icount.cts++;
483
484 if (info->flags & UIF_CTS_FLOW) {
485 if (tty->hw_stopped) {
486 if (status) {
487 tty->hw_stopped = 0;
b129a8cc 488 port->ops->start_tx(port);
1da177e4
LT
489 uart_write_wakeup(port);
490 }
491 } else {
492 if (!status) {
493 tty->hw_stopped = 1;
b129a8cc 494 port->ops->stop_tx(port);
1da177e4
LT
495 }
496 }
497 }
498}
499
05ab3014
RK
500#include <linux/tty_flip.h>
501
502static inline void
503uart_insert_char(struct uart_port *port, unsigned int status,
504 unsigned int overrun, unsigned int ch, unsigned int flag)
505{
506 struct tty_struct *tty = port->info->tty;
507
508 if ((status & port->ignore_status_mask & ~overrun) == 0)
509 tty_insert_flip_char(tty, ch, flag);
510
511 /*
512 * Overrun is special. Since it's reported immediately,
513 * it doesn't affect the current character.
514 */
515 if (status & ~port->ignore_status_mask & overrun)
516 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
517}
518
1da177e4
LT
519/*
520 * UART_ENABLE_MS - determine if port should enable modem status irqs
521 */
522#define UART_ENABLE_MS(port,cflag) ((port)->flags & UPF_HARDPPS_CD || \
523 (cflag) & CRTSCTS || \
524 !((cflag) & CLOCAL))
525
526#endif
527
528#endif /* LINUX_SERIAL_CORE_H */