[mirror_ubuntu-bionic-kernel.git] / include / linux / serial_sci.h

#ifndef __LINUX_SERIAL_SCI_H
#define __LINUX_SERIAL_SCI_H

#include <linux/bitops.h>
#include <linux/serial_core.h>
#include <linux/sh_dma.h>

/*
 * Generic header for SuperH (H)SCI(F) (used by sh/sh64 and related parts)
 */

/* Serial Control Register (@ = not supported by all parts) */
#define SCSCR_TIE	BIT(7)	/* Transmit Interrupt Enable */
#define SCSCR_RIE	BIT(6)	/* Receive Interrupt Enable */
#define SCSCR_TE	BIT(5)	/* Transmit Enable */
#define SCSCR_RE	BIT(4)	/* Receive Enable */
#define SCSCR_REIE	BIT(3)	/* Receive Error Interrupt Enable @ */
#define SCSCR_TOIE	BIT(2)	/* Timeout Interrupt Enable @ */
#define SCSCR_CKE1	BIT(1)	/* Clock Enable 1 */
#define SCSCR_CKE0	BIT(0)	/* Clock Enable 0 */


enum {
	SCIx_PROBE_REGTYPE,

	SCIx_SCI_REGTYPE,
	SCIx_IRDA_REGTYPE,
	SCIx_SCIFA_REGTYPE,
	SCIx_SCIFB_REGTYPE,
	SCIx_SH2_SCIF_FIFODATA_REGTYPE,
	SCIx_SH3_SCIF_REGTYPE,
	SCIx_SH4_SCIF_REGTYPE,
	SCIx_SH4_SCIF_BRG_REGTYPE,
	SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
	SCIx_SH4_SCIF_FIFODATA_REGTYPE,
	SCIx_SH7705_SCIF_REGTYPE,
	SCIx_HSCIF_REGTYPE,

	SCIx_NR_REGTYPES,
};

struct plat_sci_port_ops {
	void (*init_pins)(struct uart_port *, unsigned int cflag);
};

/*
 * Platform device specific platform_data struct
 */
struct plat_sci_port {
	unsigned int	type;			/* SCI / SCIF / IRDA / HSCIF */
	upf_t		flags;			/* UPF_* flags */

	unsigned int	sampling_rate;
	unsigned int	scscr;			/* SCSCR initialization */

	/*
	 * Platform overrides if necessary, defaults otherwise.
	 */
	unsigned char	regtype;

	struct plat_sci_port_ops	*ops;
};

#endif /* __LINUX_SERIAL_SCI_H */
Commit	Line	Data
96de1a8f PM	1	#ifndef __LINUX_SERIAL_SCI_H
96de1a8f PM	2	#define __LINUX_SERIAL_SCI_H
ecd95616	3
d94a0a38	4	#include <linux/bitops.h>
ecd95616	5	#include <linux/serial_core.h>
14baf9d7	6	#include <linux/sh_dma.h>
ecd95616 PM	7
ecd95616 PM	8	/*
4b084784	9	* Generic header for SuperH (H)SCI(F) (used by sh/sh64 and related parts)
ecd95616 PM	10	*/
ecd95616 PM	11
26de4f1b	12	/* Serial Control Register (@ = not supported by all parts) */
d94a0a38 GU	13	#define SCSCR_TIE BIT(7) /* Transmit Interrupt Enable */
	14	#define SCSCR_RIE BIT(6) /* Receive Interrupt Enable */
	15	#define SCSCR_TE BIT(5) /* Transmit Enable */
	16	#define SCSCR_RE BIT(4) /* Receive Enable */
	17	#define SCSCR_REIE BIT(3) /* Receive Error Interrupt Enable @ */
	18	#define SCSCR_TOIE BIT(2) /* Timeout Interrupt Enable @ */
	19	#define SCSCR_CKE1 BIT(1) /* Clock Enable 1 */
	20	#define SCSCR_CKE0 BIT(0) /* Clock Enable 0 */
c27ffc10	21
f303b364	22
61a6976b PM	23	enum {
	24	SCIx_PROBE_REGTYPE,
	25
	26	SCIx_SCI_REGTYPE,
	27	SCIx_IRDA_REGTYPE,
	28	SCIx_SCIFA_REGTYPE,
	29	SCIx_SCIFB_REGTYPE,
3af1f8a4	30	SCIx_SH2_SCIF_FIFODATA_REGTYPE,
61a6976b PM	31	SCIx_SH3_SCIF_REGTYPE,
61a6976b PM	32	SCIx_SH4_SCIF_REGTYPE,
b8bbd6b2	33	SCIx_SH4_SCIF_BRG_REGTYPE,
61a6976b PM	34	SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
	35	SCIx_SH4_SCIF_FIFODATA_REGTYPE,
	36	SCIx_SH7705_SCIF_REGTYPE,
f303b364	37	SCIx_HSCIF_REGTYPE,
61a6976b PM	38
	39	SCIx_NR_REGTYPES,
	40	};
	41
61a6976b PM	42	struct plat_sci_port_ops {
	43	void (init_pins)(struct uart_port , unsigned int cflag);
	44	};
	45
ecd95616 PM	46	/*
	47	* Platform device specific platform_data struct
	48	*/
	49	struct plat_sci_port {
f303b364	50	unsigned int type; /* SCI / SCIF / IRDA / HSCIF */
ecd95616	51	upf_t flags; /* UPF_* flags */
00b9de9c	52
ec09c5eb	53	unsigned int sampling_rate;
00b9de9c	54	unsigned int scscr; /* SCSCR initialization */
f43dc23d	55
debf9507 PM	56	/*
	57	* Platform overrides if necessary, defaults otherwise.
	58	*/
61a6976b PM	59	unsigned char regtype;
	60
	61	struct plat_sci_port_ops *ops;
ecd95616 PM	62	};
ecd95616 PM	63
96de1a8f	64	#endif /* __LINUX_SERIAL_SCI_H */