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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | #ifndef __LINUX_SPINLOCK_H |
3 | #define __LINUX_SPINLOCK_H | |
4 | ||
5 | /* | |
fb1c8f93 IM |
6 | * include/linux/spinlock.h - generic spinlock/rwlock declarations |
7 | * | |
8 | * here's the role of the various spinlock/rwlock related include files: | |
9 | * | |
10 | * on SMP builds: | |
11 | * | |
fb3a6bbc | 12 | * asm/spinlock_types.h: contains the arch_spinlock_t/arch_rwlock_t and the |
fb1c8f93 IM |
13 | * initializers |
14 | * | |
15 | * linux/spinlock_types.h: | |
16 | * defines the generic type and initializers | |
17 | * | |
0199c4e6 | 18 | * asm/spinlock.h: contains the arch_spin_*()/etc. lowlevel |
fb1c8f93 IM |
19 | * implementations, mostly inline assembly code |
20 | * | |
21 | * (also included on UP-debug builds:) | |
22 | * | |
23 | * linux/spinlock_api_smp.h: | |
24 | * contains the prototypes for the _spin_*() APIs. | |
25 | * | |
26 | * linux/spinlock.h: builds the final spin_*() APIs. | |
27 | * | |
28 | * on UP builds: | |
29 | * | |
30 | * linux/spinlock_type_up.h: | |
31 | * contains the generic, simplified UP spinlock type. | |
32 | * (which is an empty structure on non-debug builds) | |
33 | * | |
34 | * linux/spinlock_types.h: | |
35 | * defines the generic type and initializers | |
36 | * | |
37 | * linux/spinlock_up.h: | |
0199c4e6 | 38 | * contains the arch_spin_*()/etc. version of UP |
fb1c8f93 IM |
39 | * builds. (which are NOPs on non-debug, non-preempt |
40 | * builds) | |
41 | * | |
42 | * (included on UP-non-debug builds:) | |
43 | * | |
44 | * linux/spinlock_api_up.h: | |
45 | * builds the _spin_*() APIs. | |
46 | * | |
47 | * linux/spinlock.h: builds the final spin_*() APIs. | |
1da177e4 LT |
48 | */ |
49 | ||
3f307891 | 50 | #include <linux/typecheck.h> |
1da177e4 LT |
51 | #include <linux/preempt.h> |
52 | #include <linux/linkage.h> | |
53 | #include <linux/compiler.h> | |
df9ee292 | 54 | #include <linux/irqflags.h> |
1da177e4 LT |
55 | #include <linux/thread_info.h> |
56 | #include <linux/kernel.h> | |
57 | #include <linux/stringify.h> | |
676dcb8b | 58 | #include <linux/bottom_half.h> |
c935cd62 | 59 | #include <linux/lockdep.h> |
96f951ed | 60 | #include <asm/barrier.h> |
60ca1e5a | 61 | #include <asm/mmiowb.h> |
1da177e4 | 62 | |
1da177e4 LT |
63 | |
64 | /* | |
65 | * Must define these before including other files, inline functions need them | |
66 | */ | |
75ddb0e8 | 67 | #define LOCK_SECTION_NAME ".text..lock."KBUILD_BASENAME |
1da177e4 LT |
68 | |
69 | #define LOCK_SECTION_START(extra) \ | |
70 | ".subsection 1\n\t" \ | |
71 | extra \ | |
72 | ".ifndef " LOCK_SECTION_NAME "\n\t" \ | |
73 | LOCK_SECTION_NAME ":\n\t" \ | |
74 | ".endif\n" | |
75 | ||
76 | #define LOCK_SECTION_END \ | |
77 | ".previous\n\t" | |
78 | ||
33def849 | 79 | #define __lockfunc __section(".spinlock.text") |
1da177e4 LT |
80 | |
81 | /* | |
fb3a6bbc | 82 | * Pull the arch_spinlock_t and arch_rwlock_t definitions: |
1da177e4 | 83 | */ |
fb1c8f93 | 84 | #include <linux/spinlock_types.h> |
1da177e4 | 85 | |
1da177e4 | 86 | /* |
25985edc | 87 | * Pull the arch_spin*() functions/declarations (UP-nondebug doesn't need them): |
1da177e4 | 88 | */ |
8a25d5de | 89 | #ifdef CONFIG_SMP |
fb1c8f93 | 90 | # include <asm/spinlock.h> |
1da177e4 | 91 | #else |
fb1c8f93 | 92 | # include <linux/spinlock_up.h> |
1da177e4 LT |
93 | #endif |
94 | ||
8a25d5de | 95 | #ifdef CONFIG_DEBUG_SPINLOCK |
c2f21ce2 | 96 | extern void __raw_spin_lock_init(raw_spinlock_t *lock, const char *name, |
de8f5e4f PZ |
97 | struct lock_class_key *key, short inner); |
98 | ||
99 | # define raw_spin_lock_init(lock) \ | |
100 | do { \ | |
101 | static struct lock_class_key __key; \ | |
102 | \ | |
103 | __raw_spin_lock_init((lock), #lock, &__key, LD_WAIT_SPIN); \ | |
8a25d5de IM |
104 | } while (0) |
105 | ||
106 | #else | |
c2f21ce2 TG |
107 | # define raw_spin_lock_init(lock) \ |
108 | do { *(lock) = __RAW_SPIN_LOCK_UNLOCKED(lock); } while (0) | |
8a25d5de IM |
109 | #endif |
110 | ||
c2f21ce2 | 111 | #define raw_spin_is_locked(lock) arch_spin_is_locked(&(lock)->raw_lock) |
fb1c8f93 | 112 | |
0199c4e6 | 113 | #ifdef arch_spin_is_contended |
c2f21ce2 | 114 | #define raw_spin_is_contended(lock) arch_spin_is_contended(&(lock)->raw_lock) |
a5ef7ca0 | 115 | #else |
c2f21ce2 | 116 | #define raw_spin_is_contended(lock) (((void)(lock), 0)) |
0199c4e6 | 117 | #endif /*arch_spin_is_contended*/ |
95c354fe | 118 | |
e0acd0a6 | 119 | /* |
3d85b270 AP |
120 | * smp_mb__after_spinlock() provides the equivalent of a full memory barrier |
121 | * between program-order earlier lock acquisitions and program-order later | |
122 | * memory accesses. | |
d89e588c | 123 | * |
3d85b270 | 124 | * This guarantees that the following two properties hold: |
d89e588c | 125 | * |
3d85b270 | 126 | * 1) Given the snippet: |
d89e588c | 127 | * |
3d85b270 | 128 | * { X = 0; Y = 0; } |
d89e588c | 129 | * |
3d85b270 | 130 | * CPU0 CPU1 |
d89e588c | 131 | * |
3d85b270 AP |
132 | * WRITE_ONCE(X, 1); WRITE_ONCE(Y, 1); |
133 | * spin_lock(S); smp_mb(); | |
134 | * smp_mb__after_spinlock(); r1 = READ_ONCE(X); | |
135 | * r0 = READ_ONCE(Y); | |
136 | * spin_unlock(S); | |
d89e588c | 137 | * |
3d85b270 AP |
138 | * it is forbidden that CPU0 does not observe CPU1's store to Y (r0 = 0) |
139 | * and CPU1 does not observe CPU0's store to X (r1 = 0); see the comments | |
140 | * preceding the call to smp_mb__after_spinlock() in __schedule() and in | |
141 | * try_to_wake_up(). | |
142 | * | |
143 | * 2) Given the snippet: | |
144 | * | |
145 | * { X = 0; Y = 0; } | |
146 | * | |
147 | * CPU0 CPU1 CPU2 | |
148 | * | |
149 | * spin_lock(S); spin_lock(S); r1 = READ_ONCE(Y); | |
150 | * WRITE_ONCE(X, 1); smp_mb__after_spinlock(); smp_rmb(); | |
151 | * spin_unlock(S); r0 = READ_ONCE(X); r2 = READ_ONCE(X); | |
152 | * WRITE_ONCE(Y, 1); | |
153 | * spin_unlock(S); | |
154 | * | |
155 | * it is forbidden that CPU0's critical section executes before CPU1's | |
156 | * critical section (r0 = 1), CPU2 observes CPU1's store to Y (r1 = 1) | |
157 | * and CPU2 does not observe CPU0's store to X (r2 = 0); see the comments | |
158 | * preceding the calls to smp_rmb() in try_to_wake_up() for similar | |
159 | * snippets but "projected" onto two CPUs. | |
160 | * | |
161 | * Property (2) upgrades the lock to an RCsc lock. | |
d89e588c PZ |
162 | * |
163 | * Since most load-store architectures implement ACQUIRE with an smp_mb() after | |
164 | * the LL/SC loop, they need no further barriers. Similarly all our TSO | |
165 | * architectures imply an smp_mb() for each atomic instruction and equally don't | |
166 | * need more. | |
167 | * | |
168 | * Architectures that can implement ACQUIRE better need to take care. | |
e0acd0a6 | 169 | */ |
d89e588c PZ |
170 | #ifndef smp_mb__after_spinlock |
171 | #define smp_mb__after_spinlock() do { } while (0) | |
ad462769 JO |
172 | #endif |
173 | ||
fb1c8f93 | 174 | #ifdef CONFIG_DEBUG_SPINLOCK |
b97c4bc1 | 175 | extern void do_raw_spin_lock(raw_spinlock_t *lock) __acquires(lock); |
9828ea9d TG |
176 | #define do_raw_spin_lock_flags(lock, flags) do_raw_spin_lock(lock) |
177 | extern int do_raw_spin_trylock(raw_spinlock_t *lock); | |
b97c4bc1 | 178 | extern void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock); |
fb1c8f93 | 179 | #else |
b97c4bc1 | 180 | static inline void do_raw_spin_lock(raw_spinlock_t *lock) __acquires(lock) |
c2f21ce2 | 181 | { |
b97c4bc1 | 182 | __acquire(lock); |
c2f21ce2 | 183 | arch_spin_lock(&lock->raw_lock); |
60ca1e5a | 184 | mmiowb_spin_lock(); |
c2f21ce2 TG |
185 | } |
186 | ||
a4c1887d WD |
187 | #ifndef arch_spin_lock_flags |
188 | #define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock) | |
189 | #endif | |
190 | ||
c2f21ce2 | 191 | static inline void |
b97c4bc1 | 192 | do_raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long *flags) __acquires(lock) |
c2f21ce2 | 193 | { |
b97c4bc1 | 194 | __acquire(lock); |
c2f21ce2 | 195 | arch_spin_lock_flags(&lock->raw_lock, *flags); |
60ca1e5a | 196 | mmiowb_spin_lock(); |
c2f21ce2 TG |
197 | } |
198 | ||
9828ea9d | 199 | static inline int do_raw_spin_trylock(raw_spinlock_t *lock) |
c2f21ce2 | 200 | { |
60ca1e5a WD |
201 | int ret = arch_spin_trylock(&(lock)->raw_lock); |
202 | ||
203 | if (ret) | |
204 | mmiowb_spin_lock(); | |
205 | ||
206 | return ret; | |
c2f21ce2 TG |
207 | } |
208 | ||
b97c4bc1 | 209 | static inline void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock) |
c2f21ce2 | 210 | { |
60ca1e5a | 211 | mmiowb_spin_unlock(); |
c2f21ce2 | 212 | arch_spin_unlock(&lock->raw_lock); |
b97c4bc1 | 213 | __release(lock); |
c2f21ce2 | 214 | } |
fb1c8f93 | 215 | #endif |
1da177e4 | 216 | |
1da177e4 | 217 | /* |
ef12f109 | 218 | * Define the various spin_lock methods. Note we define these |
27972765 | 219 | * regardless of whether CONFIG_SMP or CONFIG_PREEMPTION are set. The |
ef12f109 TG |
220 | * various methods are defined as nops in the case they are not |
221 | * required. | |
1da177e4 | 222 | */ |
9c1721aa | 223 | #define raw_spin_trylock(lock) __cond_lock(lock, _raw_spin_trylock(lock)) |
1da177e4 | 224 | |
9c1721aa | 225 | #define raw_spin_lock(lock) _raw_spin_lock(lock) |
8a25d5de IM |
226 | |
227 | #ifdef CONFIG_DEBUG_LOCK_ALLOC | |
9c1721aa TG |
228 | # define raw_spin_lock_nested(lock, subclass) \ |
229 | _raw_spin_lock_nested(lock, subclass) | |
230 | ||
c2f21ce2 | 231 | # define raw_spin_lock_nest_lock(lock, nest_lock) \ |
b7d39aff PZ |
232 | do { \ |
233 | typecheck(struct lockdep_map *, &(nest_lock)->dep_map);\ | |
9c1721aa | 234 | _raw_spin_lock_nest_lock(lock, &(nest_lock)->dep_map); \ |
b7d39aff | 235 | } while (0) |
8a25d5de | 236 | #else |
4999201a BVA |
237 | /* |
238 | * Always evaluate the 'subclass' argument to avoid that the compiler | |
239 | * warns about set-but-not-used variables when building with | |
240 | * CONFIG_DEBUG_LOCK_ALLOC=n and with W=1. | |
241 | */ | |
242 | # define raw_spin_lock_nested(lock, subclass) \ | |
243 | _raw_spin_lock(((void)(subclass), (lock))) | |
9c1721aa | 244 | # define raw_spin_lock_nest_lock(lock, nest_lock) _raw_spin_lock(lock) |
8a25d5de IM |
245 | #endif |
246 | ||
fb1c8f93 | 247 | #if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) |
b8e6ec86 | 248 | |
c2f21ce2 | 249 | #define raw_spin_lock_irqsave(lock, flags) \ |
3f307891 SR |
250 | do { \ |
251 | typecheck(unsigned long, flags); \ | |
9c1721aa | 252 | flags = _raw_spin_lock_irqsave(lock); \ |
3f307891 | 253 | } while (0) |
cfd3ef23 AV |
254 | |
255 | #ifdef CONFIG_DEBUG_LOCK_ALLOC | |
c2f21ce2 | 256 | #define raw_spin_lock_irqsave_nested(lock, flags, subclass) \ |
3f307891 SR |
257 | do { \ |
258 | typecheck(unsigned long, flags); \ | |
9c1721aa | 259 | flags = _raw_spin_lock_irqsave_nested(lock, subclass); \ |
3f307891 | 260 | } while (0) |
cfd3ef23 | 261 | #else |
c2f21ce2 | 262 | #define raw_spin_lock_irqsave_nested(lock, flags, subclass) \ |
3f307891 SR |
263 | do { \ |
264 | typecheck(unsigned long, flags); \ | |
9c1721aa | 265 | flags = _raw_spin_lock_irqsave(lock); \ |
3f307891 | 266 | } while (0) |
cfd3ef23 AV |
267 | #endif |
268 | ||
1da177e4 | 269 | #else |
b8e6ec86 | 270 | |
c2f21ce2 | 271 | #define raw_spin_lock_irqsave(lock, flags) \ |
3f307891 SR |
272 | do { \ |
273 | typecheck(unsigned long, flags); \ | |
9c1721aa | 274 | _raw_spin_lock_irqsave(lock, flags); \ |
3f307891 | 275 | } while (0) |
ef12f109 | 276 | |
c2f21ce2 TG |
277 | #define raw_spin_lock_irqsave_nested(lock, flags, subclass) \ |
278 | raw_spin_lock_irqsave(lock, flags) | |
cfd3ef23 | 279 | |
1da177e4 LT |
280 | #endif |
281 | ||
9c1721aa TG |
282 | #define raw_spin_lock_irq(lock) _raw_spin_lock_irq(lock) |
283 | #define raw_spin_lock_bh(lock) _raw_spin_lock_bh(lock) | |
284 | #define raw_spin_unlock(lock) _raw_spin_unlock(lock) | |
285 | #define raw_spin_unlock_irq(lock) _raw_spin_unlock_irq(lock) | |
1da177e4 | 286 | |
c2f21ce2 TG |
287 | #define raw_spin_unlock_irqrestore(lock, flags) \ |
288 | do { \ | |
289 | typecheck(unsigned long, flags); \ | |
9c1721aa | 290 | _raw_spin_unlock_irqrestore(lock, flags); \ |
3f307891 | 291 | } while (0) |
9c1721aa | 292 | #define raw_spin_unlock_bh(lock) _raw_spin_unlock_bh(lock) |
1da177e4 | 293 | |
9c1721aa TG |
294 | #define raw_spin_trylock_bh(lock) \ |
295 | __cond_lock(lock, _raw_spin_trylock_bh(lock)) | |
1da177e4 | 296 | |
c2f21ce2 | 297 | #define raw_spin_trylock_irq(lock) \ |
1da177e4 LT |
298 | ({ \ |
299 | local_irq_disable(); \ | |
c2f21ce2 | 300 | raw_spin_trylock(lock) ? \ |
fb1c8f93 | 301 | 1 : ({ local_irq_enable(); 0; }); \ |
1da177e4 LT |
302 | }) |
303 | ||
c2f21ce2 | 304 | #define raw_spin_trylock_irqsave(lock, flags) \ |
1da177e4 LT |
305 | ({ \ |
306 | local_irq_save(flags); \ | |
c2f21ce2 | 307 | raw_spin_trylock(lock) ? \ |
fb1c8f93 | 308 | 1 : ({ local_irq_restore(flags); 0; }); \ |
1da177e4 LT |
309 | }) |
310 | ||
c2f21ce2 TG |
311 | /* Include rwlock functions */ |
312 | #include <linux/rwlock.h> | |
313 | ||
314 | /* | |
315 | * Pull the _spin_*()/_read_*()/_write_*() functions/declarations: | |
316 | */ | |
317 | #if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) | |
318 | # include <linux/spinlock_api_smp.h> | |
319 | #else | |
320 | # include <linux/spinlock_api_up.h> | |
321 | #endif | |
322 | ||
323 | /* | |
324 | * Map the spin_lock functions to the raw variants for PREEMPT_RT=n | |
325 | */ | |
326 | ||
3490565b | 327 | static __always_inline raw_spinlock_t *spinlock_check(spinlock_t *lock) |
c2f21ce2 TG |
328 | { |
329 | return &lock->rlock; | |
330 | } | |
331 | ||
de8f5e4f PZ |
332 | #ifdef CONFIG_DEBUG_SPINLOCK |
333 | ||
334 | # define spin_lock_init(lock) \ | |
335 | do { \ | |
336 | static struct lock_class_key __key; \ | |
337 | \ | |
338 | __raw_spin_lock_init(spinlock_check(lock), \ | |
339 | #lock, &__key, LD_WAIT_CONFIG); \ | |
340 | } while (0) | |
341 | ||
342 | #else | |
343 | ||
344 | # define spin_lock_init(_lock) \ | |
345 | do { \ | |
346 | spinlock_check(_lock); \ | |
347 | *(_lock) = __SPIN_LOCK_UNLOCKED(_lock); \ | |
c2f21ce2 TG |
348 | } while (0) |
349 | ||
de8f5e4f PZ |
350 | #endif |
351 | ||
3490565b | 352 | static __always_inline void spin_lock(spinlock_t *lock) |
c2f21ce2 TG |
353 | { |
354 | raw_spin_lock(&lock->rlock); | |
355 | } | |
356 | ||
3490565b | 357 | static __always_inline void spin_lock_bh(spinlock_t *lock) |
c2f21ce2 TG |
358 | { |
359 | raw_spin_lock_bh(&lock->rlock); | |
360 | } | |
361 | ||
3490565b | 362 | static __always_inline int spin_trylock(spinlock_t *lock) |
c2f21ce2 TG |
363 | { |
364 | return raw_spin_trylock(&lock->rlock); | |
365 | } | |
366 | ||
367 | #define spin_lock_nested(lock, subclass) \ | |
368 | do { \ | |
369 | raw_spin_lock_nested(spinlock_check(lock), subclass); \ | |
370 | } while (0) | |
371 | ||
372 | #define spin_lock_nest_lock(lock, nest_lock) \ | |
373 | do { \ | |
374 | raw_spin_lock_nest_lock(spinlock_check(lock), nest_lock); \ | |
375 | } while (0) | |
376 | ||
3490565b | 377 | static __always_inline void spin_lock_irq(spinlock_t *lock) |
c2f21ce2 TG |
378 | { |
379 | raw_spin_lock_irq(&lock->rlock); | |
380 | } | |
381 | ||
382 | #define spin_lock_irqsave(lock, flags) \ | |
383 | do { \ | |
384 | raw_spin_lock_irqsave(spinlock_check(lock), flags); \ | |
385 | } while (0) | |
386 | ||
387 | #define spin_lock_irqsave_nested(lock, flags, subclass) \ | |
388 | do { \ | |
389 | raw_spin_lock_irqsave_nested(spinlock_check(lock), flags, subclass); \ | |
390 | } while (0) | |
391 | ||
3490565b | 392 | static __always_inline void spin_unlock(spinlock_t *lock) |
c2f21ce2 TG |
393 | { |
394 | raw_spin_unlock(&lock->rlock); | |
395 | } | |
396 | ||
3490565b | 397 | static __always_inline void spin_unlock_bh(spinlock_t *lock) |
c2f21ce2 TG |
398 | { |
399 | raw_spin_unlock_bh(&lock->rlock); | |
400 | } | |
401 | ||
3490565b | 402 | static __always_inline void spin_unlock_irq(spinlock_t *lock) |
c2f21ce2 TG |
403 | { |
404 | raw_spin_unlock_irq(&lock->rlock); | |
405 | } | |
406 | ||
3490565b | 407 | static __always_inline void spin_unlock_irqrestore(spinlock_t *lock, unsigned long flags) |
c2f21ce2 TG |
408 | { |
409 | raw_spin_unlock_irqrestore(&lock->rlock, flags); | |
410 | } | |
411 | ||
3490565b | 412 | static __always_inline int spin_trylock_bh(spinlock_t *lock) |
c2f21ce2 TG |
413 | { |
414 | return raw_spin_trylock_bh(&lock->rlock); | |
415 | } | |
416 | ||
3490565b | 417 | static __always_inline int spin_trylock_irq(spinlock_t *lock) |
c2f21ce2 TG |
418 | { |
419 | return raw_spin_trylock_irq(&lock->rlock); | |
420 | } | |
421 | ||
422 | #define spin_trylock_irqsave(lock, flags) \ | |
423 | ({ \ | |
424 | raw_spin_trylock_irqsave(spinlock_check(lock), flags); \ | |
425 | }) | |
426 | ||
b7e4aade AP |
427 | /** |
428 | * spin_is_locked() - Check whether a spinlock is locked. | |
429 | * @lock: Pointer to the spinlock. | |
430 | * | |
431 | * This function is NOT required to provide any memory ordering | |
432 | * guarantees; it could be used for debugging purposes or, when | |
433 | * additional synchronization is needed, accompanied with other | |
434 | * constructs (memory barriers) enforcing the synchronization. | |
435 | * | |
436 | * Returns: 1 if @lock is locked, 0 otherwise. | |
437 | * | |
438 | * Note that the function only tells you that the spinlock is | |
439 | * seen to be locked, not that it is locked on your CPU. | |
440 | * | |
441 | * Further, on CONFIG_SMP=n builds with CONFIG_DEBUG_SPINLOCK=n, | |
442 | * the return value is always 0 (see include/linux/spinlock_up.h). | |
443 | * Therefore you should not rely heavily on the return value. | |
444 | */ | |
3490565b | 445 | static __always_inline int spin_is_locked(spinlock_t *lock) |
c2f21ce2 TG |
446 | { |
447 | return raw_spin_is_locked(&lock->rlock); | |
448 | } | |
449 | ||
3490565b | 450 | static __always_inline int spin_is_contended(spinlock_t *lock) |
c2f21ce2 TG |
451 | { |
452 | return raw_spin_is_contended(&lock->rlock); | |
453 | } | |
454 | ||
4ebc1b4b | 455 | #define assert_spin_locked(lock) assert_raw_spin_locked(&(lock)->rlock) |
c2f21ce2 | 456 | |
1da177e4 | 457 | /* |
fb1c8f93 IM |
458 | * Pull the atomic_t declaration: |
459 | * (asm-mips/atomic.h needs above definitions) | |
1da177e4 | 460 | */ |
60063497 | 461 | #include <linux/atomic.h> |
fb1c8f93 IM |
462 | /** |
463 | * atomic_dec_and_lock - lock on reaching reference count zero | |
464 | * @atomic: the atomic counter | |
465 | * @lock: the spinlock in question | |
dc07e721 BF |
466 | * |
467 | * Decrements @atomic by 1. If the result is 0, returns true and locks | |
468 | * @lock. Returns false for all other cases. | |
1da177e4 | 469 | */ |
fb1c8f93 IM |
470 | extern int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock); |
471 | #define atomic_dec_and_lock(atomic, lock) \ | |
dcc8e559 | 472 | __cond_lock(lock, _atomic_dec_and_lock(atomic, lock)) |
1da177e4 | 473 | |
ccfbb5be AMG |
474 | extern int _atomic_dec_and_lock_irqsave(atomic_t *atomic, spinlock_t *lock, |
475 | unsigned long *flags); | |
476 | #define atomic_dec_and_lock_irqsave(atomic, lock, flags) \ | |
477 | __cond_lock(lock, _atomic_dec_and_lock_irqsave(atomic, lock, &(flags))) | |
478 | ||
ff93bca7 CW |
479 | int __alloc_bucket_spinlocks(spinlock_t **locks, unsigned int *lock_mask, |
480 | size_t max_size, unsigned int cpu_mult, | |
481 | gfp_t gfp, const char *name, | |
482 | struct lock_class_key *key); | |
483 | ||
484 | #define alloc_bucket_spinlocks(locks, lock_mask, max_size, cpu_mult, gfp) \ | |
485 | ({ \ | |
486 | static struct lock_class_key key; \ | |
487 | int ret; \ | |
488 | \ | |
489 | ret = __alloc_bucket_spinlocks(locks, lock_mask, max_size, \ | |
490 | cpu_mult, gfp, #locks, &key); \ | |
491 | ret; \ | |
492 | }) | |
92f36cca TH |
493 | |
494 | void free_bucket_spinlocks(spinlock_t *locks); | |
495 | ||
1da177e4 | 496 | #endif /* __LINUX_SPINLOCK_H */ |