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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | #ifndef __LINUX_SPINLOCK_H |
3 | #define __LINUX_SPINLOCK_H | |
4 | ||
5 | /* | |
fb1c8f93 IM |
6 | * include/linux/spinlock.h - generic spinlock/rwlock declarations |
7 | * | |
8 | * here's the role of the various spinlock/rwlock related include files: | |
9 | * | |
10 | * on SMP builds: | |
11 | * | |
fb3a6bbc | 12 | * asm/spinlock_types.h: contains the arch_spinlock_t/arch_rwlock_t and the |
fb1c8f93 IM |
13 | * initializers |
14 | * | |
15 | * linux/spinlock_types.h: | |
16 | * defines the generic type and initializers | |
17 | * | |
0199c4e6 | 18 | * asm/spinlock.h: contains the arch_spin_*()/etc. lowlevel |
fb1c8f93 IM |
19 | * implementations, mostly inline assembly code |
20 | * | |
21 | * (also included on UP-debug builds:) | |
22 | * | |
23 | * linux/spinlock_api_smp.h: | |
24 | * contains the prototypes for the _spin_*() APIs. | |
25 | * | |
26 | * linux/spinlock.h: builds the final spin_*() APIs. | |
27 | * | |
28 | * on UP builds: | |
29 | * | |
30 | * linux/spinlock_type_up.h: | |
31 | * contains the generic, simplified UP spinlock type. | |
32 | * (which is an empty structure on non-debug builds) | |
33 | * | |
34 | * linux/spinlock_types.h: | |
35 | * defines the generic type and initializers | |
36 | * | |
37 | * linux/spinlock_up.h: | |
0199c4e6 | 38 | * contains the arch_spin_*()/etc. version of UP |
fb1c8f93 IM |
39 | * builds. (which are NOPs on non-debug, non-preempt |
40 | * builds) | |
41 | * | |
42 | * (included on UP-non-debug builds:) | |
43 | * | |
44 | * linux/spinlock_api_up.h: | |
45 | * builds the _spin_*() APIs. | |
46 | * | |
47 | * linux/spinlock.h: builds the final spin_*() APIs. | |
1da177e4 LT |
48 | */ |
49 | ||
3f307891 | 50 | #include <linux/typecheck.h> |
1da177e4 LT |
51 | #include <linux/preempt.h> |
52 | #include <linux/linkage.h> | |
53 | #include <linux/compiler.h> | |
df9ee292 | 54 | #include <linux/irqflags.h> |
1da177e4 LT |
55 | #include <linux/thread_info.h> |
56 | #include <linux/kernel.h> | |
57 | #include <linux/stringify.h> | |
676dcb8b | 58 | #include <linux/bottom_half.h> |
96f951ed | 59 | #include <asm/barrier.h> |
60ca1e5a | 60 | #include <asm/mmiowb.h> |
1da177e4 | 61 | |
1da177e4 LT |
62 | |
63 | /* | |
64 | * Must define these before including other files, inline functions need them | |
65 | */ | |
75ddb0e8 | 66 | #define LOCK_SECTION_NAME ".text..lock."KBUILD_BASENAME |
1da177e4 LT |
67 | |
68 | #define LOCK_SECTION_START(extra) \ | |
69 | ".subsection 1\n\t" \ | |
70 | extra \ | |
71 | ".ifndef " LOCK_SECTION_NAME "\n\t" \ | |
72 | LOCK_SECTION_NAME ":\n\t" \ | |
73 | ".endif\n" | |
74 | ||
75 | #define LOCK_SECTION_END \ | |
76 | ".previous\n\t" | |
77 | ||
ec701584 | 78 | #define __lockfunc __attribute__((section(".spinlock.text"))) |
1da177e4 LT |
79 | |
80 | /* | |
fb3a6bbc | 81 | * Pull the arch_spinlock_t and arch_rwlock_t definitions: |
1da177e4 | 82 | */ |
fb1c8f93 | 83 | #include <linux/spinlock_types.h> |
1da177e4 | 84 | |
1da177e4 | 85 | /* |
25985edc | 86 | * Pull the arch_spin*() functions/declarations (UP-nondebug doesn't need them): |
1da177e4 | 87 | */ |
8a25d5de | 88 | #ifdef CONFIG_SMP |
fb1c8f93 | 89 | # include <asm/spinlock.h> |
1da177e4 | 90 | #else |
fb1c8f93 | 91 | # include <linux/spinlock_up.h> |
1da177e4 LT |
92 | #endif |
93 | ||
8a25d5de | 94 | #ifdef CONFIG_DEBUG_SPINLOCK |
c2f21ce2 TG |
95 | extern void __raw_spin_lock_init(raw_spinlock_t *lock, const char *name, |
96 | struct lock_class_key *key); | |
97 | # define raw_spin_lock_init(lock) \ | |
8a25d5de IM |
98 | do { \ |
99 | static struct lock_class_key __key; \ | |
100 | \ | |
c2f21ce2 | 101 | __raw_spin_lock_init((lock), #lock, &__key); \ |
8a25d5de IM |
102 | } while (0) |
103 | ||
104 | #else | |
c2f21ce2 TG |
105 | # define raw_spin_lock_init(lock) \ |
106 | do { *(lock) = __RAW_SPIN_LOCK_UNLOCKED(lock); } while (0) | |
8a25d5de IM |
107 | #endif |
108 | ||
c2f21ce2 | 109 | #define raw_spin_is_locked(lock) arch_spin_is_locked(&(lock)->raw_lock) |
fb1c8f93 | 110 | |
0199c4e6 | 111 | #ifdef arch_spin_is_contended |
c2f21ce2 | 112 | #define raw_spin_is_contended(lock) arch_spin_is_contended(&(lock)->raw_lock) |
a5ef7ca0 | 113 | #else |
c2f21ce2 | 114 | #define raw_spin_is_contended(lock) (((void)(lock), 0)) |
0199c4e6 | 115 | #endif /*arch_spin_is_contended*/ |
95c354fe | 116 | |
e0acd0a6 | 117 | /* |
3d85b270 AP |
118 | * smp_mb__after_spinlock() provides the equivalent of a full memory barrier |
119 | * between program-order earlier lock acquisitions and program-order later | |
120 | * memory accesses. | |
d89e588c | 121 | * |
3d85b270 | 122 | * This guarantees that the following two properties hold: |
d89e588c | 123 | * |
3d85b270 | 124 | * 1) Given the snippet: |
d89e588c | 125 | * |
3d85b270 | 126 | * { X = 0; Y = 0; } |
d89e588c | 127 | * |
3d85b270 | 128 | * CPU0 CPU1 |
d89e588c | 129 | * |
3d85b270 AP |
130 | * WRITE_ONCE(X, 1); WRITE_ONCE(Y, 1); |
131 | * spin_lock(S); smp_mb(); | |
132 | * smp_mb__after_spinlock(); r1 = READ_ONCE(X); | |
133 | * r0 = READ_ONCE(Y); | |
134 | * spin_unlock(S); | |
d89e588c | 135 | * |
3d85b270 AP |
136 | * it is forbidden that CPU0 does not observe CPU1's store to Y (r0 = 0) |
137 | * and CPU1 does not observe CPU0's store to X (r1 = 0); see the comments | |
138 | * preceding the call to smp_mb__after_spinlock() in __schedule() and in | |
139 | * try_to_wake_up(). | |
140 | * | |
141 | * 2) Given the snippet: | |
142 | * | |
143 | * { X = 0; Y = 0; } | |
144 | * | |
145 | * CPU0 CPU1 CPU2 | |
146 | * | |
147 | * spin_lock(S); spin_lock(S); r1 = READ_ONCE(Y); | |
148 | * WRITE_ONCE(X, 1); smp_mb__after_spinlock(); smp_rmb(); | |
149 | * spin_unlock(S); r0 = READ_ONCE(X); r2 = READ_ONCE(X); | |
150 | * WRITE_ONCE(Y, 1); | |
151 | * spin_unlock(S); | |
152 | * | |
153 | * it is forbidden that CPU0's critical section executes before CPU1's | |
154 | * critical section (r0 = 1), CPU2 observes CPU1's store to Y (r1 = 1) | |
155 | * and CPU2 does not observe CPU0's store to X (r2 = 0); see the comments | |
156 | * preceding the calls to smp_rmb() in try_to_wake_up() for similar | |
157 | * snippets but "projected" onto two CPUs. | |
158 | * | |
159 | * Property (2) upgrades the lock to an RCsc lock. | |
d89e588c PZ |
160 | * |
161 | * Since most load-store architectures implement ACQUIRE with an smp_mb() after | |
162 | * the LL/SC loop, they need no further barriers. Similarly all our TSO | |
163 | * architectures imply an smp_mb() for each atomic instruction and equally don't | |
164 | * need more. | |
165 | * | |
166 | * Architectures that can implement ACQUIRE better need to take care. | |
e0acd0a6 | 167 | */ |
d89e588c PZ |
168 | #ifndef smp_mb__after_spinlock |
169 | #define smp_mb__after_spinlock() do { } while (0) | |
ad462769 JO |
170 | #endif |
171 | ||
fb1c8f93 | 172 | #ifdef CONFIG_DEBUG_SPINLOCK |
b97c4bc1 | 173 | extern void do_raw_spin_lock(raw_spinlock_t *lock) __acquires(lock); |
9828ea9d TG |
174 | #define do_raw_spin_lock_flags(lock, flags) do_raw_spin_lock(lock) |
175 | extern int do_raw_spin_trylock(raw_spinlock_t *lock); | |
b97c4bc1 | 176 | extern void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock); |
fb1c8f93 | 177 | #else |
b97c4bc1 | 178 | static inline void do_raw_spin_lock(raw_spinlock_t *lock) __acquires(lock) |
c2f21ce2 | 179 | { |
b97c4bc1 | 180 | __acquire(lock); |
c2f21ce2 | 181 | arch_spin_lock(&lock->raw_lock); |
60ca1e5a | 182 | mmiowb_spin_lock(); |
c2f21ce2 TG |
183 | } |
184 | ||
a4c1887d WD |
185 | #ifndef arch_spin_lock_flags |
186 | #define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock) | |
187 | #endif | |
188 | ||
c2f21ce2 | 189 | static inline void |
b97c4bc1 | 190 | do_raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long *flags) __acquires(lock) |
c2f21ce2 | 191 | { |
b97c4bc1 | 192 | __acquire(lock); |
c2f21ce2 | 193 | arch_spin_lock_flags(&lock->raw_lock, *flags); |
60ca1e5a | 194 | mmiowb_spin_lock(); |
c2f21ce2 TG |
195 | } |
196 | ||
9828ea9d | 197 | static inline int do_raw_spin_trylock(raw_spinlock_t *lock) |
c2f21ce2 | 198 | { |
60ca1e5a WD |
199 | int ret = arch_spin_trylock(&(lock)->raw_lock); |
200 | ||
201 | if (ret) | |
202 | mmiowb_spin_lock(); | |
203 | ||
204 | return ret; | |
c2f21ce2 TG |
205 | } |
206 | ||
b97c4bc1 | 207 | static inline void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock) |
c2f21ce2 | 208 | { |
60ca1e5a | 209 | mmiowb_spin_unlock(); |
c2f21ce2 | 210 | arch_spin_unlock(&lock->raw_lock); |
b97c4bc1 | 211 | __release(lock); |
c2f21ce2 | 212 | } |
fb1c8f93 | 213 | #endif |
1da177e4 | 214 | |
1da177e4 | 215 | /* |
ef12f109 | 216 | * Define the various spin_lock methods. Note we define these |
27972765 | 217 | * regardless of whether CONFIG_SMP or CONFIG_PREEMPTION are set. The |
ef12f109 TG |
218 | * various methods are defined as nops in the case they are not |
219 | * required. | |
1da177e4 | 220 | */ |
9c1721aa | 221 | #define raw_spin_trylock(lock) __cond_lock(lock, _raw_spin_trylock(lock)) |
1da177e4 | 222 | |
9c1721aa | 223 | #define raw_spin_lock(lock) _raw_spin_lock(lock) |
8a25d5de IM |
224 | |
225 | #ifdef CONFIG_DEBUG_LOCK_ALLOC | |
9c1721aa TG |
226 | # define raw_spin_lock_nested(lock, subclass) \ |
227 | _raw_spin_lock_nested(lock, subclass) | |
228 | ||
c2f21ce2 | 229 | # define raw_spin_lock_nest_lock(lock, nest_lock) \ |
b7d39aff PZ |
230 | do { \ |
231 | typecheck(struct lockdep_map *, &(nest_lock)->dep_map);\ | |
9c1721aa | 232 | _raw_spin_lock_nest_lock(lock, &(nest_lock)->dep_map); \ |
b7d39aff | 233 | } while (0) |
8a25d5de | 234 | #else |
4999201a BVA |
235 | /* |
236 | * Always evaluate the 'subclass' argument to avoid that the compiler | |
237 | * warns about set-but-not-used variables when building with | |
238 | * CONFIG_DEBUG_LOCK_ALLOC=n and with W=1. | |
239 | */ | |
240 | # define raw_spin_lock_nested(lock, subclass) \ | |
241 | _raw_spin_lock(((void)(subclass), (lock))) | |
9c1721aa | 242 | # define raw_spin_lock_nest_lock(lock, nest_lock) _raw_spin_lock(lock) |
8a25d5de IM |
243 | #endif |
244 | ||
fb1c8f93 | 245 | #if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) |
b8e6ec86 | 246 | |
c2f21ce2 | 247 | #define raw_spin_lock_irqsave(lock, flags) \ |
3f307891 SR |
248 | do { \ |
249 | typecheck(unsigned long, flags); \ | |
9c1721aa | 250 | flags = _raw_spin_lock_irqsave(lock); \ |
3f307891 | 251 | } while (0) |
cfd3ef23 AV |
252 | |
253 | #ifdef CONFIG_DEBUG_LOCK_ALLOC | |
c2f21ce2 | 254 | #define raw_spin_lock_irqsave_nested(lock, flags, subclass) \ |
3f307891 SR |
255 | do { \ |
256 | typecheck(unsigned long, flags); \ | |
9c1721aa | 257 | flags = _raw_spin_lock_irqsave_nested(lock, subclass); \ |
3f307891 | 258 | } while (0) |
cfd3ef23 | 259 | #else |
c2f21ce2 | 260 | #define raw_spin_lock_irqsave_nested(lock, flags, subclass) \ |
3f307891 SR |
261 | do { \ |
262 | typecheck(unsigned long, flags); \ | |
9c1721aa | 263 | flags = _raw_spin_lock_irqsave(lock); \ |
3f307891 | 264 | } while (0) |
cfd3ef23 AV |
265 | #endif |
266 | ||
1da177e4 | 267 | #else |
b8e6ec86 | 268 | |
c2f21ce2 | 269 | #define raw_spin_lock_irqsave(lock, flags) \ |
3f307891 SR |
270 | do { \ |
271 | typecheck(unsigned long, flags); \ | |
9c1721aa | 272 | _raw_spin_lock_irqsave(lock, flags); \ |
3f307891 | 273 | } while (0) |
ef12f109 | 274 | |
c2f21ce2 TG |
275 | #define raw_spin_lock_irqsave_nested(lock, flags, subclass) \ |
276 | raw_spin_lock_irqsave(lock, flags) | |
cfd3ef23 | 277 | |
1da177e4 LT |
278 | #endif |
279 | ||
9c1721aa TG |
280 | #define raw_spin_lock_irq(lock) _raw_spin_lock_irq(lock) |
281 | #define raw_spin_lock_bh(lock) _raw_spin_lock_bh(lock) | |
282 | #define raw_spin_unlock(lock) _raw_spin_unlock(lock) | |
283 | #define raw_spin_unlock_irq(lock) _raw_spin_unlock_irq(lock) | |
1da177e4 | 284 | |
c2f21ce2 TG |
285 | #define raw_spin_unlock_irqrestore(lock, flags) \ |
286 | do { \ | |
287 | typecheck(unsigned long, flags); \ | |
9c1721aa | 288 | _raw_spin_unlock_irqrestore(lock, flags); \ |
3f307891 | 289 | } while (0) |
9c1721aa | 290 | #define raw_spin_unlock_bh(lock) _raw_spin_unlock_bh(lock) |
1da177e4 | 291 | |
9c1721aa TG |
292 | #define raw_spin_trylock_bh(lock) \ |
293 | __cond_lock(lock, _raw_spin_trylock_bh(lock)) | |
1da177e4 | 294 | |
c2f21ce2 | 295 | #define raw_spin_trylock_irq(lock) \ |
1da177e4 LT |
296 | ({ \ |
297 | local_irq_disable(); \ | |
c2f21ce2 | 298 | raw_spin_trylock(lock) ? \ |
fb1c8f93 | 299 | 1 : ({ local_irq_enable(); 0; }); \ |
1da177e4 LT |
300 | }) |
301 | ||
c2f21ce2 | 302 | #define raw_spin_trylock_irqsave(lock, flags) \ |
1da177e4 LT |
303 | ({ \ |
304 | local_irq_save(flags); \ | |
c2f21ce2 | 305 | raw_spin_trylock(lock) ? \ |
fb1c8f93 | 306 | 1 : ({ local_irq_restore(flags); 0; }); \ |
1da177e4 LT |
307 | }) |
308 | ||
c2f21ce2 TG |
309 | /* Include rwlock functions */ |
310 | #include <linux/rwlock.h> | |
311 | ||
312 | /* | |
313 | * Pull the _spin_*()/_read_*()/_write_*() functions/declarations: | |
314 | */ | |
315 | #if defined(CONFIG_SMP) || defined(CONFIG_DEBUG_SPINLOCK) | |
316 | # include <linux/spinlock_api_smp.h> | |
317 | #else | |
318 | # include <linux/spinlock_api_up.h> | |
319 | #endif | |
320 | ||
321 | /* | |
322 | * Map the spin_lock functions to the raw variants for PREEMPT_RT=n | |
323 | */ | |
324 | ||
3490565b | 325 | static __always_inline raw_spinlock_t *spinlock_check(spinlock_t *lock) |
c2f21ce2 TG |
326 | { |
327 | return &lock->rlock; | |
328 | } | |
329 | ||
330 | #define spin_lock_init(_lock) \ | |
331 | do { \ | |
332 | spinlock_check(_lock); \ | |
333 | raw_spin_lock_init(&(_lock)->rlock); \ | |
334 | } while (0) | |
335 | ||
3490565b | 336 | static __always_inline void spin_lock(spinlock_t *lock) |
c2f21ce2 TG |
337 | { |
338 | raw_spin_lock(&lock->rlock); | |
339 | } | |
340 | ||
3490565b | 341 | static __always_inline void spin_lock_bh(spinlock_t *lock) |
c2f21ce2 TG |
342 | { |
343 | raw_spin_lock_bh(&lock->rlock); | |
344 | } | |
345 | ||
3490565b | 346 | static __always_inline int spin_trylock(spinlock_t *lock) |
c2f21ce2 TG |
347 | { |
348 | return raw_spin_trylock(&lock->rlock); | |
349 | } | |
350 | ||
351 | #define spin_lock_nested(lock, subclass) \ | |
352 | do { \ | |
353 | raw_spin_lock_nested(spinlock_check(lock), subclass); \ | |
354 | } while (0) | |
355 | ||
356 | #define spin_lock_nest_lock(lock, nest_lock) \ | |
357 | do { \ | |
358 | raw_spin_lock_nest_lock(spinlock_check(lock), nest_lock); \ | |
359 | } while (0) | |
360 | ||
3490565b | 361 | static __always_inline void spin_lock_irq(spinlock_t *lock) |
c2f21ce2 TG |
362 | { |
363 | raw_spin_lock_irq(&lock->rlock); | |
364 | } | |
365 | ||
366 | #define spin_lock_irqsave(lock, flags) \ | |
367 | do { \ | |
368 | raw_spin_lock_irqsave(spinlock_check(lock), flags); \ | |
369 | } while (0) | |
370 | ||
371 | #define spin_lock_irqsave_nested(lock, flags, subclass) \ | |
372 | do { \ | |
373 | raw_spin_lock_irqsave_nested(spinlock_check(lock), flags, subclass); \ | |
374 | } while (0) | |
375 | ||
3490565b | 376 | static __always_inline void spin_unlock(spinlock_t *lock) |
c2f21ce2 TG |
377 | { |
378 | raw_spin_unlock(&lock->rlock); | |
379 | } | |
380 | ||
3490565b | 381 | static __always_inline void spin_unlock_bh(spinlock_t *lock) |
c2f21ce2 TG |
382 | { |
383 | raw_spin_unlock_bh(&lock->rlock); | |
384 | } | |
385 | ||
3490565b | 386 | static __always_inline void spin_unlock_irq(spinlock_t *lock) |
c2f21ce2 TG |
387 | { |
388 | raw_spin_unlock_irq(&lock->rlock); | |
389 | } | |
390 | ||
3490565b | 391 | static __always_inline void spin_unlock_irqrestore(spinlock_t *lock, unsigned long flags) |
c2f21ce2 TG |
392 | { |
393 | raw_spin_unlock_irqrestore(&lock->rlock, flags); | |
394 | } | |
395 | ||
3490565b | 396 | static __always_inline int spin_trylock_bh(spinlock_t *lock) |
c2f21ce2 TG |
397 | { |
398 | return raw_spin_trylock_bh(&lock->rlock); | |
399 | } | |
400 | ||
3490565b | 401 | static __always_inline int spin_trylock_irq(spinlock_t *lock) |
c2f21ce2 TG |
402 | { |
403 | return raw_spin_trylock_irq(&lock->rlock); | |
404 | } | |
405 | ||
406 | #define spin_trylock_irqsave(lock, flags) \ | |
407 | ({ \ | |
408 | raw_spin_trylock_irqsave(spinlock_check(lock), flags); \ | |
409 | }) | |
410 | ||
b7e4aade AP |
411 | /** |
412 | * spin_is_locked() - Check whether a spinlock is locked. | |
413 | * @lock: Pointer to the spinlock. | |
414 | * | |
415 | * This function is NOT required to provide any memory ordering | |
416 | * guarantees; it could be used for debugging purposes or, when | |
417 | * additional synchronization is needed, accompanied with other | |
418 | * constructs (memory barriers) enforcing the synchronization. | |
419 | * | |
420 | * Returns: 1 if @lock is locked, 0 otherwise. | |
421 | * | |
422 | * Note that the function only tells you that the spinlock is | |
423 | * seen to be locked, not that it is locked on your CPU. | |
424 | * | |
425 | * Further, on CONFIG_SMP=n builds with CONFIG_DEBUG_SPINLOCK=n, | |
426 | * the return value is always 0 (see include/linux/spinlock_up.h). | |
427 | * Therefore you should not rely heavily on the return value. | |
428 | */ | |
3490565b | 429 | static __always_inline int spin_is_locked(spinlock_t *lock) |
c2f21ce2 TG |
430 | { |
431 | return raw_spin_is_locked(&lock->rlock); | |
432 | } | |
433 | ||
3490565b | 434 | static __always_inline int spin_is_contended(spinlock_t *lock) |
c2f21ce2 TG |
435 | { |
436 | return raw_spin_is_contended(&lock->rlock); | |
437 | } | |
438 | ||
4ebc1b4b | 439 | #define assert_spin_locked(lock) assert_raw_spin_locked(&(lock)->rlock) |
c2f21ce2 | 440 | |
1da177e4 | 441 | /* |
fb1c8f93 IM |
442 | * Pull the atomic_t declaration: |
443 | * (asm-mips/atomic.h needs above definitions) | |
1da177e4 | 444 | */ |
60063497 | 445 | #include <linux/atomic.h> |
fb1c8f93 IM |
446 | /** |
447 | * atomic_dec_and_lock - lock on reaching reference count zero | |
448 | * @atomic: the atomic counter | |
449 | * @lock: the spinlock in question | |
dc07e721 BF |
450 | * |
451 | * Decrements @atomic by 1. If the result is 0, returns true and locks | |
452 | * @lock. Returns false for all other cases. | |
1da177e4 | 453 | */ |
fb1c8f93 IM |
454 | extern int _atomic_dec_and_lock(atomic_t *atomic, spinlock_t *lock); |
455 | #define atomic_dec_and_lock(atomic, lock) \ | |
dcc8e559 | 456 | __cond_lock(lock, _atomic_dec_and_lock(atomic, lock)) |
1da177e4 | 457 | |
ccfbb5be AMG |
458 | extern int _atomic_dec_and_lock_irqsave(atomic_t *atomic, spinlock_t *lock, |
459 | unsigned long *flags); | |
460 | #define atomic_dec_and_lock_irqsave(atomic, lock, flags) \ | |
461 | __cond_lock(lock, _atomic_dec_and_lock_irqsave(atomic, lock, &(flags))) | |
462 | ||
ff93bca7 CW |
463 | int __alloc_bucket_spinlocks(spinlock_t **locks, unsigned int *lock_mask, |
464 | size_t max_size, unsigned int cpu_mult, | |
465 | gfp_t gfp, const char *name, | |
466 | struct lock_class_key *key); | |
467 | ||
468 | #define alloc_bucket_spinlocks(locks, lock_mask, max_size, cpu_mult, gfp) \ | |
469 | ({ \ | |
470 | static struct lock_class_key key; \ | |
471 | int ret; \ | |
472 | \ | |
473 | ret = __alloc_bucket_spinlocks(locks, lock_mask, max_size, \ | |
474 | cpu_mult, gfp, #locks, &key); \ | |
475 | ret; \ | |
476 | }) | |
92f36cca TH |
477 | |
478 | void free_bucket_spinlocks(spinlock_t *locks); | |
479 | ||
1da177e4 | 480 | #endif /* __LINUX_SPINLOCK_H */ |