]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - include/linux/ssb/ssb.h
ssb: Add support for block-I/O
[mirror_ubuntu-artful-kernel.git] / include / linux / ssb / ssb.h
CommitLineData
61e115a5
MB
1#ifndef LINUX_SSB_H_
2#define LINUX_SSB_H_
3
4#include <linux/device.h>
5#include <linux/list.h>
6#include <linux/types.h>
7#include <linux/spinlock.h>
8#include <linux/pci.h>
9#include <linux/mod_devicetable.h>
10
11#include <linux/ssb/ssb_regs.h>
12
13
14struct pcmcia_device;
15struct ssb_bus;
16struct ssb_driver;
17
61e115a5
MB
18struct ssb_sprom {
19 u8 revision;
ac82fab4
LF
20 u8 il0mac[6]; /* MAC address for 802.11b/g */
21 u8 et0mac[6]; /* MAC address for Ethernet */
22 u8 et1mac[6]; /* MAC address for 802.11a */
23 u8 et0phyaddr; /* MII address for enet0 */
24 u8 et1phyaddr; /* MII address for enet1 */
e861b98d
MB
25 u8 et0mdcport; /* MDIO for enet0 */
26 u8 et1mdcport; /* MDIO for enet1 */
27 u8 board_rev; /* Board revision number from SPROM. */
ac82fab4 28 u8 country_code; /* Country Code */
e861b98d
MB
29 u8 ant_available_a; /* A-PHY antenna available bits (up to 4) */
30 u8 ant_available_bg; /* B/G-PHY antenna available bits (up to 4) */
ac82fab4
LF
31 u16 pa0b0;
32 u16 pa0b1;
33 u16 pa0b2;
34 u16 pa1b0;
35 u16 pa1b1;
36 u16 pa1b2;
37 u8 gpio0; /* GPIO pin 0 */
38 u8 gpio1; /* GPIO pin 1 */
39 u8 gpio2; /* GPIO pin 2 */
40 u8 gpio3; /* GPIO pin 3 */
41 u16 maxpwr_a; /* A-PHY Amplifier Max Power (in dBm Q5.2) */
42 u16 maxpwr_bg; /* B/G-PHY Amplifier Max Power (in dBm Q5.2) */
43 u8 itssi_a; /* Idle TSSI Target for A-PHY */
44 u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
45 u16 boardflags_lo; /* Boardflags (low 16 bits) */
af4b7450 46 u16 boardflags_hi; /* Boardflags (high 16 bits) */
e861b98d
MB
47
48 /* Antenna gain values for up to 4 antennas
49 * on each band. Values in dBm/4 (Q5.2). Negative gain means the
50 * loss in the connectors is bigger than the gain. */
51 struct {
52 struct {
53 s8 a0, a1, a2, a3;
54 } ghz24; /* 2.4GHz band */
55 struct {
56 s8 a0, a1, a2, a3;
57 } ghz5; /* 5GHz band */
58 } antenna_gain;
ac82fab4
LF
59
60 /* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */
61e115a5
MB
61};
62
63/* Information about the PCB the circuitry is soldered on. */
64struct ssb_boardinfo {
65 u16 vendor;
66 u16 type;
67 u16 rev;
68};
69
70
71struct ssb_device;
72/* Lowlevel read/write operations on the device MMIO.
73 * Internal, don't use that outside of ssb. */
74struct ssb_bus_ops {
ffc7689d 75 u8 (*read8)(struct ssb_device *dev, u16 offset);
61e115a5
MB
76 u16 (*read16)(struct ssb_device *dev, u16 offset);
77 u32 (*read32)(struct ssb_device *dev, u16 offset);
ffc7689d 78 void (*write8)(struct ssb_device *dev, u16 offset, u8 value);
61e115a5
MB
79 void (*write16)(struct ssb_device *dev, u16 offset, u16 value);
80 void (*write32)(struct ssb_device *dev, u16 offset, u32 value);
d625a29b
MB
81#ifdef CONFIG_SSB_BLOCKIO
82 void (*block_read)(struct ssb_device *dev, void *buffer,
83 size_t count, u16 offset, u8 reg_width);
84 void (*block_write)(struct ssb_device *dev, const void *buffer,
85 size_t count, u16 offset, u8 reg_width);
86#endif
61e115a5
MB
87};
88
89
90/* Core-ID values. */
91#define SSB_DEV_CHIPCOMMON 0x800
92#define SSB_DEV_ILINE20 0x801
93#define SSB_DEV_SDRAM 0x803
94#define SSB_DEV_PCI 0x804
95#define SSB_DEV_MIPS 0x805
96#define SSB_DEV_ETHERNET 0x806
97#define SSB_DEV_V90 0x807
98#define SSB_DEV_USB11_HOSTDEV 0x808
99#define SSB_DEV_ADSL 0x809
100#define SSB_DEV_ILINE100 0x80A
101#define SSB_DEV_IPSEC 0x80B
102#define SSB_DEV_PCMCIA 0x80D
103#define SSB_DEV_INTERNAL_MEM 0x80E
104#define SSB_DEV_MEMC_SDRAM 0x80F
105#define SSB_DEV_EXTIF 0x811
106#define SSB_DEV_80211 0x812
107#define SSB_DEV_MIPS_3302 0x816
108#define SSB_DEV_USB11_HOST 0x817
109#define SSB_DEV_USB11_DEV 0x818
110#define SSB_DEV_USB20_HOST 0x819
111#define SSB_DEV_USB20_DEV 0x81A
112#define SSB_DEV_SDIO_HOST 0x81B
113#define SSB_DEV_ROBOSWITCH 0x81C
114#define SSB_DEV_PARA_ATA 0x81D
115#define SSB_DEV_SATA_XORDMA 0x81E
116#define SSB_DEV_ETHERNET_GBIT 0x81F
117#define SSB_DEV_PCIE 0x820
118#define SSB_DEV_MIMO_PHY 0x821
119#define SSB_DEV_SRAM_CTRLR 0x822
120#define SSB_DEV_MINI_MACPHY 0x823
121#define SSB_DEV_ARM_1176 0x824
122#define SSB_DEV_ARM_7TDMI 0x825
123
124/* Vendor-ID values */
125#define SSB_VENDOR_BROADCOM 0x4243
126
127/* Some kernel subsystems poke with dev->drvdata, so we must use the
128 * following ugly workaround to get from struct device to struct ssb_device */
129struct __ssb_dev_wrapper {
130 struct device dev;
131 struct ssb_device *sdev;
132};
133
134struct ssb_device {
135 /* Having a copy of the ops pointer in each dev struct
136 * is an optimization. */
137 const struct ssb_bus_ops *ops;
138
139 struct device *dev;
140 struct ssb_bus *bus;
141 struct ssb_device_id id;
142
143 u8 core_index;
144 unsigned int irq;
145
146 /* Internal-only stuff follows. */
147 void *drvdata; /* Per-device data */
148 void *devtypedata; /* Per-devicetype (eg 802.11) data */
149};
150
151/* Go from struct device to struct ssb_device. */
152static inline
153struct ssb_device * dev_to_ssb_dev(struct device *dev)
154{
155 struct __ssb_dev_wrapper *wrap;
156 wrap = container_of(dev, struct __ssb_dev_wrapper, dev);
157 return wrap->sdev;
158}
159
160/* Device specific user data */
161static inline
162void ssb_set_drvdata(struct ssb_device *dev, void *data)
163{
164 dev->drvdata = data;
165}
166static inline
167void * ssb_get_drvdata(struct ssb_device *dev)
168{
169 return dev->drvdata;
170}
171
172/* Devicetype specific user data. This is per device-type (not per device) */
173void ssb_set_devtypedata(struct ssb_device *dev, void *data);
174static inline
175void * ssb_get_devtypedata(struct ssb_device *dev)
176{
177 return dev->devtypedata;
178}
179
180
181struct ssb_driver {
182 const char *name;
183 const struct ssb_device_id *id_table;
184
185 int (*probe)(struct ssb_device *dev, const struct ssb_device_id *id);
186 void (*remove)(struct ssb_device *dev);
187 int (*suspend)(struct ssb_device *dev, pm_message_t state);
188 int (*resume)(struct ssb_device *dev);
189 void (*shutdown)(struct ssb_device *dev);
190
191 struct device_driver drv;
192};
193#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
194
195extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
196static inline int ssb_driver_register(struct ssb_driver *drv)
197{
198 return __ssb_driver_register(drv, THIS_MODULE);
199}
200extern void ssb_driver_unregister(struct ssb_driver *drv);
201
202
203
204
205enum ssb_bustype {
206 SSB_BUSTYPE_SSB, /* This SSB bus is the system bus */
207 SSB_BUSTYPE_PCI, /* SSB is connected to PCI bus */
208 SSB_BUSTYPE_PCMCIA, /* SSB is connected to PCMCIA bus */
209};
210
211/* board_vendor */
212#define SSB_BOARDVENDOR_BCM 0x14E4 /* Broadcom */
213#define SSB_BOARDVENDOR_DELL 0x1028 /* Dell */
214#define SSB_BOARDVENDOR_HP 0x0E11 /* HP */
215/* board_type */
216#define SSB_BOARD_BCM94306MP 0x0418
217#define SSB_BOARD_BCM4309G 0x0421
218#define SSB_BOARD_BCM4306CB 0x0417
219#define SSB_BOARD_BCM4309MP 0x040C
220#define SSB_BOARD_MP4318 0x044A
221#define SSB_BOARD_BU4306 0x0416
222#define SSB_BOARD_BU4309 0x040A
223/* chip_package */
224#define SSB_CHIPPACK_BCM4712S 1 /* Small 200pin 4712 */
225#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
226#define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */
227
228#include <linux/ssb/ssb_driver_chipcommon.h>
229#include <linux/ssb/ssb_driver_mips.h>
230#include <linux/ssb/ssb_driver_extif.h>
231#include <linux/ssb/ssb_driver_pci.h>
232
233struct ssb_bus {
234 /* The MMIO area. */
235 void __iomem *mmio;
236
237 const struct ssb_bus_ops *ops;
238
239 /* The core in the basic address register window. (PCI bus only) */
240 struct ssb_device *mapped_device;
241 /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
242 u8 mapped_pcmcia_seg;
993e1c78
MB
243 /* Lock for core and segment switching.
244 * On PCMCIA-host busses this is used to protect the whole MMIO access. */
61e115a5
MB
245 spinlock_t bar_lock;
246
247 /* The bus this backplane is running on. */
248 enum ssb_bustype bustype;
249 /* Pointer to the PCI bus (only valid if bustype == SSB_BUSTYPE_PCI). */
250 struct pci_dev *host_pci;
251 /* Pointer to the PCMCIA device (only if bustype == SSB_BUSTYPE_PCMCIA). */
252 struct pcmcia_device *host_pcmcia;
253
e7ec2e32 254#ifdef CONFIG_SSB_SPROM
61e115a5 255 /* Mutex to protect the SPROM writing. */
e7ec2e32 256 struct mutex sprom_mutex;
61e115a5
MB
257#endif
258
259 /* ID information about the Chip. */
260 u16 chip_id;
261 u16 chip_rev;
c272ef44 262 u16 sprom_size; /* number of words in sprom */
61e115a5
MB
263 u8 chip_package;
264
265 /* List of devices (cores) on the backplane. */
266 struct ssb_device devices[SSB_MAX_NR_CORES];
267 u8 nr_devices;
268
61e115a5
MB
269 /* Software ID number for this bus. */
270 unsigned int busnumber;
271
272 /* The ChipCommon device (if available). */
273 struct ssb_chipcommon chipco;
274 /* The PCI-core device (if available). */
275 struct ssb_pcicore pcicore;
276 /* The MIPS-core device (if available). */
277 struct ssb_mipscore mipscore;
278 /* The EXTif-core device (if available). */
279 struct ssb_extif extif;
280
281 /* The following structure elements are not available in early
282 * SSB initialization. Though, they are available for regular
283 * registered drivers at any stage. So be careful when
284 * using them in the ssb core code. */
285
286 /* ID information about the PCB. */
287 struct ssb_boardinfo boardinfo;
288 /* Contents of the SPROM. */
289 struct ssb_sprom sprom;
7cb44615
MB
290 /* If the board has a cardbus slot, this is set to true. */
291 bool has_cardbus_slot;
61e115a5 292
53521d8c
MB
293#ifdef CONFIG_SSB_EMBEDDED
294 /* Lock for GPIO register access. */
295 spinlock_t gpio_lock;
296#endif /* EMBEDDED */
297
61e115a5
MB
298 /* Internal-only stuff follows. Do not touch. */
299 struct list_head list;
300#ifdef CONFIG_SSB_DEBUG
301 /* Is the bus already powered up? */
302 bool powered_up;
303 int power_warn_count;
304#endif /* DEBUG */
305};
306
307/* The initialization-invariants. */
308struct ssb_init_invariants {
7cb44615 309 /* Versioning information about the PCB. */
61e115a5 310 struct ssb_boardinfo boardinfo;
7cb44615
MB
311 /* The SPROM information. That's either stored in an
312 * EEPROM or NVRAM on the board. */
61e115a5 313 struct ssb_sprom sprom;
7cb44615
MB
314 /* If the board has a cardbus slot, this is set to true. */
315 bool has_cardbus_slot;
61e115a5
MB
316};
317/* Type of function to fetch the invariants. */
318typedef int (*ssb_invariants_func_t)(struct ssb_bus *bus,
319 struct ssb_init_invariants *iv);
320
321/* Register a SSB system bus. get_invariants() is called after the
322 * basic system devices are initialized.
323 * The invariants are usually fetched from some NVRAM.
324 * Put the invariants into the struct pointed to by iv. */
325extern int ssb_bus_ssbbus_register(struct ssb_bus *bus,
326 unsigned long baseaddr,
327 ssb_invariants_func_t get_invariants);
328#ifdef CONFIG_SSB_PCIHOST
329extern int ssb_bus_pcibus_register(struct ssb_bus *bus,
330 struct pci_dev *host_pci);
331#endif /* CONFIG_SSB_PCIHOST */
332#ifdef CONFIG_SSB_PCMCIAHOST
333extern int ssb_bus_pcmciabus_register(struct ssb_bus *bus,
334 struct pcmcia_device *pcmcia_dev,
335 unsigned long baseaddr);
336#endif /* CONFIG_SSB_PCMCIAHOST */
337
338extern void ssb_bus_unregister(struct ssb_bus *bus);
339
8fe2b65a
MB
340/* Suspend a SSB bus.
341 * Call this from the parent bus suspend routine. */
342extern int ssb_bus_suspend(struct ssb_bus *bus);
343/* Resume a SSB bus.
344 * Call this from the parent bus resume routine. */
345extern int ssb_bus_resume(struct ssb_bus *bus);
346
61e115a5
MB
347extern u32 ssb_clockspeed(struct ssb_bus *bus);
348
349/* Is the device enabled in hardware? */
350int ssb_device_is_enabled(struct ssb_device *dev);
351/* Enable a device and pass device-specific SSB_TMSLOW flags.
352 * If no device-specific flags are available, use 0. */
353void ssb_device_enable(struct ssb_device *dev, u32 core_specific_flags);
354/* Disable a device in hardware and pass SSB_TMSLOW flags (if any). */
355void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags);
356
357
358/* Device MMIO register read/write functions. */
ffc7689d
MB
359static inline u8 ssb_read8(struct ssb_device *dev, u16 offset)
360{
361 return dev->ops->read8(dev, offset);
362}
61e115a5
MB
363static inline u16 ssb_read16(struct ssb_device *dev, u16 offset)
364{
365 return dev->ops->read16(dev, offset);
366}
367static inline u32 ssb_read32(struct ssb_device *dev, u16 offset)
368{
369 return dev->ops->read32(dev, offset);
370}
ffc7689d
MB
371static inline void ssb_write8(struct ssb_device *dev, u16 offset, u8 value)
372{
373 dev->ops->write8(dev, offset, value);
374}
61e115a5
MB
375static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value)
376{
377 dev->ops->write16(dev, offset, value);
378}
379static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value)
380{
381 dev->ops->write32(dev, offset, value);
382}
d625a29b
MB
383#ifdef CONFIG_SSB_BLOCKIO
384static inline void ssb_block_read(struct ssb_device *dev, void *buffer,
385 size_t count, u16 offset, u8 reg_width)
386{
387 dev->ops->block_read(dev, buffer, count, offset, reg_width);
388}
389
390static inline void ssb_block_write(struct ssb_device *dev, const void *buffer,
391 size_t count, u16 offset, u8 reg_width)
392{
393 dev->ops->block_write(dev, buffer, count, offset, reg_width);
394}
395#endif /* CONFIG_SSB_BLOCKIO */
61e115a5
MB
396
397
398/* Translation (routing) bits that need to be ORed to DMA
399 * addresses before they are given to a device. */
400extern u32 ssb_dma_translation(struct ssb_device *dev);
401#define SSB_DMA_TRANSLATION_MASK 0xC0000000
402#define SSB_DMA_TRANSLATION_SHIFT 30
403
404extern int ssb_dma_set_mask(struct ssb_device *ssb_dev, u64 mask);
405
406
407#ifdef CONFIG_SSB_PCIHOST
408/* PCI-host wrapper driver */
409extern int ssb_pcihost_register(struct pci_driver *driver);
410static inline void ssb_pcihost_unregister(struct pci_driver *driver)
411{
412 pci_unregister_driver(driver);
413}
961d57c8
MB
414
415static inline
416void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
417{
418 if (sdev->bus->bustype == SSB_BUSTYPE_PCI)
419 pci_set_power_state(sdev->bus->host_pci, state);
420}
532031d7
AM
421#else
422static inline void ssb_pcihost_unregister(struct pci_driver *driver)
423{
424}
425
426static inline
427void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state)
428{
429}
61e115a5
MB
430#endif /* CONFIG_SSB_PCIHOST */
431
432
433/* If a driver is shutdown or suspended, call this to signal
434 * that the bus may be completely powered down. SSB will decide,
435 * if it's really time to power down the bus, based on if there
436 * are other devices that want to run. */
437extern int ssb_bus_may_powerdown(struct ssb_bus *bus);
438/* Before initializing and enabling a device, call this to power-up the bus.
439 * If you want to allow use of dynamic-power-control, pass the flag.
440 * Otherwise static always-on powercontrol will be used. */
441extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
442
443
444/* Various helper functions */
445extern u32 ssb_admatch_base(u32 adm);
446extern u32 ssb_admatch_size(u32 adm);
447
aab547ce
MB
448/* PCI device mapping and fixup routines.
449 * Called from the architecture pcibios init code.
450 * These are only available on SSB_EMBEDDED configurations. */
451#ifdef CONFIG_SSB_EMBEDDED
452int ssb_pcibios_plat_dev_init(struct pci_dev *dev);
453int ssb_pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
454#endif /* CONFIG_SSB_EMBEDDED */
61e115a5
MB
455
456#endif /* LINUX_SSB_H_ */