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[media] s5p-fimc: Add device tree support for the media device driver
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5f3cc447 1/*
56bc911a 2 * Samsung S5P/Exynos4 SoC series camera interface driver header
5f3cc447 3 *
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4 * Copyright (C) 2010 - 2013 Samsung Electronics Co., Ltd.
5 * Sylwester Nawrocki <s.nawrocki@samsung.com>
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6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
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12#ifndef S5P_FIMC_H_
13#define S5P_FIMC_H_
5f3cc447 14
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15#include <media/media-entity.h>
16
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17/*
18 * Enumeration of data inputs to the camera subsystem.
19 */
20enum fimc_input {
21 FIMC_INPUT_PARALLEL_0 = 1,
22 FIMC_INPUT_PARALLEL_1,
23 FIMC_INPUT_MIPI_CSI2_0 = 3,
24 FIMC_INPUT_MIPI_CSI2_1,
25 FIMC_INPUT_WRITEBACK_A = 5,
26 FIMC_INPUT_WRITEBACK_B,
27 FIMC_INPUT_WRITEBACK_ISP = 5,
28};
29
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30/*
31 * Enumeration of the FIMC data bus types.
32 */
33enum fimc_bus_type {
34 /* Camera parallel bus */
35 FIMC_BUS_TYPE_ITU_601 = 1,
36 /* Camera parallel bus with embedded synchronization */
37 FIMC_BUS_TYPE_ITU_656,
38 /* Camera MIPI-CSI2 serial bus */
39 FIMC_BUS_TYPE_MIPI_CSI2,
40 /* FIFO link from LCD controller (WriteBack A) */
41 FIMC_BUS_TYPE_LCD_WRITEBACK_A,
42 /* FIFO link from LCD controller (WriteBack B) */
43 FIMC_BUS_TYPE_LCD_WRITEBACK_B,
44 /* FIFO link from FIMC-IS */
45 FIMC_BUS_TYPE_ISP_WRITEBACK = FIMC_BUS_TYPE_LCD_WRITEBACK_B,
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46};
47
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48struct i2c_board_info;
49
50/**
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51 * struct fimc_source_info - video source description required for the host
52 * interface configuration
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53 *
54 * @board_info: pointer to I2C subdevice's board info
a25be18d 55 * @clk_frequency: frequency of the clock the host interface provides to sensor
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56 * @fimc_bus_type: FIMC camera input type
57 * @sensor_bus_type: image sensor bus type, MIPI, ITU-R BT.601 etc.
58 * @flags: the parallel sensor bus flags defining signals polarity (V4L2_MBUS_*)
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59 * @i2c_bus_num: i2c control bus id the sensor is attached to
60 * @mux_id: FIMC camera interface multiplexer index (separate for MIPI and ITU)
d3953223 61 * @clk_id: index of the SoC peripheral clock for sensors
5f3cc447 62 */
56bc911a 63struct fimc_source_info {
5f3cc447 64 struct i2c_board_info *board_info;
a25be18d 65 unsigned long clk_frequency;
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66 enum fimc_bus_type fimc_bus_type;
67 enum fimc_bus_type sensor_bus_type;
68 u16 flags;
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69 u16 i2c_bus_num;
70 u16 mux_id;
d3953223 71 u8 clk_id;
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72};
73
5f3cc447 74/**
df7e09a3 75 * struct s5p_platform_fimc - camera host interface platform data
5f3cc447 76 *
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77 * @source_info: properties of an image source for the host interface setup
78 * @num_clients: the number of attached image sources
5f3cc447 79 */
df7e09a3 80struct s5p_platform_fimc {
56bc911a 81 struct fimc_source_info *source_info;
117182d1 82 int num_clients;
5f3cc447 83};
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84
85/*
86 * v4l2_device notification id. This is only for internal use in the kernel.
87 * Sensor subdevs should issue S5P_FIMC_TX_END_NOTIFY notification in single
88 * frame capture mode when there is only one VSYNC pulse issued by the sensor
89 * at begining of the frame transmission.
90 */
91#define S5P_FIMC_TX_END_NOTIFY _IO('e', 0)
92
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93enum fimc_subdev_index {
94 IDX_SENSOR,
95 IDX_CSIS,
96 IDX_FLITE,
e2985a26 97 IDX_IS_ISP,
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98 IDX_FIMC,
99 IDX_MAX,
100};
101
102struct media_pipeline;
103struct v4l2_subdev;
104
105struct fimc_pipeline {
106 struct v4l2_subdev *subdevs[IDX_MAX];
107 struct media_pipeline *m_pipeline;
108};
109
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110/*
111 * Media pipeline operations to be called from within the fimc(-lite)
112 * video node when it is the last entity of the pipeline. Implemented
113 * by corresponding media device driver.
114 */
115struct fimc_pipeline_ops {
116 int (*open)(struct fimc_pipeline *p, struct media_entity *me,
117 bool resume);
118 int (*close)(struct fimc_pipeline *p);
119 int (*set_stream)(struct fimc_pipeline *p, bool state);
120};
121
122#define fimc_pipeline_call(f, op, p, args...) \
123 (!(f) ? -ENODEV : (((f)->pipeline_ops && (f)->pipeline_ops->op) ? \
124 (f)->pipeline_ops->op((p), ##args) : -ENOIOCTLCMD))
125
df7e09a3 126#endif /* S5P_FIMC_H_ */