[mirror_ubuntu-bionic-kernel.git] / include / net / caif / caif_hsi.h

/*
 * Copyright (C) ST-Ericsson AB 2010
 * Contact: Sjur Brendeland / sjur.brandeland@stericsson.com
 * Author:  Daniel Martensson / daniel.martensson@stericsson.com
 *	    Dmitry.Tarnyagin  / dmitry.tarnyagin@stericsson.com
 * License terms: GNU General Public License (GPL) version 2
 */

#ifndef CAIF_HSI_H_
#define CAIF_HSI_H_

#include <net/caif/caif_layer.h>
#include <net/caif/caif_device.h>
#include <linux/atomic.h>

/*
 * Maximum number of CAIF frames that can reside in the same HSI frame.
 */
#define CFHSI_MAX_PKTS 15

/*
 * Maximum number of bytes used for the frame that can be embedded in the
 * HSI descriptor.
 */
#define CFHSI_MAX_EMB_FRM_SZ 96

/*
 * Decides if HSI buffers should be prefilled with 0xFF pattern for easier
 * debugging. Both TX and RX buffers will be filled before the transfer.
 */
#define CFHSI_DBG_PREFILL		0

/* Structure describing a HSI packet descriptor. */
#pragma pack(1) /* Byte alignment. */
struct cfhsi_desc {
	u8 header;
	u8 offset;
	u16 cffrm_len[CFHSI_MAX_PKTS];
	u8 emb_frm[CFHSI_MAX_EMB_FRM_SZ];
};
#pragma pack() /* Default alignment. */

/* Size of the complete HSI packet descriptor. */
#define CFHSI_DESC_SZ (sizeof(struct cfhsi_desc))

/*
 * Size of the complete HSI packet descriptor excluding the optional embedded
 * CAIF frame.
 */
#define CFHSI_DESC_SHORT_SZ (CFHSI_DESC_SZ - CFHSI_MAX_EMB_FRM_SZ)

/*
 * Maximum bytes transferred in one transfer.
 */
#define CFHSI_MAX_CAIF_FRAME_SZ 4096

#define CFHSI_MAX_PAYLOAD_SZ (CFHSI_MAX_PKTS * CFHSI_MAX_CAIF_FRAME_SZ)

/* Size of the complete HSI TX buffer. */
#define CFHSI_BUF_SZ_TX (CFHSI_DESC_SZ + CFHSI_MAX_PAYLOAD_SZ)

/* Size of the complete HSI RX buffer. */
#define CFHSI_BUF_SZ_RX ((2 * CFHSI_DESC_SZ) + CFHSI_MAX_PAYLOAD_SZ)

/* Bitmasks for the HSI descriptor. */
#define CFHSI_PIGGY_DESC		(0x01 << 7)

#define CFHSI_TX_STATE_IDLE			0
#define CFHSI_TX_STATE_XFER			1

#define CFHSI_RX_STATE_DESC			0
#define CFHSI_RX_STATE_PAYLOAD			1

/* Bitmasks for power management. */
#define CFHSI_WAKE_UP				0
#define CFHSI_WAKE_UP_ACK			1
#define CFHSI_WAKE_DOWN_ACK			2
#define CFHSI_AWAKE				3
#define CFHSI_WAKELOCK_HELD			4
#define CFHSI_SHUTDOWN				5
#define CFHSI_FLUSH_FIFO			6

#ifndef CFHSI_INACTIVITY_TOUT
#define CFHSI_INACTIVITY_TOUT			(1 * HZ)
#endif /* CFHSI_INACTIVITY_TOUT */

#ifndef CFHSI_WAKE_TOUT
#define CFHSI_WAKE_TOUT			(3 * HZ)
#endif /* CFHSI_WAKE_TOUT */

#ifndef CFHSI_MAX_RX_RETRIES
#define CFHSI_MAX_RX_RETRIES		(10 * HZ)
#endif

/* Structure implemented by the CAIF HSI driver. */
struct cfhsi_cb_ops {
	void (*tx_done_cb) (struct cfhsi_cb_ops *drv);
	void (*rx_done_cb) (struct cfhsi_cb_ops *drv);
	void (*wake_up_cb) (struct cfhsi_cb_ops *drv);
	void (*wake_down_cb) (struct cfhsi_cb_ops *drv);
};

/* Structure implemented by HSI device. */
struct cfhsi_ops {
	int (*cfhsi_up) (struct cfhsi_ops *dev);
	int (*cfhsi_down) (struct cfhsi_ops *dev);
	int (*cfhsi_tx) (u8 *ptr, int len, struct cfhsi_ops *dev);
	int (*cfhsi_rx) (u8 *ptr, int len, struct cfhsi_ops *dev);
	int (*cfhsi_wake_up) (struct cfhsi_ops *dev);
	int (*cfhsi_wake_down) (struct cfhsi_ops *dev);
	int (*cfhsi_get_peer_wake) (struct cfhsi_ops *dev, bool *status);
	int (*cfhsi_fifo_occupancy) (struct cfhsi_ops *dev, size_t *occupancy);
	int (*cfhsi_rx_cancel)(struct cfhsi_ops *dev);
	struct cfhsi_cb_ops *cb_ops;
};

/* Structure holds status of received CAIF frames processing */
struct cfhsi_rx_state {
	int state;
	int nfrms;
	int pld_len;
	int retries;
	bool piggy_desc;
};

/* Priority mapping */
enum {
	CFHSI_PRIO_CTL = 0,
	CFHSI_PRIO_VI,
	CFHSI_PRIO_VO,
	CFHSI_PRIO_BEBK,
	CFHSI_PRIO_LAST,
};

struct cfhsi_config {
	u32 inactivity_timeout;
	u32 aggregation_timeout;
	u32 head_align;
	u32 tail_align;
	u32 q_high_mark;
	u32 q_low_mark;
};

/* Structure implemented by CAIF HSI drivers. */
struct cfhsi {
	struct caif_dev_common cfdev;
	struct net_device *ndev;
	struct platform_device *pdev;
	struct sk_buff_head qhead[CFHSI_PRIO_LAST];
	struct cfhsi_cb_ops cb_ops;
	struct cfhsi_ops *ops;
	int tx_state;
	struct cfhsi_rx_state rx_state;
	struct cfhsi_config cfg;
	int rx_len;
	u8 *rx_ptr;
	u8 *tx_buf;
	u8 *rx_buf;
	u8 *rx_flip_buf;
	spinlock_t lock;
	int flow_off_sent;
	struct list_head list;
	struct work_struct wake_up_work;
	struct work_struct wake_down_work;
	struct work_struct out_of_sync_work;
	struct workqueue_struct *wq;
	wait_queue_head_t wake_up_wait;
	wait_queue_head_t wake_down_wait;
	wait_queue_head_t flush_fifo_wait;
	struct timer_list inactivity_timer;
	struct timer_list rx_slowpath_timer;

	/* TX aggregation */
	int aggregation_len;
	struct timer_list aggregation_timer;

	unsigned long bits;
};
extern struct platform_driver cfhsi_driver;

/**
 * enum ifla_caif_hsi - CAIF HSI NetlinkRT parameters.
 * @IFLA_CAIF_HSI_INACTIVITY_TOUT: Inactivity timeout before
 *			taking the HSI wakeline down, in milliseconds.
 * When using RT Netlink to create, destroy or configure a CAIF HSI interface,
 * enum ifla_caif_hsi is used to specify the configuration attributes.
 */
enum ifla_caif_hsi {
	__IFLA_CAIF_HSI_UNSPEC,
	__IFLA_CAIF_HSI_INACTIVITY_TOUT,
	__IFLA_CAIF_HSI_AGGREGATION_TOUT,
	__IFLA_CAIF_HSI_HEAD_ALIGN,
	__IFLA_CAIF_HSI_TAIL_ALIGN,
	__IFLA_CAIF_HSI_QHIGH_WATERMARK,
	__IFLA_CAIF_HSI_QLOW_WATERMARK,
	__IFLA_CAIF_HSI_MAX
};

extern struct cfhsi_ops *cfhsi_get_ops(void);

#endif		/* CAIF_HSI_H_ */
Commit	Line	Data
40d69043 DT	1	/*
	2	* Copyright (C) ST-Ericsson AB 2010
	3	* Contact: Sjur Brendeland / sjur.brandeland@stericsson.com
	4	* Author: Daniel Martensson / daniel.martensson@stericsson.com
	5	* Dmitry.Tarnyagin / dmitry.tarnyagin@stericsson.com
	6	* License terms: GNU General Public License (GPL) version 2
	7	*/
	8
	9	#ifndef CAIF_HSI_H_
	10	#define CAIF_HSI_H_
	11
	12	#include <net/caif/caif_layer.h>
	13	#include <net/caif/caif_device.h>
	14	#include <linux/atomic.h>
	15
	16	/*
	17	* Maximum number of CAIF frames that can reside in the same HSI frame.
	18	*/
	19	#define CFHSI_MAX_PKTS 15
	20
	21	/*
	22	* Maximum number of bytes used for the frame that can be embedded in the
	23	* HSI descriptor.
	24	*/
	25	#define CFHSI_MAX_EMB_FRM_SZ 96
	26
	27	/*
	28	* Decides if HSI buffers should be prefilled with 0xFF pattern for easier
	29	* debugging. Both TX and RX buffers will be filled before the transfer.
	30	*/
	31	#define CFHSI_DBG_PREFILL 0
	32
	33	/* Structure describing a HSI packet descriptor. */
	34	#pragma pack(1) /* Byte alignment. */
	35	struct cfhsi_desc {
	36	u8 header;
	37	u8 offset;
	38	u16 cffrm_len[CFHSI_MAX_PKTS];
	39	u8 emb_frm[CFHSI_MAX_EMB_FRM_SZ];
	40	};
	41	#pragma pack() /* Default alignment. */
	42
	43	/* Size of the complete HSI packet descriptor. */
	44	#define CFHSI_DESC_SZ (sizeof(struct cfhsi_desc))
	45
	46	/*
	47	* Size of the complete HSI packet descriptor excluding the optional embedded
	48	* CAIF frame.
	49	*/
	50	#define CFHSI_DESC_SHORT_SZ (CFHSI_DESC_SZ - CFHSI_MAX_EMB_FRM_SZ)
	51
	52	/*
	53	* Maximum bytes transferred in one transfer.
	54	*/
5bbed92d DM	55	#define CFHSI_MAX_CAIF_FRAME_SZ 4096
	56
	57	#define CFHSI_MAX_PAYLOAD_SZ (CFHSI_MAX_PKTS * CFHSI_MAX_CAIF_FRAME_SZ)
40d69043 DT	58
	59	/* Size of the complete HSI TX buffer. */
	60	#define CFHSI_BUF_SZ_TX (CFHSI_DESC_SZ + CFHSI_MAX_PAYLOAD_SZ)
	61
	62	/* Size of the complete HSI RX buffer. */
	63	#define CFHSI_BUF_SZ_RX ((2 * CFHSI_DESC_SZ) + CFHSI_MAX_PAYLOAD_SZ)
	64
	65	/* Bitmasks for the HSI descriptor. */
	66	#define CFHSI_PIGGY_DESC (0x01 << 7)
	67
	68	#define CFHSI_TX_STATE_IDLE 0
	69	#define CFHSI_TX_STATE_XFER 1
	70
	71	#define CFHSI_RX_STATE_DESC 0
	72	#define CFHSI_RX_STATE_PAYLOAD 1
	73
	74	/* Bitmasks for power management. */
	75	#define CFHSI_WAKE_UP 0
	76	#define CFHSI_WAKE_UP_ACK 1
	77	#define CFHSI_WAKE_DOWN_ACK 2
	78	#define CFHSI_AWAKE 3
687b13e9 DM	79	#define CFHSI_WAKELOCK_HELD 4
	80	#define CFHSI_SHUTDOWN 5
	81	#define CFHSI_FLUSH_FIFO 6
40d69043 DT	82
	83	#ifndef CFHSI_INACTIVITY_TOUT
	84	#define CFHSI_INACTIVITY_TOUT (1 * HZ)
	85	#endif /* CFHSI_INACTIVITY_TOUT */
	86
687b13e9 DM	87	#ifndef CFHSI_WAKE_TOUT
	88	#define CFHSI_WAKE_TOUT (3 * HZ)
	89	#endif /* CFHSI_WAKE_TOUT */
40d69043	90
687b13e9 DM	91	#ifndef CFHSI_MAX_RX_RETRIES
	92	#define CFHSI_MAX_RX_RETRIES (10 * HZ)
	93	#endif
40d69043 DT	94
40d69043 DT	95	/* Structure implemented by the CAIF HSI driver. */
1c385f1f SB	96	struct cfhsi_cb_ops {
	97	void (tx_done_cb) (struct cfhsi_cb_ops drv);
	98	void (rx_done_cb) (struct cfhsi_cb_ops drv);
	99	void (wake_up_cb) (struct cfhsi_cb_ops drv);
	100	void (wake_down_cb) (struct cfhsi_cb_ops drv);
40d69043 DT	101	};
	102
	103	/* Structure implemented by HSI device. */
1c385f1f SB	104	struct cfhsi_ops {
	105	int (cfhsi_up) (struct cfhsi_ops dev);
	106	int (cfhsi_down) (struct cfhsi_ops dev);
	107	int (cfhsi_tx) (u8 ptr, int len, struct cfhsi_ops *dev);
	108	int (cfhsi_rx) (u8 ptr, int len, struct cfhsi_ops *dev);
	109	int (cfhsi_wake_up) (struct cfhsi_ops dev);
	110	int (cfhsi_wake_down) (struct cfhsi_ops dev);
	111	int (cfhsi_get_peer_wake) (struct cfhsi_ops dev, bool *status);
	112	int (cfhsi_fifo_occupancy) (struct cfhsi_ops dev, size_t *occupancy);
	113	int (cfhsi_rx_cancel)(struct cfhsi_ops dev);
	114	struct cfhsi_cb_ops *cb_ops;
40d69043 DT	115	};
40d69043 DT	116
687b13e9 DM	117	/* Structure holds status of received CAIF frames processing */
	118	struct cfhsi_rx_state {
	119	int state;
	120	int nfrms;
	121	int pld_len;
	122	int retries;
	123	bool piggy_desc;
	124	};
	125
ece367d5 DT	126	/* Priority mapping */
	127	enum {
	128	CFHSI_PRIO_CTL = 0,
	129	CFHSI_PRIO_VI,
	130	CFHSI_PRIO_VO,
	131	CFHSI_PRIO_BEBK,
	132	CFHSI_PRIO_LAST,
	133	};
	134
91fa0cbc SB	135	struct cfhsi_config {
	136	u32 inactivity_timeout;
	137	u32 aggregation_timeout;
	138	u32 head_align;
	139	u32 tail_align;
	140	u32 q_high_mark;
	141	u32 q_low_mark;
	142	};
	143
40d69043 DT	144	/* Structure implemented by CAIF HSI drivers. */
	145	struct cfhsi {
	146	struct caif_dev_common cfdev;
	147	struct net_device *ndev;
	148	struct platform_device *pdev;
ece367d5	149	struct sk_buff_head qhead[CFHSI_PRIO_LAST];
1c385f1f SB	150	struct cfhsi_cb_ops cb_ops;
1c385f1f SB	151	struct cfhsi_ops *ops;
40d69043	152	int tx_state;
687b13e9	153	struct cfhsi_rx_state rx_state;
91fa0cbc	154	struct cfhsi_config cfg;
40d69043 DT	155	int rx_len;
	156	u8 *rx_ptr;
	157	u8 *tx_buf;
	158	u8 *rx_buf;
332ad43f	159	u8 *rx_flip_buf;
40d69043 DT	160	spinlock_t lock;
40d69043 DT	161	int flow_off_sent;
40d69043 DT	162	struct list_head list;
	163	struct work_struct wake_up_work;
	164	struct work_struct wake_down_work;
5bbed92d	165	struct work_struct out_of_sync_work;
40d69043 DT	166	struct workqueue_struct *wq;
	167	wait_queue_head_t wake_up_wait;
	168	wait_queue_head_t wake_down_wait;
	169	wait_queue_head_t flush_fifo_wait;
ece367d5	170	struct timer_list inactivity_timer;
687b13e9	171	struct timer_list rx_slowpath_timer;
ece367d5 DT	172
ece367d5 DT	173	/* TX aggregation */
ece367d5 DT	174	int aggregation_len;
	175	struct timer_list aggregation_timer;
	176
40d69043 DT	177	unsigned long bits;
40d69043 DT	178	};
40d69043 DT	179	extern struct platform_driver cfhsi_driver;
40d69043 DT	180
c4125400 SB	181	/**
	182	* enum ifla_caif_hsi - CAIF HSI NetlinkRT parameters.
	183	* @IFLA_CAIF_HSI_INACTIVITY_TOUT: Inactivity timeout before
	184	* taking the HSI wakeline down, in milliseconds.
	185	* When using RT Netlink to create, destroy or configure a CAIF HSI interface,
	186	* enum ifla_caif_hsi is used to specify the configuration attributes.
	187	*/
	188	enum ifla_caif_hsi {
	189	__IFLA_CAIF_HSI_UNSPEC,
	190	__IFLA_CAIF_HSI_INACTIVITY_TOUT,
	191	__IFLA_CAIF_HSI_AGGREGATION_TOUT,
	192	__IFLA_CAIF_HSI_HEAD_ALIGN,
	193	__IFLA_CAIF_HSI_TAIL_ALIGN,
	194	__IFLA_CAIF_HSI_QHIGH_WATERMARK,
	195	__IFLA_CAIF_HSI_QLOW_WATERMARK,
	196	__IFLA_CAIF_HSI_MAX
	197	};
	198
1c385f1f	199	extern struct cfhsi_ops *cfhsi_get_ops(void);
c4125400	200
40d69043	201	#endif /* CAIF_HSI_H_ */