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1/*
2 * QEMU CPU model
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
19 */
20#ifndef QEMU_CPU_H
21#define QEMU_CPU_H
22
fcd7d003 23#include <signal.h>
961f8395 24#include "hw/qdev-core.h"
c658b94f 25#include "exec/hwaddr.h"
1de7afc9 26#include "qemu/thread.h"
4917cf44 27#include "qemu/tls.h"
a23bbfda 28#include "qemu/typedefs.h"
dd83b06a 29
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30typedef int (*WriteCoreDumpFunction)(void *buf, size_t size, void *opaque);
31
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32/**
33 * vaddr:
34 * Type wide enough to contain any #target_ulong virtual address.
35 */
36typedef uint64_t vaddr;
37#define VADDR_PRId PRId64
38#define VADDR_PRIu PRIu64
39#define VADDR_PRIo PRIo64
40#define VADDR_PRIx PRIx64
41#define VADDR_PRIX PRIX64
42#define VADDR_MAX UINT64_MAX
43
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44/**
45 * SECTION:cpu
46 * @section_id: QEMU-cpu
47 * @title: CPU Class
48 * @short_description: Base class for all CPUs
49 */
50
51#define TYPE_CPU "cpu"
52
53#define CPU(obj) OBJECT_CHECK(CPUState, (obj), TYPE_CPU)
54#define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
55#define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TYPE_CPU)
56
57typedef struct CPUState CPUState;
58
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59typedef void (*CPUUnassignedAccess)(CPUState *cpu, hwaddr addr,
60 bool is_write, bool is_exec, int opaque,
61 unsigned size);
62
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63struct TranslationBlock;
64
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65/**
66 * CPUClass:
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67 * @class_by_name: Callback to map -cpu command line model name to an
68 * instantiatable CPU type.
f5df5baf 69 * @reset: Callback to reset the #CPUState to its initial state.
91b1df8c 70 * @reset_dump_flags: #CPUDumpFlags to use for reset logging.
97a8ea5a 71 * @do_interrupt: Callback for interrupt handling.
c658b94f 72 * @do_unassigned_access: Callback for unassigned access handling.
f3659eee 73 * @memory_rw_debug: Callback for GDB memory access.
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74 * @dump_state: Callback for dumping state.
75 * @dump_statistics: Callback for dumping statistics.
997395d3 76 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
444d5590 77 * @get_paging_enabled: Callback for inquiring whether paging is enabled.
a23bbfda 78 * @get_memory_mapping: Callback for obtaining the memory mappings.
f45748f1 79 * @set_pc: Callback for setting the Program Counter register.
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80 * @synchronize_from_tb: Callback for synchronizing state from a TCG
81 * #TranslationBlock.
00b941e5 82 * @get_phys_page_debug: Callback for obtaining a physical address.
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83 * @gdb_read_register: Callback for letting GDB read a register.
84 * @gdb_write_register: Callback for letting GDB write a register.
b170fce3 85 * @vmsd: State description for migration.
a0e372f0 86 * @gdb_num_core_regs: Number of core registers accessible to GDB.
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87 *
88 * Represents a CPU family or model.
89 */
90typedef struct CPUClass {
91 /*< private >*/
961f8395 92 DeviceClass parent_class;
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93 /*< public >*/
94
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95 ObjectClass *(*class_by_name)(const char *cpu_model);
96
dd83b06a 97 void (*reset)(CPUState *cpu);
91b1df8c 98 int reset_dump_flags;
97a8ea5a 99 void (*do_interrupt)(CPUState *cpu);
c658b94f 100 CPUUnassignedAccess do_unassigned_access;
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101 int (*memory_rw_debug)(CPUState *cpu, vaddr addr,
102 uint8_t *buf, int len, bool is_write);
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103 void (*dump_state)(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
104 int flags);
105 void (*dump_statistics)(CPUState *cpu, FILE *f,
106 fprintf_function cpu_fprintf, int flags);
997395d3 107 int64_t (*get_arch_id)(CPUState *cpu);
444d5590 108 bool (*get_paging_enabled)(const CPUState *cpu);
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109 void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list,
110 Error **errp);
f45748f1 111 void (*set_pc)(CPUState *cpu, vaddr value);
bdf7ae5b 112 void (*synchronize_from_tb)(CPUState *cpu, struct TranslationBlock *tb);
00b941e5 113 hwaddr (*get_phys_page_debug)(CPUState *cpu, vaddr addr);
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114 int (*gdb_read_register)(CPUState *cpu, uint8_t *buf, int reg);
115 int (*gdb_write_register)(CPUState *cpu, uint8_t *buf, int reg);
b170fce3 116
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117 int (*write_elf64_note)(WriteCoreDumpFunction f, CPUState *cpu,
118 int cpuid, void *opaque);
119 int (*write_elf64_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
120 void *opaque);
121 int (*write_elf32_note)(WriteCoreDumpFunction f, CPUState *cpu,
122 int cpuid, void *opaque);
123 int (*write_elf32_qemunote)(WriteCoreDumpFunction f, CPUState *cpu,
124 void *opaque);
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125
126 const struct VMStateDescription *vmsd;
127 int gdb_num_core_regs;
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128} CPUClass;
129
a60f24b5 130struct KVMState;
f7575c96 131struct kvm_run;
a60f24b5 132
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133/**
134 * CPUState:
55e5c285 135 * @cpu_index: CPU index (informative).
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136 * @nr_cores: Number of cores within this CPU package.
137 * @nr_threads: Number of threads within this CPU.
1b1ed8dc 138 * @numa_node: NUMA node this CPU is belonging to.
0d34282f 139 * @host_tid: Host thread ID.
0315c31c 140 * @running: #true if CPU is currently running (usermode).
61a46217 141 * @created: Indicates whether the CPU thread has been successfully created.
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142 * @interrupt_request: Indicates a pending interrupt request.
143 * @halted: Nonzero if the CPU is in suspended state.
4fdeee7c 144 * @stop: Indicates a pending stop request.
f324e766 145 * @stopped: Indicates the CPU has been artificially stopped.
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146 * @tcg_exit_req: Set to force TCG to stop executing linked TBs for this
147 * CPU and return to its top level loop.
ed2803da 148 * @singlestep_enabled: Flags for single-stepping.
c05efcb1 149 * @env_ptr: Pointer to subclass-specific CPUArchState field.
d77953b9 150 * @current_tb: Currently executing TB.
eac8b355 151 * @gdb_regs: Additional GDB registers.
a0e372f0 152 * @gdb_num_regs: Number of total registers accessible to GDB.
182735ef 153 * @next_cpu: Next CPU sharing TB cache.
8737c51c 154 * @kvm_fd: vCPU file descriptor for KVM.
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155 *
156 * State of one CPU core or thread.
157 */
158struct CPUState {
159 /*< private >*/
961f8395 160 DeviceState parent_obj;
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161 /*< public >*/
162
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163 int nr_cores;
164 int nr_threads;
1b1ed8dc 165 int numa_node;
ce3960eb 166
814e612e 167 struct QemuThread *thread;
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168#ifdef _WIN32
169 HANDLE hThread;
170#endif
9f09e18a 171 int thread_id;
0d34282f 172 uint32_t host_tid;
0315c31c 173 bool running;
f5c121b8 174 struct QemuCond *halt_cond;
c64ca814 175 struct qemu_work_item *queued_work_first, *queued_work_last;
216fc9a4 176 bool thread_kicked;
61a46217 177 bool created;
4fdeee7c 178 bool stop;
f324e766 179 bool stopped;
fcd7d003 180 volatile sig_atomic_t exit_request;
378df4b2 181 volatile sig_atomic_t tcg_exit_req;
259186a7 182 uint32_t interrupt_request;
ed2803da 183 int singlestep_enabled;
bcba2a72 184
c05efcb1 185 void *env_ptr; /* CPUArchState */
d77953b9 186 struct TranslationBlock *current_tb;
eac8b355 187 struct GDBRegisterState *gdb_regs;
a0e372f0 188 int gdb_num_regs;
182735ef 189 CPUState *next_cpu;
d77953b9 190
8737c51c 191 int kvm_fd;
20d695a9 192 bool kvm_vcpu_dirty;
a60f24b5 193 struct KVMState *kvm_state;
f7575c96 194 struct kvm_run *kvm_run;
8737c51c 195
f5df5baf 196 /* TODO Move common fields from CPUArchState here. */
55e5c285 197 int cpu_index; /* used by alpha TCG */
259186a7 198 uint32_t halted; /* used by alpha, cris, ppc TCG */
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199};
200
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201extern CPUState *first_cpu;
202
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203DECLARE_TLS(CPUState *, current_cpu);
204#define current_cpu tls_var(current_cpu)
205
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206/**
207 * cpu_paging_enabled:
208 * @cpu: The CPU whose state is to be inspected.
209 *
210 * Returns: %true if paging is enabled, %false otherwise.
211 */
212bool cpu_paging_enabled(const CPUState *cpu);
213
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214/**
215 * cpu_get_memory_mapping:
216 * @cpu: The CPU whose memory mappings are to be obtained.
217 * @list: Where to write the memory mappings to.
218 * @errp: Pointer for reporting an #Error.
219 */
220void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
221 Error **errp);
222
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223/**
224 * cpu_write_elf64_note:
225 * @f: pointer to a function that writes memory to a file
226 * @cpu: The CPU whose memory is to be dumped
227 * @cpuid: ID number of the CPU
228 * @opaque: pointer to the CPUState struct
229 */
230int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
231 int cpuid, void *opaque);
232
233/**
234 * cpu_write_elf64_qemunote:
235 * @f: pointer to a function that writes memory to a file
236 * @cpu: The CPU whose memory is to be dumped
237 * @cpuid: ID number of the CPU
238 * @opaque: pointer to the CPUState struct
239 */
240int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
241 void *opaque);
242
243/**
244 * cpu_write_elf32_note:
245 * @f: pointer to a function that writes memory to a file
246 * @cpu: The CPU whose memory is to be dumped
247 * @cpuid: ID number of the CPU
248 * @opaque: pointer to the CPUState struct
249 */
250int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu,
251 int cpuid, void *opaque);
252
253/**
254 * cpu_write_elf32_qemunote:
255 * @f: pointer to a function that writes memory to a file
256 * @cpu: The CPU whose memory is to be dumped
257 * @cpuid: ID number of the CPU
258 * @opaque: pointer to the CPUState struct
259 */
260int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,
261 void *opaque);
dd83b06a 262
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263/**
264 * CPUDumpFlags:
265 * @CPU_DUMP_CODE:
266 * @CPU_DUMP_FPU: dump FPU register state, not just integer
267 * @CPU_DUMP_CCOP: dump info about TCG QEMU's condition code optimization state
268 */
269enum CPUDumpFlags {
270 CPU_DUMP_CODE = 0x00010000,
271 CPU_DUMP_FPU = 0x00020000,
272 CPU_DUMP_CCOP = 0x00040000,
273};
274
275/**
276 * cpu_dump_state:
277 * @cpu: The CPU whose state is to be dumped.
278 * @f: File to dump to.
279 * @cpu_fprintf: Function to dump with.
280 * @flags: Flags what to dump.
281 *
282 * Dumps CPU state.
283 */
284void cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
285 int flags);
286
287/**
288 * cpu_dump_statistics:
289 * @cpu: The CPU whose state is to be dumped.
290 * @f: File to dump to.
291 * @cpu_fprintf: Function to dump with.
292 * @flags: Flags what to dump.
293 *
294 * Dumps CPU statistics.
295 */
296void cpu_dump_statistics(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf,
297 int flags);
298
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299#ifndef CONFIG_USER_ONLY
300/**
301 * cpu_get_phys_page_debug:
302 * @cpu: The CPU to obtain the physical page address for.
303 * @addr: The virtual address.
304 *
305 * Obtains the physical page corresponding to a virtual one.
306 * Use it only for debugging because no protection checks are done.
307 *
308 * Returns: Corresponding physical page address or -1 if no page found.
309 */
310static inline hwaddr cpu_get_phys_page_debug(CPUState *cpu, vaddr addr)
311{
312 CPUClass *cc = CPU_GET_CLASS(cpu);
313
314 return cc->get_phys_page_debug(cpu, addr);
315}
316#endif
317
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318/**
319 * cpu_reset:
320 * @cpu: The CPU whose state is to be reset.
321 */
322void cpu_reset(CPUState *cpu);
323
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324/**
325 * cpu_class_by_name:
326 * @typename: The CPU base type.
327 * @cpu_model: The model string without any parameters.
328 *
329 * Looks up a CPU #ObjectClass matching name @cpu_model.
330 *
331 * Returns: A #CPUClass or %NULL if not matching class is found.
332 */
333ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
334
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335/**
336 * qemu_cpu_has_work:
337 * @cpu: The vCPU to check.
338 *
339 * Checks whether the CPU has work to do.
340 *
341 * Returns: %true if the CPU has work, %false otherwise.
342 */
343bool qemu_cpu_has_work(CPUState *cpu);
344
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345/**
346 * qemu_cpu_is_self:
347 * @cpu: The vCPU to check against.
348 *
349 * Checks whether the caller is executing on the vCPU thread.
350 *
351 * Returns: %true if called from @cpu's thread, %false otherwise.
352 */
353bool qemu_cpu_is_self(CPUState *cpu);
354
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355/**
356 * qemu_cpu_kick:
357 * @cpu: The vCPU to kick.
358 *
359 * Kicks @cpu's thread.
360 */
361void qemu_cpu_kick(CPUState *cpu);
362
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363/**
364 * cpu_is_stopped:
365 * @cpu: The CPU to check.
366 *
367 * Checks whether the CPU is stopped.
368 *
369 * Returns: %true if run state is not running or if artificially stopped;
370 * %false otherwise.
371 */
372bool cpu_is_stopped(CPUState *cpu);
373
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374/**
375 * run_on_cpu:
376 * @cpu: The vCPU to run on.
377 * @func: The function to be executed.
378 * @data: Data to pass to the function.
379 *
380 * Schedules the function @func for execution on the vCPU @cpu.
381 */
382void run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
383
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384/**
385 * async_run_on_cpu:
386 * @cpu: The vCPU to run on.
387 * @func: The function to be executed.
388 * @data: Data to pass to the function.
389 *
390 * Schedules the function @func for execution on the vCPU @cpu asynchronously.
391 */
392void async_run_on_cpu(CPUState *cpu, void (*func)(void *data), void *data);
393
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394/**
395 * qemu_for_each_cpu:
396 * @func: The function to be executed.
397 * @data: Data to pass to the function.
398 *
399 * Executes @func for each CPU.
400 */
401void qemu_for_each_cpu(void (*func)(CPUState *cpu, void *data), void *data);
402
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403/**
404 * qemu_get_cpu:
405 * @index: The CPUState@cpu_index value of the CPU to obtain.
406 *
407 * Gets a CPU matching @index.
408 *
409 * Returns: The CPU or %NULL if there is no matching CPU.
410 */
411CPUState *qemu_get_cpu(int index);
412
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413/**
414 * cpu_exists:
415 * @id: Guest-exposed CPU ID to lookup.
416 *
417 * Search for CPU with specified ID.
418 *
419 * Returns: %true - CPU is found, %false - CPU isn't found.
420 */
421bool cpu_exists(int64_t id);
422
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423#ifndef CONFIG_USER_ONLY
424
425typedef void (*CPUInterruptHandler)(CPUState *, int);
426
427extern CPUInterruptHandler cpu_interrupt_handler;
428
429/**
430 * cpu_interrupt:
431 * @cpu: The CPU to set an interrupt on.
432 * @mask: The interupts to set.
433 *
434 * Invokes the interrupt handler.
435 */
436static inline void cpu_interrupt(CPUState *cpu, int mask)
437{
438 cpu_interrupt_handler(cpu, mask);
439}
440
441#else /* USER_ONLY */
442
443void cpu_interrupt(CPUState *cpu, int mask);
444
445#endif /* USER_ONLY */
446
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447#ifndef CONFIG_USER_ONLY
448
449static inline void cpu_unassigned_access(CPUState *cpu, hwaddr addr,
450 bool is_write, bool is_exec,
451 int opaque, unsigned size)
452{
453 CPUClass *cc = CPU_GET_CLASS(cpu);
454
455 if (cc->do_unassigned_access) {
456 cc->do_unassigned_access(cpu, addr, is_write, is_exec, opaque, size);
457 }
458}
459
460#endif
461
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462/**
463 * cpu_reset_interrupt:
464 * @cpu: The CPU to clear the interrupt on.
465 * @mask: The interrupt mask to clear.
466 *
467 * Resets interrupts on the vCPU @cpu.
468 */
469void cpu_reset_interrupt(CPUState *cpu, int mask);
470
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471/**
472 * cpu_exit:
473 * @cpu: The CPU to exit.
474 *
475 * Requests the CPU @cpu to exit execution.
476 */
477void cpu_exit(CPUState *cpu);
478
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479/**
480 * cpu_resume:
481 * @cpu: The CPU to resume.
482 *
483 * Resumes CPU, i.e. puts CPU into runnable state.
484 */
485void cpu_resume(CPUState *cpu);
dd83b06a 486
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487/**
488 * qemu_init_vcpu:
489 * @cpu: The vCPU to initialize.
490 *
491 * Initializes a vCPU.
492 */
493void qemu_init_vcpu(CPUState *cpu);
494
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495#define SSTEP_ENABLE 0x1 /* Enable simulated HW single stepping */
496#define SSTEP_NOIRQ 0x2 /* Do not use IRQ while single stepping */
497#define SSTEP_NOTIMER 0x4 /* Do not Timers while single stepping */
498
499/**
500 * cpu_single_step:
501 * @cpu: CPU to the flags for.
502 * @enabled: Flags to enable.
503 *
504 * Enables or disables single-stepping for @cpu.
505 */
506void cpu_single_step(CPUState *cpu, int enabled);
507
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508#ifdef CONFIG_SOFTMMU
509extern const struct VMStateDescription vmstate_cpu_common;
510#else
511#define vmstate_cpu_common vmstate_dummy
512#endif
513
514#define VMSTATE_CPU() { \
515 .name = "parent_obj", \
516 .size = sizeof(CPUState), \
517 .vmsd = &vmstate_cpu_common, \
518 .flags = VMS_STRUCT, \
519 .offset = 0, \
520}
521
dd83b06a 522#endif