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CommitLineData
1da177e4
LT
1/*
2 * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
3 * Copyright (c) 2004 Infinicon Corporation. All rights reserved.
4 * Copyright (c) 2004 Intel Corporation. All rights reserved.
5 * Copyright (c) 2004 Topspin Corporation. All rights reserved.
6 * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
2a1d9b7f 7 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
f7c6a7b5 8 * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved.
1da177e4
LT
9 *
10 * This software is available to you under a choice of one of two
11 * licenses. You may choose to be licensed under the terms of the GNU
12 * General Public License (GPL) Version 2, available from the file
13 * COPYING in the main directory of this source tree, or the
14 * OpenIB.org BSD license below:
15 *
16 * Redistribution and use in source and binary forms, with or
17 * without modification, are permitted provided that the following
18 * conditions are met:
19 *
20 * - Redistributions of source code must retain the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer.
23 *
24 * - Redistributions in binary form must reproduce the above
25 * copyright notice, this list of conditions and the following
26 * disclaimer in the documentation and/or other materials
27 * provided with the distribution.
28 *
29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
33 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * SOFTWARE.
1da177e4
LT
37 */
38
39#if !defined(IB_VERBS_H)
40#define IB_VERBS_H
41
42#include <linux/types.h>
43#include <linux/device.h>
9b513090
RC
44#include <linux/mm.h>
45#include <linux/dma-mapping.h>
459d6e2a 46#include <linux/kref.h>
bfb3ea12
DB
47#include <linux/list.h>
48#include <linux/rwsem.h>
87ae9afd 49#include <linux/scatterlist.h>
f0626710 50#include <linux/workqueue.h>
9268f72d 51#include <linux/socket.h>
14d3a3b2 52#include <linux/irq_poll.h>
dd5f03be 53#include <uapi/linux/if_ether.h>
e2773c06 54
60063497 55#include <linux/atomic.h>
882214e2 56#include <linux/mmu_notifier.h>
e2773c06 57#include <asm/uaccess.h>
1da177e4 58
f0626710 59extern struct workqueue_struct *ib_wq;
14d3a3b2 60extern struct workqueue_struct *ib_comp_wq;
f0626710 61
1da177e4
LT
62union ib_gid {
63 u8 raw[16];
64 struct {
97f52eb4
SH
65 __be64 subnet_prefix;
66 __be64 interface_id;
1da177e4
LT
67 } global;
68};
69
e26be1bf
MS
70extern union ib_gid zgid;
71
b39ffa1d
MB
72enum ib_gid_type {
73 /* If link layer is Ethernet, this is RoCE V1 */
74 IB_GID_TYPE_IB = 0,
75 IB_GID_TYPE_ROCE = 0,
76 IB_GID_TYPE_SIZE
77};
78
03db3a2d 79struct ib_gid_attr {
b39ffa1d 80 enum ib_gid_type gid_type;
03db3a2d
MB
81 struct net_device *ndev;
82};
83
07ebafba
TT
84enum rdma_node_type {
85 /* IB values map to NodeInfo:NodeType. */
86 RDMA_NODE_IB_CA = 1,
87 RDMA_NODE_IB_SWITCH,
88 RDMA_NODE_IB_ROUTER,
180771a3
UM
89 RDMA_NODE_RNIC,
90 RDMA_NODE_USNIC,
5db5765e 91 RDMA_NODE_USNIC_UDP,
1da177e4
LT
92};
93
07ebafba
TT
94enum rdma_transport_type {
95 RDMA_TRANSPORT_IB,
180771a3 96 RDMA_TRANSPORT_IWARP,
248567f7
UM
97 RDMA_TRANSPORT_USNIC,
98 RDMA_TRANSPORT_USNIC_UDP
07ebafba
TT
99};
100
6b90a6d6
MW
101enum rdma_protocol_type {
102 RDMA_PROTOCOL_IB,
103 RDMA_PROTOCOL_IBOE,
104 RDMA_PROTOCOL_IWARP,
105 RDMA_PROTOCOL_USNIC_UDP
106};
107
8385fd84
RD
108__attribute_const__ enum rdma_transport_type
109rdma_node_get_transport(enum rdma_node_type node_type);
07ebafba 110
a3f5adaf
EC
111enum rdma_link_layer {
112 IB_LINK_LAYER_UNSPECIFIED,
113 IB_LINK_LAYER_INFINIBAND,
114 IB_LINK_LAYER_ETHERNET,
115};
116
1da177e4
LT
117enum ib_device_cap_flags {
118 IB_DEVICE_RESIZE_MAX_WR = 1,
119 IB_DEVICE_BAD_PKEY_CNTR = (1<<1),
120 IB_DEVICE_BAD_QKEY_CNTR = (1<<2),
121 IB_DEVICE_RAW_MULTI = (1<<3),
122 IB_DEVICE_AUTO_PATH_MIG = (1<<4),
123 IB_DEVICE_CHANGE_PHY_PORT = (1<<5),
124 IB_DEVICE_UD_AV_PORT_ENFORCE = (1<<6),
125 IB_DEVICE_CURR_QP_STATE_MOD = (1<<7),
126 IB_DEVICE_SHUTDOWN_PORT = (1<<8),
127 IB_DEVICE_INIT_TYPE = (1<<9),
128 IB_DEVICE_PORT_ACTIVE_EVENT = (1<<10),
129 IB_DEVICE_SYS_IMAGE_GUID = (1<<11),
130 IB_DEVICE_RC_RNR_NAK_GEN = (1<<12),
131 IB_DEVICE_SRQ_RESIZE = (1<<13),
132 IB_DEVICE_N_NOTIFY_CQ = (1<<14),
96f15c03 133 IB_DEVICE_LOCAL_DMA_LKEY = (1<<15),
0f39cf3d 134 IB_DEVICE_RESERVED = (1<<16), /* old SEND_W_INV */
e0605d91
EC
135 IB_DEVICE_MEM_WINDOW = (1<<17),
136 /*
137 * Devices should set IB_DEVICE_UD_IP_SUM if they support
138 * insertion of UDP and TCP checksum on outgoing UD IPoIB
139 * messages and can verify the validity of checksum for
140 * incoming messages. Setting this flag implies that the
141 * IPoIB driver may set NETIF_F_IP_CSUM for datagram mode.
142 */
143 IB_DEVICE_UD_IP_CSUM = (1<<18),
c93570f2 144 IB_DEVICE_UD_TSO = (1<<19),
59991f94 145 IB_DEVICE_XRC = (1<<20),
00f7ec36 146 IB_DEVICE_MEM_MGT_EXTENSIONS = (1<<21),
47ee1b9f 147 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK = (1<<22),
7083e42e 148 IB_DEVICE_MEM_WINDOW_TYPE_2A = (1<<23),
319a441d 149 IB_DEVICE_MEM_WINDOW_TYPE_2B = (1<<24),
470a5535
BW
150 IB_DEVICE_RC_IP_CSUM = (1<<25),
151 IB_DEVICE_RAW_IP_CSUM = (1<<26),
1b01d335 152 IB_DEVICE_MANAGED_FLOW_STEERING = (1<<29),
860f10a7
SG
153 IB_DEVICE_SIGNATURE_HANDOVER = (1<<30),
154 IB_DEVICE_ON_DEMAND_PAGING = (1<<31),
1b01d335
SG
155};
156
157enum ib_signature_prot_cap {
158 IB_PROT_T10DIF_TYPE_1 = 1,
159 IB_PROT_T10DIF_TYPE_2 = 1 << 1,
160 IB_PROT_T10DIF_TYPE_3 = 1 << 2,
161};
162
163enum ib_signature_guard_cap {
164 IB_GUARD_T10DIF_CRC = 1,
165 IB_GUARD_T10DIF_CSUM = 1 << 1,
1da177e4
LT
166};
167
168enum ib_atomic_cap {
169 IB_ATOMIC_NONE,
170 IB_ATOMIC_HCA,
171 IB_ATOMIC_GLOB
172};
173
860f10a7
SG
174enum ib_odp_general_cap_bits {
175 IB_ODP_SUPPORT = 1 << 0,
176};
177
178enum ib_odp_transport_cap_bits {
179 IB_ODP_SUPPORT_SEND = 1 << 0,
180 IB_ODP_SUPPORT_RECV = 1 << 1,
181 IB_ODP_SUPPORT_WRITE = 1 << 2,
182 IB_ODP_SUPPORT_READ = 1 << 3,
183 IB_ODP_SUPPORT_ATOMIC = 1 << 4,
184};
185
186struct ib_odp_caps {
187 uint64_t general_caps;
188 struct {
189 uint32_t rc_odp_caps;
190 uint32_t uc_odp_caps;
191 uint32_t ud_odp_caps;
192 } per_transport_caps;
193};
194
b9926b92
MB
195enum ib_cq_creation_flags {
196 IB_CQ_FLAGS_TIMESTAMP_COMPLETION = 1 << 0,
197};
198
bcf4c1ea
MB
199struct ib_cq_init_attr {
200 unsigned int cqe;
201 int comp_vector;
202 u32 flags;
203};
204
1da177e4
LT
205struct ib_device_attr {
206 u64 fw_ver;
97f52eb4 207 __be64 sys_image_guid;
1da177e4
LT
208 u64 max_mr_size;
209 u64 page_size_cap;
210 u32 vendor_id;
211 u32 vendor_part_id;
212 u32 hw_ver;
213 int max_qp;
214 int max_qp_wr;
215 int device_cap_flags;
216 int max_sge;
217 int max_sge_rd;
218 int max_cq;
219 int max_cqe;
220 int max_mr;
221 int max_pd;
222 int max_qp_rd_atom;
223 int max_ee_rd_atom;
224 int max_res_rd_atom;
225 int max_qp_init_rd_atom;
226 int max_ee_init_rd_atom;
227 enum ib_atomic_cap atomic_cap;
5e80ba8f 228 enum ib_atomic_cap masked_atomic_cap;
1da177e4
LT
229 int max_ee;
230 int max_rdd;
231 int max_mw;
232 int max_raw_ipv6_qp;
233 int max_raw_ethy_qp;
234 int max_mcast_grp;
235 int max_mcast_qp_attach;
236 int max_total_mcast_qp_attach;
237 int max_ah;
238 int max_fmr;
239 int max_map_per_fmr;
240 int max_srq;
241 int max_srq_wr;
242 int max_srq_sge;
00f7ec36 243 unsigned int max_fast_reg_page_list_len;
1da177e4
LT
244 u16 max_pkeys;
245 u8 local_ca_ack_delay;
1b01d335
SG
246 int sig_prot_cap;
247 int sig_guard_cap;
860f10a7 248 struct ib_odp_caps odp_caps;
24306dc6
MB
249 uint64_t timestamp_mask;
250 uint64_t hca_core_clock; /* in KHZ */
1da177e4
LT
251};
252
253enum ib_mtu {
254 IB_MTU_256 = 1,
255 IB_MTU_512 = 2,
256 IB_MTU_1024 = 3,
257 IB_MTU_2048 = 4,
258 IB_MTU_4096 = 5
259};
260
261static inline int ib_mtu_enum_to_int(enum ib_mtu mtu)
262{
263 switch (mtu) {
264 case IB_MTU_256: return 256;
265 case IB_MTU_512: return 512;
266 case IB_MTU_1024: return 1024;
267 case IB_MTU_2048: return 2048;
268 case IB_MTU_4096: return 4096;
269 default: return -1;
270 }
271}
272
273enum ib_port_state {
274 IB_PORT_NOP = 0,
275 IB_PORT_DOWN = 1,
276 IB_PORT_INIT = 2,
277 IB_PORT_ARMED = 3,
278 IB_PORT_ACTIVE = 4,
279 IB_PORT_ACTIVE_DEFER = 5
280};
281
282enum ib_port_cap_flags {
283 IB_PORT_SM = 1 << 1,
284 IB_PORT_NOTICE_SUP = 1 << 2,
285 IB_PORT_TRAP_SUP = 1 << 3,
286 IB_PORT_OPT_IPD_SUP = 1 << 4,
287 IB_PORT_AUTO_MIGR_SUP = 1 << 5,
288 IB_PORT_SL_MAP_SUP = 1 << 6,
289 IB_PORT_MKEY_NVRAM = 1 << 7,
290 IB_PORT_PKEY_NVRAM = 1 << 8,
291 IB_PORT_LED_INFO_SUP = 1 << 9,
292 IB_PORT_SM_DISABLED = 1 << 10,
293 IB_PORT_SYS_IMAGE_GUID_SUP = 1 << 11,
294 IB_PORT_PKEY_SW_EXT_PORT_TRAP_SUP = 1 << 12,
71eeba16 295 IB_PORT_EXTENDED_SPEEDS_SUP = 1 << 14,
1da177e4
LT
296 IB_PORT_CM_SUP = 1 << 16,
297 IB_PORT_SNMP_TUNNEL_SUP = 1 << 17,
298 IB_PORT_REINIT_SUP = 1 << 18,
299 IB_PORT_DEVICE_MGMT_SUP = 1 << 19,
300 IB_PORT_VENDOR_CLASS_SUP = 1 << 20,
301 IB_PORT_DR_NOTICE_SUP = 1 << 21,
302 IB_PORT_CAP_MASK_NOTICE_SUP = 1 << 22,
303 IB_PORT_BOOT_MGMT_SUP = 1 << 23,
304 IB_PORT_LINK_LATENCY_SUP = 1 << 24,
b4a26a27 305 IB_PORT_CLIENT_REG_SUP = 1 << 25,
03db3a2d 306 IB_PORT_IP_BASED_GIDS = 1 << 26,
1da177e4
LT
307};
308
309enum ib_port_width {
310 IB_WIDTH_1X = 1,
311 IB_WIDTH_4X = 2,
312 IB_WIDTH_8X = 4,
313 IB_WIDTH_12X = 8
314};
315
316static inline int ib_width_enum_to_int(enum ib_port_width width)
317{
318 switch (width) {
319 case IB_WIDTH_1X: return 1;
320 case IB_WIDTH_4X: return 4;
321 case IB_WIDTH_8X: return 8;
322 case IB_WIDTH_12X: return 12;
323 default: return -1;
324 }
325}
326
2e96691c
OG
327enum ib_port_speed {
328 IB_SPEED_SDR = 1,
329 IB_SPEED_DDR = 2,
330 IB_SPEED_QDR = 4,
331 IB_SPEED_FDR10 = 8,
332 IB_SPEED_FDR = 16,
333 IB_SPEED_EDR = 32
334};
335
7f624d02
SW
336struct ib_protocol_stats {
337 /* TBD... */
338};
339
340struct iw_protocol_stats {
341 u64 ipInReceives;
342 u64 ipInHdrErrors;
343 u64 ipInTooBigErrors;
344 u64 ipInNoRoutes;
345 u64 ipInAddrErrors;
346 u64 ipInUnknownProtos;
347 u64 ipInTruncatedPkts;
348 u64 ipInDiscards;
349 u64 ipInDelivers;
350 u64 ipOutForwDatagrams;
351 u64 ipOutRequests;
352 u64 ipOutDiscards;
353 u64 ipOutNoRoutes;
354 u64 ipReasmTimeout;
355 u64 ipReasmReqds;
356 u64 ipReasmOKs;
357 u64 ipReasmFails;
358 u64 ipFragOKs;
359 u64 ipFragFails;
360 u64 ipFragCreates;
361 u64 ipInMcastPkts;
362 u64 ipOutMcastPkts;
363 u64 ipInBcastPkts;
364 u64 ipOutBcastPkts;
365
366 u64 tcpRtoAlgorithm;
367 u64 tcpRtoMin;
368 u64 tcpRtoMax;
369 u64 tcpMaxConn;
370 u64 tcpActiveOpens;
371 u64 tcpPassiveOpens;
372 u64 tcpAttemptFails;
373 u64 tcpEstabResets;
374 u64 tcpCurrEstab;
375 u64 tcpInSegs;
376 u64 tcpOutSegs;
377 u64 tcpRetransSegs;
378 u64 tcpInErrs;
379 u64 tcpOutRsts;
380};
381
382union rdma_protocol_stats {
383 struct ib_protocol_stats ib;
384 struct iw_protocol_stats iw;
385};
386
f9b22e35
IW
387/* Define bits for the various functionality this port needs to be supported by
388 * the core.
389 */
390/* Management 0x00000FFF */
391#define RDMA_CORE_CAP_IB_MAD 0x00000001
392#define RDMA_CORE_CAP_IB_SMI 0x00000002
393#define RDMA_CORE_CAP_IB_CM 0x00000004
394#define RDMA_CORE_CAP_IW_CM 0x00000008
395#define RDMA_CORE_CAP_IB_SA 0x00000010
65995fee 396#define RDMA_CORE_CAP_OPA_MAD 0x00000020
f9b22e35
IW
397
398/* Address format 0x000FF000 */
399#define RDMA_CORE_CAP_AF_IB 0x00001000
400#define RDMA_CORE_CAP_ETH_AH 0x00002000
401
402/* Protocol 0xFFF00000 */
403#define RDMA_CORE_CAP_PROT_IB 0x00100000
404#define RDMA_CORE_CAP_PROT_ROCE 0x00200000
405#define RDMA_CORE_CAP_PROT_IWARP 0x00400000
406
407#define RDMA_CORE_PORT_IBA_IB (RDMA_CORE_CAP_PROT_IB \
408 | RDMA_CORE_CAP_IB_MAD \
409 | RDMA_CORE_CAP_IB_SMI \
410 | RDMA_CORE_CAP_IB_CM \
411 | RDMA_CORE_CAP_IB_SA \
412 | RDMA_CORE_CAP_AF_IB)
413#define RDMA_CORE_PORT_IBA_ROCE (RDMA_CORE_CAP_PROT_ROCE \
414 | RDMA_CORE_CAP_IB_MAD \
415 | RDMA_CORE_CAP_IB_CM \
f9b22e35
IW
416 | RDMA_CORE_CAP_AF_IB \
417 | RDMA_CORE_CAP_ETH_AH)
418#define RDMA_CORE_PORT_IWARP (RDMA_CORE_CAP_PROT_IWARP \
419 | RDMA_CORE_CAP_IW_CM)
65995fee
IW
420#define RDMA_CORE_PORT_INTEL_OPA (RDMA_CORE_PORT_IBA_IB \
421 | RDMA_CORE_CAP_OPA_MAD)
f9b22e35 422
1da177e4
LT
423struct ib_port_attr {
424 enum ib_port_state state;
425 enum ib_mtu max_mtu;
426 enum ib_mtu active_mtu;
427 int gid_tbl_len;
428 u32 port_cap_flags;
429 u32 max_msg_sz;
430 u32 bad_pkey_cntr;
431 u32 qkey_viol_cntr;
432 u16 pkey_tbl_len;
433 u16 lid;
434 u16 sm_lid;
435 u8 lmc;
436 u8 max_vl_num;
437 u8 sm_sl;
438 u8 subnet_timeout;
439 u8 init_type_reply;
440 u8 active_width;
441 u8 active_speed;
442 u8 phys_state;
443};
444
445enum ib_device_modify_flags {
c5bcbbb9
RD
446 IB_DEVICE_MODIFY_SYS_IMAGE_GUID = 1 << 0,
447 IB_DEVICE_MODIFY_NODE_DESC = 1 << 1
1da177e4
LT
448};
449
450struct ib_device_modify {
451 u64 sys_image_guid;
c5bcbbb9 452 char node_desc[64];
1da177e4
LT
453};
454
455enum ib_port_modify_flags {
456 IB_PORT_SHUTDOWN = 1,
457 IB_PORT_INIT_TYPE = (1<<2),
458 IB_PORT_RESET_QKEY_CNTR = (1<<3)
459};
460
461struct ib_port_modify {
462 u32 set_port_cap_mask;
463 u32 clr_port_cap_mask;
464 u8 init_type;
465};
466
467enum ib_event_type {
468 IB_EVENT_CQ_ERR,
469 IB_EVENT_QP_FATAL,
470 IB_EVENT_QP_REQ_ERR,
471 IB_EVENT_QP_ACCESS_ERR,
472 IB_EVENT_COMM_EST,
473 IB_EVENT_SQ_DRAINED,
474 IB_EVENT_PATH_MIG,
475 IB_EVENT_PATH_MIG_ERR,
476 IB_EVENT_DEVICE_FATAL,
477 IB_EVENT_PORT_ACTIVE,
478 IB_EVENT_PORT_ERR,
479 IB_EVENT_LID_CHANGE,
480 IB_EVENT_PKEY_CHANGE,
d41fcc67
RD
481 IB_EVENT_SM_CHANGE,
482 IB_EVENT_SRQ_ERR,
483 IB_EVENT_SRQ_LIMIT_REACHED,
63942c9a 484 IB_EVENT_QP_LAST_WQE_REACHED,
761d90ed
OG
485 IB_EVENT_CLIENT_REREGISTER,
486 IB_EVENT_GID_CHANGE,
1da177e4
LT
487};
488
db7489e0 489const char *__attribute_const__ ib_event_msg(enum ib_event_type event);
2b1b5b60 490
1da177e4
LT
491struct ib_event {
492 struct ib_device *device;
493 union {
494 struct ib_cq *cq;
495 struct ib_qp *qp;
d41fcc67 496 struct ib_srq *srq;
1da177e4
LT
497 u8 port_num;
498 } element;
499 enum ib_event_type event;
500};
501
502struct ib_event_handler {
503 struct ib_device *device;
504 void (*handler)(struct ib_event_handler *, struct ib_event *);
505 struct list_head list;
506};
507
508#define INIT_IB_EVENT_HANDLER(_ptr, _device, _handler) \
509 do { \
510 (_ptr)->device = _device; \
511 (_ptr)->handler = _handler; \
512 INIT_LIST_HEAD(&(_ptr)->list); \
513 } while (0)
514
515struct ib_global_route {
516 union ib_gid dgid;
517 u32 flow_label;
518 u8 sgid_index;
519 u8 hop_limit;
520 u8 traffic_class;
521};
522
513789ed 523struct ib_grh {
97f52eb4
SH
524 __be32 version_tclass_flow;
525 __be16 paylen;
513789ed
HR
526 u8 next_hdr;
527 u8 hop_limit;
528 union ib_gid sgid;
529 union ib_gid dgid;
530};
531
1da177e4
LT
532enum {
533 IB_MULTICAST_QPN = 0xffffff
534};
535
f3a7c66b 536#define IB_LID_PERMISSIVE cpu_to_be16(0xFFFF)
97f52eb4 537
1da177e4
LT
538enum ib_ah_flags {
539 IB_AH_GRH = 1
540};
541
bf6a9e31
JM
542enum ib_rate {
543 IB_RATE_PORT_CURRENT = 0,
544 IB_RATE_2_5_GBPS = 2,
545 IB_RATE_5_GBPS = 5,
546 IB_RATE_10_GBPS = 3,
547 IB_RATE_20_GBPS = 6,
548 IB_RATE_30_GBPS = 4,
549 IB_RATE_40_GBPS = 7,
550 IB_RATE_60_GBPS = 8,
551 IB_RATE_80_GBPS = 9,
71eeba16
MA
552 IB_RATE_120_GBPS = 10,
553 IB_RATE_14_GBPS = 11,
554 IB_RATE_56_GBPS = 12,
555 IB_RATE_112_GBPS = 13,
556 IB_RATE_168_GBPS = 14,
557 IB_RATE_25_GBPS = 15,
558 IB_RATE_100_GBPS = 16,
559 IB_RATE_200_GBPS = 17,
560 IB_RATE_300_GBPS = 18
bf6a9e31
JM
561};
562
563/**
564 * ib_rate_to_mult - Convert the IB rate enum to a multiple of the
565 * base rate of 2.5 Gbit/sec. For example, IB_RATE_5_GBPS will be
566 * converted to 2, since 5 Gbit/sec is 2 * 2.5 Gbit/sec.
567 * @rate: rate to convert.
568 */
8385fd84 569__attribute_const__ int ib_rate_to_mult(enum ib_rate rate);
bf6a9e31 570
71eeba16
MA
571/**
572 * ib_rate_to_mbps - Convert the IB rate enum to Mbps.
573 * For example, IB_RATE_2_5_GBPS will be converted to 2500.
574 * @rate: rate to convert.
575 */
8385fd84 576__attribute_const__ int ib_rate_to_mbps(enum ib_rate rate);
71eeba16 577
17cd3a2d
SG
578
579/**
9bee178b
SG
580 * enum ib_mr_type - memory region type
581 * @IB_MR_TYPE_MEM_REG: memory region that is used for
582 * normal registration
583 * @IB_MR_TYPE_SIGNATURE: memory region that is used for
584 * signature operations (data-integrity
585 * capable regions)
17cd3a2d 586 */
9bee178b
SG
587enum ib_mr_type {
588 IB_MR_TYPE_MEM_REG,
589 IB_MR_TYPE_SIGNATURE,
17cd3a2d
SG
590};
591
1b01d335 592/**
78eda2bb
SG
593 * Signature types
594 * IB_SIG_TYPE_NONE: Unprotected.
595 * IB_SIG_TYPE_T10_DIF: Type T10-DIF
1b01d335 596 */
78eda2bb
SG
597enum ib_signature_type {
598 IB_SIG_TYPE_NONE,
599 IB_SIG_TYPE_T10_DIF,
1b01d335
SG
600};
601
602/**
603 * Signature T10-DIF block-guard types
604 * IB_T10DIF_CRC: Corresponds to T10-PI mandated CRC checksum rules.
605 * IB_T10DIF_CSUM: Corresponds to IP checksum rules.
606 */
607enum ib_t10_dif_bg_type {
608 IB_T10DIF_CRC,
609 IB_T10DIF_CSUM
610};
611
612/**
613 * struct ib_t10_dif_domain - Parameters specific for T10-DIF
614 * domain.
1b01d335
SG
615 * @bg_type: T10-DIF block guard type (CRC|CSUM)
616 * @pi_interval: protection information interval.
617 * @bg: seed of guard computation.
618 * @app_tag: application tag of guard block
619 * @ref_tag: initial guard block reference tag.
78eda2bb
SG
620 * @ref_remap: Indicate wethear the reftag increments each block
621 * @app_escape: Indicate to skip block check if apptag=0xffff
622 * @ref_escape: Indicate to skip block check if reftag=0xffffffff
623 * @apptag_check_mask: check bitmask of application tag.
1b01d335
SG
624 */
625struct ib_t10_dif_domain {
1b01d335
SG
626 enum ib_t10_dif_bg_type bg_type;
627 u16 pi_interval;
628 u16 bg;
629 u16 app_tag;
630 u32 ref_tag;
78eda2bb
SG
631 bool ref_remap;
632 bool app_escape;
633 bool ref_escape;
634 u16 apptag_check_mask;
1b01d335
SG
635};
636
637/**
638 * struct ib_sig_domain - Parameters for signature domain
639 * @sig_type: specific signauture type
640 * @sig: union of all signature domain attributes that may
641 * be used to set domain layout.
642 */
643struct ib_sig_domain {
644 enum ib_signature_type sig_type;
645 union {
646 struct ib_t10_dif_domain dif;
647 } sig;
648};
649
650/**
651 * struct ib_sig_attrs - Parameters for signature handover operation
652 * @check_mask: bitmask for signature byte check (8 bytes)
653 * @mem: memory domain layout desciptor.
654 * @wire: wire domain layout desciptor.
655 */
656struct ib_sig_attrs {
657 u8 check_mask;
658 struct ib_sig_domain mem;
659 struct ib_sig_domain wire;
660};
661
662enum ib_sig_err_type {
663 IB_SIG_BAD_GUARD,
664 IB_SIG_BAD_REFTAG,
665 IB_SIG_BAD_APPTAG,
666};
667
668/**
669 * struct ib_sig_err - signature error descriptor
670 */
671struct ib_sig_err {
672 enum ib_sig_err_type err_type;
673 u32 expected;
674 u32 actual;
675 u64 sig_err_offset;
676 u32 key;
677};
678
679enum ib_mr_status_check {
680 IB_MR_CHECK_SIG_STATUS = 1,
681};
682
683/**
684 * struct ib_mr_status - Memory region status container
685 *
686 * @fail_status: Bitmask of MR checks status. For each
687 * failed check a corresponding status bit is set.
688 * @sig_err: Additional info for IB_MR_CEHCK_SIG_STATUS
689 * failure.
690 */
691struct ib_mr_status {
692 u32 fail_status;
693 struct ib_sig_err sig_err;
694};
695
bf6a9e31
JM
696/**
697 * mult_to_ib_rate - Convert a multiple of 2.5 Gbit/sec to an IB rate
698 * enum.
699 * @mult: multiple to convert.
700 */
8385fd84 701__attribute_const__ enum ib_rate mult_to_ib_rate(int mult);
bf6a9e31 702
1da177e4
LT
703struct ib_ah_attr {
704 struct ib_global_route grh;
705 u16 dlid;
706 u8 sl;
707 u8 src_path_bits;
708 u8 static_rate;
709 u8 ah_flags;
710 u8 port_num;
dd5f03be 711 u8 dmac[ETH_ALEN];
1da177e4
LT
712};
713
714enum ib_wc_status {
715 IB_WC_SUCCESS,
716 IB_WC_LOC_LEN_ERR,
717 IB_WC_LOC_QP_OP_ERR,
718 IB_WC_LOC_EEC_OP_ERR,
719 IB_WC_LOC_PROT_ERR,
720 IB_WC_WR_FLUSH_ERR,
721 IB_WC_MW_BIND_ERR,
722 IB_WC_BAD_RESP_ERR,
723 IB_WC_LOC_ACCESS_ERR,
724 IB_WC_REM_INV_REQ_ERR,
725 IB_WC_REM_ACCESS_ERR,
726 IB_WC_REM_OP_ERR,
727 IB_WC_RETRY_EXC_ERR,
728 IB_WC_RNR_RETRY_EXC_ERR,
729 IB_WC_LOC_RDD_VIOL_ERR,
730 IB_WC_REM_INV_RD_REQ_ERR,
731 IB_WC_REM_ABORT_ERR,
732 IB_WC_INV_EECN_ERR,
733 IB_WC_INV_EEC_STATE_ERR,
734 IB_WC_FATAL_ERR,
735 IB_WC_RESP_TIMEOUT_ERR,
736 IB_WC_GENERAL_ERR
737};
738
db7489e0 739const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status);
2b1b5b60 740
1da177e4
LT
741enum ib_wc_opcode {
742 IB_WC_SEND,
743 IB_WC_RDMA_WRITE,
744 IB_WC_RDMA_READ,
745 IB_WC_COMP_SWAP,
746 IB_WC_FETCH_ADD,
747 IB_WC_BIND_MW,
c93570f2 748 IB_WC_LSO,
00f7ec36 749 IB_WC_LOCAL_INV,
4c67e2bf 750 IB_WC_REG_MR,
5e80ba8f
VS
751 IB_WC_MASKED_COMP_SWAP,
752 IB_WC_MASKED_FETCH_ADD,
1da177e4
LT
753/*
754 * Set value of IB_WC_RECV so consumers can test if a completion is a
755 * receive by testing (opcode & IB_WC_RECV).
756 */
757 IB_WC_RECV = 1 << 7,
758 IB_WC_RECV_RDMA_WITH_IMM
759};
760
761enum ib_wc_flags {
762 IB_WC_GRH = 1,
00f7ec36
SW
763 IB_WC_WITH_IMM = (1<<1),
764 IB_WC_WITH_INVALIDATE = (1<<2),
d927d505 765 IB_WC_IP_CSUM_OK = (1<<3),
dd5f03be
MB
766 IB_WC_WITH_SMAC = (1<<4),
767 IB_WC_WITH_VLAN = (1<<5),
1da177e4
LT
768};
769
770struct ib_wc {
14d3a3b2
CH
771 union {
772 u64 wr_id;
773 struct ib_cqe *wr_cqe;
774 };
1da177e4
LT
775 enum ib_wc_status status;
776 enum ib_wc_opcode opcode;
777 u32 vendor_err;
778 u32 byte_len;
062dbb69 779 struct ib_qp *qp;
00f7ec36
SW
780 union {
781 __be32 imm_data;
782 u32 invalidate_rkey;
783 } ex;
1da177e4
LT
784 u32 src_qp;
785 int wc_flags;
786 u16 pkey_index;
787 u16 slid;
788 u8 sl;
789 u8 dlid_path_bits;
790 u8 port_num; /* valid only for DR SMPs on switches */
dd5f03be
MB
791 u8 smac[ETH_ALEN];
792 u16 vlan_id;
1da177e4
LT
793};
794
ed23a727
RD
795enum ib_cq_notify_flags {
796 IB_CQ_SOLICITED = 1 << 0,
797 IB_CQ_NEXT_COMP = 1 << 1,
798 IB_CQ_SOLICITED_MASK = IB_CQ_SOLICITED | IB_CQ_NEXT_COMP,
799 IB_CQ_REPORT_MISSED_EVENTS = 1 << 2,
1da177e4
LT
800};
801
96104eda 802enum ib_srq_type {
418d5130
SH
803 IB_SRQT_BASIC,
804 IB_SRQT_XRC
96104eda
SH
805};
806
d41fcc67
RD
807enum ib_srq_attr_mask {
808 IB_SRQ_MAX_WR = 1 << 0,
809 IB_SRQ_LIMIT = 1 << 1,
810};
811
812struct ib_srq_attr {
813 u32 max_wr;
814 u32 max_sge;
815 u32 srq_limit;
816};
817
818struct ib_srq_init_attr {
819 void (*event_handler)(struct ib_event *, void *);
820 void *srq_context;
821 struct ib_srq_attr attr;
96104eda 822 enum ib_srq_type srq_type;
418d5130
SH
823
824 union {
825 struct {
826 struct ib_xrcd *xrcd;
827 struct ib_cq *cq;
828 } xrc;
829 } ext;
d41fcc67
RD
830};
831
1da177e4
LT
832struct ib_qp_cap {
833 u32 max_send_wr;
834 u32 max_recv_wr;
835 u32 max_send_sge;
836 u32 max_recv_sge;
837 u32 max_inline_data;
838};
839
840enum ib_sig_type {
841 IB_SIGNAL_ALL_WR,
842 IB_SIGNAL_REQ_WR
843};
844
845enum ib_qp_type {
846 /*
847 * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
848 * here (and in that order) since the MAD layer uses them as
849 * indices into a 2-entry table.
850 */
851 IB_QPT_SMI,
852 IB_QPT_GSI,
853
854 IB_QPT_RC,
855 IB_QPT_UC,
856 IB_QPT_UD,
857 IB_QPT_RAW_IPV6,
b42b63cf 858 IB_QPT_RAW_ETHERTYPE,
c938a616 859 IB_QPT_RAW_PACKET = 8,
b42b63cf
SH
860 IB_QPT_XRC_INI = 9,
861 IB_QPT_XRC_TGT,
0134f16b
JM
862 IB_QPT_MAX,
863 /* Reserve a range for qp types internal to the low level driver.
864 * These qp types will not be visible at the IB core layer, so the
865 * IB_QPT_MAX usages should not be affected in the core layer
866 */
867 IB_QPT_RESERVED1 = 0x1000,
868 IB_QPT_RESERVED2,
869 IB_QPT_RESERVED3,
870 IB_QPT_RESERVED4,
871 IB_QPT_RESERVED5,
872 IB_QPT_RESERVED6,
873 IB_QPT_RESERVED7,
874 IB_QPT_RESERVED8,
875 IB_QPT_RESERVED9,
876 IB_QPT_RESERVED10,
1da177e4
LT
877};
878
b846f25a 879enum ib_qp_create_flags {
47ee1b9f
RL
880 IB_QP_CREATE_IPOIB_UD_LSO = 1 << 0,
881 IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK = 1 << 1,
90f1d1b4 882 IB_QP_CREATE_NETIF_QP = 1 << 5,
1b01d335 883 IB_QP_CREATE_SIGNATURE_EN = 1 << 6,
09b93088 884 IB_QP_CREATE_USE_GFP_NOIO = 1 << 7,
d2b57063
JM
885 /* reserve bits 26-31 for low level drivers' internal use */
886 IB_QP_CREATE_RESERVED_START = 1 << 26,
887 IB_QP_CREATE_RESERVED_END = 1 << 31,
b846f25a
EC
888};
889
73c40c61
YH
890/*
891 * Note: users may not call ib_close_qp or ib_destroy_qp from the event_handler
892 * callback to destroy the passed in QP.
893 */
894
1da177e4
LT
895struct ib_qp_init_attr {
896 void (*event_handler)(struct ib_event *, void *);
897 void *qp_context;
898 struct ib_cq *send_cq;
899 struct ib_cq *recv_cq;
900 struct ib_srq *srq;
b42b63cf 901 struct ib_xrcd *xrcd; /* XRC TGT QPs only */
1da177e4
LT
902 struct ib_qp_cap cap;
903 enum ib_sig_type sq_sig_type;
904 enum ib_qp_type qp_type;
b846f25a 905 enum ib_qp_create_flags create_flags;
1da177e4
LT
906 u8 port_num; /* special QP types only */
907};
908
0e0ec7e0
SH
909struct ib_qp_open_attr {
910 void (*event_handler)(struct ib_event *, void *);
911 void *qp_context;
912 u32 qp_num;
913 enum ib_qp_type qp_type;
914};
915
1da177e4
LT
916enum ib_rnr_timeout {
917 IB_RNR_TIMER_655_36 = 0,
918 IB_RNR_TIMER_000_01 = 1,
919 IB_RNR_TIMER_000_02 = 2,
920 IB_RNR_TIMER_000_03 = 3,
921 IB_RNR_TIMER_000_04 = 4,
922 IB_RNR_TIMER_000_06 = 5,
923 IB_RNR_TIMER_000_08 = 6,
924 IB_RNR_TIMER_000_12 = 7,
925 IB_RNR_TIMER_000_16 = 8,
926 IB_RNR_TIMER_000_24 = 9,
927 IB_RNR_TIMER_000_32 = 10,
928 IB_RNR_TIMER_000_48 = 11,
929 IB_RNR_TIMER_000_64 = 12,
930 IB_RNR_TIMER_000_96 = 13,
931 IB_RNR_TIMER_001_28 = 14,
932 IB_RNR_TIMER_001_92 = 15,
933 IB_RNR_TIMER_002_56 = 16,
934 IB_RNR_TIMER_003_84 = 17,
935 IB_RNR_TIMER_005_12 = 18,
936 IB_RNR_TIMER_007_68 = 19,
937 IB_RNR_TIMER_010_24 = 20,
938 IB_RNR_TIMER_015_36 = 21,
939 IB_RNR_TIMER_020_48 = 22,
940 IB_RNR_TIMER_030_72 = 23,
941 IB_RNR_TIMER_040_96 = 24,
942 IB_RNR_TIMER_061_44 = 25,
943 IB_RNR_TIMER_081_92 = 26,
944 IB_RNR_TIMER_122_88 = 27,
945 IB_RNR_TIMER_163_84 = 28,
946 IB_RNR_TIMER_245_76 = 29,
947 IB_RNR_TIMER_327_68 = 30,
948 IB_RNR_TIMER_491_52 = 31
949};
950
951enum ib_qp_attr_mask {
952 IB_QP_STATE = 1,
953 IB_QP_CUR_STATE = (1<<1),
954 IB_QP_EN_SQD_ASYNC_NOTIFY = (1<<2),
955 IB_QP_ACCESS_FLAGS = (1<<3),
956 IB_QP_PKEY_INDEX = (1<<4),
957 IB_QP_PORT = (1<<5),
958 IB_QP_QKEY = (1<<6),
959 IB_QP_AV = (1<<7),
960 IB_QP_PATH_MTU = (1<<8),
961 IB_QP_TIMEOUT = (1<<9),
962 IB_QP_RETRY_CNT = (1<<10),
963 IB_QP_RNR_RETRY = (1<<11),
964 IB_QP_RQ_PSN = (1<<12),
965 IB_QP_MAX_QP_RD_ATOMIC = (1<<13),
966 IB_QP_ALT_PATH = (1<<14),
967 IB_QP_MIN_RNR_TIMER = (1<<15),
968 IB_QP_SQ_PSN = (1<<16),
969 IB_QP_MAX_DEST_RD_ATOMIC = (1<<17),
970 IB_QP_PATH_MIG_STATE = (1<<18),
971 IB_QP_CAP = (1<<19),
dd5f03be 972 IB_QP_DEST_QPN = (1<<20),
aa744cc0
MB
973 IB_QP_RESERVED1 = (1<<21),
974 IB_QP_RESERVED2 = (1<<22),
975 IB_QP_RESERVED3 = (1<<23),
976 IB_QP_RESERVED4 = (1<<24),
1da177e4
LT
977};
978
979enum ib_qp_state {
980 IB_QPS_RESET,
981 IB_QPS_INIT,
982 IB_QPS_RTR,
983 IB_QPS_RTS,
984 IB_QPS_SQD,
985 IB_QPS_SQE,
986 IB_QPS_ERR
987};
988
989enum ib_mig_state {
990 IB_MIG_MIGRATED,
991 IB_MIG_REARM,
992 IB_MIG_ARMED
993};
994
7083e42e
SM
995enum ib_mw_type {
996 IB_MW_TYPE_1 = 1,
997 IB_MW_TYPE_2 = 2
998};
999
1da177e4
LT
1000struct ib_qp_attr {
1001 enum ib_qp_state qp_state;
1002 enum ib_qp_state cur_qp_state;
1003 enum ib_mtu path_mtu;
1004 enum ib_mig_state path_mig_state;
1005 u32 qkey;
1006 u32 rq_psn;
1007 u32 sq_psn;
1008 u32 dest_qp_num;
1009 int qp_access_flags;
1010 struct ib_qp_cap cap;
1011 struct ib_ah_attr ah_attr;
1012 struct ib_ah_attr alt_ah_attr;
1013 u16 pkey_index;
1014 u16 alt_pkey_index;
1015 u8 en_sqd_async_notify;
1016 u8 sq_draining;
1017 u8 max_rd_atomic;
1018 u8 max_dest_rd_atomic;
1019 u8 min_rnr_timer;
1020 u8 port_num;
1021 u8 timeout;
1022 u8 retry_cnt;
1023 u8 rnr_retry;
1024 u8 alt_port_num;
1025 u8 alt_timeout;
1026};
1027
1028enum ib_wr_opcode {
1029 IB_WR_RDMA_WRITE,
1030 IB_WR_RDMA_WRITE_WITH_IMM,
1031 IB_WR_SEND,
1032 IB_WR_SEND_WITH_IMM,
1033 IB_WR_RDMA_READ,
1034 IB_WR_ATOMIC_CMP_AND_SWP,
c93570f2 1035 IB_WR_ATOMIC_FETCH_AND_ADD,
0f39cf3d
RD
1036 IB_WR_LSO,
1037 IB_WR_SEND_WITH_INV,
00f7ec36
SW
1038 IB_WR_RDMA_READ_WITH_INV,
1039 IB_WR_LOCAL_INV,
4c67e2bf 1040 IB_WR_REG_MR,
5e80ba8f
VS
1041 IB_WR_MASKED_ATOMIC_CMP_AND_SWP,
1042 IB_WR_MASKED_ATOMIC_FETCH_AND_ADD,
7083e42e 1043 IB_WR_BIND_MW,
1b01d335 1044 IB_WR_REG_SIG_MR,
0134f16b
JM
1045 /* reserve values for low level drivers' internal use.
1046 * These values will not be used at all in the ib core layer.
1047 */
1048 IB_WR_RESERVED1 = 0xf0,
1049 IB_WR_RESERVED2,
1050 IB_WR_RESERVED3,
1051 IB_WR_RESERVED4,
1052 IB_WR_RESERVED5,
1053 IB_WR_RESERVED6,
1054 IB_WR_RESERVED7,
1055 IB_WR_RESERVED8,
1056 IB_WR_RESERVED9,
1057 IB_WR_RESERVED10,
1da177e4
LT
1058};
1059
1060enum ib_send_flags {
1061 IB_SEND_FENCE = 1,
1062 IB_SEND_SIGNALED = (1<<1),
1063 IB_SEND_SOLICITED = (1<<2),
e0605d91 1064 IB_SEND_INLINE = (1<<3),
0134f16b
JM
1065 IB_SEND_IP_CSUM = (1<<4),
1066
1067 /* reserve bits 26-31 for low level drivers' internal use */
1068 IB_SEND_RESERVED_START = (1 << 26),
1069 IB_SEND_RESERVED_END = (1 << 31),
1da177e4
LT
1070};
1071
1072struct ib_sge {
1073 u64 addr;
1074 u32 length;
1075 u32 lkey;
1076};
1077
7083e42e
SM
1078/**
1079 * struct ib_mw_bind_info - Parameters for a memory window bind operation.
1080 * @mr: A memory region to bind the memory window to.
1081 * @addr: The address where the memory window should begin.
1082 * @length: The length of the memory window, in bytes.
1083 * @mw_access_flags: Access flags from enum ib_access_flags for the window.
1084 *
1085 * This struct contains the shared parameters for type 1 and type 2
1086 * memory window bind operations.
1087 */
1088struct ib_mw_bind_info {
1089 struct ib_mr *mr;
1090 u64 addr;
1091 u64 length;
1092 int mw_access_flags;
1093};
1094
14d3a3b2
CH
1095struct ib_cqe {
1096 void (*done)(struct ib_cq *cq, struct ib_wc *wc);
1097};
1098
1da177e4
LT
1099struct ib_send_wr {
1100 struct ib_send_wr *next;
14d3a3b2
CH
1101 union {
1102 u64 wr_id;
1103 struct ib_cqe *wr_cqe;
1104 };
1da177e4
LT
1105 struct ib_sge *sg_list;
1106 int num_sge;
1107 enum ib_wr_opcode opcode;
1108 int send_flags;
0f39cf3d
RD
1109 union {
1110 __be32 imm_data;
1111 u32 invalidate_rkey;
1112 } ex;
1da177e4
LT
1113};
1114
e622f2f4
CH
1115struct ib_rdma_wr {
1116 struct ib_send_wr wr;
1117 u64 remote_addr;
1118 u32 rkey;
1119};
1120
1121static inline struct ib_rdma_wr *rdma_wr(struct ib_send_wr *wr)
1122{
1123 return container_of(wr, struct ib_rdma_wr, wr);
1124}
1125
1126struct ib_atomic_wr {
1127 struct ib_send_wr wr;
1128 u64 remote_addr;
1129 u64 compare_add;
1130 u64 swap;
1131 u64 compare_add_mask;
1132 u64 swap_mask;
1133 u32 rkey;
1134};
1135
1136static inline struct ib_atomic_wr *atomic_wr(struct ib_send_wr *wr)
1137{
1138 return container_of(wr, struct ib_atomic_wr, wr);
1139}
1140
1141struct ib_ud_wr {
1142 struct ib_send_wr wr;
1143 struct ib_ah *ah;
1144 void *header;
1145 int hlen;
1146 int mss;
1147 u32 remote_qpn;
1148 u32 remote_qkey;
1149 u16 pkey_index; /* valid for GSI only */
1150 u8 port_num; /* valid for DR SMPs on switch only */
1151};
1152
1153static inline struct ib_ud_wr *ud_wr(struct ib_send_wr *wr)
1154{
1155 return container_of(wr, struct ib_ud_wr, wr);
1156}
1157
4c67e2bf
SG
1158struct ib_reg_wr {
1159 struct ib_send_wr wr;
1160 struct ib_mr *mr;
1161 u32 key;
1162 int access;
1163};
1164
1165static inline struct ib_reg_wr *reg_wr(struct ib_send_wr *wr)
1166{
1167 return container_of(wr, struct ib_reg_wr, wr);
1168}
1169
e622f2f4
CH
1170struct ib_bind_mw_wr {
1171 struct ib_send_wr wr;
1172 struct ib_mw *mw;
1173 /* The new rkey for the memory window. */
1174 u32 rkey;
1175 struct ib_mw_bind_info bind_info;
1176};
1177
1178static inline struct ib_bind_mw_wr *bind_mw_wr(struct ib_send_wr *wr)
1179{
1180 return container_of(wr, struct ib_bind_mw_wr, wr);
1181}
1182
1183struct ib_sig_handover_wr {
1184 struct ib_send_wr wr;
1185 struct ib_sig_attrs *sig_attrs;
1186 struct ib_mr *sig_mr;
1187 int access_flags;
1188 struct ib_sge *prot;
1189};
1190
1191static inline struct ib_sig_handover_wr *sig_handover_wr(struct ib_send_wr *wr)
1192{
1193 return container_of(wr, struct ib_sig_handover_wr, wr);
1194}
1195
1da177e4
LT
1196struct ib_recv_wr {
1197 struct ib_recv_wr *next;
14d3a3b2
CH
1198 union {
1199 u64 wr_id;
1200 struct ib_cqe *wr_cqe;
1201 };
1da177e4
LT
1202 struct ib_sge *sg_list;
1203 int num_sge;
1204};
1205
1206enum ib_access_flags {
1207 IB_ACCESS_LOCAL_WRITE = 1,
1208 IB_ACCESS_REMOTE_WRITE = (1<<1),
1209 IB_ACCESS_REMOTE_READ = (1<<2),
1210 IB_ACCESS_REMOTE_ATOMIC = (1<<3),
7083e42e 1211 IB_ACCESS_MW_BIND = (1<<4),
860f10a7
SG
1212 IB_ZERO_BASED = (1<<5),
1213 IB_ACCESS_ON_DEMAND = (1<<6),
1da177e4
LT
1214};
1215
1216struct ib_phys_buf {
1217 u64 addr;
1218 u64 size;
1219};
1220
1221struct ib_mr_attr {
1222 struct ib_pd *pd;
1223 u64 device_virt_addr;
1224 u64 size;
1225 int mr_access_flags;
1226 u32 lkey;
1227 u32 rkey;
1228};
1229
1230enum ib_mr_rereg_flags {
1231 IB_MR_REREG_TRANS = 1,
1232 IB_MR_REREG_PD = (1<<1),
7e6edb9b
MB
1233 IB_MR_REREG_ACCESS = (1<<2),
1234 IB_MR_REREG_SUPPORTED = ((IB_MR_REREG_ACCESS << 1) - 1)
1da177e4
LT
1235};
1236
7083e42e
SM
1237/**
1238 * struct ib_mw_bind - Parameters for a type 1 memory window bind operation.
1239 * @wr_id: Work request id.
1240 * @send_flags: Flags from ib_send_flags enum.
1241 * @bind_info: More parameters of the bind operation.
1242 */
1da177e4 1243struct ib_mw_bind {
7083e42e
SM
1244 u64 wr_id;
1245 int send_flags;
1246 struct ib_mw_bind_info bind_info;
1da177e4
LT
1247};
1248
1249struct ib_fmr_attr {
1250 int max_pages;
1251 int max_maps;
d36f34aa 1252 u8 page_shift;
1da177e4
LT
1253};
1254
882214e2
HE
1255struct ib_umem;
1256
e2773c06
RD
1257struct ib_ucontext {
1258 struct ib_device *device;
1259 struct list_head pd_list;
1260 struct list_head mr_list;
1261 struct list_head mw_list;
1262 struct list_head cq_list;
1263 struct list_head qp_list;
1264 struct list_head srq_list;
1265 struct list_head ah_list;
53d0bd1e 1266 struct list_head xrcd_list;
436f2ad0 1267 struct list_head rule_list;
f7c6a7b5 1268 int closing;
8ada2c1c
SR
1269
1270 struct pid *tgid;
882214e2
HE
1271#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
1272 struct rb_root umem_tree;
1273 /*
1274 * Protects .umem_rbroot and tree, as well as odp_mrs_count and
1275 * mmu notifiers registration.
1276 */
1277 struct rw_semaphore umem_rwsem;
1278 void (*invalidate_range)(struct ib_umem *umem,
1279 unsigned long start, unsigned long end);
1280
1281 struct mmu_notifier mn;
1282 atomic_t notifier_count;
1283 /* A list of umems that don't have private mmu notifier counters yet. */
1284 struct list_head no_private_counters;
1285 int odp_mrs_count;
1286#endif
e2773c06
RD
1287};
1288
1289struct ib_uobject {
1290 u64 user_handle; /* handle given to us by userspace */
1291 struct ib_ucontext *context; /* associated user context */
9ead190b 1292 void *object; /* containing object */
e2773c06 1293 struct list_head list; /* link to context's list */
b3d636b0 1294 int id; /* index into kernel idr */
9ead190b
RD
1295 struct kref ref;
1296 struct rw_semaphore mutex; /* protects .live */
d144da8c 1297 struct rcu_head rcu; /* kfree_rcu() overhead */
9ead190b 1298 int live;
e2773c06
RD
1299};
1300
e2773c06 1301struct ib_udata {
309243ec 1302 const void __user *inbuf;
e2773c06
RD
1303 void __user *outbuf;
1304 size_t inlen;
1305 size_t outlen;
1306};
1307
1da177e4 1308struct ib_pd {
96249d70 1309 u32 local_dma_lkey;
e2773c06
RD
1310 struct ib_device *device;
1311 struct ib_uobject *uobject;
1312 atomic_t usecnt; /* count all resources */
96249d70 1313 struct ib_mr *local_mr;
1da177e4
LT
1314};
1315
59991f94
SH
1316struct ib_xrcd {
1317 struct ib_device *device;
d3d72d90 1318 atomic_t usecnt; /* count all exposed resources */
53d0bd1e 1319 struct inode *inode;
d3d72d90
SH
1320
1321 struct mutex tgt_qp_mutex;
1322 struct list_head tgt_qp_list;
59991f94
SH
1323};
1324
1da177e4
LT
1325struct ib_ah {
1326 struct ib_device *device;
1327 struct ib_pd *pd;
e2773c06 1328 struct ib_uobject *uobject;
1da177e4
LT
1329};
1330
1331typedef void (*ib_comp_handler)(struct ib_cq *cq, void *cq_context);
1332
14d3a3b2
CH
1333enum ib_poll_context {
1334 IB_POLL_DIRECT, /* caller context, no hw completions */
1335 IB_POLL_SOFTIRQ, /* poll from softirq context */
1336 IB_POLL_WORKQUEUE, /* poll from workqueue */
1337};
1338
1da177e4 1339struct ib_cq {
e2773c06
RD
1340 struct ib_device *device;
1341 struct ib_uobject *uobject;
1342 ib_comp_handler comp_handler;
1343 void (*event_handler)(struct ib_event *, void *);
4deccd6d 1344 void *cq_context;
e2773c06
RD
1345 int cqe;
1346 atomic_t usecnt; /* count number of work queues */
14d3a3b2
CH
1347 enum ib_poll_context poll_ctx;
1348 struct ib_wc *wc;
1349 union {
1350 struct irq_poll iop;
1351 struct work_struct work;
1352 };
1da177e4
LT
1353};
1354
1355struct ib_srq {
d41fcc67
RD
1356 struct ib_device *device;
1357 struct ib_pd *pd;
1358 struct ib_uobject *uobject;
1359 void (*event_handler)(struct ib_event *, void *);
1360 void *srq_context;
96104eda 1361 enum ib_srq_type srq_type;
1da177e4 1362 atomic_t usecnt;
418d5130
SH
1363
1364 union {
1365 struct {
1366 struct ib_xrcd *xrcd;
1367 struct ib_cq *cq;
1368 u32 srq_num;
1369 } xrc;
1370 } ext;
1da177e4
LT
1371};
1372
1373struct ib_qp {
1374 struct ib_device *device;
1375 struct ib_pd *pd;
1376 struct ib_cq *send_cq;
1377 struct ib_cq *recv_cq;
1378 struct ib_srq *srq;
b42b63cf 1379 struct ib_xrcd *xrcd; /* XRC TGT QPs only */
d3d72d90 1380 struct list_head xrcd_list;
319a441d
HHZ
1381 /* count times opened, mcast attaches, flow attaches */
1382 atomic_t usecnt;
0e0ec7e0
SH
1383 struct list_head open_list;
1384 struct ib_qp *real_qp;
e2773c06 1385 struct ib_uobject *uobject;
1da177e4
LT
1386 void (*event_handler)(struct ib_event *, void *);
1387 void *qp_context;
1388 u32 qp_num;
1389 enum ib_qp_type qp_type;
1390};
1391
1392struct ib_mr {
e2773c06
RD
1393 struct ib_device *device;
1394 struct ib_pd *pd;
1395 struct ib_uobject *uobject;
1396 u32 lkey;
1397 u32 rkey;
4c67e2bf
SG
1398 u64 iova;
1399 u32 length;
1400 unsigned int page_size;
e2773c06 1401 atomic_t usecnt; /* count number of MWs */
1da177e4
LT
1402};
1403
1404struct ib_mw {
1405 struct ib_device *device;
1406 struct ib_pd *pd;
e2773c06 1407 struct ib_uobject *uobject;
1da177e4 1408 u32 rkey;
7083e42e 1409 enum ib_mw_type type;
1da177e4
LT
1410};
1411
1412struct ib_fmr {
1413 struct ib_device *device;
1414 struct ib_pd *pd;
1415 struct list_head list;
1416 u32 lkey;
1417 u32 rkey;
1418};
1419
319a441d
HHZ
1420/* Supported steering options */
1421enum ib_flow_attr_type {
1422 /* steering according to rule specifications */
1423 IB_FLOW_ATTR_NORMAL = 0x0,
1424 /* default unicast and multicast rule -
1425 * receive all Eth traffic which isn't steered to any QP
1426 */
1427 IB_FLOW_ATTR_ALL_DEFAULT = 0x1,
1428 /* default multicast rule -
1429 * receive all Eth multicast traffic which isn't steered to any QP
1430 */
1431 IB_FLOW_ATTR_MC_DEFAULT = 0x2,
1432 /* sniffer rule - receive all port traffic */
1433 IB_FLOW_ATTR_SNIFFER = 0x3
1434};
1435
1436/* Supported steering header types */
1437enum ib_flow_spec_type {
1438 /* L2 headers*/
1439 IB_FLOW_SPEC_ETH = 0x20,
240ae00e 1440 IB_FLOW_SPEC_IB = 0x22,
319a441d
HHZ
1441 /* L3 header*/
1442 IB_FLOW_SPEC_IPV4 = 0x30,
1443 /* L4 headers*/
1444 IB_FLOW_SPEC_TCP = 0x40,
1445 IB_FLOW_SPEC_UDP = 0x41
1446};
240ae00e 1447#define IB_FLOW_SPEC_LAYER_MASK 0xF0
22878dbc
MB
1448#define IB_FLOW_SPEC_SUPPORT_LAYERS 4
1449
319a441d
HHZ
1450/* Flow steering rule priority is set according to it's domain.
1451 * Lower domain value means higher priority.
1452 */
1453enum ib_flow_domain {
1454 IB_FLOW_DOMAIN_USER,
1455 IB_FLOW_DOMAIN_ETHTOOL,
1456 IB_FLOW_DOMAIN_RFS,
1457 IB_FLOW_DOMAIN_NIC,
1458 IB_FLOW_DOMAIN_NUM /* Must be last */
1459};
1460
1461struct ib_flow_eth_filter {
1462 u8 dst_mac[6];
1463 u8 src_mac[6];
1464 __be16 ether_type;
1465 __be16 vlan_tag;
1466};
1467
1468struct ib_flow_spec_eth {
1469 enum ib_flow_spec_type type;
1470 u16 size;
1471 struct ib_flow_eth_filter val;
1472 struct ib_flow_eth_filter mask;
1473};
1474
240ae00e
MB
1475struct ib_flow_ib_filter {
1476 __be16 dlid;
1477 __u8 sl;
1478};
1479
1480struct ib_flow_spec_ib {
1481 enum ib_flow_spec_type type;
1482 u16 size;
1483 struct ib_flow_ib_filter val;
1484 struct ib_flow_ib_filter mask;
1485};
1486
319a441d
HHZ
1487struct ib_flow_ipv4_filter {
1488 __be32 src_ip;
1489 __be32 dst_ip;
1490};
1491
1492struct ib_flow_spec_ipv4 {
1493 enum ib_flow_spec_type type;
1494 u16 size;
1495 struct ib_flow_ipv4_filter val;
1496 struct ib_flow_ipv4_filter mask;
1497};
1498
1499struct ib_flow_tcp_udp_filter {
1500 __be16 dst_port;
1501 __be16 src_port;
1502};
1503
1504struct ib_flow_spec_tcp_udp {
1505 enum ib_flow_spec_type type;
1506 u16 size;
1507 struct ib_flow_tcp_udp_filter val;
1508 struct ib_flow_tcp_udp_filter mask;
1509};
1510
1511union ib_flow_spec {
1512 struct {
1513 enum ib_flow_spec_type type;
1514 u16 size;
1515 };
1516 struct ib_flow_spec_eth eth;
240ae00e 1517 struct ib_flow_spec_ib ib;
319a441d
HHZ
1518 struct ib_flow_spec_ipv4 ipv4;
1519 struct ib_flow_spec_tcp_udp tcp_udp;
1520};
1521
1522struct ib_flow_attr {
1523 enum ib_flow_attr_type type;
1524 u16 size;
1525 u16 priority;
1526 u32 flags;
1527 u8 num_of_specs;
1528 u8 port;
1529 /* Following are the optional layers according to user request
1530 * struct ib_flow_spec_xxx
1531 * struct ib_flow_spec_yyy
1532 */
1533};
1534
1535struct ib_flow {
1536 struct ib_qp *qp;
1537 struct ib_uobject *uobject;
1538};
1539
4cd7c947 1540struct ib_mad_hdr;
1da177e4
LT
1541struct ib_grh;
1542
1543enum ib_process_mad_flags {
1544 IB_MAD_IGNORE_MKEY = 1,
1545 IB_MAD_IGNORE_BKEY = 2,
1546 IB_MAD_IGNORE_ALL = IB_MAD_IGNORE_MKEY | IB_MAD_IGNORE_BKEY
1547};
1548
1549enum ib_mad_result {
1550 IB_MAD_RESULT_FAILURE = 0, /* (!SUCCESS is the important flag) */
1551 IB_MAD_RESULT_SUCCESS = 1 << 0, /* MAD was successfully processed */
1552 IB_MAD_RESULT_REPLY = 1 << 1, /* Reply packet needs to be sent */
1553 IB_MAD_RESULT_CONSUMED = 1 << 2 /* Packet consumed: stop processing */
1554};
1555
1556#define IB_DEVICE_NAME_MAX 64
1557
1558struct ib_cache {
1559 rwlock_t lock;
1560 struct ib_event_handler event_handler;
1561 struct ib_pkey_cache **pkey_cache;
03db3a2d 1562 struct ib_gid_table **gid_cache;
6fb9cdbf 1563 u8 *lmc_cache;
1da177e4
LT
1564};
1565
9b513090
RC
1566struct ib_dma_mapping_ops {
1567 int (*mapping_error)(struct ib_device *dev,
1568 u64 dma_addr);
1569 u64 (*map_single)(struct ib_device *dev,
1570 void *ptr, size_t size,
1571 enum dma_data_direction direction);
1572 void (*unmap_single)(struct ib_device *dev,
1573 u64 addr, size_t size,
1574 enum dma_data_direction direction);
1575 u64 (*map_page)(struct ib_device *dev,
1576 struct page *page, unsigned long offset,
1577 size_t size,
1578 enum dma_data_direction direction);
1579 void (*unmap_page)(struct ib_device *dev,
1580 u64 addr, size_t size,
1581 enum dma_data_direction direction);
1582 int (*map_sg)(struct ib_device *dev,
1583 struct scatterlist *sg, int nents,
1584 enum dma_data_direction direction);
1585 void (*unmap_sg)(struct ib_device *dev,
1586 struct scatterlist *sg, int nents,
1587 enum dma_data_direction direction);
9b513090
RC
1588 void (*sync_single_for_cpu)(struct ib_device *dev,
1589 u64 dma_handle,
1590 size_t size,
4deccd6d 1591 enum dma_data_direction dir);
9b513090
RC
1592 void (*sync_single_for_device)(struct ib_device *dev,
1593 u64 dma_handle,
1594 size_t size,
1595 enum dma_data_direction dir);
1596 void *(*alloc_coherent)(struct ib_device *dev,
1597 size_t size,
1598 u64 *dma_handle,
1599 gfp_t flag);
1600 void (*free_coherent)(struct ib_device *dev,
1601 size_t size, void *cpu_addr,
1602 u64 dma_handle);
1603};
1604
07ebafba
TT
1605struct iw_cm_verbs;
1606
7738613e
IW
1607struct ib_port_immutable {
1608 int pkey_tbl_len;
1609 int gid_tbl_len;
f9b22e35 1610 u32 core_cap_flags;
337877a4 1611 u32 max_mad_size;
7738613e
IW
1612};
1613
1da177e4
LT
1614struct ib_device {
1615 struct device *dma_device;
1616
1617 char name[IB_DEVICE_NAME_MAX];
1618
1619 struct list_head event_handler_list;
1620 spinlock_t event_handler_lock;
1621
17a55f79 1622 spinlock_t client_data_lock;
1da177e4 1623 struct list_head core_list;
7c1eb45a
HE
1624 /* Access to the client_data_list is protected by the client_data_lock
1625 * spinlock and the lists_rwsem read-write semaphore */
1da177e4 1626 struct list_head client_data_list;
1da177e4
LT
1627
1628 struct ib_cache cache;
7738613e
IW
1629 /**
1630 * port_immutable is indexed by port number
1631 */
1632 struct ib_port_immutable *port_immutable;
1da177e4 1633
f4fd0b22
MT
1634 int num_comp_vectors;
1635
07ebafba
TT
1636 struct iw_cm_verbs *iwcm;
1637
7f624d02
SW
1638 int (*get_protocol_stats)(struct ib_device *device,
1639 union rdma_protocol_stats *stats);
1da177e4 1640 int (*query_device)(struct ib_device *device,
2528e33e
MB
1641 struct ib_device_attr *device_attr,
1642 struct ib_udata *udata);
1da177e4
LT
1643 int (*query_port)(struct ib_device *device,
1644 u8 port_num,
1645 struct ib_port_attr *port_attr);
a3f5adaf
EC
1646 enum rdma_link_layer (*get_link_layer)(struct ib_device *device,
1647 u8 port_num);
03db3a2d
MB
1648 /* When calling get_netdev, the HW vendor's driver should return the
1649 * net device of device @device at port @port_num or NULL if such
1650 * a net device doesn't exist. The vendor driver should call dev_hold
1651 * on this net device. The HW vendor's device driver must guarantee
1652 * that this function returns NULL before the net device reaches
1653 * NETDEV_UNREGISTER_FINAL state.
1654 */
1655 struct net_device *(*get_netdev)(struct ib_device *device,
1656 u8 port_num);
1da177e4
LT
1657 int (*query_gid)(struct ib_device *device,
1658 u8 port_num, int index,
1659 union ib_gid *gid);
03db3a2d
MB
1660 /* When calling add_gid, the HW vendor's driver should
1661 * add the gid of device @device at gid index @index of
1662 * port @port_num to be @gid. Meta-info of that gid (for example,
1663 * the network device related to this gid is available
1664 * at @attr. @context allows the HW vendor driver to store extra
1665 * information together with a GID entry. The HW vendor may allocate
1666 * memory to contain this information and store it in @context when a
1667 * new GID entry is written to. Params are consistent until the next
1668 * call of add_gid or delete_gid. The function should return 0 on
1669 * success or error otherwise. The function could be called
1670 * concurrently for different ports. This function is only called
1671 * when roce_gid_table is used.
1672 */
1673 int (*add_gid)(struct ib_device *device,
1674 u8 port_num,
1675 unsigned int index,
1676 const union ib_gid *gid,
1677 const struct ib_gid_attr *attr,
1678 void **context);
1679 /* When calling del_gid, the HW vendor's driver should delete the
1680 * gid of device @device at gid index @index of port @port_num.
1681 * Upon the deletion of a GID entry, the HW vendor must free any
1682 * allocated memory. The caller will clear @context afterwards.
1683 * This function is only called when roce_gid_table is used.
1684 */
1685 int (*del_gid)(struct ib_device *device,
1686 u8 port_num,
1687 unsigned int index,
1688 void **context);
1da177e4
LT
1689 int (*query_pkey)(struct ib_device *device,
1690 u8 port_num, u16 index, u16 *pkey);
1691 int (*modify_device)(struct ib_device *device,
1692 int device_modify_mask,
1693 struct ib_device_modify *device_modify);
1694 int (*modify_port)(struct ib_device *device,
1695 u8 port_num, int port_modify_mask,
1696 struct ib_port_modify *port_modify);
e2773c06
RD
1697 struct ib_ucontext * (*alloc_ucontext)(struct ib_device *device,
1698 struct ib_udata *udata);
1699 int (*dealloc_ucontext)(struct ib_ucontext *context);
1700 int (*mmap)(struct ib_ucontext *context,
1701 struct vm_area_struct *vma);
1702 struct ib_pd * (*alloc_pd)(struct ib_device *device,
1703 struct ib_ucontext *context,
1704 struct ib_udata *udata);
1da177e4
LT
1705 int (*dealloc_pd)(struct ib_pd *pd);
1706 struct ib_ah * (*create_ah)(struct ib_pd *pd,
1707 struct ib_ah_attr *ah_attr);
1708 int (*modify_ah)(struct ib_ah *ah,
1709 struct ib_ah_attr *ah_attr);
1710 int (*query_ah)(struct ib_ah *ah,
1711 struct ib_ah_attr *ah_attr);
1712 int (*destroy_ah)(struct ib_ah *ah);
d41fcc67
RD
1713 struct ib_srq * (*create_srq)(struct ib_pd *pd,
1714 struct ib_srq_init_attr *srq_init_attr,
1715 struct ib_udata *udata);
1716 int (*modify_srq)(struct ib_srq *srq,
1717 struct ib_srq_attr *srq_attr,
9bc57e2d
RC
1718 enum ib_srq_attr_mask srq_attr_mask,
1719 struct ib_udata *udata);
d41fcc67
RD
1720 int (*query_srq)(struct ib_srq *srq,
1721 struct ib_srq_attr *srq_attr);
1722 int (*destroy_srq)(struct ib_srq *srq);
1723 int (*post_srq_recv)(struct ib_srq *srq,
1724 struct ib_recv_wr *recv_wr,
1725 struct ib_recv_wr **bad_recv_wr);
1da177e4 1726 struct ib_qp * (*create_qp)(struct ib_pd *pd,
e2773c06
RD
1727 struct ib_qp_init_attr *qp_init_attr,
1728 struct ib_udata *udata);
1da177e4
LT
1729 int (*modify_qp)(struct ib_qp *qp,
1730 struct ib_qp_attr *qp_attr,
9bc57e2d
RC
1731 int qp_attr_mask,
1732 struct ib_udata *udata);
1da177e4
LT
1733 int (*query_qp)(struct ib_qp *qp,
1734 struct ib_qp_attr *qp_attr,
1735 int qp_attr_mask,
1736 struct ib_qp_init_attr *qp_init_attr);
1737 int (*destroy_qp)(struct ib_qp *qp);
1738 int (*post_send)(struct ib_qp *qp,
1739 struct ib_send_wr *send_wr,
1740 struct ib_send_wr **bad_send_wr);
1741 int (*post_recv)(struct ib_qp *qp,
1742 struct ib_recv_wr *recv_wr,
1743 struct ib_recv_wr **bad_recv_wr);
bcf4c1ea
MB
1744 struct ib_cq * (*create_cq)(struct ib_device *device,
1745 const struct ib_cq_init_attr *attr,
e2773c06
RD
1746 struct ib_ucontext *context,
1747 struct ib_udata *udata);
2dd57162
EC
1748 int (*modify_cq)(struct ib_cq *cq, u16 cq_count,
1749 u16 cq_period);
1da177e4 1750 int (*destroy_cq)(struct ib_cq *cq);
33b9b3ee
RD
1751 int (*resize_cq)(struct ib_cq *cq, int cqe,
1752 struct ib_udata *udata);
1da177e4
LT
1753 int (*poll_cq)(struct ib_cq *cq, int num_entries,
1754 struct ib_wc *wc);
1755 int (*peek_cq)(struct ib_cq *cq, int wc_cnt);
1756 int (*req_notify_cq)(struct ib_cq *cq,
ed23a727 1757 enum ib_cq_notify_flags flags);
1da177e4
LT
1758 int (*req_ncomp_notif)(struct ib_cq *cq,
1759 int wc_cnt);
1760 struct ib_mr * (*get_dma_mr)(struct ib_pd *pd,
1761 int mr_access_flags);
1762 struct ib_mr * (*reg_phys_mr)(struct ib_pd *pd,
1763 struct ib_phys_buf *phys_buf_array,
1764 int num_phys_buf,
1765 int mr_access_flags,
1766 u64 *iova_start);
e2773c06 1767 struct ib_mr * (*reg_user_mr)(struct ib_pd *pd,
f7c6a7b5
RD
1768 u64 start, u64 length,
1769 u64 virt_addr,
e2773c06
RD
1770 int mr_access_flags,
1771 struct ib_udata *udata);
7e6edb9b
MB
1772 int (*rereg_user_mr)(struct ib_mr *mr,
1773 int flags,
1774 u64 start, u64 length,
1775 u64 virt_addr,
1776 int mr_access_flags,
1777 struct ib_pd *pd,
1778 struct ib_udata *udata);
1da177e4
LT
1779 int (*query_mr)(struct ib_mr *mr,
1780 struct ib_mr_attr *mr_attr);
1781 int (*dereg_mr)(struct ib_mr *mr);
9bee178b
SG
1782 struct ib_mr * (*alloc_mr)(struct ib_pd *pd,
1783 enum ib_mr_type mr_type,
1784 u32 max_num_sg);
4c67e2bf
SG
1785 int (*map_mr_sg)(struct ib_mr *mr,
1786 struct scatterlist *sg,
1787 int sg_nents);
1da177e4
LT
1788 int (*rereg_phys_mr)(struct ib_mr *mr,
1789 int mr_rereg_mask,
1790 struct ib_pd *pd,
1791 struct ib_phys_buf *phys_buf_array,
1792 int num_phys_buf,
1793 int mr_access_flags,
1794 u64 *iova_start);
7083e42e
SM
1795 struct ib_mw * (*alloc_mw)(struct ib_pd *pd,
1796 enum ib_mw_type type);
1da177e4
LT
1797 int (*bind_mw)(struct ib_qp *qp,
1798 struct ib_mw *mw,
1799 struct ib_mw_bind *mw_bind);
1800 int (*dealloc_mw)(struct ib_mw *mw);
1801 struct ib_fmr * (*alloc_fmr)(struct ib_pd *pd,
1802 int mr_access_flags,
1803 struct ib_fmr_attr *fmr_attr);
1804 int (*map_phys_fmr)(struct ib_fmr *fmr,
1805 u64 *page_list, int list_len,
1806 u64 iova);
1807 int (*unmap_fmr)(struct list_head *fmr_list);
1808 int (*dealloc_fmr)(struct ib_fmr *fmr);
1809 int (*attach_mcast)(struct ib_qp *qp,
1810 union ib_gid *gid,
1811 u16 lid);
1812 int (*detach_mcast)(struct ib_qp *qp,
1813 union ib_gid *gid,
1814 u16 lid);
1815 int (*process_mad)(struct ib_device *device,
1816 int process_mad_flags,
1817 u8 port_num,
a97e2d86
IW
1818 const struct ib_wc *in_wc,
1819 const struct ib_grh *in_grh,
4cd7c947
IW
1820 const struct ib_mad_hdr *in_mad,
1821 size_t in_mad_size,
1822 struct ib_mad_hdr *out_mad,
1823 size_t *out_mad_size,
1824 u16 *out_mad_pkey_index);
59991f94
SH
1825 struct ib_xrcd * (*alloc_xrcd)(struct ib_device *device,
1826 struct ib_ucontext *ucontext,
1827 struct ib_udata *udata);
1828 int (*dealloc_xrcd)(struct ib_xrcd *xrcd);
319a441d
HHZ
1829 struct ib_flow * (*create_flow)(struct ib_qp *qp,
1830 struct ib_flow_attr
1831 *flow_attr,
1832 int domain);
1833 int (*destroy_flow)(struct ib_flow *flow_id);
1b01d335
SG
1834 int (*check_mr_status)(struct ib_mr *mr, u32 check_mask,
1835 struct ib_mr_status *mr_status);
036b1063 1836 void (*disassociate_ucontext)(struct ib_ucontext *ibcontext);
1da177e4 1837
9b513090
RC
1838 struct ib_dma_mapping_ops *dma_ops;
1839
e2773c06 1840 struct module *owner;
f4e91eb4 1841 struct device dev;
35be0681 1842 struct kobject *ports_parent;
1da177e4
LT
1843 struct list_head port_list;
1844
1845 enum {
1846 IB_DEV_UNINITIALIZED,
1847 IB_DEV_REGISTERED,
1848 IB_DEV_UNREGISTERED
1849 } reg_state;
1850
274c0891 1851 int uverbs_abi_ver;
17a55f79 1852 u64 uverbs_cmd_mask;
f21519b2 1853 u64 uverbs_ex_cmd_mask;
274c0891 1854
c5bcbbb9 1855 char node_desc[64];
cf311cd4 1856 __be64 node_guid;
96f15c03 1857 u32 local_dma_lkey;
4139032b 1858 u16 is_switch:1;
1da177e4
LT
1859 u8 node_type;
1860 u8 phys_port_cnt;
3e153a93 1861 struct ib_device_attr attrs;
7738613e
IW
1862
1863 /**
1864 * The following mandatory functions are used only at device
1865 * registration. Keep functions such as these at the end of this
1866 * structure to avoid cache line misses when accessing struct ib_device
1867 * in fast paths.
1868 */
1869 int (*get_port_immutable)(struct ib_device *, u8, struct ib_port_immutable *);
1da177e4
LT
1870};
1871
1872struct ib_client {
1873 char *name;
1874 void (*add) (struct ib_device *);
7c1eb45a 1875 void (*remove)(struct ib_device *, void *client_data);
1da177e4 1876
9268f72d
YK
1877 /* Returns the net_dev belonging to this ib_client and matching the
1878 * given parameters.
1879 * @dev: An RDMA device that the net_dev use for communication.
1880 * @port: A physical port number on the RDMA device.
1881 * @pkey: P_Key that the net_dev uses if applicable.
1882 * @gid: A GID that the net_dev uses to communicate.
1883 * @addr: An IP address the net_dev is configured with.
1884 * @client_data: The device's client data set by ib_set_client_data().
1885 *
1886 * An ib_client that implements a net_dev on top of RDMA devices
1887 * (such as IP over IB) should implement this callback, allowing the
1888 * rdma_cm module to find the right net_dev for a given request.
1889 *
1890 * The caller is responsible for calling dev_put on the returned
1891 * netdev. */
1892 struct net_device *(*get_net_dev_by_params)(
1893 struct ib_device *dev,
1894 u8 port,
1895 u16 pkey,
1896 const union ib_gid *gid,
1897 const struct sockaddr *addr,
1898 void *client_data);
1da177e4
LT
1899 struct list_head list;
1900};
1901
1902struct ib_device *ib_alloc_device(size_t size);
1903void ib_dealloc_device(struct ib_device *device);
1904
9a6edb60
RC
1905int ib_register_device(struct ib_device *device,
1906 int (*port_callback)(struct ib_device *,
1907 u8, struct kobject *));
1da177e4
LT
1908void ib_unregister_device(struct ib_device *device);
1909
1910int ib_register_client (struct ib_client *client);
1911void ib_unregister_client(struct ib_client *client);
1912
1913void *ib_get_client_data(struct ib_device *device, struct ib_client *client);
1914void ib_set_client_data(struct ib_device *device, struct ib_client *client,
1915 void *data);
1916
e2773c06
RD
1917static inline int ib_copy_from_udata(void *dest, struct ib_udata *udata, size_t len)
1918{
1919 return copy_from_user(dest, udata->inbuf, len) ? -EFAULT : 0;
1920}
1921
1922static inline int ib_copy_to_udata(struct ib_udata *udata, void *src, size_t len)
1923{
43c61165 1924 return copy_to_user(udata->outbuf, src, len) ? -EFAULT : 0;
e2773c06
RD
1925}
1926
8a51866f
RD
1927/**
1928 * ib_modify_qp_is_ok - Check that the supplied attribute mask
1929 * contains all required attributes and no attributes not allowed for
1930 * the given QP state transition.
1931 * @cur_state: Current QP state
1932 * @next_state: Next QP state
1933 * @type: QP type
1934 * @mask: Mask of supplied QP attributes
dd5f03be 1935 * @ll : link layer of port
8a51866f
RD
1936 *
1937 * This function is a helper function that a low-level driver's
1938 * modify_qp method can use to validate the consumer's input. It
1939 * checks that cur_state and next_state are valid QP states, that a
1940 * transition from cur_state to next_state is allowed by the IB spec,
1941 * and that the attribute mask supplied is allowed for the transition.
1942 */
1943int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
dd5f03be
MB
1944 enum ib_qp_type type, enum ib_qp_attr_mask mask,
1945 enum rdma_link_layer ll);
8a51866f 1946
1da177e4
LT
1947int ib_register_event_handler (struct ib_event_handler *event_handler);
1948int ib_unregister_event_handler(struct ib_event_handler *event_handler);
1949void ib_dispatch_event(struct ib_event *event);
1950
1da177e4
LT
1951int ib_query_port(struct ib_device *device,
1952 u8 port_num, struct ib_port_attr *port_attr);
1953
a3f5adaf
EC
1954enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device,
1955 u8 port_num);
1956
4139032b
HR
1957/**
1958 * rdma_cap_ib_switch - Check if the device is IB switch
1959 * @device: Device to check
1960 *
1961 * Device driver is responsible for setting is_switch bit on
1962 * in ib_device structure at init time.
1963 *
1964 * Return: true if the device is IB switch.
1965 */
1966static inline bool rdma_cap_ib_switch(const struct ib_device *device)
1967{
1968 return device->is_switch;
1969}
1970
0cf18d77
IW
1971/**
1972 * rdma_start_port - Return the first valid port number for the device
1973 * specified
1974 *
1975 * @device: Device to be checked
1976 *
1977 * Return start port number
1978 */
1979static inline u8 rdma_start_port(const struct ib_device *device)
1980{
4139032b 1981 return rdma_cap_ib_switch(device) ? 0 : 1;
0cf18d77
IW
1982}
1983
1984/**
1985 * rdma_end_port - Return the last valid port number for the device
1986 * specified
1987 *
1988 * @device: Device to be checked
1989 *
1990 * Return last port number
1991 */
1992static inline u8 rdma_end_port(const struct ib_device *device)
1993{
4139032b 1994 return rdma_cap_ib_switch(device) ? 0 : device->phys_port_cnt;
0cf18d77
IW
1995}
1996
5ede9289 1997static inline bool rdma_protocol_ib(const struct ib_device *device, u8 port_num)
de66be94 1998{
f9b22e35 1999 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IB;
de66be94
MW
2000}
2001
5ede9289 2002static inline bool rdma_protocol_roce(const struct ib_device *device, u8 port_num)
de66be94 2003{
f9b22e35 2004 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_ROCE;
de66be94
MW
2005}
2006
5ede9289 2007static inline bool rdma_protocol_iwarp(const struct ib_device *device, u8 port_num)
de66be94 2008{
f9b22e35 2009 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IWARP;
de66be94
MW
2010}
2011
5ede9289 2012static inline bool rdma_ib_or_roce(const struct ib_device *device, u8 port_num)
de66be94 2013{
f9b22e35
IW
2014 return device->port_immutable[port_num].core_cap_flags &
2015 (RDMA_CORE_CAP_PROT_IB | RDMA_CORE_CAP_PROT_ROCE);
de66be94
MW
2016}
2017
c757dea8 2018/**
296ec009 2019 * rdma_cap_ib_mad - Check if the port of a device supports Infiniband
c757dea8 2020 * Management Datagrams.
296ec009
MW
2021 * @device: Device to check
2022 * @port_num: Port number to check
c757dea8 2023 *
296ec009
MW
2024 * Management Datagrams (MAD) are a required part of the InfiniBand
2025 * specification and are supported on all InfiniBand devices. A slightly
2026 * extended version are also supported on OPA interfaces.
c757dea8 2027 *
296ec009 2028 * Return: true if the port supports sending/receiving of MAD packets.
c757dea8 2029 */
5ede9289 2030static inline bool rdma_cap_ib_mad(const struct ib_device *device, u8 port_num)
c757dea8 2031{
f9b22e35 2032 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_MAD;
c757dea8
MW
2033}
2034
65995fee
IW
2035/**
2036 * rdma_cap_opa_mad - Check if the port of device provides support for OPA
2037 * Management Datagrams.
2038 * @device: Device to check
2039 * @port_num: Port number to check
2040 *
2041 * Intel OmniPath devices extend and/or replace the InfiniBand Management
2042 * datagrams with their own versions. These OPA MADs share many but not all of
2043 * the characteristics of InfiniBand MADs.
2044 *
2045 * OPA MADs differ in the following ways:
2046 *
2047 * 1) MADs are variable size up to 2K
2048 * IBTA defined MADs remain fixed at 256 bytes
2049 * 2) OPA SMPs must carry valid PKeys
2050 * 3) OPA SMP packets are a different format
2051 *
2052 * Return: true if the port supports OPA MAD packet formats.
2053 */
2054static inline bool rdma_cap_opa_mad(struct ib_device *device, u8 port_num)
2055{
2056 return (device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_OPA_MAD)
2057 == RDMA_CORE_CAP_OPA_MAD;
2058}
2059
29541e3a 2060/**
296ec009
MW
2061 * rdma_cap_ib_smi - Check if the port of a device provides an Infiniband
2062 * Subnet Management Agent (SMA) on the Subnet Management Interface (SMI).
2063 * @device: Device to check
2064 * @port_num: Port number to check
29541e3a 2065 *
296ec009
MW
2066 * Each InfiniBand node is required to provide a Subnet Management Agent
2067 * that the subnet manager can access. Prior to the fabric being fully
2068 * configured by the subnet manager, the SMA is accessed via a well known
2069 * interface called the Subnet Management Interface (SMI). This interface
2070 * uses directed route packets to communicate with the SM to get around the
2071 * chicken and egg problem of the SM needing to know what's on the fabric
2072 * in order to configure the fabric, and needing to configure the fabric in
2073 * order to send packets to the devices on the fabric. These directed
2074 * route packets do not need the fabric fully configured in order to reach
2075 * their destination. The SMI is the only method allowed to send
2076 * directed route packets on an InfiniBand fabric.
29541e3a 2077 *
296ec009 2078 * Return: true if the port provides an SMI.
29541e3a 2079 */
5ede9289 2080static inline bool rdma_cap_ib_smi(const struct ib_device *device, u8 port_num)
29541e3a 2081{
f9b22e35 2082 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SMI;
29541e3a
MW
2083}
2084
72219cea
MW
2085/**
2086 * rdma_cap_ib_cm - Check if the port of device has the capability Infiniband
2087 * Communication Manager.
296ec009
MW
2088 * @device: Device to check
2089 * @port_num: Port number to check
72219cea 2090 *
296ec009
MW
2091 * The InfiniBand Communication Manager is one of many pre-defined General
2092 * Service Agents (GSA) that are accessed via the General Service
2093 * Interface (GSI). It's role is to facilitate establishment of connections
2094 * between nodes as well as other management related tasks for established
2095 * connections.
72219cea 2096 *
296ec009
MW
2097 * Return: true if the port supports an IB CM (this does not guarantee that
2098 * a CM is actually running however).
72219cea 2099 */
5ede9289 2100static inline bool rdma_cap_ib_cm(const struct ib_device *device, u8 port_num)
72219cea 2101{
f9b22e35 2102 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_CM;
72219cea
MW
2103}
2104
04215330
MW
2105/**
2106 * rdma_cap_iw_cm - Check if the port of device has the capability IWARP
2107 * Communication Manager.
296ec009
MW
2108 * @device: Device to check
2109 * @port_num: Port number to check
04215330 2110 *
296ec009
MW
2111 * Similar to above, but specific to iWARP connections which have a different
2112 * managment protocol than InfiniBand.
04215330 2113 *
296ec009
MW
2114 * Return: true if the port supports an iWARP CM (this does not guarantee that
2115 * a CM is actually running however).
04215330 2116 */
5ede9289 2117static inline bool rdma_cap_iw_cm(const struct ib_device *device, u8 port_num)
04215330 2118{
f9b22e35 2119 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IW_CM;
04215330
MW
2120}
2121
fe53ba2f
MW
2122/**
2123 * rdma_cap_ib_sa - Check if the port of device has the capability Infiniband
2124 * Subnet Administration.
296ec009
MW
2125 * @device: Device to check
2126 * @port_num: Port number to check
fe53ba2f 2127 *
296ec009
MW
2128 * An InfiniBand Subnet Administration (SA) service is a pre-defined General
2129 * Service Agent (GSA) provided by the Subnet Manager (SM). On InfiniBand
2130 * fabrics, devices should resolve routes to other hosts by contacting the
2131 * SA to query the proper route.
fe53ba2f 2132 *
296ec009
MW
2133 * Return: true if the port should act as a client to the fabric Subnet
2134 * Administration interface. This does not imply that the SA service is
2135 * running locally.
fe53ba2f 2136 */
5ede9289 2137static inline bool rdma_cap_ib_sa(const struct ib_device *device, u8 port_num)
fe53ba2f 2138{
f9b22e35 2139 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SA;
fe53ba2f
MW
2140}
2141
a31ad3b0
MW
2142/**
2143 * rdma_cap_ib_mcast - Check if the port of device has the capability Infiniband
2144 * Multicast.
296ec009
MW
2145 * @device: Device to check
2146 * @port_num: Port number to check
a31ad3b0 2147 *
296ec009
MW
2148 * InfiniBand multicast registration is more complex than normal IPv4 or
2149 * IPv6 multicast registration. Each Host Channel Adapter must register
2150 * with the Subnet Manager when it wishes to join a multicast group. It
2151 * should do so only once regardless of how many queue pairs it subscribes
2152 * to this group. And it should leave the group only after all queue pairs
2153 * attached to the group have been detached.
a31ad3b0 2154 *
296ec009
MW
2155 * Return: true if the port must undertake the additional adminstrative
2156 * overhead of registering/unregistering with the SM and tracking of the
2157 * total number of queue pairs attached to the multicast group.
a31ad3b0 2158 */
5ede9289 2159static inline bool rdma_cap_ib_mcast(const struct ib_device *device, u8 port_num)
a31ad3b0
MW
2160{
2161 return rdma_cap_ib_sa(device, port_num);
2162}
2163
30a74ef4
MW
2164/**
2165 * rdma_cap_af_ib - Check if the port of device has the capability
2166 * Native Infiniband Address.
296ec009
MW
2167 * @device: Device to check
2168 * @port_num: Port number to check
30a74ef4 2169 *
296ec009
MW
2170 * InfiniBand addressing uses a port's GUID + Subnet Prefix to make a default
2171 * GID. RoCE uses a different mechanism, but still generates a GID via
2172 * a prescribed mechanism and port specific data.
30a74ef4 2173 *
296ec009
MW
2174 * Return: true if the port uses a GID address to identify devices on the
2175 * network.
30a74ef4 2176 */
5ede9289 2177static inline bool rdma_cap_af_ib(const struct ib_device *device, u8 port_num)
30a74ef4 2178{
f9b22e35 2179 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_AF_IB;
30a74ef4
MW
2180}
2181
227128fc
MW
2182/**
2183 * rdma_cap_eth_ah - Check if the port of device has the capability
296ec009
MW
2184 * Ethernet Address Handle.
2185 * @device: Device to check
2186 * @port_num: Port number to check
227128fc 2187 *
296ec009
MW
2188 * RoCE is InfiniBand over Ethernet, and it uses a well defined technique
2189 * to fabricate GIDs over Ethernet/IP specific addresses native to the
2190 * port. Normally, packet headers are generated by the sending host
2191 * adapter, but when sending connectionless datagrams, we must manually
2192 * inject the proper headers for the fabric we are communicating over.
227128fc 2193 *
296ec009
MW
2194 * Return: true if we are running as a RoCE port and must force the
2195 * addition of a Global Route Header built from our Ethernet Address
2196 * Handle into our header list for connectionless packets.
227128fc 2197 */
5ede9289 2198static inline bool rdma_cap_eth_ah(const struct ib_device *device, u8 port_num)
227128fc 2199{
f9b22e35 2200 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_ETH_AH;
227128fc
MW
2201}
2202
337877a4
IW
2203/**
2204 * rdma_max_mad_size - Return the max MAD size required by this RDMA Port.
2205 *
2206 * @device: Device
2207 * @port_num: Port number
2208 *
2209 * This MAD size includes the MAD headers and MAD payload. No other headers
2210 * are included.
2211 *
2212 * Return the max MAD size required by the Port. Will return 0 if the port
2213 * does not support MADs
2214 */
2215static inline size_t rdma_max_mad_size(const struct ib_device *device, u8 port_num)
2216{
2217 return device->port_immutable[port_num].max_mad_size;
2218}
2219
03db3a2d
MB
2220/**
2221 * rdma_cap_roce_gid_table - Check if the port of device uses roce_gid_table
2222 * @device: Device to check
2223 * @port_num: Port number to check
2224 *
2225 * RoCE GID table mechanism manages the various GIDs for a device.
2226 *
2227 * NOTE: if allocating the port's GID table has failed, this call will still
2228 * return true, but any RoCE GID table API will fail.
2229 *
2230 * Return: true if the port uses RoCE GID table mechanism in order to manage
2231 * its GIDs.
2232 */
2233static inline bool rdma_cap_roce_gid_table(const struct ib_device *device,
2234 u8 port_num)
2235{
2236 return rdma_protocol_roce(device, port_num) &&
2237 device->add_gid && device->del_gid;
2238}
2239
1da177e4 2240int ib_query_gid(struct ib_device *device,
55ee3ab2
MB
2241 u8 port_num, int index, union ib_gid *gid,
2242 struct ib_gid_attr *attr);
1da177e4
LT
2243
2244int ib_query_pkey(struct ib_device *device,
2245 u8 port_num, u16 index, u16 *pkey);
2246
2247int ib_modify_device(struct ib_device *device,
2248 int device_modify_mask,
2249 struct ib_device_modify *device_modify);
2250
2251int ib_modify_port(struct ib_device *device,
2252 u8 port_num, int port_modify_mask,
2253 struct ib_port_modify *port_modify);
2254
5eb620c8 2255int ib_find_gid(struct ib_device *device, union ib_gid *gid,
b39ffa1d
MB
2256 enum ib_gid_type gid_type, struct net_device *ndev,
2257 u8 *port_num, u16 *index);
5eb620c8
YE
2258
2259int ib_find_pkey(struct ib_device *device,
2260 u8 port_num, u16 pkey, u16 *index);
2261
1da177e4
LT
2262struct ib_pd *ib_alloc_pd(struct ib_device *device);
2263
7dd78647 2264void ib_dealloc_pd(struct ib_pd *pd);
1da177e4
LT
2265
2266/**
2267 * ib_create_ah - Creates an address handle for the given address vector.
2268 * @pd: The protection domain associated with the address handle.
2269 * @ah_attr: The attributes of the address vector.
2270 *
2271 * The address handle is used to reference a local or global destination
2272 * in all UD QP post sends.
2273 */
2274struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
2275
4e00d694
SH
2276/**
2277 * ib_init_ah_from_wc - Initializes address handle attributes from a
2278 * work completion.
2279 * @device: Device on which the received message arrived.
2280 * @port_num: Port on which the received message arrived.
2281 * @wc: Work completion associated with the received message.
2282 * @grh: References the received global route header. This parameter is
2283 * ignored unless the work completion indicates that the GRH is valid.
2284 * @ah_attr: Returned attributes that can be used when creating an address
2285 * handle for replying to the message.
2286 */
73cdaaee
IW
2287int ib_init_ah_from_wc(struct ib_device *device, u8 port_num,
2288 const struct ib_wc *wc, const struct ib_grh *grh,
2289 struct ib_ah_attr *ah_attr);
4e00d694 2290
513789ed
HR
2291/**
2292 * ib_create_ah_from_wc - Creates an address handle associated with the
2293 * sender of the specified work completion.
2294 * @pd: The protection domain associated with the address handle.
2295 * @wc: Work completion information associated with a received message.
2296 * @grh: References the received global route header. This parameter is
2297 * ignored unless the work completion indicates that the GRH is valid.
2298 * @port_num: The outbound port number to associate with the address.
2299 *
2300 * The address handle is used to reference a local or global destination
2301 * in all UD QP post sends.
2302 */
73cdaaee
IW
2303struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc,
2304 const struct ib_grh *grh, u8 port_num);
513789ed 2305
1da177e4
LT
2306/**
2307 * ib_modify_ah - Modifies the address vector associated with an address
2308 * handle.
2309 * @ah: The address handle to modify.
2310 * @ah_attr: The new address vector attributes to associate with the
2311 * address handle.
2312 */
2313int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr);
2314
2315/**
2316 * ib_query_ah - Queries the address vector associated with an address
2317 * handle.
2318 * @ah: The address handle to query.
2319 * @ah_attr: The address vector attributes associated with the address
2320 * handle.
2321 */
2322int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr);
2323
2324/**
2325 * ib_destroy_ah - Destroys an address handle.
2326 * @ah: The address handle to destroy.
2327 */
2328int ib_destroy_ah(struct ib_ah *ah);
2329
d41fcc67
RD
2330/**
2331 * ib_create_srq - Creates a SRQ associated with the specified protection
2332 * domain.
2333 * @pd: The protection domain associated with the SRQ.
abb6e9ba
DB
2334 * @srq_init_attr: A list of initial attributes required to create the
2335 * SRQ. If SRQ creation succeeds, then the attributes are updated to
2336 * the actual capabilities of the created SRQ.
d41fcc67
RD
2337 *
2338 * srq_attr->max_wr and srq_attr->max_sge are read the determine the
2339 * requested size of the SRQ, and set to the actual values allocated
2340 * on return. If ib_create_srq() succeeds, then max_wr and max_sge
2341 * will always be at least as large as the requested values.
2342 */
2343struct ib_srq *ib_create_srq(struct ib_pd *pd,
2344 struct ib_srq_init_attr *srq_init_attr);
2345
2346/**
2347 * ib_modify_srq - Modifies the attributes for the specified SRQ.
2348 * @srq: The SRQ to modify.
2349 * @srq_attr: On input, specifies the SRQ attributes to modify. On output,
2350 * the current values of selected SRQ attributes are returned.
2351 * @srq_attr_mask: A bit-mask used to specify which attributes of the SRQ
2352 * are being modified.
2353 *
2354 * The mask may contain IB_SRQ_MAX_WR to resize the SRQ and/or
2355 * IB_SRQ_LIMIT to set the SRQ's limit and request notification when
2356 * the number of receives queued drops below the limit.
2357 */
2358int ib_modify_srq(struct ib_srq *srq,
2359 struct ib_srq_attr *srq_attr,
2360 enum ib_srq_attr_mask srq_attr_mask);
2361
2362/**
2363 * ib_query_srq - Returns the attribute list and current values for the
2364 * specified SRQ.
2365 * @srq: The SRQ to query.
2366 * @srq_attr: The attributes of the specified SRQ.
2367 */
2368int ib_query_srq(struct ib_srq *srq,
2369 struct ib_srq_attr *srq_attr);
2370
2371/**
2372 * ib_destroy_srq - Destroys the specified SRQ.
2373 * @srq: The SRQ to destroy.
2374 */
2375int ib_destroy_srq(struct ib_srq *srq);
2376
2377/**
2378 * ib_post_srq_recv - Posts a list of work requests to the specified SRQ.
2379 * @srq: The SRQ to post the work request on.
2380 * @recv_wr: A list of work requests to post on the receive queue.
2381 * @bad_recv_wr: On an immediate failure, this parameter will reference
2382 * the work request that failed to be posted on the QP.
2383 */
2384static inline int ib_post_srq_recv(struct ib_srq *srq,
2385 struct ib_recv_wr *recv_wr,
2386 struct ib_recv_wr **bad_recv_wr)
2387{
2388 return srq->device->post_srq_recv(srq, recv_wr, bad_recv_wr);
2389}
2390
1da177e4
LT
2391/**
2392 * ib_create_qp - Creates a QP associated with the specified protection
2393 * domain.
2394 * @pd: The protection domain associated with the QP.
abb6e9ba
DB
2395 * @qp_init_attr: A list of initial attributes required to create the
2396 * QP. If QP creation succeeds, then the attributes are updated to
2397 * the actual capabilities of the created QP.
1da177e4
LT
2398 */
2399struct ib_qp *ib_create_qp(struct ib_pd *pd,
2400 struct ib_qp_init_attr *qp_init_attr);
2401
2402/**
2403 * ib_modify_qp - Modifies the attributes for the specified QP and then
2404 * transitions the QP to the given state.
2405 * @qp: The QP to modify.
2406 * @qp_attr: On input, specifies the QP attributes to modify. On output,
2407 * the current values of selected QP attributes are returned.
2408 * @qp_attr_mask: A bit-mask used to specify which attributes of the QP
2409 * are being modified.
2410 */
2411int ib_modify_qp(struct ib_qp *qp,
2412 struct ib_qp_attr *qp_attr,
2413 int qp_attr_mask);
2414
2415/**
2416 * ib_query_qp - Returns the attribute list and current values for the
2417 * specified QP.
2418 * @qp: The QP to query.
2419 * @qp_attr: The attributes of the specified QP.
2420 * @qp_attr_mask: A bit-mask used to select specific attributes to query.
2421 * @qp_init_attr: Additional attributes of the selected QP.
2422 *
2423 * The qp_attr_mask may be used to limit the query to gathering only the
2424 * selected attributes.
2425 */
2426int ib_query_qp(struct ib_qp *qp,
2427 struct ib_qp_attr *qp_attr,
2428 int qp_attr_mask,
2429 struct ib_qp_init_attr *qp_init_attr);
2430
2431/**
2432 * ib_destroy_qp - Destroys the specified QP.
2433 * @qp: The QP to destroy.
2434 */
2435int ib_destroy_qp(struct ib_qp *qp);
2436
d3d72d90 2437/**
0e0ec7e0
SH
2438 * ib_open_qp - Obtain a reference to an existing sharable QP.
2439 * @xrcd - XRC domain
2440 * @qp_open_attr: Attributes identifying the QP to open.
2441 *
2442 * Returns a reference to a sharable QP.
2443 */
2444struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd,
2445 struct ib_qp_open_attr *qp_open_attr);
2446
2447/**
2448 * ib_close_qp - Release an external reference to a QP.
d3d72d90
SH
2449 * @qp: The QP handle to release
2450 *
0e0ec7e0
SH
2451 * The opened QP handle is released by the caller. The underlying
2452 * shared QP is not destroyed until all internal references are released.
d3d72d90 2453 */
0e0ec7e0 2454int ib_close_qp(struct ib_qp *qp);
d3d72d90 2455
1da177e4
LT
2456/**
2457 * ib_post_send - Posts a list of work requests to the send queue of
2458 * the specified QP.
2459 * @qp: The QP to post the work request on.
2460 * @send_wr: A list of work requests to post on the send queue.
2461 * @bad_send_wr: On an immediate failure, this parameter will reference
2462 * the work request that failed to be posted on the QP.
55464d46
BVA
2463 *
2464 * While IBA Vol. 1 section 11.4.1.1 specifies that if an immediate
2465 * error is returned, the QP state shall not be affected,
2466 * ib_post_send() will return an immediate error after queueing any
2467 * earlier work requests in the list.
1da177e4
LT
2468 */
2469static inline int ib_post_send(struct ib_qp *qp,
2470 struct ib_send_wr *send_wr,
2471 struct ib_send_wr **bad_send_wr)
2472{
2473 return qp->device->post_send(qp, send_wr, bad_send_wr);
2474}
2475
2476/**
2477 * ib_post_recv - Posts a list of work requests to the receive queue of
2478 * the specified QP.
2479 * @qp: The QP to post the work request on.
2480 * @recv_wr: A list of work requests to post on the receive queue.
2481 * @bad_recv_wr: On an immediate failure, this parameter will reference
2482 * the work request that failed to be posted on the QP.
2483 */
2484static inline int ib_post_recv(struct ib_qp *qp,
2485 struct ib_recv_wr *recv_wr,
2486 struct ib_recv_wr **bad_recv_wr)
2487{
2488 return qp->device->post_recv(qp, recv_wr, bad_recv_wr);
2489}
2490
14d3a3b2
CH
2491struct ib_cq *ib_alloc_cq(struct ib_device *dev, void *private,
2492 int nr_cqe, int comp_vector, enum ib_poll_context poll_ctx);
2493void ib_free_cq(struct ib_cq *cq);
2494int ib_process_cq_direct(struct ib_cq *cq, int budget);
2495
1da177e4
LT
2496/**
2497 * ib_create_cq - Creates a CQ on the specified device.
2498 * @device: The device on which to create the CQ.
2499 * @comp_handler: A user-specified callback that is invoked when a
2500 * completion event occurs on the CQ.
2501 * @event_handler: A user-specified callback that is invoked when an
2502 * asynchronous event not associated with a completion occurs on the CQ.
2503 * @cq_context: Context associated with the CQ returned to the user via
2504 * the associated completion and event handlers.
8e37210b 2505 * @cq_attr: The attributes the CQ should be created upon.
1da177e4
LT
2506 *
2507 * Users can examine the cq structure to determine the actual CQ size.
2508 */
2509struct ib_cq *ib_create_cq(struct ib_device *device,
2510 ib_comp_handler comp_handler,
2511 void (*event_handler)(struct ib_event *, void *),
8e37210b
MB
2512 void *cq_context,
2513 const struct ib_cq_init_attr *cq_attr);
1da177e4
LT
2514
2515/**
2516 * ib_resize_cq - Modifies the capacity of the CQ.
2517 * @cq: The CQ to resize.
2518 * @cqe: The minimum size of the CQ.
2519 *
2520 * Users can examine the cq structure to determine the actual CQ size.
2521 */
2522int ib_resize_cq(struct ib_cq *cq, int cqe);
2523
2dd57162
EC
2524/**
2525 * ib_modify_cq - Modifies moderation params of the CQ
2526 * @cq: The CQ to modify.
2527 * @cq_count: number of CQEs that will trigger an event
2528 * @cq_period: max period of time in usec before triggering an event
2529 *
2530 */
2531int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
2532
1da177e4
LT
2533/**
2534 * ib_destroy_cq - Destroys the specified CQ.
2535 * @cq: The CQ to destroy.
2536 */
2537int ib_destroy_cq(struct ib_cq *cq);
2538
2539/**
2540 * ib_poll_cq - poll a CQ for completion(s)
2541 * @cq:the CQ being polled
2542 * @num_entries:maximum number of completions to return
2543 * @wc:array of at least @num_entries &struct ib_wc where completions
2544 * will be returned
2545 *
2546 * Poll a CQ for (possibly multiple) completions. If the return value
2547 * is < 0, an error occurred. If the return value is >= 0, it is the
2548 * number of completions returned. If the return value is
2549 * non-negative and < num_entries, then the CQ was emptied.
2550 */
2551static inline int ib_poll_cq(struct ib_cq *cq, int num_entries,
2552 struct ib_wc *wc)
2553{
2554 return cq->device->poll_cq(cq, num_entries, wc);
2555}
2556
2557/**
2558 * ib_peek_cq - Returns the number of unreaped completions currently
2559 * on the specified CQ.
2560 * @cq: The CQ to peek.
2561 * @wc_cnt: A minimum number of unreaped completions to check for.
2562 *
2563 * If the number of unreaped completions is greater than or equal to wc_cnt,
2564 * this function returns wc_cnt, otherwise, it returns the actual number of
2565 * unreaped completions.
2566 */
2567int ib_peek_cq(struct ib_cq *cq, int wc_cnt);
2568
2569/**
2570 * ib_req_notify_cq - Request completion notification on a CQ.
2571 * @cq: The CQ to generate an event for.
ed23a727
RD
2572 * @flags:
2573 * Must contain exactly one of %IB_CQ_SOLICITED or %IB_CQ_NEXT_COMP
2574 * to request an event on the next solicited event or next work
2575 * completion at any type, respectively. %IB_CQ_REPORT_MISSED_EVENTS
2576 * may also be |ed in to request a hint about missed events, as
2577 * described below.
2578 *
2579 * Return Value:
2580 * < 0 means an error occurred while requesting notification
2581 * == 0 means notification was requested successfully, and if
2582 * IB_CQ_REPORT_MISSED_EVENTS was passed in, then no events
2583 * were missed and it is safe to wait for another event. In
2584 * this case is it guaranteed that any work completions added
2585 * to the CQ since the last CQ poll will trigger a completion
2586 * notification event.
2587 * > 0 is only returned if IB_CQ_REPORT_MISSED_EVENTS was passed
2588 * in. It means that the consumer must poll the CQ again to
2589 * make sure it is empty to avoid missing an event because of a
2590 * race between requesting notification and an entry being
2591 * added to the CQ. This return value means it is possible
2592 * (but not guaranteed) that a work completion has been added
2593 * to the CQ since the last poll without triggering a
2594 * completion notification event.
1da177e4
LT
2595 */
2596static inline int ib_req_notify_cq(struct ib_cq *cq,
ed23a727 2597 enum ib_cq_notify_flags flags)
1da177e4 2598{
ed23a727 2599 return cq->device->req_notify_cq(cq, flags);
1da177e4
LT
2600}
2601
2602/**
2603 * ib_req_ncomp_notif - Request completion notification when there are
2604 * at least the specified number of unreaped completions on the CQ.
2605 * @cq: The CQ to generate an event for.
2606 * @wc_cnt: The number of unreaped completions that should be on the
2607 * CQ before an event is generated.
2608 */
2609static inline int ib_req_ncomp_notif(struct ib_cq *cq, int wc_cnt)
2610{
2611 return cq->device->req_ncomp_notif ?
2612 cq->device->req_ncomp_notif(cq, wc_cnt) :
2613 -ENOSYS;
2614}
2615
2616/**
2617 * ib_get_dma_mr - Returns a memory region for system memory that is
2618 * usable for DMA.
2619 * @pd: The protection domain associated with the memory region.
2620 * @mr_access_flags: Specifies the memory access rights.
9b513090
RC
2621 *
2622 * Note that the ib_dma_*() functions defined below must be used
2623 * to create/destroy addresses used with the Lkey or Rkey returned
2624 * by ib_get_dma_mr().
1da177e4
LT
2625 */
2626struct ib_mr *ib_get_dma_mr(struct ib_pd *pd, int mr_access_flags);
2627
9b513090
RC
2628/**
2629 * ib_dma_mapping_error - check a DMA addr for error
2630 * @dev: The device for which the dma_addr was created
2631 * @dma_addr: The DMA address to check
2632 */
2633static inline int ib_dma_mapping_error(struct ib_device *dev, u64 dma_addr)
2634{
d1998ef3
BC
2635 if (dev->dma_ops)
2636 return dev->dma_ops->mapping_error(dev, dma_addr);
8d8bb39b 2637 return dma_mapping_error(dev->dma_device, dma_addr);
9b513090
RC
2638}
2639
2640/**
2641 * ib_dma_map_single - Map a kernel virtual address to DMA address
2642 * @dev: The device for which the dma_addr is to be created
2643 * @cpu_addr: The kernel virtual address
2644 * @size: The size of the region in bytes
2645 * @direction: The direction of the DMA
2646 */
2647static inline u64 ib_dma_map_single(struct ib_device *dev,
2648 void *cpu_addr, size_t size,
2649 enum dma_data_direction direction)
2650{
d1998ef3
BC
2651 if (dev->dma_ops)
2652 return dev->dma_ops->map_single(dev, cpu_addr, size, direction);
2653 return dma_map_single(dev->dma_device, cpu_addr, size, direction);
9b513090
RC
2654}
2655
2656/**
2657 * ib_dma_unmap_single - Destroy a mapping created by ib_dma_map_single()
2658 * @dev: The device for which the DMA address was created
2659 * @addr: The DMA address
2660 * @size: The size of the region in bytes
2661 * @direction: The direction of the DMA
2662 */
2663static inline void ib_dma_unmap_single(struct ib_device *dev,
2664 u64 addr, size_t size,
2665 enum dma_data_direction direction)
2666{
d1998ef3
BC
2667 if (dev->dma_ops)
2668 dev->dma_ops->unmap_single(dev, addr, size, direction);
2669 else
9b513090
RC
2670 dma_unmap_single(dev->dma_device, addr, size, direction);
2671}
2672
cb9fbc5c
AK
2673static inline u64 ib_dma_map_single_attrs(struct ib_device *dev,
2674 void *cpu_addr, size_t size,
2675 enum dma_data_direction direction,
2676 struct dma_attrs *attrs)
2677{
2678 return dma_map_single_attrs(dev->dma_device, cpu_addr, size,
2679 direction, attrs);
2680}
2681
2682static inline void ib_dma_unmap_single_attrs(struct ib_device *dev,
2683 u64 addr, size_t size,
2684 enum dma_data_direction direction,
2685 struct dma_attrs *attrs)
2686{
2687 return dma_unmap_single_attrs(dev->dma_device, addr, size,
2688 direction, attrs);
2689}
2690
9b513090
RC
2691/**
2692 * ib_dma_map_page - Map a physical page to DMA address
2693 * @dev: The device for which the dma_addr is to be created
2694 * @page: The page to be mapped
2695 * @offset: The offset within the page
2696 * @size: The size of the region in bytes
2697 * @direction: The direction of the DMA
2698 */
2699static inline u64 ib_dma_map_page(struct ib_device *dev,
2700 struct page *page,
2701 unsigned long offset,
2702 size_t size,
2703 enum dma_data_direction direction)
2704{
d1998ef3
BC
2705 if (dev->dma_ops)
2706 return dev->dma_ops->map_page(dev, page, offset, size, direction);
2707 return dma_map_page(dev->dma_device, page, offset, size, direction);
9b513090
RC
2708}
2709
2710/**
2711 * ib_dma_unmap_page - Destroy a mapping created by ib_dma_map_page()
2712 * @dev: The device for which the DMA address was created
2713 * @addr: The DMA address
2714 * @size: The size of the region in bytes
2715 * @direction: The direction of the DMA
2716 */
2717static inline void ib_dma_unmap_page(struct ib_device *dev,
2718 u64 addr, size_t size,
2719 enum dma_data_direction direction)
2720{
d1998ef3
BC
2721 if (dev->dma_ops)
2722 dev->dma_ops->unmap_page(dev, addr, size, direction);
2723 else
9b513090
RC
2724 dma_unmap_page(dev->dma_device, addr, size, direction);
2725}
2726
2727/**
2728 * ib_dma_map_sg - Map a scatter/gather list to DMA addresses
2729 * @dev: The device for which the DMA addresses are to be created
2730 * @sg: The array of scatter/gather entries
2731 * @nents: The number of scatter/gather entries
2732 * @direction: The direction of the DMA
2733 */
2734static inline int ib_dma_map_sg(struct ib_device *dev,
2735 struct scatterlist *sg, int nents,
2736 enum dma_data_direction direction)
2737{
d1998ef3
BC
2738 if (dev->dma_ops)
2739 return dev->dma_ops->map_sg(dev, sg, nents, direction);
2740 return dma_map_sg(dev->dma_device, sg, nents, direction);
9b513090
RC
2741}
2742
2743/**
2744 * ib_dma_unmap_sg - Unmap a scatter/gather list of DMA addresses
2745 * @dev: The device for which the DMA addresses were created
2746 * @sg: The array of scatter/gather entries
2747 * @nents: The number of scatter/gather entries
2748 * @direction: The direction of the DMA
2749 */
2750static inline void ib_dma_unmap_sg(struct ib_device *dev,
2751 struct scatterlist *sg, int nents,
2752 enum dma_data_direction direction)
2753{
d1998ef3
BC
2754 if (dev->dma_ops)
2755 dev->dma_ops->unmap_sg(dev, sg, nents, direction);
2756 else
9b513090
RC
2757 dma_unmap_sg(dev->dma_device, sg, nents, direction);
2758}
2759
cb9fbc5c
AK
2760static inline int ib_dma_map_sg_attrs(struct ib_device *dev,
2761 struct scatterlist *sg, int nents,
2762 enum dma_data_direction direction,
2763 struct dma_attrs *attrs)
2764{
2765 return dma_map_sg_attrs(dev->dma_device, sg, nents, direction, attrs);
2766}
2767
2768static inline void ib_dma_unmap_sg_attrs(struct ib_device *dev,
2769 struct scatterlist *sg, int nents,
2770 enum dma_data_direction direction,
2771 struct dma_attrs *attrs)
2772{
2773 dma_unmap_sg_attrs(dev->dma_device, sg, nents, direction, attrs);
2774}
9b513090
RC
2775/**
2776 * ib_sg_dma_address - Return the DMA address from a scatter/gather entry
2777 * @dev: The device for which the DMA addresses were created
2778 * @sg: The scatter/gather entry
ea58a595
MM
2779 *
2780 * Note: this function is obsolete. To do: change all occurrences of
2781 * ib_sg_dma_address() into sg_dma_address().
9b513090
RC
2782 */
2783static inline u64 ib_sg_dma_address(struct ib_device *dev,
2784 struct scatterlist *sg)
2785{
d1998ef3 2786 return sg_dma_address(sg);
9b513090
RC
2787}
2788
2789/**
2790 * ib_sg_dma_len - Return the DMA length from a scatter/gather entry
2791 * @dev: The device for which the DMA addresses were created
2792 * @sg: The scatter/gather entry
ea58a595
MM
2793 *
2794 * Note: this function is obsolete. To do: change all occurrences of
2795 * ib_sg_dma_len() into sg_dma_len().
9b513090
RC
2796 */
2797static inline unsigned int ib_sg_dma_len(struct ib_device *dev,
2798 struct scatterlist *sg)
2799{
d1998ef3 2800 return sg_dma_len(sg);
9b513090
RC
2801}
2802
2803/**
2804 * ib_dma_sync_single_for_cpu - Prepare DMA region to be accessed by CPU
2805 * @dev: The device for which the DMA address was created
2806 * @addr: The DMA address
2807 * @size: The size of the region in bytes
2808 * @dir: The direction of the DMA
2809 */
2810static inline void ib_dma_sync_single_for_cpu(struct ib_device *dev,
2811 u64 addr,
2812 size_t size,
2813 enum dma_data_direction dir)
2814{
d1998ef3
BC
2815 if (dev->dma_ops)
2816 dev->dma_ops->sync_single_for_cpu(dev, addr, size, dir);
2817 else
9b513090
RC
2818 dma_sync_single_for_cpu(dev->dma_device, addr, size, dir);
2819}
2820
2821/**
2822 * ib_dma_sync_single_for_device - Prepare DMA region to be accessed by device
2823 * @dev: The device for which the DMA address was created
2824 * @addr: The DMA address
2825 * @size: The size of the region in bytes
2826 * @dir: The direction of the DMA
2827 */
2828static inline void ib_dma_sync_single_for_device(struct ib_device *dev,
2829 u64 addr,
2830 size_t size,
2831 enum dma_data_direction dir)
2832{
d1998ef3
BC
2833 if (dev->dma_ops)
2834 dev->dma_ops->sync_single_for_device(dev, addr, size, dir);
2835 else
9b513090
RC
2836 dma_sync_single_for_device(dev->dma_device, addr, size, dir);
2837}
2838
2839/**
2840 * ib_dma_alloc_coherent - Allocate memory and map it for DMA
2841 * @dev: The device for which the DMA address is requested
2842 * @size: The size of the region to allocate in bytes
2843 * @dma_handle: A pointer for returning the DMA address of the region
2844 * @flag: memory allocator flags
2845 */
2846static inline void *ib_dma_alloc_coherent(struct ib_device *dev,
2847 size_t size,
2848 u64 *dma_handle,
2849 gfp_t flag)
2850{
d1998ef3
BC
2851 if (dev->dma_ops)
2852 return dev->dma_ops->alloc_coherent(dev, size, dma_handle, flag);
c59a3da1
RD
2853 else {
2854 dma_addr_t handle;
2855 void *ret;
2856
2857 ret = dma_alloc_coherent(dev->dma_device, size, &handle, flag);
2858 *dma_handle = handle;
2859 return ret;
2860 }
9b513090
RC
2861}
2862
2863/**
2864 * ib_dma_free_coherent - Free memory allocated by ib_dma_alloc_coherent()
2865 * @dev: The device for which the DMA addresses were allocated
2866 * @size: The size of the region
2867 * @cpu_addr: the address returned by ib_dma_alloc_coherent()
2868 * @dma_handle: the DMA address returned by ib_dma_alloc_coherent()
2869 */
2870static inline void ib_dma_free_coherent(struct ib_device *dev,
2871 size_t size, void *cpu_addr,
2872 u64 dma_handle)
2873{
d1998ef3
BC
2874 if (dev->dma_ops)
2875 dev->dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
2876 else
9b513090
RC
2877 dma_free_coherent(dev->dma_device, size, cpu_addr, dma_handle);
2878}
2879
1da177e4
LT
2880/**
2881 * ib_query_mr - Retrieves information about a specific memory region.
2882 * @mr: The memory region to retrieve information about.
2883 * @mr_attr: The attributes of the specified memory region.
2884 */
2885int ib_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr);
2886
2887/**
2888 * ib_dereg_mr - Deregisters a memory region and removes it from the
2889 * HCA translation table.
2890 * @mr: The memory region to deregister.
7083e42e
SM
2891 *
2892 * This function can fail, if the memory region has memory windows bound to it.
1da177e4
LT
2893 */
2894int ib_dereg_mr(struct ib_mr *mr);
2895
9bee178b
SG
2896struct ib_mr *ib_alloc_mr(struct ib_pd *pd,
2897 enum ib_mr_type mr_type,
2898 u32 max_num_sg);
00f7ec36 2899
00f7ec36
SW
2900/**
2901 * ib_update_fast_reg_key - updates the key portion of the fast_reg MR
2902 * R_Key and L_Key.
2903 * @mr - struct ib_mr pointer to be updated.
2904 * @newkey - new key to be used.
2905 */
2906static inline void ib_update_fast_reg_key(struct ib_mr *mr, u8 newkey)
2907{
2908 mr->lkey = (mr->lkey & 0xffffff00) | newkey;
2909 mr->rkey = (mr->rkey & 0xffffff00) | newkey;
2910}
2911
7083e42e
SM
2912/**
2913 * ib_inc_rkey - increments the key portion of the given rkey. Can be used
2914 * for calculating a new rkey for type 2 memory windows.
2915 * @rkey - the rkey to increment.
2916 */
2917static inline u32 ib_inc_rkey(u32 rkey)
2918{
2919 const u32 mask = 0x000000ff;
2920 return ((rkey + 1) & mask) | (rkey & ~mask);
2921}
2922
1da177e4
LT
2923/**
2924 * ib_alloc_mw - Allocates a memory window.
2925 * @pd: The protection domain associated with the memory window.
7083e42e 2926 * @type: The type of the memory window (1 or 2).
1da177e4 2927 */
7083e42e 2928struct ib_mw *ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type);
1da177e4
LT
2929
2930/**
2931 * ib_bind_mw - Posts a work request to the send queue of the specified
2932 * QP, which binds the memory window to the given address range and
2933 * remote access attributes.
2934 * @qp: QP to post the bind work request on.
2935 * @mw: The memory window to bind.
2936 * @mw_bind: Specifies information about the memory window, including
2937 * its address range, remote access rights, and associated memory region.
7083e42e
SM
2938 *
2939 * If there is no immediate error, the function will update the rkey member
2940 * of the mw parameter to its new value. The bind operation can still fail
2941 * asynchronously.
1da177e4
LT
2942 */
2943static inline int ib_bind_mw(struct ib_qp *qp,
2944 struct ib_mw *mw,
2945 struct ib_mw_bind *mw_bind)
2946{
2947 /* XXX reference counting in corresponding MR? */
2948 return mw->device->bind_mw ?
2949 mw->device->bind_mw(qp, mw, mw_bind) :
2950 -ENOSYS;
2951}
2952
2953/**
2954 * ib_dealloc_mw - Deallocates a memory window.
2955 * @mw: The memory window to deallocate.
2956 */
2957int ib_dealloc_mw(struct ib_mw *mw);
2958
2959/**
2960 * ib_alloc_fmr - Allocates a unmapped fast memory region.
2961 * @pd: The protection domain associated with the unmapped region.
2962 * @mr_access_flags: Specifies the memory access rights.
2963 * @fmr_attr: Attributes of the unmapped region.
2964 *
2965 * A fast memory region must be mapped before it can be used as part of
2966 * a work request.
2967 */
2968struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd,
2969 int mr_access_flags,
2970 struct ib_fmr_attr *fmr_attr);
2971
2972/**
2973 * ib_map_phys_fmr - Maps a list of physical pages to a fast memory region.
2974 * @fmr: The fast memory region to associate with the pages.
2975 * @page_list: An array of physical pages to map to the fast memory region.
2976 * @list_len: The number of pages in page_list.
2977 * @iova: The I/O virtual address to use with the mapped region.
2978 */
2979static inline int ib_map_phys_fmr(struct ib_fmr *fmr,
2980 u64 *page_list, int list_len,
2981 u64 iova)
2982{
2983 return fmr->device->map_phys_fmr(fmr, page_list, list_len, iova);
2984}
2985
2986/**
2987 * ib_unmap_fmr - Removes the mapping from a list of fast memory regions.
2988 * @fmr_list: A linked list of fast memory regions to unmap.
2989 */
2990int ib_unmap_fmr(struct list_head *fmr_list);
2991
2992/**
2993 * ib_dealloc_fmr - Deallocates a fast memory region.
2994 * @fmr: The fast memory region to deallocate.
2995 */
2996int ib_dealloc_fmr(struct ib_fmr *fmr);
2997
2998/**
2999 * ib_attach_mcast - Attaches the specified QP to a multicast group.
3000 * @qp: QP to attach to the multicast group. The QP must be type
3001 * IB_QPT_UD.
3002 * @gid: Multicast group GID.
3003 * @lid: Multicast group LID in host byte order.
3004 *
3005 * In order to send and receive multicast packets, subnet
3006 * administration must have created the multicast group and configured
3007 * the fabric appropriately. The port associated with the specified
3008 * QP must also be a member of the multicast group.
3009 */
3010int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
3011
3012/**
3013 * ib_detach_mcast - Detaches the specified QP from a multicast group.
3014 * @qp: QP to detach from the multicast group.
3015 * @gid: Multicast group GID.
3016 * @lid: Multicast group LID in host byte order.
3017 */
3018int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
3019
59991f94
SH
3020/**
3021 * ib_alloc_xrcd - Allocates an XRC domain.
3022 * @device: The device on which to allocate the XRC domain.
3023 */
3024struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device);
3025
3026/**
3027 * ib_dealloc_xrcd - Deallocates an XRC domain.
3028 * @xrcd: The XRC domain to deallocate.
3029 */
3030int ib_dealloc_xrcd(struct ib_xrcd *xrcd);
3031
319a441d
HHZ
3032struct ib_flow *ib_create_flow(struct ib_qp *qp,
3033 struct ib_flow_attr *flow_attr, int domain);
3034int ib_destroy_flow(struct ib_flow *flow_id);
3035
1c636f80
EC
3036static inline int ib_check_mr_access(int flags)
3037{
3038 /*
3039 * Local write permission is required if remote write or
3040 * remote atomic permission is also requested.
3041 */
3042 if (flags & (IB_ACCESS_REMOTE_ATOMIC | IB_ACCESS_REMOTE_WRITE) &&
3043 !(flags & IB_ACCESS_LOCAL_WRITE))
3044 return -EINVAL;
3045
3046 return 0;
3047}
3048
1b01d335
SG
3049/**
3050 * ib_check_mr_status: lightweight check of MR status.
3051 * This routine may provide status checks on a selected
3052 * ib_mr. first use is for signature status check.
3053 *
3054 * @mr: A memory region.
3055 * @check_mask: Bitmask of which checks to perform from
3056 * ib_mr_status_check enumeration.
3057 * @mr_status: The container of relevant status checks.
3058 * failed checks will be indicated in the status bitmask
3059 * and the relevant info shall be in the error item.
3060 */
3061int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
3062 struct ib_mr_status *mr_status);
3063
9268f72d
YK
3064struct net_device *ib_get_net_dev_by_params(struct ib_device *dev, u8 port,
3065 u16 pkey, const union ib_gid *gid,
3066 const struct sockaddr *addr);
3067
4c67e2bf
SG
3068int ib_map_mr_sg(struct ib_mr *mr,
3069 struct scatterlist *sg,
3070 int sg_nents,
3071 unsigned int page_size);
3072
3073static inline int
3074ib_map_mr_sg_zbva(struct ib_mr *mr,
3075 struct scatterlist *sg,
3076 int sg_nents,
3077 unsigned int page_size)
3078{
3079 int n;
3080
3081 n = ib_map_mr_sg(mr, sg, sg_nents, page_size);
3082 mr->iova = 0;
3083
3084 return n;
3085}
3086
3087int ib_sg_to_pages(struct ib_mr *mr,
3088 struct scatterlist *sgl,
3089 int sg_nents,
3090 int (*set_page)(struct ib_mr *, u64));
3091
1da177e4 3092#endif /* IB_VERBS_H */