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1da177e4
LT
1/*
2 * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
3 * Copyright (c) 2004 Infinicon Corporation. All rights reserved.
4 * Copyright (c) 2004 Intel Corporation. All rights reserved.
5 * Copyright (c) 2004 Topspin Corporation. All rights reserved.
6 * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
2a1d9b7f 7 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
f7c6a7b5 8 * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved.
1da177e4
LT
9 *
10 * This software is available to you under a choice of one of two
11 * licenses. You may choose to be licensed under the terms of the GNU
12 * General Public License (GPL) Version 2, available from the file
13 * COPYING in the main directory of this source tree, or the
14 * OpenIB.org BSD license below:
15 *
16 * Redistribution and use in source and binary forms, with or
17 * without modification, are permitted provided that the following
18 * conditions are met:
19 *
20 * - Redistributions of source code must retain the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer.
23 *
24 * - Redistributions in binary form must reproduce the above
25 * copyright notice, this list of conditions and the following
26 * disclaimer in the documentation and/or other materials
27 * provided with the distribution.
28 *
29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
33 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * SOFTWARE.
1da177e4
LT
37 */
38
39#if !defined(IB_VERBS_H)
40#define IB_VERBS_H
41
42#include <linux/types.h>
43#include <linux/device.h>
9b513090
RC
44#include <linux/mm.h>
45#include <linux/dma-mapping.h>
459d6e2a 46#include <linux/kref.h>
bfb3ea12
DB
47#include <linux/list.h>
48#include <linux/rwsem.h>
87ae9afd 49#include <linux/scatterlist.h>
f0626710 50#include <linux/workqueue.h>
9268f72d 51#include <linux/socket.h>
14d3a3b2 52#include <linux/irq_poll.h>
dd5f03be 53#include <uapi/linux/if_ether.h>
c865f246
SK
54#include <net/ipv6.h>
55#include <net/ip.h>
301a721e
MB
56#include <linux/string.h>
57#include <linux/slab.h>
e2773c06 58
60063497 59#include <linux/atomic.h>
882214e2 60#include <linux/mmu_notifier.h>
e2773c06 61#include <asm/uaccess.h>
1da177e4 62
f0626710 63extern struct workqueue_struct *ib_wq;
14d3a3b2 64extern struct workqueue_struct *ib_comp_wq;
f0626710 65
1da177e4
LT
66union ib_gid {
67 u8 raw[16];
68 struct {
97f52eb4
SH
69 __be64 subnet_prefix;
70 __be64 interface_id;
1da177e4
LT
71 } global;
72};
73
e26be1bf
MS
74extern union ib_gid zgid;
75
b39ffa1d
MB
76enum ib_gid_type {
77 /* If link layer is Ethernet, this is RoCE V1 */
78 IB_GID_TYPE_IB = 0,
79 IB_GID_TYPE_ROCE = 0,
7766a99f 80 IB_GID_TYPE_ROCE_UDP_ENCAP = 1,
b39ffa1d
MB
81 IB_GID_TYPE_SIZE
82};
83
7ead4bcb 84#define ROCE_V2_UDP_DPORT 4791
03db3a2d 85struct ib_gid_attr {
b39ffa1d 86 enum ib_gid_type gid_type;
03db3a2d
MB
87 struct net_device *ndev;
88};
89
07ebafba
TT
90enum rdma_node_type {
91 /* IB values map to NodeInfo:NodeType. */
92 RDMA_NODE_IB_CA = 1,
93 RDMA_NODE_IB_SWITCH,
94 RDMA_NODE_IB_ROUTER,
180771a3
UM
95 RDMA_NODE_RNIC,
96 RDMA_NODE_USNIC,
5db5765e 97 RDMA_NODE_USNIC_UDP,
1da177e4
LT
98};
99
07ebafba
TT
100enum rdma_transport_type {
101 RDMA_TRANSPORT_IB,
180771a3 102 RDMA_TRANSPORT_IWARP,
248567f7
UM
103 RDMA_TRANSPORT_USNIC,
104 RDMA_TRANSPORT_USNIC_UDP
07ebafba
TT
105};
106
6b90a6d6
MW
107enum rdma_protocol_type {
108 RDMA_PROTOCOL_IB,
109 RDMA_PROTOCOL_IBOE,
110 RDMA_PROTOCOL_IWARP,
111 RDMA_PROTOCOL_USNIC_UDP
112};
113
8385fd84
RD
114__attribute_const__ enum rdma_transport_type
115rdma_node_get_transport(enum rdma_node_type node_type);
07ebafba 116
c865f246
SK
117enum rdma_network_type {
118 RDMA_NETWORK_IB,
119 RDMA_NETWORK_ROCE_V1 = RDMA_NETWORK_IB,
120 RDMA_NETWORK_IPV4,
121 RDMA_NETWORK_IPV6
122};
123
124static inline enum ib_gid_type ib_network_to_gid_type(enum rdma_network_type network_type)
125{
126 if (network_type == RDMA_NETWORK_IPV4 ||
127 network_type == RDMA_NETWORK_IPV6)
128 return IB_GID_TYPE_ROCE_UDP_ENCAP;
129
130 /* IB_GID_TYPE_IB same as RDMA_NETWORK_ROCE_V1 */
131 return IB_GID_TYPE_IB;
132}
133
134static inline enum rdma_network_type ib_gid_to_network_type(enum ib_gid_type gid_type,
135 union ib_gid *gid)
136{
137 if (gid_type == IB_GID_TYPE_IB)
138 return RDMA_NETWORK_IB;
139
140 if (ipv6_addr_v4mapped((struct in6_addr *)gid))
141 return RDMA_NETWORK_IPV4;
142 else
143 return RDMA_NETWORK_IPV6;
144}
145
a3f5adaf
EC
146enum rdma_link_layer {
147 IB_LINK_LAYER_UNSPECIFIED,
148 IB_LINK_LAYER_INFINIBAND,
149 IB_LINK_LAYER_ETHERNET,
150};
151
1da177e4 152enum ib_device_cap_flags {
7ca0bc53
LR
153 IB_DEVICE_RESIZE_MAX_WR = (1 << 0),
154 IB_DEVICE_BAD_PKEY_CNTR = (1 << 1),
155 IB_DEVICE_BAD_QKEY_CNTR = (1 << 2),
156 IB_DEVICE_RAW_MULTI = (1 << 3),
157 IB_DEVICE_AUTO_PATH_MIG = (1 << 4),
158 IB_DEVICE_CHANGE_PHY_PORT = (1 << 5),
159 IB_DEVICE_UD_AV_PORT_ENFORCE = (1 << 6),
160 IB_DEVICE_CURR_QP_STATE_MOD = (1 << 7),
161 IB_DEVICE_SHUTDOWN_PORT = (1 << 8),
162 IB_DEVICE_INIT_TYPE = (1 << 9),
163 IB_DEVICE_PORT_ACTIVE_EVENT = (1 << 10),
164 IB_DEVICE_SYS_IMAGE_GUID = (1 << 11),
165 IB_DEVICE_RC_RNR_NAK_GEN = (1 << 12),
166 IB_DEVICE_SRQ_RESIZE = (1 << 13),
167 IB_DEVICE_N_NOTIFY_CQ = (1 << 14),
b1adc714
CH
168
169 /*
170 * This device supports a per-device lkey or stag that can be
171 * used without performing a memory registration for the local
172 * memory. Note that ULPs should never check this flag, but
173 * instead of use the local_dma_lkey flag in the ib_pd structure,
174 * which will always contain a usable lkey.
175 */
7ca0bc53
LR
176 IB_DEVICE_LOCAL_DMA_LKEY = (1 << 15),
177 IB_DEVICE_RESERVED /* old SEND_W_INV */ = (1 << 16),
178 IB_DEVICE_MEM_WINDOW = (1 << 17),
e0605d91
EC
179 /*
180 * Devices should set IB_DEVICE_UD_IP_SUM if they support
181 * insertion of UDP and TCP checksum on outgoing UD IPoIB
182 * messages and can verify the validity of checksum for
183 * incoming messages. Setting this flag implies that the
184 * IPoIB driver may set NETIF_F_IP_CSUM for datagram mode.
185 */
7ca0bc53
LR
186 IB_DEVICE_UD_IP_CSUM = (1 << 18),
187 IB_DEVICE_UD_TSO = (1 << 19),
188 IB_DEVICE_XRC = (1 << 20),
b1adc714
CH
189
190 /*
191 * This device supports the IB "base memory management extension",
192 * which includes support for fast registrations (IB_WR_REG_MR,
193 * IB_WR_LOCAL_INV and IB_WR_SEND_WITH_INV verbs). This flag should
194 * also be set by any iWarp device which must support FRs to comply
195 * to the iWarp verbs spec. iWarp devices also support the
196 * IB_WR_RDMA_READ_WITH_INV verb for RDMA READs that invalidate the
197 * stag.
198 */
7ca0bc53
LR
199 IB_DEVICE_MEM_MGT_EXTENSIONS = (1 << 21),
200 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK = (1 << 22),
201 IB_DEVICE_MEM_WINDOW_TYPE_2A = (1 << 23),
202 IB_DEVICE_MEM_WINDOW_TYPE_2B = (1 << 24),
203 IB_DEVICE_RC_IP_CSUM = (1 << 25),
204 IB_DEVICE_RAW_IP_CSUM = (1 << 26),
8a06ce59
LR
205 /*
206 * Devices should set IB_DEVICE_CROSS_CHANNEL if they
207 * support execution of WQEs that involve synchronization
208 * of I/O operations with single completion queue managed
209 * by hardware.
210 */
211 IB_DEVICE_CROSS_CHANNEL = (1 << 27),
7ca0bc53
LR
212 IB_DEVICE_MANAGED_FLOW_STEERING = (1 << 29),
213 IB_DEVICE_SIGNATURE_HANDOVER = (1 << 30),
214 IB_DEVICE_ON_DEMAND_PAGING = (1 << 31),
1b01d335
SG
215};
216
217enum ib_signature_prot_cap {
218 IB_PROT_T10DIF_TYPE_1 = 1,
219 IB_PROT_T10DIF_TYPE_2 = 1 << 1,
220 IB_PROT_T10DIF_TYPE_3 = 1 << 2,
221};
222
223enum ib_signature_guard_cap {
224 IB_GUARD_T10DIF_CRC = 1,
225 IB_GUARD_T10DIF_CSUM = 1 << 1,
1da177e4
LT
226};
227
228enum ib_atomic_cap {
229 IB_ATOMIC_NONE,
230 IB_ATOMIC_HCA,
231 IB_ATOMIC_GLOB
232};
233
860f10a7
SG
234enum ib_odp_general_cap_bits {
235 IB_ODP_SUPPORT = 1 << 0,
236};
237
238enum ib_odp_transport_cap_bits {
239 IB_ODP_SUPPORT_SEND = 1 << 0,
240 IB_ODP_SUPPORT_RECV = 1 << 1,
241 IB_ODP_SUPPORT_WRITE = 1 << 2,
242 IB_ODP_SUPPORT_READ = 1 << 3,
243 IB_ODP_SUPPORT_ATOMIC = 1 << 4,
244};
245
246struct ib_odp_caps {
247 uint64_t general_caps;
248 struct {
249 uint32_t rc_odp_caps;
250 uint32_t uc_odp_caps;
251 uint32_t ud_odp_caps;
252 } per_transport_caps;
253};
254
b9926b92
MB
255enum ib_cq_creation_flags {
256 IB_CQ_FLAGS_TIMESTAMP_COMPLETION = 1 << 0,
8a06ce59 257 IB_CQ_FLAGS_IGNORE_OVERRUN = 1 << 1,
b9926b92
MB
258};
259
bcf4c1ea
MB
260struct ib_cq_init_attr {
261 unsigned int cqe;
262 int comp_vector;
263 u32 flags;
264};
265
1da177e4
LT
266struct ib_device_attr {
267 u64 fw_ver;
97f52eb4 268 __be64 sys_image_guid;
1da177e4
LT
269 u64 max_mr_size;
270 u64 page_size_cap;
271 u32 vendor_id;
272 u32 vendor_part_id;
273 u32 hw_ver;
274 int max_qp;
275 int max_qp_wr;
276 int device_cap_flags;
277 int max_sge;
278 int max_sge_rd;
279 int max_cq;
280 int max_cqe;
281 int max_mr;
282 int max_pd;
283 int max_qp_rd_atom;
284 int max_ee_rd_atom;
285 int max_res_rd_atom;
286 int max_qp_init_rd_atom;
287 int max_ee_init_rd_atom;
288 enum ib_atomic_cap atomic_cap;
5e80ba8f 289 enum ib_atomic_cap masked_atomic_cap;
1da177e4
LT
290 int max_ee;
291 int max_rdd;
292 int max_mw;
293 int max_raw_ipv6_qp;
294 int max_raw_ethy_qp;
295 int max_mcast_grp;
296 int max_mcast_qp_attach;
297 int max_total_mcast_qp_attach;
298 int max_ah;
299 int max_fmr;
300 int max_map_per_fmr;
301 int max_srq;
302 int max_srq_wr;
303 int max_srq_sge;
00f7ec36 304 unsigned int max_fast_reg_page_list_len;
1da177e4
LT
305 u16 max_pkeys;
306 u8 local_ca_ack_delay;
1b01d335
SG
307 int sig_prot_cap;
308 int sig_guard_cap;
860f10a7 309 struct ib_odp_caps odp_caps;
24306dc6
MB
310 uint64_t timestamp_mask;
311 uint64_t hca_core_clock; /* in KHZ */
1da177e4
LT
312};
313
314enum ib_mtu {
315 IB_MTU_256 = 1,
316 IB_MTU_512 = 2,
317 IB_MTU_1024 = 3,
318 IB_MTU_2048 = 4,
319 IB_MTU_4096 = 5
320};
321
322static inline int ib_mtu_enum_to_int(enum ib_mtu mtu)
323{
324 switch (mtu) {
325 case IB_MTU_256: return 256;
326 case IB_MTU_512: return 512;
327 case IB_MTU_1024: return 1024;
328 case IB_MTU_2048: return 2048;
329 case IB_MTU_4096: return 4096;
330 default: return -1;
331 }
332}
333
334enum ib_port_state {
335 IB_PORT_NOP = 0,
336 IB_PORT_DOWN = 1,
337 IB_PORT_INIT = 2,
338 IB_PORT_ARMED = 3,
339 IB_PORT_ACTIVE = 4,
340 IB_PORT_ACTIVE_DEFER = 5
341};
342
343enum ib_port_cap_flags {
344 IB_PORT_SM = 1 << 1,
345 IB_PORT_NOTICE_SUP = 1 << 2,
346 IB_PORT_TRAP_SUP = 1 << 3,
347 IB_PORT_OPT_IPD_SUP = 1 << 4,
348 IB_PORT_AUTO_MIGR_SUP = 1 << 5,
349 IB_PORT_SL_MAP_SUP = 1 << 6,
350 IB_PORT_MKEY_NVRAM = 1 << 7,
351 IB_PORT_PKEY_NVRAM = 1 << 8,
352 IB_PORT_LED_INFO_SUP = 1 << 9,
353 IB_PORT_SM_DISABLED = 1 << 10,
354 IB_PORT_SYS_IMAGE_GUID_SUP = 1 << 11,
355 IB_PORT_PKEY_SW_EXT_PORT_TRAP_SUP = 1 << 12,
71eeba16 356 IB_PORT_EXTENDED_SPEEDS_SUP = 1 << 14,
1da177e4
LT
357 IB_PORT_CM_SUP = 1 << 16,
358 IB_PORT_SNMP_TUNNEL_SUP = 1 << 17,
359 IB_PORT_REINIT_SUP = 1 << 18,
360 IB_PORT_DEVICE_MGMT_SUP = 1 << 19,
361 IB_PORT_VENDOR_CLASS_SUP = 1 << 20,
362 IB_PORT_DR_NOTICE_SUP = 1 << 21,
363 IB_PORT_CAP_MASK_NOTICE_SUP = 1 << 22,
364 IB_PORT_BOOT_MGMT_SUP = 1 << 23,
365 IB_PORT_LINK_LATENCY_SUP = 1 << 24,
b4a26a27 366 IB_PORT_CLIENT_REG_SUP = 1 << 25,
03db3a2d 367 IB_PORT_IP_BASED_GIDS = 1 << 26,
1da177e4
LT
368};
369
370enum ib_port_width {
371 IB_WIDTH_1X = 1,
372 IB_WIDTH_4X = 2,
373 IB_WIDTH_8X = 4,
374 IB_WIDTH_12X = 8
375};
376
377static inline int ib_width_enum_to_int(enum ib_port_width width)
378{
379 switch (width) {
380 case IB_WIDTH_1X: return 1;
381 case IB_WIDTH_4X: return 4;
382 case IB_WIDTH_8X: return 8;
383 case IB_WIDTH_12X: return 12;
384 default: return -1;
385 }
386}
387
2e96691c
OG
388enum ib_port_speed {
389 IB_SPEED_SDR = 1,
390 IB_SPEED_DDR = 2,
391 IB_SPEED_QDR = 4,
392 IB_SPEED_FDR10 = 8,
393 IB_SPEED_FDR = 16,
394 IB_SPEED_EDR = 32
395};
396
7f624d02
SW
397struct ib_protocol_stats {
398 /* TBD... */
399};
400
401struct iw_protocol_stats {
402 u64 ipInReceives;
403 u64 ipInHdrErrors;
404 u64 ipInTooBigErrors;
405 u64 ipInNoRoutes;
406 u64 ipInAddrErrors;
407 u64 ipInUnknownProtos;
408 u64 ipInTruncatedPkts;
409 u64 ipInDiscards;
410 u64 ipInDelivers;
411 u64 ipOutForwDatagrams;
412 u64 ipOutRequests;
413 u64 ipOutDiscards;
414 u64 ipOutNoRoutes;
415 u64 ipReasmTimeout;
416 u64 ipReasmReqds;
417 u64 ipReasmOKs;
418 u64 ipReasmFails;
419 u64 ipFragOKs;
420 u64 ipFragFails;
421 u64 ipFragCreates;
422 u64 ipInMcastPkts;
423 u64 ipOutMcastPkts;
424 u64 ipInBcastPkts;
425 u64 ipOutBcastPkts;
426
427 u64 tcpRtoAlgorithm;
428 u64 tcpRtoMin;
429 u64 tcpRtoMax;
430 u64 tcpMaxConn;
431 u64 tcpActiveOpens;
432 u64 tcpPassiveOpens;
433 u64 tcpAttemptFails;
434 u64 tcpEstabResets;
435 u64 tcpCurrEstab;
436 u64 tcpInSegs;
437 u64 tcpOutSegs;
438 u64 tcpRetransSegs;
439 u64 tcpInErrs;
440 u64 tcpOutRsts;
441};
442
443union rdma_protocol_stats {
444 struct ib_protocol_stats ib;
445 struct iw_protocol_stats iw;
446};
447
f9b22e35
IW
448/* Define bits for the various functionality this port needs to be supported by
449 * the core.
450 */
451/* Management 0x00000FFF */
452#define RDMA_CORE_CAP_IB_MAD 0x00000001
453#define RDMA_CORE_CAP_IB_SMI 0x00000002
454#define RDMA_CORE_CAP_IB_CM 0x00000004
455#define RDMA_CORE_CAP_IW_CM 0x00000008
456#define RDMA_CORE_CAP_IB_SA 0x00000010
65995fee 457#define RDMA_CORE_CAP_OPA_MAD 0x00000020
f9b22e35
IW
458
459/* Address format 0x000FF000 */
460#define RDMA_CORE_CAP_AF_IB 0x00001000
461#define RDMA_CORE_CAP_ETH_AH 0x00002000
462
463/* Protocol 0xFFF00000 */
464#define RDMA_CORE_CAP_PROT_IB 0x00100000
465#define RDMA_CORE_CAP_PROT_ROCE 0x00200000
466#define RDMA_CORE_CAP_PROT_IWARP 0x00400000
7766a99f 467#define RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP 0x00800000
f9b22e35
IW
468
469#define RDMA_CORE_PORT_IBA_IB (RDMA_CORE_CAP_PROT_IB \
470 | RDMA_CORE_CAP_IB_MAD \
471 | RDMA_CORE_CAP_IB_SMI \
472 | RDMA_CORE_CAP_IB_CM \
473 | RDMA_CORE_CAP_IB_SA \
474 | RDMA_CORE_CAP_AF_IB)
475#define RDMA_CORE_PORT_IBA_ROCE (RDMA_CORE_CAP_PROT_ROCE \
476 | RDMA_CORE_CAP_IB_MAD \
477 | RDMA_CORE_CAP_IB_CM \
f9b22e35
IW
478 | RDMA_CORE_CAP_AF_IB \
479 | RDMA_CORE_CAP_ETH_AH)
7766a99f
MB
480#define RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP \
481 (RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP \
482 | RDMA_CORE_CAP_IB_MAD \
483 | RDMA_CORE_CAP_IB_CM \
484 | RDMA_CORE_CAP_AF_IB \
485 | RDMA_CORE_CAP_ETH_AH)
f9b22e35
IW
486#define RDMA_CORE_PORT_IWARP (RDMA_CORE_CAP_PROT_IWARP \
487 | RDMA_CORE_CAP_IW_CM)
65995fee
IW
488#define RDMA_CORE_PORT_INTEL_OPA (RDMA_CORE_PORT_IBA_IB \
489 | RDMA_CORE_CAP_OPA_MAD)
f9b22e35 490
1da177e4
LT
491struct ib_port_attr {
492 enum ib_port_state state;
493 enum ib_mtu max_mtu;
494 enum ib_mtu active_mtu;
495 int gid_tbl_len;
496 u32 port_cap_flags;
497 u32 max_msg_sz;
498 u32 bad_pkey_cntr;
499 u32 qkey_viol_cntr;
500 u16 pkey_tbl_len;
501 u16 lid;
502 u16 sm_lid;
503 u8 lmc;
504 u8 max_vl_num;
505 u8 sm_sl;
506 u8 subnet_timeout;
507 u8 init_type_reply;
508 u8 active_width;
509 u8 active_speed;
510 u8 phys_state;
511};
512
513enum ib_device_modify_flags {
c5bcbbb9
RD
514 IB_DEVICE_MODIFY_SYS_IMAGE_GUID = 1 << 0,
515 IB_DEVICE_MODIFY_NODE_DESC = 1 << 1
1da177e4
LT
516};
517
518struct ib_device_modify {
519 u64 sys_image_guid;
c5bcbbb9 520 char node_desc[64];
1da177e4
LT
521};
522
523enum ib_port_modify_flags {
524 IB_PORT_SHUTDOWN = 1,
525 IB_PORT_INIT_TYPE = (1<<2),
526 IB_PORT_RESET_QKEY_CNTR = (1<<3)
527};
528
529struct ib_port_modify {
530 u32 set_port_cap_mask;
531 u32 clr_port_cap_mask;
532 u8 init_type;
533};
534
535enum ib_event_type {
536 IB_EVENT_CQ_ERR,
537 IB_EVENT_QP_FATAL,
538 IB_EVENT_QP_REQ_ERR,
539 IB_EVENT_QP_ACCESS_ERR,
540 IB_EVENT_COMM_EST,
541 IB_EVENT_SQ_DRAINED,
542 IB_EVENT_PATH_MIG,
543 IB_EVENT_PATH_MIG_ERR,
544 IB_EVENT_DEVICE_FATAL,
545 IB_EVENT_PORT_ACTIVE,
546 IB_EVENT_PORT_ERR,
547 IB_EVENT_LID_CHANGE,
548 IB_EVENT_PKEY_CHANGE,
d41fcc67
RD
549 IB_EVENT_SM_CHANGE,
550 IB_EVENT_SRQ_ERR,
551 IB_EVENT_SRQ_LIMIT_REACHED,
63942c9a 552 IB_EVENT_QP_LAST_WQE_REACHED,
761d90ed
OG
553 IB_EVENT_CLIENT_REREGISTER,
554 IB_EVENT_GID_CHANGE,
1da177e4
LT
555};
556
db7489e0 557const char *__attribute_const__ ib_event_msg(enum ib_event_type event);
2b1b5b60 558
1da177e4
LT
559struct ib_event {
560 struct ib_device *device;
561 union {
562 struct ib_cq *cq;
563 struct ib_qp *qp;
d41fcc67 564 struct ib_srq *srq;
1da177e4
LT
565 u8 port_num;
566 } element;
567 enum ib_event_type event;
568};
569
570struct ib_event_handler {
571 struct ib_device *device;
572 void (*handler)(struct ib_event_handler *, struct ib_event *);
573 struct list_head list;
574};
575
576#define INIT_IB_EVENT_HANDLER(_ptr, _device, _handler) \
577 do { \
578 (_ptr)->device = _device; \
579 (_ptr)->handler = _handler; \
580 INIT_LIST_HEAD(&(_ptr)->list); \
581 } while (0)
582
583struct ib_global_route {
584 union ib_gid dgid;
585 u32 flow_label;
586 u8 sgid_index;
587 u8 hop_limit;
588 u8 traffic_class;
589};
590
513789ed 591struct ib_grh {
97f52eb4
SH
592 __be32 version_tclass_flow;
593 __be16 paylen;
513789ed
HR
594 u8 next_hdr;
595 u8 hop_limit;
596 union ib_gid sgid;
597 union ib_gid dgid;
598};
599
c865f246
SK
600union rdma_network_hdr {
601 struct ib_grh ibgrh;
602 struct {
603 /* The IB spec states that if it's IPv4, the header
604 * is located in the last 20 bytes of the header.
605 */
606 u8 reserved[20];
607 struct iphdr roce4grh;
608 };
609};
610
1da177e4
LT
611enum {
612 IB_MULTICAST_QPN = 0xffffff
613};
614
f3a7c66b 615#define IB_LID_PERMISSIVE cpu_to_be16(0xFFFF)
97f52eb4 616
1da177e4
LT
617enum ib_ah_flags {
618 IB_AH_GRH = 1
619};
620
bf6a9e31
JM
621enum ib_rate {
622 IB_RATE_PORT_CURRENT = 0,
623 IB_RATE_2_5_GBPS = 2,
624 IB_RATE_5_GBPS = 5,
625 IB_RATE_10_GBPS = 3,
626 IB_RATE_20_GBPS = 6,
627 IB_RATE_30_GBPS = 4,
628 IB_RATE_40_GBPS = 7,
629 IB_RATE_60_GBPS = 8,
630 IB_RATE_80_GBPS = 9,
71eeba16
MA
631 IB_RATE_120_GBPS = 10,
632 IB_RATE_14_GBPS = 11,
633 IB_RATE_56_GBPS = 12,
634 IB_RATE_112_GBPS = 13,
635 IB_RATE_168_GBPS = 14,
636 IB_RATE_25_GBPS = 15,
637 IB_RATE_100_GBPS = 16,
638 IB_RATE_200_GBPS = 17,
639 IB_RATE_300_GBPS = 18
bf6a9e31
JM
640};
641
642/**
643 * ib_rate_to_mult - Convert the IB rate enum to a multiple of the
644 * base rate of 2.5 Gbit/sec. For example, IB_RATE_5_GBPS will be
645 * converted to 2, since 5 Gbit/sec is 2 * 2.5 Gbit/sec.
646 * @rate: rate to convert.
647 */
8385fd84 648__attribute_const__ int ib_rate_to_mult(enum ib_rate rate);
bf6a9e31 649
71eeba16
MA
650/**
651 * ib_rate_to_mbps - Convert the IB rate enum to Mbps.
652 * For example, IB_RATE_2_5_GBPS will be converted to 2500.
653 * @rate: rate to convert.
654 */
8385fd84 655__attribute_const__ int ib_rate_to_mbps(enum ib_rate rate);
71eeba16 656
17cd3a2d
SG
657
658/**
9bee178b
SG
659 * enum ib_mr_type - memory region type
660 * @IB_MR_TYPE_MEM_REG: memory region that is used for
661 * normal registration
662 * @IB_MR_TYPE_SIGNATURE: memory region that is used for
663 * signature operations (data-integrity
664 * capable regions)
17cd3a2d 665 */
9bee178b
SG
666enum ib_mr_type {
667 IB_MR_TYPE_MEM_REG,
668 IB_MR_TYPE_SIGNATURE,
17cd3a2d
SG
669};
670
1b01d335 671/**
78eda2bb
SG
672 * Signature types
673 * IB_SIG_TYPE_NONE: Unprotected.
674 * IB_SIG_TYPE_T10_DIF: Type T10-DIF
1b01d335 675 */
78eda2bb
SG
676enum ib_signature_type {
677 IB_SIG_TYPE_NONE,
678 IB_SIG_TYPE_T10_DIF,
1b01d335
SG
679};
680
681/**
682 * Signature T10-DIF block-guard types
683 * IB_T10DIF_CRC: Corresponds to T10-PI mandated CRC checksum rules.
684 * IB_T10DIF_CSUM: Corresponds to IP checksum rules.
685 */
686enum ib_t10_dif_bg_type {
687 IB_T10DIF_CRC,
688 IB_T10DIF_CSUM
689};
690
691/**
692 * struct ib_t10_dif_domain - Parameters specific for T10-DIF
693 * domain.
1b01d335
SG
694 * @bg_type: T10-DIF block guard type (CRC|CSUM)
695 * @pi_interval: protection information interval.
696 * @bg: seed of guard computation.
697 * @app_tag: application tag of guard block
698 * @ref_tag: initial guard block reference tag.
78eda2bb
SG
699 * @ref_remap: Indicate wethear the reftag increments each block
700 * @app_escape: Indicate to skip block check if apptag=0xffff
701 * @ref_escape: Indicate to skip block check if reftag=0xffffffff
702 * @apptag_check_mask: check bitmask of application tag.
1b01d335
SG
703 */
704struct ib_t10_dif_domain {
1b01d335
SG
705 enum ib_t10_dif_bg_type bg_type;
706 u16 pi_interval;
707 u16 bg;
708 u16 app_tag;
709 u32 ref_tag;
78eda2bb
SG
710 bool ref_remap;
711 bool app_escape;
712 bool ref_escape;
713 u16 apptag_check_mask;
1b01d335
SG
714};
715
716/**
717 * struct ib_sig_domain - Parameters for signature domain
718 * @sig_type: specific signauture type
719 * @sig: union of all signature domain attributes that may
720 * be used to set domain layout.
721 */
722struct ib_sig_domain {
723 enum ib_signature_type sig_type;
724 union {
725 struct ib_t10_dif_domain dif;
726 } sig;
727};
728
729/**
730 * struct ib_sig_attrs - Parameters for signature handover operation
731 * @check_mask: bitmask for signature byte check (8 bytes)
732 * @mem: memory domain layout desciptor.
733 * @wire: wire domain layout desciptor.
734 */
735struct ib_sig_attrs {
736 u8 check_mask;
737 struct ib_sig_domain mem;
738 struct ib_sig_domain wire;
739};
740
741enum ib_sig_err_type {
742 IB_SIG_BAD_GUARD,
743 IB_SIG_BAD_REFTAG,
744 IB_SIG_BAD_APPTAG,
745};
746
747/**
748 * struct ib_sig_err - signature error descriptor
749 */
750struct ib_sig_err {
751 enum ib_sig_err_type err_type;
752 u32 expected;
753 u32 actual;
754 u64 sig_err_offset;
755 u32 key;
756};
757
758enum ib_mr_status_check {
759 IB_MR_CHECK_SIG_STATUS = 1,
760};
761
762/**
763 * struct ib_mr_status - Memory region status container
764 *
765 * @fail_status: Bitmask of MR checks status. For each
766 * failed check a corresponding status bit is set.
767 * @sig_err: Additional info for IB_MR_CEHCK_SIG_STATUS
768 * failure.
769 */
770struct ib_mr_status {
771 u32 fail_status;
772 struct ib_sig_err sig_err;
773};
774
bf6a9e31
JM
775/**
776 * mult_to_ib_rate - Convert a multiple of 2.5 Gbit/sec to an IB rate
777 * enum.
778 * @mult: multiple to convert.
779 */
8385fd84 780__attribute_const__ enum ib_rate mult_to_ib_rate(int mult);
bf6a9e31 781
1da177e4
LT
782struct ib_ah_attr {
783 struct ib_global_route grh;
784 u16 dlid;
785 u8 sl;
786 u8 src_path_bits;
787 u8 static_rate;
788 u8 ah_flags;
789 u8 port_num;
dd5f03be 790 u8 dmac[ETH_ALEN];
1da177e4
LT
791};
792
793enum ib_wc_status {
794 IB_WC_SUCCESS,
795 IB_WC_LOC_LEN_ERR,
796 IB_WC_LOC_QP_OP_ERR,
797 IB_WC_LOC_EEC_OP_ERR,
798 IB_WC_LOC_PROT_ERR,
799 IB_WC_WR_FLUSH_ERR,
800 IB_WC_MW_BIND_ERR,
801 IB_WC_BAD_RESP_ERR,
802 IB_WC_LOC_ACCESS_ERR,
803 IB_WC_REM_INV_REQ_ERR,
804 IB_WC_REM_ACCESS_ERR,
805 IB_WC_REM_OP_ERR,
806 IB_WC_RETRY_EXC_ERR,
807 IB_WC_RNR_RETRY_EXC_ERR,
808 IB_WC_LOC_RDD_VIOL_ERR,
809 IB_WC_REM_INV_RD_REQ_ERR,
810 IB_WC_REM_ABORT_ERR,
811 IB_WC_INV_EECN_ERR,
812 IB_WC_INV_EEC_STATE_ERR,
813 IB_WC_FATAL_ERR,
814 IB_WC_RESP_TIMEOUT_ERR,
815 IB_WC_GENERAL_ERR
816};
817
db7489e0 818const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status);
2b1b5b60 819
1da177e4
LT
820enum ib_wc_opcode {
821 IB_WC_SEND,
822 IB_WC_RDMA_WRITE,
823 IB_WC_RDMA_READ,
824 IB_WC_COMP_SWAP,
825 IB_WC_FETCH_ADD,
c93570f2 826 IB_WC_LSO,
00f7ec36 827 IB_WC_LOCAL_INV,
4c67e2bf 828 IB_WC_REG_MR,
5e80ba8f
VS
829 IB_WC_MASKED_COMP_SWAP,
830 IB_WC_MASKED_FETCH_ADD,
1da177e4
LT
831/*
832 * Set value of IB_WC_RECV so consumers can test if a completion is a
833 * receive by testing (opcode & IB_WC_RECV).
834 */
835 IB_WC_RECV = 1 << 7,
836 IB_WC_RECV_RDMA_WITH_IMM
837};
838
839enum ib_wc_flags {
840 IB_WC_GRH = 1,
00f7ec36
SW
841 IB_WC_WITH_IMM = (1<<1),
842 IB_WC_WITH_INVALIDATE = (1<<2),
d927d505 843 IB_WC_IP_CSUM_OK = (1<<3),
dd5f03be
MB
844 IB_WC_WITH_SMAC = (1<<4),
845 IB_WC_WITH_VLAN = (1<<5),
c865f246 846 IB_WC_WITH_NETWORK_HDR_TYPE = (1<<6),
1da177e4
LT
847};
848
849struct ib_wc {
14d3a3b2
CH
850 union {
851 u64 wr_id;
852 struct ib_cqe *wr_cqe;
853 };
1da177e4
LT
854 enum ib_wc_status status;
855 enum ib_wc_opcode opcode;
856 u32 vendor_err;
857 u32 byte_len;
062dbb69 858 struct ib_qp *qp;
00f7ec36
SW
859 union {
860 __be32 imm_data;
861 u32 invalidate_rkey;
862 } ex;
1da177e4
LT
863 u32 src_qp;
864 int wc_flags;
865 u16 pkey_index;
866 u16 slid;
867 u8 sl;
868 u8 dlid_path_bits;
869 u8 port_num; /* valid only for DR SMPs on switches */
dd5f03be
MB
870 u8 smac[ETH_ALEN];
871 u16 vlan_id;
c865f246 872 u8 network_hdr_type;
1da177e4
LT
873};
874
ed23a727
RD
875enum ib_cq_notify_flags {
876 IB_CQ_SOLICITED = 1 << 0,
877 IB_CQ_NEXT_COMP = 1 << 1,
878 IB_CQ_SOLICITED_MASK = IB_CQ_SOLICITED | IB_CQ_NEXT_COMP,
879 IB_CQ_REPORT_MISSED_EVENTS = 1 << 2,
1da177e4
LT
880};
881
96104eda 882enum ib_srq_type {
418d5130
SH
883 IB_SRQT_BASIC,
884 IB_SRQT_XRC
96104eda
SH
885};
886
d41fcc67
RD
887enum ib_srq_attr_mask {
888 IB_SRQ_MAX_WR = 1 << 0,
889 IB_SRQ_LIMIT = 1 << 1,
890};
891
892struct ib_srq_attr {
893 u32 max_wr;
894 u32 max_sge;
895 u32 srq_limit;
896};
897
898struct ib_srq_init_attr {
899 void (*event_handler)(struct ib_event *, void *);
900 void *srq_context;
901 struct ib_srq_attr attr;
96104eda 902 enum ib_srq_type srq_type;
418d5130
SH
903
904 union {
905 struct {
906 struct ib_xrcd *xrcd;
907 struct ib_cq *cq;
908 } xrc;
909 } ext;
d41fcc67
RD
910};
911
1da177e4
LT
912struct ib_qp_cap {
913 u32 max_send_wr;
914 u32 max_recv_wr;
915 u32 max_send_sge;
916 u32 max_recv_sge;
917 u32 max_inline_data;
918};
919
920enum ib_sig_type {
921 IB_SIGNAL_ALL_WR,
922 IB_SIGNAL_REQ_WR
923};
924
925enum ib_qp_type {
926 /*
927 * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
928 * here (and in that order) since the MAD layer uses them as
929 * indices into a 2-entry table.
930 */
931 IB_QPT_SMI,
932 IB_QPT_GSI,
933
934 IB_QPT_RC,
935 IB_QPT_UC,
936 IB_QPT_UD,
937 IB_QPT_RAW_IPV6,
b42b63cf 938 IB_QPT_RAW_ETHERTYPE,
c938a616 939 IB_QPT_RAW_PACKET = 8,
b42b63cf
SH
940 IB_QPT_XRC_INI = 9,
941 IB_QPT_XRC_TGT,
0134f16b
JM
942 IB_QPT_MAX,
943 /* Reserve a range for qp types internal to the low level driver.
944 * These qp types will not be visible at the IB core layer, so the
945 * IB_QPT_MAX usages should not be affected in the core layer
946 */
947 IB_QPT_RESERVED1 = 0x1000,
948 IB_QPT_RESERVED2,
949 IB_QPT_RESERVED3,
950 IB_QPT_RESERVED4,
951 IB_QPT_RESERVED5,
952 IB_QPT_RESERVED6,
953 IB_QPT_RESERVED7,
954 IB_QPT_RESERVED8,
955 IB_QPT_RESERVED9,
956 IB_QPT_RESERVED10,
1da177e4
LT
957};
958
b846f25a 959enum ib_qp_create_flags {
47ee1b9f
RL
960 IB_QP_CREATE_IPOIB_UD_LSO = 1 << 0,
961 IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK = 1 << 1,
8a06ce59
LR
962 IB_QP_CREATE_CROSS_CHANNEL = 1 << 2,
963 IB_QP_CREATE_MANAGED_SEND = 1 << 3,
964 IB_QP_CREATE_MANAGED_RECV = 1 << 4,
90f1d1b4 965 IB_QP_CREATE_NETIF_QP = 1 << 5,
1b01d335 966 IB_QP_CREATE_SIGNATURE_EN = 1 << 6,
09b93088 967 IB_QP_CREATE_USE_GFP_NOIO = 1 << 7,
d2b57063
JM
968 /* reserve bits 26-31 for low level drivers' internal use */
969 IB_QP_CREATE_RESERVED_START = 1 << 26,
970 IB_QP_CREATE_RESERVED_END = 1 << 31,
b846f25a
EC
971};
972
73c40c61
YH
973/*
974 * Note: users may not call ib_close_qp or ib_destroy_qp from the event_handler
975 * callback to destroy the passed in QP.
976 */
977
1da177e4
LT
978struct ib_qp_init_attr {
979 void (*event_handler)(struct ib_event *, void *);
980 void *qp_context;
981 struct ib_cq *send_cq;
982 struct ib_cq *recv_cq;
983 struct ib_srq *srq;
b42b63cf 984 struct ib_xrcd *xrcd; /* XRC TGT QPs only */
1da177e4
LT
985 struct ib_qp_cap cap;
986 enum ib_sig_type sq_sig_type;
987 enum ib_qp_type qp_type;
b846f25a 988 enum ib_qp_create_flags create_flags;
1da177e4
LT
989 u8 port_num; /* special QP types only */
990};
991
0e0ec7e0
SH
992struct ib_qp_open_attr {
993 void (*event_handler)(struct ib_event *, void *);
994 void *qp_context;
995 u32 qp_num;
996 enum ib_qp_type qp_type;
997};
998
1da177e4
LT
999enum ib_rnr_timeout {
1000 IB_RNR_TIMER_655_36 = 0,
1001 IB_RNR_TIMER_000_01 = 1,
1002 IB_RNR_TIMER_000_02 = 2,
1003 IB_RNR_TIMER_000_03 = 3,
1004 IB_RNR_TIMER_000_04 = 4,
1005 IB_RNR_TIMER_000_06 = 5,
1006 IB_RNR_TIMER_000_08 = 6,
1007 IB_RNR_TIMER_000_12 = 7,
1008 IB_RNR_TIMER_000_16 = 8,
1009 IB_RNR_TIMER_000_24 = 9,
1010 IB_RNR_TIMER_000_32 = 10,
1011 IB_RNR_TIMER_000_48 = 11,
1012 IB_RNR_TIMER_000_64 = 12,
1013 IB_RNR_TIMER_000_96 = 13,
1014 IB_RNR_TIMER_001_28 = 14,
1015 IB_RNR_TIMER_001_92 = 15,
1016 IB_RNR_TIMER_002_56 = 16,
1017 IB_RNR_TIMER_003_84 = 17,
1018 IB_RNR_TIMER_005_12 = 18,
1019 IB_RNR_TIMER_007_68 = 19,
1020 IB_RNR_TIMER_010_24 = 20,
1021 IB_RNR_TIMER_015_36 = 21,
1022 IB_RNR_TIMER_020_48 = 22,
1023 IB_RNR_TIMER_030_72 = 23,
1024 IB_RNR_TIMER_040_96 = 24,
1025 IB_RNR_TIMER_061_44 = 25,
1026 IB_RNR_TIMER_081_92 = 26,
1027 IB_RNR_TIMER_122_88 = 27,
1028 IB_RNR_TIMER_163_84 = 28,
1029 IB_RNR_TIMER_245_76 = 29,
1030 IB_RNR_TIMER_327_68 = 30,
1031 IB_RNR_TIMER_491_52 = 31
1032};
1033
1034enum ib_qp_attr_mask {
1035 IB_QP_STATE = 1,
1036 IB_QP_CUR_STATE = (1<<1),
1037 IB_QP_EN_SQD_ASYNC_NOTIFY = (1<<2),
1038 IB_QP_ACCESS_FLAGS = (1<<3),
1039 IB_QP_PKEY_INDEX = (1<<4),
1040 IB_QP_PORT = (1<<5),
1041 IB_QP_QKEY = (1<<6),
1042 IB_QP_AV = (1<<7),
1043 IB_QP_PATH_MTU = (1<<8),
1044 IB_QP_TIMEOUT = (1<<9),
1045 IB_QP_RETRY_CNT = (1<<10),
1046 IB_QP_RNR_RETRY = (1<<11),
1047 IB_QP_RQ_PSN = (1<<12),
1048 IB_QP_MAX_QP_RD_ATOMIC = (1<<13),
1049 IB_QP_ALT_PATH = (1<<14),
1050 IB_QP_MIN_RNR_TIMER = (1<<15),
1051 IB_QP_SQ_PSN = (1<<16),
1052 IB_QP_MAX_DEST_RD_ATOMIC = (1<<17),
1053 IB_QP_PATH_MIG_STATE = (1<<18),
1054 IB_QP_CAP = (1<<19),
dd5f03be 1055 IB_QP_DEST_QPN = (1<<20),
aa744cc0
MB
1056 IB_QP_RESERVED1 = (1<<21),
1057 IB_QP_RESERVED2 = (1<<22),
1058 IB_QP_RESERVED3 = (1<<23),
1059 IB_QP_RESERVED4 = (1<<24),
1da177e4
LT
1060};
1061
1062enum ib_qp_state {
1063 IB_QPS_RESET,
1064 IB_QPS_INIT,
1065 IB_QPS_RTR,
1066 IB_QPS_RTS,
1067 IB_QPS_SQD,
1068 IB_QPS_SQE,
1069 IB_QPS_ERR
1070};
1071
1072enum ib_mig_state {
1073 IB_MIG_MIGRATED,
1074 IB_MIG_REARM,
1075 IB_MIG_ARMED
1076};
1077
7083e42e
SM
1078enum ib_mw_type {
1079 IB_MW_TYPE_1 = 1,
1080 IB_MW_TYPE_2 = 2
1081};
1082
1da177e4
LT
1083struct ib_qp_attr {
1084 enum ib_qp_state qp_state;
1085 enum ib_qp_state cur_qp_state;
1086 enum ib_mtu path_mtu;
1087 enum ib_mig_state path_mig_state;
1088 u32 qkey;
1089 u32 rq_psn;
1090 u32 sq_psn;
1091 u32 dest_qp_num;
1092 int qp_access_flags;
1093 struct ib_qp_cap cap;
1094 struct ib_ah_attr ah_attr;
1095 struct ib_ah_attr alt_ah_attr;
1096 u16 pkey_index;
1097 u16 alt_pkey_index;
1098 u8 en_sqd_async_notify;
1099 u8 sq_draining;
1100 u8 max_rd_atomic;
1101 u8 max_dest_rd_atomic;
1102 u8 min_rnr_timer;
1103 u8 port_num;
1104 u8 timeout;
1105 u8 retry_cnt;
1106 u8 rnr_retry;
1107 u8 alt_port_num;
1108 u8 alt_timeout;
1109};
1110
1111enum ib_wr_opcode {
1112 IB_WR_RDMA_WRITE,
1113 IB_WR_RDMA_WRITE_WITH_IMM,
1114 IB_WR_SEND,
1115 IB_WR_SEND_WITH_IMM,
1116 IB_WR_RDMA_READ,
1117 IB_WR_ATOMIC_CMP_AND_SWP,
c93570f2 1118 IB_WR_ATOMIC_FETCH_AND_ADD,
0f39cf3d
RD
1119 IB_WR_LSO,
1120 IB_WR_SEND_WITH_INV,
00f7ec36
SW
1121 IB_WR_RDMA_READ_WITH_INV,
1122 IB_WR_LOCAL_INV,
4c67e2bf 1123 IB_WR_REG_MR,
5e80ba8f
VS
1124 IB_WR_MASKED_ATOMIC_CMP_AND_SWP,
1125 IB_WR_MASKED_ATOMIC_FETCH_AND_ADD,
1b01d335 1126 IB_WR_REG_SIG_MR,
0134f16b
JM
1127 /* reserve values for low level drivers' internal use.
1128 * These values will not be used at all in the ib core layer.
1129 */
1130 IB_WR_RESERVED1 = 0xf0,
1131 IB_WR_RESERVED2,
1132 IB_WR_RESERVED3,
1133 IB_WR_RESERVED4,
1134 IB_WR_RESERVED5,
1135 IB_WR_RESERVED6,
1136 IB_WR_RESERVED7,
1137 IB_WR_RESERVED8,
1138 IB_WR_RESERVED9,
1139 IB_WR_RESERVED10,
1da177e4
LT
1140};
1141
1142enum ib_send_flags {
1143 IB_SEND_FENCE = 1,
1144 IB_SEND_SIGNALED = (1<<1),
1145 IB_SEND_SOLICITED = (1<<2),
e0605d91 1146 IB_SEND_INLINE = (1<<3),
0134f16b
JM
1147 IB_SEND_IP_CSUM = (1<<4),
1148
1149 /* reserve bits 26-31 for low level drivers' internal use */
1150 IB_SEND_RESERVED_START = (1 << 26),
1151 IB_SEND_RESERVED_END = (1 << 31),
1da177e4
LT
1152};
1153
1154struct ib_sge {
1155 u64 addr;
1156 u32 length;
1157 u32 lkey;
1158};
1159
14d3a3b2
CH
1160struct ib_cqe {
1161 void (*done)(struct ib_cq *cq, struct ib_wc *wc);
1162};
1163
1da177e4
LT
1164struct ib_send_wr {
1165 struct ib_send_wr *next;
14d3a3b2
CH
1166 union {
1167 u64 wr_id;
1168 struct ib_cqe *wr_cqe;
1169 };
1da177e4
LT
1170 struct ib_sge *sg_list;
1171 int num_sge;
1172 enum ib_wr_opcode opcode;
1173 int send_flags;
0f39cf3d
RD
1174 union {
1175 __be32 imm_data;
1176 u32 invalidate_rkey;
1177 } ex;
1da177e4
LT
1178};
1179
e622f2f4
CH
1180struct ib_rdma_wr {
1181 struct ib_send_wr wr;
1182 u64 remote_addr;
1183 u32 rkey;
1184};
1185
1186static inline struct ib_rdma_wr *rdma_wr(struct ib_send_wr *wr)
1187{
1188 return container_of(wr, struct ib_rdma_wr, wr);
1189}
1190
1191struct ib_atomic_wr {
1192 struct ib_send_wr wr;
1193 u64 remote_addr;
1194 u64 compare_add;
1195 u64 swap;
1196 u64 compare_add_mask;
1197 u64 swap_mask;
1198 u32 rkey;
1199};
1200
1201static inline struct ib_atomic_wr *atomic_wr(struct ib_send_wr *wr)
1202{
1203 return container_of(wr, struct ib_atomic_wr, wr);
1204}
1205
1206struct ib_ud_wr {
1207 struct ib_send_wr wr;
1208 struct ib_ah *ah;
1209 void *header;
1210 int hlen;
1211 int mss;
1212 u32 remote_qpn;
1213 u32 remote_qkey;
1214 u16 pkey_index; /* valid for GSI only */
1215 u8 port_num; /* valid for DR SMPs on switch only */
1216};
1217
1218static inline struct ib_ud_wr *ud_wr(struct ib_send_wr *wr)
1219{
1220 return container_of(wr, struct ib_ud_wr, wr);
1221}
1222
4c67e2bf
SG
1223struct ib_reg_wr {
1224 struct ib_send_wr wr;
1225 struct ib_mr *mr;
1226 u32 key;
1227 int access;
1228};
1229
1230static inline struct ib_reg_wr *reg_wr(struct ib_send_wr *wr)
1231{
1232 return container_of(wr, struct ib_reg_wr, wr);
1233}
1234
e622f2f4
CH
1235struct ib_sig_handover_wr {
1236 struct ib_send_wr wr;
1237 struct ib_sig_attrs *sig_attrs;
1238 struct ib_mr *sig_mr;
1239 int access_flags;
1240 struct ib_sge *prot;
1241};
1242
1243static inline struct ib_sig_handover_wr *sig_handover_wr(struct ib_send_wr *wr)
1244{
1245 return container_of(wr, struct ib_sig_handover_wr, wr);
1246}
1247
1da177e4
LT
1248struct ib_recv_wr {
1249 struct ib_recv_wr *next;
14d3a3b2
CH
1250 union {
1251 u64 wr_id;
1252 struct ib_cqe *wr_cqe;
1253 };
1da177e4
LT
1254 struct ib_sge *sg_list;
1255 int num_sge;
1256};
1257
1258enum ib_access_flags {
1259 IB_ACCESS_LOCAL_WRITE = 1,
1260 IB_ACCESS_REMOTE_WRITE = (1<<1),
1261 IB_ACCESS_REMOTE_READ = (1<<2),
1262 IB_ACCESS_REMOTE_ATOMIC = (1<<3),
7083e42e 1263 IB_ACCESS_MW_BIND = (1<<4),
860f10a7
SG
1264 IB_ZERO_BASED = (1<<5),
1265 IB_ACCESS_ON_DEMAND = (1<<6),
1da177e4
LT
1266};
1267
b7d3e0a9
CH
1268/*
1269 * XXX: these are apparently used for ->rereg_user_mr, no idea why they
1270 * are hidden here instead of a uapi header!
1271 */
1da177e4
LT
1272enum ib_mr_rereg_flags {
1273 IB_MR_REREG_TRANS = 1,
1274 IB_MR_REREG_PD = (1<<1),
7e6edb9b
MB
1275 IB_MR_REREG_ACCESS = (1<<2),
1276 IB_MR_REREG_SUPPORTED = ((IB_MR_REREG_ACCESS << 1) - 1)
1da177e4
LT
1277};
1278
1da177e4
LT
1279struct ib_fmr_attr {
1280 int max_pages;
1281 int max_maps;
d36f34aa 1282 u8 page_shift;
1da177e4
LT
1283};
1284
882214e2
HE
1285struct ib_umem;
1286
e2773c06
RD
1287struct ib_ucontext {
1288 struct ib_device *device;
1289 struct list_head pd_list;
1290 struct list_head mr_list;
1291 struct list_head mw_list;
1292 struct list_head cq_list;
1293 struct list_head qp_list;
1294 struct list_head srq_list;
1295 struct list_head ah_list;
53d0bd1e 1296 struct list_head xrcd_list;
436f2ad0 1297 struct list_head rule_list;
f7c6a7b5 1298 int closing;
8ada2c1c
SR
1299
1300 struct pid *tgid;
882214e2
HE
1301#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
1302 struct rb_root umem_tree;
1303 /*
1304 * Protects .umem_rbroot and tree, as well as odp_mrs_count and
1305 * mmu notifiers registration.
1306 */
1307 struct rw_semaphore umem_rwsem;
1308 void (*invalidate_range)(struct ib_umem *umem,
1309 unsigned long start, unsigned long end);
1310
1311 struct mmu_notifier mn;
1312 atomic_t notifier_count;
1313 /* A list of umems that don't have private mmu notifier counters yet. */
1314 struct list_head no_private_counters;
1315 int odp_mrs_count;
1316#endif
e2773c06
RD
1317};
1318
1319struct ib_uobject {
1320 u64 user_handle; /* handle given to us by userspace */
1321 struct ib_ucontext *context; /* associated user context */
9ead190b 1322 void *object; /* containing object */
e2773c06 1323 struct list_head list; /* link to context's list */
b3d636b0 1324 int id; /* index into kernel idr */
9ead190b
RD
1325 struct kref ref;
1326 struct rw_semaphore mutex; /* protects .live */
d144da8c 1327 struct rcu_head rcu; /* kfree_rcu() overhead */
9ead190b 1328 int live;
e2773c06
RD
1329};
1330
e2773c06 1331struct ib_udata {
309243ec 1332 const void __user *inbuf;
e2773c06
RD
1333 void __user *outbuf;
1334 size_t inlen;
1335 size_t outlen;
1336};
1337
1da177e4 1338struct ib_pd {
96249d70 1339 u32 local_dma_lkey;
e2773c06
RD
1340 struct ib_device *device;
1341 struct ib_uobject *uobject;
1342 atomic_t usecnt; /* count all resources */
96249d70 1343 struct ib_mr *local_mr;
1da177e4
LT
1344};
1345
59991f94
SH
1346struct ib_xrcd {
1347 struct ib_device *device;
d3d72d90 1348 atomic_t usecnt; /* count all exposed resources */
53d0bd1e 1349 struct inode *inode;
d3d72d90
SH
1350
1351 struct mutex tgt_qp_mutex;
1352 struct list_head tgt_qp_list;
59991f94
SH
1353};
1354
1da177e4
LT
1355struct ib_ah {
1356 struct ib_device *device;
1357 struct ib_pd *pd;
e2773c06 1358 struct ib_uobject *uobject;
1da177e4
LT
1359};
1360
1361typedef void (*ib_comp_handler)(struct ib_cq *cq, void *cq_context);
1362
14d3a3b2
CH
1363enum ib_poll_context {
1364 IB_POLL_DIRECT, /* caller context, no hw completions */
1365 IB_POLL_SOFTIRQ, /* poll from softirq context */
1366 IB_POLL_WORKQUEUE, /* poll from workqueue */
1367};
1368
1da177e4 1369struct ib_cq {
e2773c06
RD
1370 struct ib_device *device;
1371 struct ib_uobject *uobject;
1372 ib_comp_handler comp_handler;
1373 void (*event_handler)(struct ib_event *, void *);
4deccd6d 1374 void *cq_context;
e2773c06
RD
1375 int cqe;
1376 atomic_t usecnt; /* count number of work queues */
14d3a3b2
CH
1377 enum ib_poll_context poll_ctx;
1378 struct ib_wc *wc;
1379 union {
1380 struct irq_poll iop;
1381 struct work_struct work;
1382 };
1da177e4
LT
1383};
1384
1385struct ib_srq {
d41fcc67
RD
1386 struct ib_device *device;
1387 struct ib_pd *pd;
1388 struct ib_uobject *uobject;
1389 void (*event_handler)(struct ib_event *, void *);
1390 void *srq_context;
96104eda 1391 enum ib_srq_type srq_type;
1da177e4 1392 atomic_t usecnt;
418d5130
SH
1393
1394 union {
1395 struct {
1396 struct ib_xrcd *xrcd;
1397 struct ib_cq *cq;
1398 u32 srq_num;
1399 } xrc;
1400 } ext;
1da177e4
LT
1401};
1402
1403struct ib_qp {
1404 struct ib_device *device;
1405 struct ib_pd *pd;
1406 struct ib_cq *send_cq;
1407 struct ib_cq *recv_cq;
1408 struct ib_srq *srq;
b42b63cf 1409 struct ib_xrcd *xrcd; /* XRC TGT QPs only */
d3d72d90 1410 struct list_head xrcd_list;
319a441d
HHZ
1411 /* count times opened, mcast attaches, flow attaches */
1412 atomic_t usecnt;
0e0ec7e0
SH
1413 struct list_head open_list;
1414 struct ib_qp *real_qp;
e2773c06 1415 struct ib_uobject *uobject;
1da177e4
LT
1416 void (*event_handler)(struct ib_event *, void *);
1417 void *qp_context;
1418 u32 qp_num;
1419 enum ib_qp_type qp_type;
1420};
1421
1422struct ib_mr {
e2773c06
RD
1423 struct ib_device *device;
1424 struct ib_pd *pd;
1425 struct ib_uobject *uobject;
1426 u32 lkey;
1427 u32 rkey;
4c67e2bf
SG
1428 u64 iova;
1429 u32 length;
1430 unsigned int page_size;
1da177e4
LT
1431};
1432
1433struct ib_mw {
1434 struct ib_device *device;
1435 struct ib_pd *pd;
e2773c06 1436 struct ib_uobject *uobject;
1da177e4 1437 u32 rkey;
7083e42e 1438 enum ib_mw_type type;
1da177e4
LT
1439};
1440
1441struct ib_fmr {
1442 struct ib_device *device;
1443 struct ib_pd *pd;
1444 struct list_head list;
1445 u32 lkey;
1446 u32 rkey;
1447};
1448
319a441d
HHZ
1449/* Supported steering options */
1450enum ib_flow_attr_type {
1451 /* steering according to rule specifications */
1452 IB_FLOW_ATTR_NORMAL = 0x0,
1453 /* default unicast and multicast rule -
1454 * receive all Eth traffic which isn't steered to any QP
1455 */
1456 IB_FLOW_ATTR_ALL_DEFAULT = 0x1,
1457 /* default multicast rule -
1458 * receive all Eth multicast traffic which isn't steered to any QP
1459 */
1460 IB_FLOW_ATTR_MC_DEFAULT = 0x2,
1461 /* sniffer rule - receive all port traffic */
1462 IB_FLOW_ATTR_SNIFFER = 0x3
1463};
1464
1465/* Supported steering header types */
1466enum ib_flow_spec_type {
1467 /* L2 headers*/
1468 IB_FLOW_SPEC_ETH = 0x20,
240ae00e 1469 IB_FLOW_SPEC_IB = 0x22,
319a441d
HHZ
1470 /* L3 header*/
1471 IB_FLOW_SPEC_IPV4 = 0x30,
1472 /* L4 headers*/
1473 IB_FLOW_SPEC_TCP = 0x40,
1474 IB_FLOW_SPEC_UDP = 0x41
1475};
240ae00e 1476#define IB_FLOW_SPEC_LAYER_MASK 0xF0
22878dbc
MB
1477#define IB_FLOW_SPEC_SUPPORT_LAYERS 4
1478
319a441d
HHZ
1479/* Flow steering rule priority is set according to it's domain.
1480 * Lower domain value means higher priority.
1481 */
1482enum ib_flow_domain {
1483 IB_FLOW_DOMAIN_USER,
1484 IB_FLOW_DOMAIN_ETHTOOL,
1485 IB_FLOW_DOMAIN_RFS,
1486 IB_FLOW_DOMAIN_NIC,
1487 IB_FLOW_DOMAIN_NUM /* Must be last */
1488};
1489
1490struct ib_flow_eth_filter {
1491 u8 dst_mac[6];
1492 u8 src_mac[6];
1493 __be16 ether_type;
1494 __be16 vlan_tag;
1495};
1496
1497struct ib_flow_spec_eth {
1498 enum ib_flow_spec_type type;
1499 u16 size;
1500 struct ib_flow_eth_filter val;
1501 struct ib_flow_eth_filter mask;
1502};
1503
240ae00e
MB
1504struct ib_flow_ib_filter {
1505 __be16 dlid;
1506 __u8 sl;
1507};
1508
1509struct ib_flow_spec_ib {
1510 enum ib_flow_spec_type type;
1511 u16 size;
1512 struct ib_flow_ib_filter val;
1513 struct ib_flow_ib_filter mask;
1514};
1515
319a441d
HHZ
1516struct ib_flow_ipv4_filter {
1517 __be32 src_ip;
1518 __be32 dst_ip;
1519};
1520
1521struct ib_flow_spec_ipv4 {
1522 enum ib_flow_spec_type type;
1523 u16 size;
1524 struct ib_flow_ipv4_filter val;
1525 struct ib_flow_ipv4_filter mask;
1526};
1527
1528struct ib_flow_tcp_udp_filter {
1529 __be16 dst_port;
1530 __be16 src_port;
1531};
1532
1533struct ib_flow_spec_tcp_udp {
1534 enum ib_flow_spec_type type;
1535 u16 size;
1536 struct ib_flow_tcp_udp_filter val;
1537 struct ib_flow_tcp_udp_filter mask;
1538};
1539
1540union ib_flow_spec {
1541 struct {
1542 enum ib_flow_spec_type type;
1543 u16 size;
1544 };
1545 struct ib_flow_spec_eth eth;
240ae00e 1546 struct ib_flow_spec_ib ib;
319a441d
HHZ
1547 struct ib_flow_spec_ipv4 ipv4;
1548 struct ib_flow_spec_tcp_udp tcp_udp;
1549};
1550
1551struct ib_flow_attr {
1552 enum ib_flow_attr_type type;
1553 u16 size;
1554 u16 priority;
1555 u32 flags;
1556 u8 num_of_specs;
1557 u8 port;
1558 /* Following are the optional layers according to user request
1559 * struct ib_flow_spec_xxx
1560 * struct ib_flow_spec_yyy
1561 */
1562};
1563
1564struct ib_flow {
1565 struct ib_qp *qp;
1566 struct ib_uobject *uobject;
1567};
1568
4cd7c947 1569struct ib_mad_hdr;
1da177e4
LT
1570struct ib_grh;
1571
1572enum ib_process_mad_flags {
1573 IB_MAD_IGNORE_MKEY = 1,
1574 IB_MAD_IGNORE_BKEY = 2,
1575 IB_MAD_IGNORE_ALL = IB_MAD_IGNORE_MKEY | IB_MAD_IGNORE_BKEY
1576};
1577
1578enum ib_mad_result {
1579 IB_MAD_RESULT_FAILURE = 0, /* (!SUCCESS is the important flag) */
1580 IB_MAD_RESULT_SUCCESS = 1 << 0, /* MAD was successfully processed */
1581 IB_MAD_RESULT_REPLY = 1 << 1, /* Reply packet needs to be sent */
1582 IB_MAD_RESULT_CONSUMED = 1 << 2 /* Packet consumed: stop processing */
1583};
1584
1585#define IB_DEVICE_NAME_MAX 64
1586
1587struct ib_cache {
1588 rwlock_t lock;
1589 struct ib_event_handler event_handler;
1590 struct ib_pkey_cache **pkey_cache;
03db3a2d 1591 struct ib_gid_table **gid_cache;
6fb9cdbf 1592 u8 *lmc_cache;
1da177e4
LT
1593};
1594
9b513090
RC
1595struct ib_dma_mapping_ops {
1596 int (*mapping_error)(struct ib_device *dev,
1597 u64 dma_addr);
1598 u64 (*map_single)(struct ib_device *dev,
1599 void *ptr, size_t size,
1600 enum dma_data_direction direction);
1601 void (*unmap_single)(struct ib_device *dev,
1602 u64 addr, size_t size,
1603 enum dma_data_direction direction);
1604 u64 (*map_page)(struct ib_device *dev,
1605 struct page *page, unsigned long offset,
1606 size_t size,
1607 enum dma_data_direction direction);
1608 void (*unmap_page)(struct ib_device *dev,
1609 u64 addr, size_t size,
1610 enum dma_data_direction direction);
1611 int (*map_sg)(struct ib_device *dev,
1612 struct scatterlist *sg, int nents,
1613 enum dma_data_direction direction);
1614 void (*unmap_sg)(struct ib_device *dev,
1615 struct scatterlist *sg, int nents,
1616 enum dma_data_direction direction);
9b513090
RC
1617 void (*sync_single_for_cpu)(struct ib_device *dev,
1618 u64 dma_handle,
1619 size_t size,
4deccd6d 1620 enum dma_data_direction dir);
9b513090
RC
1621 void (*sync_single_for_device)(struct ib_device *dev,
1622 u64 dma_handle,
1623 size_t size,
1624 enum dma_data_direction dir);
1625 void *(*alloc_coherent)(struct ib_device *dev,
1626 size_t size,
1627 u64 *dma_handle,
1628 gfp_t flag);
1629 void (*free_coherent)(struct ib_device *dev,
1630 size_t size, void *cpu_addr,
1631 u64 dma_handle);
1632};
1633
07ebafba
TT
1634struct iw_cm_verbs;
1635
7738613e
IW
1636struct ib_port_immutable {
1637 int pkey_tbl_len;
1638 int gid_tbl_len;
f9b22e35 1639 u32 core_cap_flags;
337877a4 1640 u32 max_mad_size;
7738613e
IW
1641};
1642
1da177e4
LT
1643struct ib_device {
1644 struct device *dma_device;
1645
1646 char name[IB_DEVICE_NAME_MAX];
1647
1648 struct list_head event_handler_list;
1649 spinlock_t event_handler_lock;
1650
17a55f79 1651 spinlock_t client_data_lock;
1da177e4 1652 struct list_head core_list;
7c1eb45a
HE
1653 /* Access to the client_data_list is protected by the client_data_lock
1654 * spinlock and the lists_rwsem read-write semaphore */
1da177e4 1655 struct list_head client_data_list;
1da177e4
LT
1656
1657 struct ib_cache cache;
7738613e
IW
1658 /**
1659 * port_immutable is indexed by port number
1660 */
1661 struct ib_port_immutable *port_immutable;
1da177e4 1662
f4fd0b22
MT
1663 int num_comp_vectors;
1664
07ebafba
TT
1665 struct iw_cm_verbs *iwcm;
1666
7f624d02
SW
1667 int (*get_protocol_stats)(struct ib_device *device,
1668 union rdma_protocol_stats *stats);
1da177e4 1669 int (*query_device)(struct ib_device *device,
2528e33e
MB
1670 struct ib_device_attr *device_attr,
1671 struct ib_udata *udata);
1da177e4
LT
1672 int (*query_port)(struct ib_device *device,
1673 u8 port_num,
1674 struct ib_port_attr *port_attr);
a3f5adaf
EC
1675 enum rdma_link_layer (*get_link_layer)(struct ib_device *device,
1676 u8 port_num);
03db3a2d
MB
1677 /* When calling get_netdev, the HW vendor's driver should return the
1678 * net device of device @device at port @port_num or NULL if such
1679 * a net device doesn't exist. The vendor driver should call dev_hold
1680 * on this net device. The HW vendor's device driver must guarantee
1681 * that this function returns NULL before the net device reaches
1682 * NETDEV_UNREGISTER_FINAL state.
1683 */
1684 struct net_device *(*get_netdev)(struct ib_device *device,
1685 u8 port_num);
1da177e4
LT
1686 int (*query_gid)(struct ib_device *device,
1687 u8 port_num, int index,
1688 union ib_gid *gid);
03db3a2d
MB
1689 /* When calling add_gid, the HW vendor's driver should
1690 * add the gid of device @device at gid index @index of
1691 * port @port_num to be @gid. Meta-info of that gid (for example,
1692 * the network device related to this gid is available
1693 * at @attr. @context allows the HW vendor driver to store extra
1694 * information together with a GID entry. The HW vendor may allocate
1695 * memory to contain this information and store it in @context when a
1696 * new GID entry is written to. Params are consistent until the next
1697 * call of add_gid or delete_gid. The function should return 0 on
1698 * success or error otherwise. The function could be called
1699 * concurrently for different ports. This function is only called
1700 * when roce_gid_table is used.
1701 */
1702 int (*add_gid)(struct ib_device *device,
1703 u8 port_num,
1704 unsigned int index,
1705 const union ib_gid *gid,
1706 const struct ib_gid_attr *attr,
1707 void **context);
1708 /* When calling del_gid, the HW vendor's driver should delete the
1709 * gid of device @device at gid index @index of port @port_num.
1710 * Upon the deletion of a GID entry, the HW vendor must free any
1711 * allocated memory. The caller will clear @context afterwards.
1712 * This function is only called when roce_gid_table is used.
1713 */
1714 int (*del_gid)(struct ib_device *device,
1715 u8 port_num,
1716 unsigned int index,
1717 void **context);
1da177e4
LT
1718 int (*query_pkey)(struct ib_device *device,
1719 u8 port_num, u16 index, u16 *pkey);
1720 int (*modify_device)(struct ib_device *device,
1721 int device_modify_mask,
1722 struct ib_device_modify *device_modify);
1723 int (*modify_port)(struct ib_device *device,
1724 u8 port_num, int port_modify_mask,
1725 struct ib_port_modify *port_modify);
e2773c06
RD
1726 struct ib_ucontext * (*alloc_ucontext)(struct ib_device *device,
1727 struct ib_udata *udata);
1728 int (*dealloc_ucontext)(struct ib_ucontext *context);
1729 int (*mmap)(struct ib_ucontext *context,
1730 struct vm_area_struct *vma);
1731 struct ib_pd * (*alloc_pd)(struct ib_device *device,
1732 struct ib_ucontext *context,
1733 struct ib_udata *udata);
1da177e4
LT
1734 int (*dealloc_pd)(struct ib_pd *pd);
1735 struct ib_ah * (*create_ah)(struct ib_pd *pd,
1736 struct ib_ah_attr *ah_attr);
1737 int (*modify_ah)(struct ib_ah *ah,
1738 struct ib_ah_attr *ah_attr);
1739 int (*query_ah)(struct ib_ah *ah,
1740 struct ib_ah_attr *ah_attr);
1741 int (*destroy_ah)(struct ib_ah *ah);
d41fcc67
RD
1742 struct ib_srq * (*create_srq)(struct ib_pd *pd,
1743 struct ib_srq_init_attr *srq_init_attr,
1744 struct ib_udata *udata);
1745 int (*modify_srq)(struct ib_srq *srq,
1746 struct ib_srq_attr *srq_attr,
9bc57e2d
RC
1747 enum ib_srq_attr_mask srq_attr_mask,
1748 struct ib_udata *udata);
d41fcc67
RD
1749 int (*query_srq)(struct ib_srq *srq,
1750 struct ib_srq_attr *srq_attr);
1751 int (*destroy_srq)(struct ib_srq *srq);
1752 int (*post_srq_recv)(struct ib_srq *srq,
1753 struct ib_recv_wr *recv_wr,
1754 struct ib_recv_wr **bad_recv_wr);
1da177e4 1755 struct ib_qp * (*create_qp)(struct ib_pd *pd,
e2773c06
RD
1756 struct ib_qp_init_attr *qp_init_attr,
1757 struct ib_udata *udata);
1da177e4
LT
1758 int (*modify_qp)(struct ib_qp *qp,
1759 struct ib_qp_attr *qp_attr,
9bc57e2d
RC
1760 int qp_attr_mask,
1761 struct ib_udata *udata);
1da177e4
LT
1762 int (*query_qp)(struct ib_qp *qp,
1763 struct ib_qp_attr *qp_attr,
1764 int qp_attr_mask,
1765 struct ib_qp_init_attr *qp_init_attr);
1766 int (*destroy_qp)(struct ib_qp *qp);
1767 int (*post_send)(struct ib_qp *qp,
1768 struct ib_send_wr *send_wr,
1769 struct ib_send_wr **bad_send_wr);
1770 int (*post_recv)(struct ib_qp *qp,
1771 struct ib_recv_wr *recv_wr,
1772 struct ib_recv_wr **bad_recv_wr);
bcf4c1ea
MB
1773 struct ib_cq * (*create_cq)(struct ib_device *device,
1774 const struct ib_cq_init_attr *attr,
e2773c06
RD
1775 struct ib_ucontext *context,
1776 struct ib_udata *udata);
2dd57162
EC
1777 int (*modify_cq)(struct ib_cq *cq, u16 cq_count,
1778 u16 cq_period);
1da177e4 1779 int (*destroy_cq)(struct ib_cq *cq);
33b9b3ee
RD
1780 int (*resize_cq)(struct ib_cq *cq, int cqe,
1781 struct ib_udata *udata);
1da177e4
LT
1782 int (*poll_cq)(struct ib_cq *cq, int num_entries,
1783 struct ib_wc *wc);
1784 int (*peek_cq)(struct ib_cq *cq, int wc_cnt);
1785 int (*req_notify_cq)(struct ib_cq *cq,
ed23a727 1786 enum ib_cq_notify_flags flags);
1da177e4
LT
1787 int (*req_ncomp_notif)(struct ib_cq *cq,
1788 int wc_cnt);
1789 struct ib_mr * (*get_dma_mr)(struct ib_pd *pd,
1790 int mr_access_flags);
e2773c06 1791 struct ib_mr * (*reg_user_mr)(struct ib_pd *pd,
f7c6a7b5
RD
1792 u64 start, u64 length,
1793 u64 virt_addr,
e2773c06
RD
1794 int mr_access_flags,
1795 struct ib_udata *udata);
7e6edb9b
MB
1796 int (*rereg_user_mr)(struct ib_mr *mr,
1797 int flags,
1798 u64 start, u64 length,
1799 u64 virt_addr,
1800 int mr_access_flags,
1801 struct ib_pd *pd,
1802 struct ib_udata *udata);
1da177e4 1803 int (*dereg_mr)(struct ib_mr *mr);
9bee178b
SG
1804 struct ib_mr * (*alloc_mr)(struct ib_pd *pd,
1805 enum ib_mr_type mr_type,
1806 u32 max_num_sg);
4c67e2bf
SG
1807 int (*map_mr_sg)(struct ib_mr *mr,
1808 struct scatterlist *sg,
1809 int sg_nents);
7083e42e
SM
1810 struct ib_mw * (*alloc_mw)(struct ib_pd *pd,
1811 enum ib_mw_type type);
1da177e4
LT
1812 int (*dealloc_mw)(struct ib_mw *mw);
1813 struct ib_fmr * (*alloc_fmr)(struct ib_pd *pd,
1814 int mr_access_flags,
1815 struct ib_fmr_attr *fmr_attr);
1816 int (*map_phys_fmr)(struct ib_fmr *fmr,
1817 u64 *page_list, int list_len,
1818 u64 iova);
1819 int (*unmap_fmr)(struct list_head *fmr_list);
1820 int (*dealloc_fmr)(struct ib_fmr *fmr);
1821 int (*attach_mcast)(struct ib_qp *qp,
1822 union ib_gid *gid,
1823 u16 lid);
1824 int (*detach_mcast)(struct ib_qp *qp,
1825 union ib_gid *gid,
1826 u16 lid);
1827 int (*process_mad)(struct ib_device *device,
1828 int process_mad_flags,
1829 u8 port_num,
a97e2d86
IW
1830 const struct ib_wc *in_wc,
1831 const struct ib_grh *in_grh,
4cd7c947
IW
1832 const struct ib_mad_hdr *in_mad,
1833 size_t in_mad_size,
1834 struct ib_mad_hdr *out_mad,
1835 size_t *out_mad_size,
1836 u16 *out_mad_pkey_index);
59991f94
SH
1837 struct ib_xrcd * (*alloc_xrcd)(struct ib_device *device,
1838 struct ib_ucontext *ucontext,
1839 struct ib_udata *udata);
1840 int (*dealloc_xrcd)(struct ib_xrcd *xrcd);
319a441d
HHZ
1841 struct ib_flow * (*create_flow)(struct ib_qp *qp,
1842 struct ib_flow_attr
1843 *flow_attr,
1844 int domain);
1845 int (*destroy_flow)(struct ib_flow *flow_id);
1b01d335
SG
1846 int (*check_mr_status)(struct ib_mr *mr, u32 check_mask,
1847 struct ib_mr_status *mr_status);
036b1063 1848 void (*disassociate_ucontext)(struct ib_ucontext *ibcontext);
1da177e4 1849
9b513090
RC
1850 struct ib_dma_mapping_ops *dma_ops;
1851
e2773c06 1852 struct module *owner;
f4e91eb4 1853 struct device dev;
35be0681 1854 struct kobject *ports_parent;
1da177e4
LT
1855 struct list_head port_list;
1856
1857 enum {
1858 IB_DEV_UNINITIALIZED,
1859 IB_DEV_REGISTERED,
1860 IB_DEV_UNREGISTERED
1861 } reg_state;
1862
274c0891 1863 int uverbs_abi_ver;
17a55f79 1864 u64 uverbs_cmd_mask;
f21519b2 1865 u64 uverbs_ex_cmd_mask;
274c0891 1866
c5bcbbb9 1867 char node_desc[64];
cf311cd4 1868 __be64 node_guid;
96f15c03 1869 u32 local_dma_lkey;
4139032b 1870 u16 is_switch:1;
1da177e4
LT
1871 u8 node_type;
1872 u8 phys_port_cnt;
3e153a93 1873 struct ib_device_attr attrs;
7738613e
IW
1874
1875 /**
1876 * The following mandatory functions are used only at device
1877 * registration. Keep functions such as these at the end of this
1878 * structure to avoid cache line misses when accessing struct ib_device
1879 * in fast paths.
1880 */
1881 int (*get_port_immutable)(struct ib_device *, u8, struct ib_port_immutable *);
1da177e4
LT
1882};
1883
1884struct ib_client {
1885 char *name;
1886 void (*add) (struct ib_device *);
7c1eb45a 1887 void (*remove)(struct ib_device *, void *client_data);
1da177e4 1888
9268f72d
YK
1889 /* Returns the net_dev belonging to this ib_client and matching the
1890 * given parameters.
1891 * @dev: An RDMA device that the net_dev use for communication.
1892 * @port: A physical port number on the RDMA device.
1893 * @pkey: P_Key that the net_dev uses if applicable.
1894 * @gid: A GID that the net_dev uses to communicate.
1895 * @addr: An IP address the net_dev is configured with.
1896 * @client_data: The device's client data set by ib_set_client_data().
1897 *
1898 * An ib_client that implements a net_dev on top of RDMA devices
1899 * (such as IP over IB) should implement this callback, allowing the
1900 * rdma_cm module to find the right net_dev for a given request.
1901 *
1902 * The caller is responsible for calling dev_put on the returned
1903 * netdev. */
1904 struct net_device *(*get_net_dev_by_params)(
1905 struct ib_device *dev,
1906 u8 port,
1907 u16 pkey,
1908 const union ib_gid *gid,
1909 const struct sockaddr *addr,
1910 void *client_data);
1da177e4
LT
1911 struct list_head list;
1912};
1913
1914struct ib_device *ib_alloc_device(size_t size);
1915void ib_dealloc_device(struct ib_device *device);
1916
9a6edb60
RC
1917int ib_register_device(struct ib_device *device,
1918 int (*port_callback)(struct ib_device *,
1919 u8, struct kobject *));
1da177e4
LT
1920void ib_unregister_device(struct ib_device *device);
1921
1922int ib_register_client (struct ib_client *client);
1923void ib_unregister_client(struct ib_client *client);
1924
1925void *ib_get_client_data(struct ib_device *device, struct ib_client *client);
1926void ib_set_client_data(struct ib_device *device, struct ib_client *client,
1927 void *data);
1928
e2773c06
RD
1929static inline int ib_copy_from_udata(void *dest, struct ib_udata *udata, size_t len)
1930{
1931 return copy_from_user(dest, udata->inbuf, len) ? -EFAULT : 0;
1932}
1933
1934static inline int ib_copy_to_udata(struct ib_udata *udata, void *src, size_t len)
1935{
43c61165 1936 return copy_to_user(udata->outbuf, src, len) ? -EFAULT : 0;
e2773c06
RD
1937}
1938
301a721e
MB
1939static inline bool ib_is_udata_cleared(struct ib_udata *udata,
1940 size_t offset,
1941 size_t len)
1942{
1943 const void __user *p = udata->inbuf + offset;
1944 bool ret = false;
1945 u8 *buf;
1946
1947 if (len > USHRT_MAX)
1948 return false;
1949
1950 buf = kmalloc(len, GFP_KERNEL);
1951 if (!buf)
1952 return false;
1953
1954 if (copy_from_user(buf, p, len))
1955 goto free;
1956
1957 ret = !memchr_inv(buf, 0, len);
1958
1959free:
1960 kfree(buf);
1961 return ret;
1962}
1963
8a51866f
RD
1964/**
1965 * ib_modify_qp_is_ok - Check that the supplied attribute mask
1966 * contains all required attributes and no attributes not allowed for
1967 * the given QP state transition.
1968 * @cur_state: Current QP state
1969 * @next_state: Next QP state
1970 * @type: QP type
1971 * @mask: Mask of supplied QP attributes
dd5f03be 1972 * @ll : link layer of port
8a51866f
RD
1973 *
1974 * This function is a helper function that a low-level driver's
1975 * modify_qp method can use to validate the consumer's input. It
1976 * checks that cur_state and next_state are valid QP states, that a
1977 * transition from cur_state to next_state is allowed by the IB spec,
1978 * and that the attribute mask supplied is allowed for the transition.
1979 */
1980int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
dd5f03be
MB
1981 enum ib_qp_type type, enum ib_qp_attr_mask mask,
1982 enum rdma_link_layer ll);
8a51866f 1983
1da177e4
LT
1984int ib_register_event_handler (struct ib_event_handler *event_handler);
1985int ib_unregister_event_handler(struct ib_event_handler *event_handler);
1986void ib_dispatch_event(struct ib_event *event);
1987
1da177e4
LT
1988int ib_query_port(struct ib_device *device,
1989 u8 port_num, struct ib_port_attr *port_attr);
1990
a3f5adaf
EC
1991enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device,
1992 u8 port_num);
1993
4139032b
HR
1994/**
1995 * rdma_cap_ib_switch - Check if the device is IB switch
1996 * @device: Device to check
1997 *
1998 * Device driver is responsible for setting is_switch bit on
1999 * in ib_device structure at init time.
2000 *
2001 * Return: true if the device is IB switch.
2002 */
2003static inline bool rdma_cap_ib_switch(const struct ib_device *device)
2004{
2005 return device->is_switch;
2006}
2007
0cf18d77
IW
2008/**
2009 * rdma_start_port - Return the first valid port number for the device
2010 * specified
2011 *
2012 * @device: Device to be checked
2013 *
2014 * Return start port number
2015 */
2016static inline u8 rdma_start_port(const struct ib_device *device)
2017{
4139032b 2018 return rdma_cap_ib_switch(device) ? 0 : 1;
0cf18d77
IW
2019}
2020
2021/**
2022 * rdma_end_port - Return the last valid port number for the device
2023 * specified
2024 *
2025 * @device: Device to be checked
2026 *
2027 * Return last port number
2028 */
2029static inline u8 rdma_end_port(const struct ib_device *device)
2030{
4139032b 2031 return rdma_cap_ib_switch(device) ? 0 : device->phys_port_cnt;
0cf18d77
IW
2032}
2033
5ede9289 2034static inline bool rdma_protocol_ib(const struct ib_device *device, u8 port_num)
de66be94 2035{
f9b22e35 2036 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IB;
de66be94
MW
2037}
2038
5ede9289 2039static inline bool rdma_protocol_roce(const struct ib_device *device, u8 port_num)
7766a99f
MB
2040{
2041 return device->port_immutable[port_num].core_cap_flags &
2042 (RDMA_CORE_CAP_PROT_ROCE | RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP);
2043}
2044
2045static inline bool rdma_protocol_roce_udp_encap(const struct ib_device *device, u8 port_num)
2046{
2047 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP;
2048}
2049
2050static inline bool rdma_protocol_roce_eth_encap(const struct ib_device *device, u8 port_num)
de66be94 2051{
f9b22e35 2052 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_ROCE;
de66be94
MW
2053}
2054
5ede9289 2055static inline bool rdma_protocol_iwarp(const struct ib_device *device, u8 port_num)
de66be94 2056{
f9b22e35 2057 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IWARP;
de66be94
MW
2058}
2059
5ede9289 2060static inline bool rdma_ib_or_roce(const struct ib_device *device, u8 port_num)
de66be94 2061{
7766a99f
MB
2062 return rdma_protocol_ib(device, port_num) ||
2063 rdma_protocol_roce(device, port_num);
de66be94
MW
2064}
2065
c757dea8 2066/**
296ec009 2067 * rdma_cap_ib_mad - Check if the port of a device supports Infiniband
c757dea8 2068 * Management Datagrams.
296ec009
MW
2069 * @device: Device to check
2070 * @port_num: Port number to check
c757dea8 2071 *
296ec009
MW
2072 * Management Datagrams (MAD) are a required part of the InfiniBand
2073 * specification and are supported on all InfiniBand devices. A slightly
2074 * extended version are also supported on OPA interfaces.
c757dea8 2075 *
296ec009 2076 * Return: true if the port supports sending/receiving of MAD packets.
c757dea8 2077 */
5ede9289 2078static inline bool rdma_cap_ib_mad(const struct ib_device *device, u8 port_num)
c757dea8 2079{
f9b22e35 2080 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_MAD;
c757dea8
MW
2081}
2082
65995fee
IW
2083/**
2084 * rdma_cap_opa_mad - Check if the port of device provides support for OPA
2085 * Management Datagrams.
2086 * @device: Device to check
2087 * @port_num: Port number to check
2088 *
2089 * Intel OmniPath devices extend and/or replace the InfiniBand Management
2090 * datagrams with their own versions. These OPA MADs share many but not all of
2091 * the characteristics of InfiniBand MADs.
2092 *
2093 * OPA MADs differ in the following ways:
2094 *
2095 * 1) MADs are variable size up to 2K
2096 * IBTA defined MADs remain fixed at 256 bytes
2097 * 2) OPA SMPs must carry valid PKeys
2098 * 3) OPA SMP packets are a different format
2099 *
2100 * Return: true if the port supports OPA MAD packet formats.
2101 */
2102static inline bool rdma_cap_opa_mad(struct ib_device *device, u8 port_num)
2103{
2104 return (device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_OPA_MAD)
2105 == RDMA_CORE_CAP_OPA_MAD;
2106}
2107
29541e3a 2108/**
296ec009
MW
2109 * rdma_cap_ib_smi - Check if the port of a device provides an Infiniband
2110 * Subnet Management Agent (SMA) on the Subnet Management Interface (SMI).
2111 * @device: Device to check
2112 * @port_num: Port number to check
29541e3a 2113 *
296ec009
MW
2114 * Each InfiniBand node is required to provide a Subnet Management Agent
2115 * that the subnet manager can access. Prior to the fabric being fully
2116 * configured by the subnet manager, the SMA is accessed via a well known
2117 * interface called the Subnet Management Interface (SMI). This interface
2118 * uses directed route packets to communicate with the SM to get around the
2119 * chicken and egg problem of the SM needing to know what's on the fabric
2120 * in order to configure the fabric, and needing to configure the fabric in
2121 * order to send packets to the devices on the fabric. These directed
2122 * route packets do not need the fabric fully configured in order to reach
2123 * their destination. The SMI is the only method allowed to send
2124 * directed route packets on an InfiniBand fabric.
29541e3a 2125 *
296ec009 2126 * Return: true if the port provides an SMI.
29541e3a 2127 */
5ede9289 2128static inline bool rdma_cap_ib_smi(const struct ib_device *device, u8 port_num)
29541e3a 2129{
f9b22e35 2130 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SMI;
29541e3a
MW
2131}
2132
72219cea
MW
2133/**
2134 * rdma_cap_ib_cm - Check if the port of device has the capability Infiniband
2135 * Communication Manager.
296ec009
MW
2136 * @device: Device to check
2137 * @port_num: Port number to check
72219cea 2138 *
296ec009
MW
2139 * The InfiniBand Communication Manager is one of many pre-defined General
2140 * Service Agents (GSA) that are accessed via the General Service
2141 * Interface (GSI). It's role is to facilitate establishment of connections
2142 * between nodes as well as other management related tasks for established
2143 * connections.
72219cea 2144 *
296ec009
MW
2145 * Return: true if the port supports an IB CM (this does not guarantee that
2146 * a CM is actually running however).
72219cea 2147 */
5ede9289 2148static inline bool rdma_cap_ib_cm(const struct ib_device *device, u8 port_num)
72219cea 2149{
f9b22e35 2150 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_CM;
72219cea
MW
2151}
2152
04215330
MW
2153/**
2154 * rdma_cap_iw_cm - Check if the port of device has the capability IWARP
2155 * Communication Manager.
296ec009
MW
2156 * @device: Device to check
2157 * @port_num: Port number to check
04215330 2158 *
296ec009
MW
2159 * Similar to above, but specific to iWARP connections which have a different
2160 * managment protocol than InfiniBand.
04215330 2161 *
296ec009
MW
2162 * Return: true if the port supports an iWARP CM (this does not guarantee that
2163 * a CM is actually running however).
04215330 2164 */
5ede9289 2165static inline bool rdma_cap_iw_cm(const struct ib_device *device, u8 port_num)
04215330 2166{
f9b22e35 2167 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IW_CM;
04215330
MW
2168}
2169
fe53ba2f
MW
2170/**
2171 * rdma_cap_ib_sa - Check if the port of device has the capability Infiniband
2172 * Subnet Administration.
296ec009
MW
2173 * @device: Device to check
2174 * @port_num: Port number to check
fe53ba2f 2175 *
296ec009
MW
2176 * An InfiniBand Subnet Administration (SA) service is a pre-defined General
2177 * Service Agent (GSA) provided by the Subnet Manager (SM). On InfiniBand
2178 * fabrics, devices should resolve routes to other hosts by contacting the
2179 * SA to query the proper route.
fe53ba2f 2180 *
296ec009
MW
2181 * Return: true if the port should act as a client to the fabric Subnet
2182 * Administration interface. This does not imply that the SA service is
2183 * running locally.
fe53ba2f 2184 */
5ede9289 2185static inline bool rdma_cap_ib_sa(const struct ib_device *device, u8 port_num)
fe53ba2f 2186{
f9b22e35 2187 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SA;
fe53ba2f
MW
2188}
2189
a31ad3b0
MW
2190/**
2191 * rdma_cap_ib_mcast - Check if the port of device has the capability Infiniband
2192 * Multicast.
296ec009
MW
2193 * @device: Device to check
2194 * @port_num: Port number to check
a31ad3b0 2195 *
296ec009
MW
2196 * InfiniBand multicast registration is more complex than normal IPv4 or
2197 * IPv6 multicast registration. Each Host Channel Adapter must register
2198 * with the Subnet Manager when it wishes to join a multicast group. It
2199 * should do so only once regardless of how many queue pairs it subscribes
2200 * to this group. And it should leave the group only after all queue pairs
2201 * attached to the group have been detached.
a31ad3b0 2202 *
296ec009
MW
2203 * Return: true if the port must undertake the additional adminstrative
2204 * overhead of registering/unregistering with the SM and tracking of the
2205 * total number of queue pairs attached to the multicast group.
a31ad3b0 2206 */
5ede9289 2207static inline bool rdma_cap_ib_mcast(const struct ib_device *device, u8 port_num)
a31ad3b0
MW
2208{
2209 return rdma_cap_ib_sa(device, port_num);
2210}
2211
30a74ef4
MW
2212/**
2213 * rdma_cap_af_ib - Check if the port of device has the capability
2214 * Native Infiniband Address.
296ec009
MW
2215 * @device: Device to check
2216 * @port_num: Port number to check
30a74ef4 2217 *
296ec009
MW
2218 * InfiniBand addressing uses a port's GUID + Subnet Prefix to make a default
2219 * GID. RoCE uses a different mechanism, but still generates a GID via
2220 * a prescribed mechanism and port specific data.
30a74ef4 2221 *
296ec009
MW
2222 * Return: true if the port uses a GID address to identify devices on the
2223 * network.
30a74ef4 2224 */
5ede9289 2225static inline bool rdma_cap_af_ib(const struct ib_device *device, u8 port_num)
30a74ef4 2226{
f9b22e35 2227 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_AF_IB;
30a74ef4
MW
2228}
2229
227128fc
MW
2230/**
2231 * rdma_cap_eth_ah - Check if the port of device has the capability
296ec009
MW
2232 * Ethernet Address Handle.
2233 * @device: Device to check
2234 * @port_num: Port number to check
227128fc 2235 *
296ec009
MW
2236 * RoCE is InfiniBand over Ethernet, and it uses a well defined technique
2237 * to fabricate GIDs over Ethernet/IP specific addresses native to the
2238 * port. Normally, packet headers are generated by the sending host
2239 * adapter, but when sending connectionless datagrams, we must manually
2240 * inject the proper headers for the fabric we are communicating over.
227128fc 2241 *
296ec009
MW
2242 * Return: true if we are running as a RoCE port and must force the
2243 * addition of a Global Route Header built from our Ethernet Address
2244 * Handle into our header list for connectionless packets.
227128fc 2245 */
5ede9289 2246static inline bool rdma_cap_eth_ah(const struct ib_device *device, u8 port_num)
227128fc 2247{
f9b22e35 2248 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_ETH_AH;
227128fc
MW
2249}
2250
337877a4
IW
2251/**
2252 * rdma_max_mad_size - Return the max MAD size required by this RDMA Port.
2253 *
2254 * @device: Device
2255 * @port_num: Port number
2256 *
2257 * This MAD size includes the MAD headers and MAD payload. No other headers
2258 * are included.
2259 *
2260 * Return the max MAD size required by the Port. Will return 0 if the port
2261 * does not support MADs
2262 */
2263static inline size_t rdma_max_mad_size(const struct ib_device *device, u8 port_num)
2264{
2265 return device->port_immutable[port_num].max_mad_size;
2266}
2267
03db3a2d
MB
2268/**
2269 * rdma_cap_roce_gid_table - Check if the port of device uses roce_gid_table
2270 * @device: Device to check
2271 * @port_num: Port number to check
2272 *
2273 * RoCE GID table mechanism manages the various GIDs for a device.
2274 *
2275 * NOTE: if allocating the port's GID table has failed, this call will still
2276 * return true, but any RoCE GID table API will fail.
2277 *
2278 * Return: true if the port uses RoCE GID table mechanism in order to manage
2279 * its GIDs.
2280 */
2281static inline bool rdma_cap_roce_gid_table(const struct ib_device *device,
2282 u8 port_num)
2283{
2284 return rdma_protocol_roce(device, port_num) &&
2285 device->add_gid && device->del_gid;
2286}
2287
1da177e4 2288int ib_query_gid(struct ib_device *device,
55ee3ab2
MB
2289 u8 port_num, int index, union ib_gid *gid,
2290 struct ib_gid_attr *attr);
1da177e4
LT
2291
2292int ib_query_pkey(struct ib_device *device,
2293 u8 port_num, u16 index, u16 *pkey);
2294
2295int ib_modify_device(struct ib_device *device,
2296 int device_modify_mask,
2297 struct ib_device_modify *device_modify);
2298
2299int ib_modify_port(struct ib_device *device,
2300 u8 port_num, int port_modify_mask,
2301 struct ib_port_modify *port_modify);
2302
5eb620c8 2303int ib_find_gid(struct ib_device *device, union ib_gid *gid,
b39ffa1d
MB
2304 enum ib_gid_type gid_type, struct net_device *ndev,
2305 u8 *port_num, u16 *index);
5eb620c8
YE
2306
2307int ib_find_pkey(struct ib_device *device,
2308 u8 port_num, u16 pkey, u16 *index);
2309
1da177e4
LT
2310struct ib_pd *ib_alloc_pd(struct ib_device *device);
2311
7dd78647 2312void ib_dealloc_pd(struct ib_pd *pd);
1da177e4
LT
2313
2314/**
2315 * ib_create_ah - Creates an address handle for the given address vector.
2316 * @pd: The protection domain associated with the address handle.
2317 * @ah_attr: The attributes of the address vector.
2318 *
2319 * The address handle is used to reference a local or global destination
2320 * in all UD QP post sends.
2321 */
2322struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
2323
4e00d694
SH
2324/**
2325 * ib_init_ah_from_wc - Initializes address handle attributes from a
2326 * work completion.
2327 * @device: Device on which the received message arrived.
2328 * @port_num: Port on which the received message arrived.
2329 * @wc: Work completion associated with the received message.
2330 * @grh: References the received global route header. This parameter is
2331 * ignored unless the work completion indicates that the GRH is valid.
2332 * @ah_attr: Returned attributes that can be used when creating an address
2333 * handle for replying to the message.
2334 */
73cdaaee
IW
2335int ib_init_ah_from_wc(struct ib_device *device, u8 port_num,
2336 const struct ib_wc *wc, const struct ib_grh *grh,
2337 struct ib_ah_attr *ah_attr);
4e00d694 2338
513789ed
HR
2339/**
2340 * ib_create_ah_from_wc - Creates an address handle associated with the
2341 * sender of the specified work completion.
2342 * @pd: The protection domain associated with the address handle.
2343 * @wc: Work completion information associated with a received message.
2344 * @grh: References the received global route header. This parameter is
2345 * ignored unless the work completion indicates that the GRH is valid.
2346 * @port_num: The outbound port number to associate with the address.
2347 *
2348 * The address handle is used to reference a local or global destination
2349 * in all UD QP post sends.
2350 */
73cdaaee
IW
2351struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc,
2352 const struct ib_grh *grh, u8 port_num);
513789ed 2353
1da177e4
LT
2354/**
2355 * ib_modify_ah - Modifies the address vector associated with an address
2356 * handle.
2357 * @ah: The address handle to modify.
2358 * @ah_attr: The new address vector attributes to associate with the
2359 * address handle.
2360 */
2361int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr);
2362
2363/**
2364 * ib_query_ah - Queries the address vector associated with an address
2365 * handle.
2366 * @ah: The address handle to query.
2367 * @ah_attr: The address vector attributes associated with the address
2368 * handle.
2369 */
2370int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr);
2371
2372/**
2373 * ib_destroy_ah - Destroys an address handle.
2374 * @ah: The address handle to destroy.
2375 */
2376int ib_destroy_ah(struct ib_ah *ah);
2377
d41fcc67
RD
2378/**
2379 * ib_create_srq - Creates a SRQ associated with the specified protection
2380 * domain.
2381 * @pd: The protection domain associated with the SRQ.
abb6e9ba
DB
2382 * @srq_init_attr: A list of initial attributes required to create the
2383 * SRQ. If SRQ creation succeeds, then the attributes are updated to
2384 * the actual capabilities of the created SRQ.
d41fcc67
RD
2385 *
2386 * srq_attr->max_wr and srq_attr->max_sge are read the determine the
2387 * requested size of the SRQ, and set to the actual values allocated
2388 * on return. If ib_create_srq() succeeds, then max_wr and max_sge
2389 * will always be at least as large as the requested values.
2390 */
2391struct ib_srq *ib_create_srq(struct ib_pd *pd,
2392 struct ib_srq_init_attr *srq_init_attr);
2393
2394/**
2395 * ib_modify_srq - Modifies the attributes for the specified SRQ.
2396 * @srq: The SRQ to modify.
2397 * @srq_attr: On input, specifies the SRQ attributes to modify. On output,
2398 * the current values of selected SRQ attributes are returned.
2399 * @srq_attr_mask: A bit-mask used to specify which attributes of the SRQ
2400 * are being modified.
2401 *
2402 * The mask may contain IB_SRQ_MAX_WR to resize the SRQ and/or
2403 * IB_SRQ_LIMIT to set the SRQ's limit and request notification when
2404 * the number of receives queued drops below the limit.
2405 */
2406int ib_modify_srq(struct ib_srq *srq,
2407 struct ib_srq_attr *srq_attr,
2408 enum ib_srq_attr_mask srq_attr_mask);
2409
2410/**
2411 * ib_query_srq - Returns the attribute list and current values for the
2412 * specified SRQ.
2413 * @srq: The SRQ to query.
2414 * @srq_attr: The attributes of the specified SRQ.
2415 */
2416int ib_query_srq(struct ib_srq *srq,
2417 struct ib_srq_attr *srq_attr);
2418
2419/**
2420 * ib_destroy_srq - Destroys the specified SRQ.
2421 * @srq: The SRQ to destroy.
2422 */
2423int ib_destroy_srq(struct ib_srq *srq);
2424
2425/**
2426 * ib_post_srq_recv - Posts a list of work requests to the specified SRQ.
2427 * @srq: The SRQ to post the work request on.
2428 * @recv_wr: A list of work requests to post on the receive queue.
2429 * @bad_recv_wr: On an immediate failure, this parameter will reference
2430 * the work request that failed to be posted on the QP.
2431 */
2432static inline int ib_post_srq_recv(struct ib_srq *srq,
2433 struct ib_recv_wr *recv_wr,
2434 struct ib_recv_wr **bad_recv_wr)
2435{
2436 return srq->device->post_srq_recv(srq, recv_wr, bad_recv_wr);
2437}
2438
1da177e4
LT
2439/**
2440 * ib_create_qp - Creates a QP associated with the specified protection
2441 * domain.
2442 * @pd: The protection domain associated with the QP.
abb6e9ba
DB
2443 * @qp_init_attr: A list of initial attributes required to create the
2444 * QP. If QP creation succeeds, then the attributes are updated to
2445 * the actual capabilities of the created QP.
1da177e4
LT
2446 */
2447struct ib_qp *ib_create_qp(struct ib_pd *pd,
2448 struct ib_qp_init_attr *qp_init_attr);
2449
2450/**
2451 * ib_modify_qp - Modifies the attributes for the specified QP and then
2452 * transitions the QP to the given state.
2453 * @qp: The QP to modify.
2454 * @qp_attr: On input, specifies the QP attributes to modify. On output,
2455 * the current values of selected QP attributes are returned.
2456 * @qp_attr_mask: A bit-mask used to specify which attributes of the QP
2457 * are being modified.
2458 */
2459int ib_modify_qp(struct ib_qp *qp,
2460 struct ib_qp_attr *qp_attr,
2461 int qp_attr_mask);
2462
2463/**
2464 * ib_query_qp - Returns the attribute list and current values for the
2465 * specified QP.
2466 * @qp: The QP to query.
2467 * @qp_attr: The attributes of the specified QP.
2468 * @qp_attr_mask: A bit-mask used to select specific attributes to query.
2469 * @qp_init_attr: Additional attributes of the selected QP.
2470 *
2471 * The qp_attr_mask may be used to limit the query to gathering only the
2472 * selected attributes.
2473 */
2474int ib_query_qp(struct ib_qp *qp,
2475 struct ib_qp_attr *qp_attr,
2476 int qp_attr_mask,
2477 struct ib_qp_init_attr *qp_init_attr);
2478
2479/**
2480 * ib_destroy_qp - Destroys the specified QP.
2481 * @qp: The QP to destroy.
2482 */
2483int ib_destroy_qp(struct ib_qp *qp);
2484
d3d72d90 2485/**
0e0ec7e0
SH
2486 * ib_open_qp - Obtain a reference to an existing sharable QP.
2487 * @xrcd - XRC domain
2488 * @qp_open_attr: Attributes identifying the QP to open.
2489 *
2490 * Returns a reference to a sharable QP.
2491 */
2492struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd,
2493 struct ib_qp_open_attr *qp_open_attr);
2494
2495/**
2496 * ib_close_qp - Release an external reference to a QP.
d3d72d90
SH
2497 * @qp: The QP handle to release
2498 *
0e0ec7e0
SH
2499 * The opened QP handle is released by the caller. The underlying
2500 * shared QP is not destroyed until all internal references are released.
d3d72d90 2501 */
0e0ec7e0 2502int ib_close_qp(struct ib_qp *qp);
d3d72d90 2503
1da177e4
LT
2504/**
2505 * ib_post_send - Posts a list of work requests to the send queue of
2506 * the specified QP.
2507 * @qp: The QP to post the work request on.
2508 * @send_wr: A list of work requests to post on the send queue.
2509 * @bad_send_wr: On an immediate failure, this parameter will reference
2510 * the work request that failed to be posted on the QP.
55464d46
BVA
2511 *
2512 * While IBA Vol. 1 section 11.4.1.1 specifies that if an immediate
2513 * error is returned, the QP state shall not be affected,
2514 * ib_post_send() will return an immediate error after queueing any
2515 * earlier work requests in the list.
1da177e4
LT
2516 */
2517static inline int ib_post_send(struct ib_qp *qp,
2518 struct ib_send_wr *send_wr,
2519 struct ib_send_wr **bad_send_wr)
2520{
2521 return qp->device->post_send(qp, send_wr, bad_send_wr);
2522}
2523
2524/**
2525 * ib_post_recv - Posts a list of work requests to the receive queue of
2526 * the specified QP.
2527 * @qp: The QP to post the work request on.
2528 * @recv_wr: A list of work requests to post on the receive queue.
2529 * @bad_recv_wr: On an immediate failure, this parameter will reference
2530 * the work request that failed to be posted on the QP.
2531 */
2532static inline int ib_post_recv(struct ib_qp *qp,
2533 struct ib_recv_wr *recv_wr,
2534 struct ib_recv_wr **bad_recv_wr)
2535{
2536 return qp->device->post_recv(qp, recv_wr, bad_recv_wr);
2537}
2538
14d3a3b2
CH
2539struct ib_cq *ib_alloc_cq(struct ib_device *dev, void *private,
2540 int nr_cqe, int comp_vector, enum ib_poll_context poll_ctx);
2541void ib_free_cq(struct ib_cq *cq);
2542int ib_process_cq_direct(struct ib_cq *cq, int budget);
2543
1da177e4
LT
2544/**
2545 * ib_create_cq - Creates a CQ on the specified device.
2546 * @device: The device on which to create the CQ.
2547 * @comp_handler: A user-specified callback that is invoked when a
2548 * completion event occurs on the CQ.
2549 * @event_handler: A user-specified callback that is invoked when an
2550 * asynchronous event not associated with a completion occurs on the CQ.
2551 * @cq_context: Context associated with the CQ returned to the user via
2552 * the associated completion and event handlers.
8e37210b 2553 * @cq_attr: The attributes the CQ should be created upon.
1da177e4
LT
2554 *
2555 * Users can examine the cq structure to determine the actual CQ size.
2556 */
2557struct ib_cq *ib_create_cq(struct ib_device *device,
2558 ib_comp_handler comp_handler,
2559 void (*event_handler)(struct ib_event *, void *),
8e37210b
MB
2560 void *cq_context,
2561 const struct ib_cq_init_attr *cq_attr);
1da177e4
LT
2562
2563/**
2564 * ib_resize_cq - Modifies the capacity of the CQ.
2565 * @cq: The CQ to resize.
2566 * @cqe: The minimum size of the CQ.
2567 *
2568 * Users can examine the cq structure to determine the actual CQ size.
2569 */
2570int ib_resize_cq(struct ib_cq *cq, int cqe);
2571
2dd57162
EC
2572/**
2573 * ib_modify_cq - Modifies moderation params of the CQ
2574 * @cq: The CQ to modify.
2575 * @cq_count: number of CQEs that will trigger an event
2576 * @cq_period: max period of time in usec before triggering an event
2577 *
2578 */
2579int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
2580
1da177e4
LT
2581/**
2582 * ib_destroy_cq - Destroys the specified CQ.
2583 * @cq: The CQ to destroy.
2584 */
2585int ib_destroy_cq(struct ib_cq *cq);
2586
2587/**
2588 * ib_poll_cq - poll a CQ for completion(s)
2589 * @cq:the CQ being polled
2590 * @num_entries:maximum number of completions to return
2591 * @wc:array of at least @num_entries &struct ib_wc where completions
2592 * will be returned
2593 *
2594 * Poll a CQ for (possibly multiple) completions. If the return value
2595 * is < 0, an error occurred. If the return value is >= 0, it is the
2596 * number of completions returned. If the return value is
2597 * non-negative and < num_entries, then the CQ was emptied.
2598 */
2599static inline int ib_poll_cq(struct ib_cq *cq, int num_entries,
2600 struct ib_wc *wc)
2601{
2602 return cq->device->poll_cq(cq, num_entries, wc);
2603}
2604
2605/**
2606 * ib_peek_cq - Returns the number of unreaped completions currently
2607 * on the specified CQ.
2608 * @cq: The CQ to peek.
2609 * @wc_cnt: A minimum number of unreaped completions to check for.
2610 *
2611 * If the number of unreaped completions is greater than or equal to wc_cnt,
2612 * this function returns wc_cnt, otherwise, it returns the actual number of
2613 * unreaped completions.
2614 */
2615int ib_peek_cq(struct ib_cq *cq, int wc_cnt);
2616
2617/**
2618 * ib_req_notify_cq - Request completion notification on a CQ.
2619 * @cq: The CQ to generate an event for.
ed23a727
RD
2620 * @flags:
2621 * Must contain exactly one of %IB_CQ_SOLICITED or %IB_CQ_NEXT_COMP
2622 * to request an event on the next solicited event or next work
2623 * completion at any type, respectively. %IB_CQ_REPORT_MISSED_EVENTS
2624 * may also be |ed in to request a hint about missed events, as
2625 * described below.
2626 *
2627 * Return Value:
2628 * < 0 means an error occurred while requesting notification
2629 * == 0 means notification was requested successfully, and if
2630 * IB_CQ_REPORT_MISSED_EVENTS was passed in, then no events
2631 * were missed and it is safe to wait for another event. In
2632 * this case is it guaranteed that any work completions added
2633 * to the CQ since the last CQ poll will trigger a completion
2634 * notification event.
2635 * > 0 is only returned if IB_CQ_REPORT_MISSED_EVENTS was passed
2636 * in. It means that the consumer must poll the CQ again to
2637 * make sure it is empty to avoid missing an event because of a
2638 * race between requesting notification and an entry being
2639 * added to the CQ. This return value means it is possible
2640 * (but not guaranteed) that a work completion has been added
2641 * to the CQ since the last poll without triggering a
2642 * completion notification event.
1da177e4
LT
2643 */
2644static inline int ib_req_notify_cq(struct ib_cq *cq,
ed23a727 2645 enum ib_cq_notify_flags flags)
1da177e4 2646{
ed23a727 2647 return cq->device->req_notify_cq(cq, flags);
1da177e4
LT
2648}
2649
2650/**
2651 * ib_req_ncomp_notif - Request completion notification when there are
2652 * at least the specified number of unreaped completions on the CQ.
2653 * @cq: The CQ to generate an event for.
2654 * @wc_cnt: The number of unreaped completions that should be on the
2655 * CQ before an event is generated.
2656 */
2657static inline int ib_req_ncomp_notif(struct ib_cq *cq, int wc_cnt)
2658{
2659 return cq->device->req_ncomp_notif ?
2660 cq->device->req_ncomp_notif(cq, wc_cnt) :
2661 -ENOSYS;
2662}
2663
2664/**
2665 * ib_get_dma_mr - Returns a memory region for system memory that is
2666 * usable for DMA.
2667 * @pd: The protection domain associated with the memory region.
2668 * @mr_access_flags: Specifies the memory access rights.
9b513090
RC
2669 *
2670 * Note that the ib_dma_*() functions defined below must be used
2671 * to create/destroy addresses used with the Lkey or Rkey returned
2672 * by ib_get_dma_mr().
1da177e4
LT
2673 */
2674struct ib_mr *ib_get_dma_mr(struct ib_pd *pd, int mr_access_flags);
2675
9b513090
RC
2676/**
2677 * ib_dma_mapping_error - check a DMA addr for error
2678 * @dev: The device for which the dma_addr was created
2679 * @dma_addr: The DMA address to check
2680 */
2681static inline int ib_dma_mapping_error(struct ib_device *dev, u64 dma_addr)
2682{
d1998ef3
BC
2683 if (dev->dma_ops)
2684 return dev->dma_ops->mapping_error(dev, dma_addr);
8d8bb39b 2685 return dma_mapping_error(dev->dma_device, dma_addr);
9b513090
RC
2686}
2687
2688/**
2689 * ib_dma_map_single - Map a kernel virtual address to DMA address
2690 * @dev: The device for which the dma_addr is to be created
2691 * @cpu_addr: The kernel virtual address
2692 * @size: The size of the region in bytes
2693 * @direction: The direction of the DMA
2694 */
2695static inline u64 ib_dma_map_single(struct ib_device *dev,
2696 void *cpu_addr, size_t size,
2697 enum dma_data_direction direction)
2698{
d1998ef3
BC
2699 if (dev->dma_ops)
2700 return dev->dma_ops->map_single(dev, cpu_addr, size, direction);
2701 return dma_map_single(dev->dma_device, cpu_addr, size, direction);
9b513090
RC
2702}
2703
2704/**
2705 * ib_dma_unmap_single - Destroy a mapping created by ib_dma_map_single()
2706 * @dev: The device for which the DMA address was created
2707 * @addr: The DMA address
2708 * @size: The size of the region in bytes
2709 * @direction: The direction of the DMA
2710 */
2711static inline void ib_dma_unmap_single(struct ib_device *dev,
2712 u64 addr, size_t size,
2713 enum dma_data_direction direction)
2714{
d1998ef3
BC
2715 if (dev->dma_ops)
2716 dev->dma_ops->unmap_single(dev, addr, size, direction);
2717 else
9b513090
RC
2718 dma_unmap_single(dev->dma_device, addr, size, direction);
2719}
2720
cb9fbc5c
AK
2721static inline u64 ib_dma_map_single_attrs(struct ib_device *dev,
2722 void *cpu_addr, size_t size,
2723 enum dma_data_direction direction,
2724 struct dma_attrs *attrs)
2725{
2726 return dma_map_single_attrs(dev->dma_device, cpu_addr, size,
2727 direction, attrs);
2728}
2729
2730static inline void ib_dma_unmap_single_attrs(struct ib_device *dev,
2731 u64 addr, size_t size,
2732 enum dma_data_direction direction,
2733 struct dma_attrs *attrs)
2734{
2735 return dma_unmap_single_attrs(dev->dma_device, addr, size,
2736 direction, attrs);
2737}
2738
9b513090
RC
2739/**
2740 * ib_dma_map_page - Map a physical page to DMA address
2741 * @dev: The device for which the dma_addr is to be created
2742 * @page: The page to be mapped
2743 * @offset: The offset within the page
2744 * @size: The size of the region in bytes
2745 * @direction: The direction of the DMA
2746 */
2747static inline u64 ib_dma_map_page(struct ib_device *dev,
2748 struct page *page,
2749 unsigned long offset,
2750 size_t size,
2751 enum dma_data_direction direction)
2752{
d1998ef3
BC
2753 if (dev->dma_ops)
2754 return dev->dma_ops->map_page(dev, page, offset, size, direction);
2755 return dma_map_page(dev->dma_device, page, offset, size, direction);
9b513090
RC
2756}
2757
2758/**
2759 * ib_dma_unmap_page - Destroy a mapping created by ib_dma_map_page()
2760 * @dev: The device for which the DMA address was created
2761 * @addr: The DMA address
2762 * @size: The size of the region in bytes
2763 * @direction: The direction of the DMA
2764 */
2765static inline void ib_dma_unmap_page(struct ib_device *dev,
2766 u64 addr, size_t size,
2767 enum dma_data_direction direction)
2768{
d1998ef3
BC
2769 if (dev->dma_ops)
2770 dev->dma_ops->unmap_page(dev, addr, size, direction);
2771 else
9b513090
RC
2772 dma_unmap_page(dev->dma_device, addr, size, direction);
2773}
2774
2775/**
2776 * ib_dma_map_sg - Map a scatter/gather list to DMA addresses
2777 * @dev: The device for which the DMA addresses are to be created
2778 * @sg: The array of scatter/gather entries
2779 * @nents: The number of scatter/gather entries
2780 * @direction: The direction of the DMA
2781 */
2782static inline int ib_dma_map_sg(struct ib_device *dev,
2783 struct scatterlist *sg, int nents,
2784 enum dma_data_direction direction)
2785{
d1998ef3
BC
2786 if (dev->dma_ops)
2787 return dev->dma_ops->map_sg(dev, sg, nents, direction);
2788 return dma_map_sg(dev->dma_device, sg, nents, direction);
9b513090
RC
2789}
2790
2791/**
2792 * ib_dma_unmap_sg - Unmap a scatter/gather list of DMA addresses
2793 * @dev: The device for which the DMA addresses were created
2794 * @sg: The array of scatter/gather entries
2795 * @nents: The number of scatter/gather entries
2796 * @direction: The direction of the DMA
2797 */
2798static inline void ib_dma_unmap_sg(struct ib_device *dev,
2799 struct scatterlist *sg, int nents,
2800 enum dma_data_direction direction)
2801{
d1998ef3
BC
2802 if (dev->dma_ops)
2803 dev->dma_ops->unmap_sg(dev, sg, nents, direction);
2804 else
9b513090
RC
2805 dma_unmap_sg(dev->dma_device, sg, nents, direction);
2806}
2807
cb9fbc5c
AK
2808static inline int ib_dma_map_sg_attrs(struct ib_device *dev,
2809 struct scatterlist *sg, int nents,
2810 enum dma_data_direction direction,
2811 struct dma_attrs *attrs)
2812{
2813 return dma_map_sg_attrs(dev->dma_device, sg, nents, direction, attrs);
2814}
2815
2816static inline void ib_dma_unmap_sg_attrs(struct ib_device *dev,
2817 struct scatterlist *sg, int nents,
2818 enum dma_data_direction direction,
2819 struct dma_attrs *attrs)
2820{
2821 dma_unmap_sg_attrs(dev->dma_device, sg, nents, direction, attrs);
2822}
9b513090
RC
2823/**
2824 * ib_sg_dma_address - Return the DMA address from a scatter/gather entry
2825 * @dev: The device for which the DMA addresses were created
2826 * @sg: The scatter/gather entry
ea58a595
MM
2827 *
2828 * Note: this function is obsolete. To do: change all occurrences of
2829 * ib_sg_dma_address() into sg_dma_address().
9b513090
RC
2830 */
2831static inline u64 ib_sg_dma_address(struct ib_device *dev,
2832 struct scatterlist *sg)
2833{
d1998ef3 2834 return sg_dma_address(sg);
9b513090
RC
2835}
2836
2837/**
2838 * ib_sg_dma_len - Return the DMA length from a scatter/gather entry
2839 * @dev: The device for which the DMA addresses were created
2840 * @sg: The scatter/gather entry
ea58a595
MM
2841 *
2842 * Note: this function is obsolete. To do: change all occurrences of
2843 * ib_sg_dma_len() into sg_dma_len().
9b513090
RC
2844 */
2845static inline unsigned int ib_sg_dma_len(struct ib_device *dev,
2846 struct scatterlist *sg)
2847{
d1998ef3 2848 return sg_dma_len(sg);
9b513090
RC
2849}
2850
2851/**
2852 * ib_dma_sync_single_for_cpu - Prepare DMA region to be accessed by CPU
2853 * @dev: The device for which the DMA address was created
2854 * @addr: The DMA address
2855 * @size: The size of the region in bytes
2856 * @dir: The direction of the DMA
2857 */
2858static inline void ib_dma_sync_single_for_cpu(struct ib_device *dev,
2859 u64 addr,
2860 size_t size,
2861 enum dma_data_direction dir)
2862{
d1998ef3
BC
2863 if (dev->dma_ops)
2864 dev->dma_ops->sync_single_for_cpu(dev, addr, size, dir);
2865 else
9b513090
RC
2866 dma_sync_single_for_cpu(dev->dma_device, addr, size, dir);
2867}
2868
2869/**
2870 * ib_dma_sync_single_for_device - Prepare DMA region to be accessed by device
2871 * @dev: The device for which the DMA address was created
2872 * @addr: The DMA address
2873 * @size: The size of the region in bytes
2874 * @dir: The direction of the DMA
2875 */
2876static inline void ib_dma_sync_single_for_device(struct ib_device *dev,
2877 u64 addr,
2878 size_t size,
2879 enum dma_data_direction dir)
2880{
d1998ef3
BC
2881 if (dev->dma_ops)
2882 dev->dma_ops->sync_single_for_device(dev, addr, size, dir);
2883 else
9b513090
RC
2884 dma_sync_single_for_device(dev->dma_device, addr, size, dir);
2885}
2886
2887/**
2888 * ib_dma_alloc_coherent - Allocate memory and map it for DMA
2889 * @dev: The device for which the DMA address is requested
2890 * @size: The size of the region to allocate in bytes
2891 * @dma_handle: A pointer for returning the DMA address of the region
2892 * @flag: memory allocator flags
2893 */
2894static inline void *ib_dma_alloc_coherent(struct ib_device *dev,
2895 size_t size,
2896 u64 *dma_handle,
2897 gfp_t flag)
2898{
d1998ef3
BC
2899 if (dev->dma_ops)
2900 return dev->dma_ops->alloc_coherent(dev, size, dma_handle, flag);
c59a3da1
RD
2901 else {
2902 dma_addr_t handle;
2903 void *ret;
2904
2905 ret = dma_alloc_coherent(dev->dma_device, size, &handle, flag);
2906 *dma_handle = handle;
2907 return ret;
2908 }
9b513090
RC
2909}
2910
2911/**
2912 * ib_dma_free_coherent - Free memory allocated by ib_dma_alloc_coherent()
2913 * @dev: The device for which the DMA addresses were allocated
2914 * @size: The size of the region
2915 * @cpu_addr: the address returned by ib_dma_alloc_coherent()
2916 * @dma_handle: the DMA address returned by ib_dma_alloc_coherent()
2917 */
2918static inline void ib_dma_free_coherent(struct ib_device *dev,
2919 size_t size, void *cpu_addr,
2920 u64 dma_handle)
2921{
d1998ef3
BC
2922 if (dev->dma_ops)
2923 dev->dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
2924 else
9b513090
RC
2925 dma_free_coherent(dev->dma_device, size, cpu_addr, dma_handle);
2926}
2927
1da177e4
LT
2928/**
2929 * ib_dereg_mr - Deregisters a memory region and removes it from the
2930 * HCA translation table.
2931 * @mr: The memory region to deregister.
7083e42e
SM
2932 *
2933 * This function can fail, if the memory region has memory windows bound to it.
1da177e4
LT
2934 */
2935int ib_dereg_mr(struct ib_mr *mr);
2936
9bee178b
SG
2937struct ib_mr *ib_alloc_mr(struct ib_pd *pd,
2938 enum ib_mr_type mr_type,
2939 u32 max_num_sg);
00f7ec36 2940
00f7ec36
SW
2941/**
2942 * ib_update_fast_reg_key - updates the key portion of the fast_reg MR
2943 * R_Key and L_Key.
2944 * @mr - struct ib_mr pointer to be updated.
2945 * @newkey - new key to be used.
2946 */
2947static inline void ib_update_fast_reg_key(struct ib_mr *mr, u8 newkey)
2948{
2949 mr->lkey = (mr->lkey & 0xffffff00) | newkey;
2950 mr->rkey = (mr->rkey & 0xffffff00) | newkey;
2951}
2952
7083e42e
SM
2953/**
2954 * ib_inc_rkey - increments the key portion of the given rkey. Can be used
2955 * for calculating a new rkey for type 2 memory windows.
2956 * @rkey - the rkey to increment.
2957 */
2958static inline u32 ib_inc_rkey(u32 rkey)
2959{
2960 const u32 mask = 0x000000ff;
2961 return ((rkey + 1) & mask) | (rkey & ~mask);
2962}
2963
1da177e4
LT
2964/**
2965 * ib_alloc_fmr - Allocates a unmapped fast memory region.
2966 * @pd: The protection domain associated with the unmapped region.
2967 * @mr_access_flags: Specifies the memory access rights.
2968 * @fmr_attr: Attributes of the unmapped region.
2969 *
2970 * A fast memory region must be mapped before it can be used as part of
2971 * a work request.
2972 */
2973struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd,
2974 int mr_access_flags,
2975 struct ib_fmr_attr *fmr_attr);
2976
2977/**
2978 * ib_map_phys_fmr - Maps a list of physical pages to a fast memory region.
2979 * @fmr: The fast memory region to associate with the pages.
2980 * @page_list: An array of physical pages to map to the fast memory region.
2981 * @list_len: The number of pages in page_list.
2982 * @iova: The I/O virtual address to use with the mapped region.
2983 */
2984static inline int ib_map_phys_fmr(struct ib_fmr *fmr,
2985 u64 *page_list, int list_len,
2986 u64 iova)
2987{
2988 return fmr->device->map_phys_fmr(fmr, page_list, list_len, iova);
2989}
2990
2991/**
2992 * ib_unmap_fmr - Removes the mapping from a list of fast memory regions.
2993 * @fmr_list: A linked list of fast memory regions to unmap.
2994 */
2995int ib_unmap_fmr(struct list_head *fmr_list);
2996
2997/**
2998 * ib_dealloc_fmr - Deallocates a fast memory region.
2999 * @fmr: The fast memory region to deallocate.
3000 */
3001int ib_dealloc_fmr(struct ib_fmr *fmr);
3002
3003/**
3004 * ib_attach_mcast - Attaches the specified QP to a multicast group.
3005 * @qp: QP to attach to the multicast group. The QP must be type
3006 * IB_QPT_UD.
3007 * @gid: Multicast group GID.
3008 * @lid: Multicast group LID in host byte order.
3009 *
3010 * In order to send and receive multicast packets, subnet
3011 * administration must have created the multicast group and configured
3012 * the fabric appropriately. The port associated with the specified
3013 * QP must also be a member of the multicast group.
3014 */
3015int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
3016
3017/**
3018 * ib_detach_mcast - Detaches the specified QP from a multicast group.
3019 * @qp: QP to detach from the multicast group.
3020 * @gid: Multicast group GID.
3021 * @lid: Multicast group LID in host byte order.
3022 */
3023int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
3024
59991f94
SH
3025/**
3026 * ib_alloc_xrcd - Allocates an XRC domain.
3027 * @device: The device on which to allocate the XRC domain.
3028 */
3029struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device);
3030
3031/**
3032 * ib_dealloc_xrcd - Deallocates an XRC domain.
3033 * @xrcd: The XRC domain to deallocate.
3034 */
3035int ib_dealloc_xrcd(struct ib_xrcd *xrcd);
3036
319a441d
HHZ
3037struct ib_flow *ib_create_flow(struct ib_qp *qp,
3038 struct ib_flow_attr *flow_attr, int domain);
3039int ib_destroy_flow(struct ib_flow *flow_id);
3040
1c636f80
EC
3041static inline int ib_check_mr_access(int flags)
3042{
3043 /*
3044 * Local write permission is required if remote write or
3045 * remote atomic permission is also requested.
3046 */
3047 if (flags & (IB_ACCESS_REMOTE_ATOMIC | IB_ACCESS_REMOTE_WRITE) &&
3048 !(flags & IB_ACCESS_LOCAL_WRITE))
3049 return -EINVAL;
3050
3051 return 0;
3052}
3053
1b01d335
SG
3054/**
3055 * ib_check_mr_status: lightweight check of MR status.
3056 * This routine may provide status checks on a selected
3057 * ib_mr. first use is for signature status check.
3058 *
3059 * @mr: A memory region.
3060 * @check_mask: Bitmask of which checks to perform from
3061 * ib_mr_status_check enumeration.
3062 * @mr_status: The container of relevant status checks.
3063 * failed checks will be indicated in the status bitmask
3064 * and the relevant info shall be in the error item.
3065 */
3066int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
3067 struct ib_mr_status *mr_status);
3068
9268f72d
YK
3069struct net_device *ib_get_net_dev_by_params(struct ib_device *dev, u8 port,
3070 u16 pkey, const union ib_gid *gid,
3071 const struct sockaddr *addr);
3072
4c67e2bf
SG
3073int ib_map_mr_sg(struct ib_mr *mr,
3074 struct scatterlist *sg,
3075 int sg_nents,
3076 unsigned int page_size);
3077
3078static inline int
3079ib_map_mr_sg_zbva(struct ib_mr *mr,
3080 struct scatterlist *sg,
3081 int sg_nents,
3082 unsigned int page_size)
3083{
3084 int n;
3085
3086 n = ib_map_mr_sg(mr, sg, sg_nents, page_size);
3087 mr->iova = 0;
3088
3089 return n;
3090}
3091
3092int ib_sg_to_pages(struct ib_mr *mr,
3093 struct scatterlist *sgl,
3094 int sg_nents,
3095 int (*set_page)(struct ib_mr *, u64));
3096
1da177e4 3097#endif /* IB_VERBS_H */