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CommitLineData
1da177e4
LT
1/*
2 * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
3 * Copyright (c) 2004 Infinicon Corporation. All rights reserved.
4 * Copyright (c) 2004 Intel Corporation. All rights reserved.
5 * Copyright (c) 2004 Topspin Corporation. All rights reserved.
6 * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
2a1d9b7f 7 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
f7c6a7b5 8 * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved.
1da177e4
LT
9 *
10 * This software is available to you under a choice of one of two
11 * licenses. You may choose to be licensed under the terms of the GNU
12 * General Public License (GPL) Version 2, available from the file
13 * COPYING in the main directory of this source tree, or the
14 * OpenIB.org BSD license below:
15 *
16 * Redistribution and use in source and binary forms, with or
17 * without modification, are permitted provided that the following
18 * conditions are met:
19 *
20 * - Redistributions of source code must retain the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer.
23 *
24 * - Redistributions in binary form must reproduce the above
25 * copyright notice, this list of conditions and the following
26 * disclaimer in the documentation and/or other materials
27 * provided with the distribution.
28 *
29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
33 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * SOFTWARE.
1da177e4
LT
37 */
38
39#if !defined(IB_VERBS_H)
40#define IB_VERBS_H
41
42#include <linux/types.h>
43#include <linux/device.h>
9b513090
RC
44#include <linux/mm.h>
45#include <linux/dma-mapping.h>
459d6e2a 46#include <linux/kref.h>
bfb3ea12
DB
47#include <linux/list.h>
48#include <linux/rwsem.h>
87ae9afd 49#include <linux/scatterlist.h>
f0626710 50#include <linux/workqueue.h>
dd5f03be 51#include <uapi/linux/if_ether.h>
e2773c06 52
60063497 53#include <linux/atomic.h>
882214e2 54#include <linux/mmu_notifier.h>
e2773c06 55#include <asm/uaccess.h>
1da177e4 56
f0626710
TH
57extern struct workqueue_struct *ib_wq;
58
1da177e4
LT
59union ib_gid {
60 u8 raw[16];
61 struct {
97f52eb4
SH
62 __be64 subnet_prefix;
63 __be64 interface_id;
1da177e4
LT
64 } global;
65};
66
07ebafba
TT
67enum rdma_node_type {
68 /* IB values map to NodeInfo:NodeType. */
69 RDMA_NODE_IB_CA = 1,
70 RDMA_NODE_IB_SWITCH,
71 RDMA_NODE_IB_ROUTER,
180771a3
UM
72 RDMA_NODE_RNIC,
73 RDMA_NODE_USNIC,
5db5765e 74 RDMA_NODE_USNIC_UDP,
1da177e4
LT
75};
76
07ebafba
TT
77enum rdma_transport_type {
78 RDMA_TRANSPORT_IB,
180771a3 79 RDMA_TRANSPORT_IWARP,
248567f7
UM
80 RDMA_TRANSPORT_USNIC,
81 RDMA_TRANSPORT_USNIC_UDP
07ebafba
TT
82};
83
6b90a6d6
MW
84enum rdma_protocol_type {
85 RDMA_PROTOCOL_IB,
86 RDMA_PROTOCOL_IBOE,
87 RDMA_PROTOCOL_IWARP,
88 RDMA_PROTOCOL_USNIC_UDP
89};
90
8385fd84
RD
91__attribute_const__ enum rdma_transport_type
92rdma_node_get_transport(enum rdma_node_type node_type);
07ebafba 93
a3f5adaf
EC
94enum rdma_link_layer {
95 IB_LINK_LAYER_UNSPECIFIED,
96 IB_LINK_LAYER_INFINIBAND,
97 IB_LINK_LAYER_ETHERNET,
98};
99
1da177e4
LT
100enum ib_device_cap_flags {
101 IB_DEVICE_RESIZE_MAX_WR = 1,
102 IB_DEVICE_BAD_PKEY_CNTR = (1<<1),
103 IB_DEVICE_BAD_QKEY_CNTR = (1<<2),
104 IB_DEVICE_RAW_MULTI = (1<<3),
105 IB_DEVICE_AUTO_PATH_MIG = (1<<4),
106 IB_DEVICE_CHANGE_PHY_PORT = (1<<5),
107 IB_DEVICE_UD_AV_PORT_ENFORCE = (1<<6),
108 IB_DEVICE_CURR_QP_STATE_MOD = (1<<7),
109 IB_DEVICE_SHUTDOWN_PORT = (1<<8),
110 IB_DEVICE_INIT_TYPE = (1<<9),
111 IB_DEVICE_PORT_ACTIVE_EVENT = (1<<10),
112 IB_DEVICE_SYS_IMAGE_GUID = (1<<11),
113 IB_DEVICE_RC_RNR_NAK_GEN = (1<<12),
114 IB_DEVICE_SRQ_RESIZE = (1<<13),
115 IB_DEVICE_N_NOTIFY_CQ = (1<<14),
96f15c03 116 IB_DEVICE_LOCAL_DMA_LKEY = (1<<15),
0f39cf3d 117 IB_DEVICE_RESERVED = (1<<16), /* old SEND_W_INV */
e0605d91
EC
118 IB_DEVICE_MEM_WINDOW = (1<<17),
119 /*
120 * Devices should set IB_DEVICE_UD_IP_SUM if they support
121 * insertion of UDP and TCP checksum on outgoing UD IPoIB
122 * messages and can verify the validity of checksum for
123 * incoming messages. Setting this flag implies that the
124 * IPoIB driver may set NETIF_F_IP_CSUM for datagram mode.
125 */
126 IB_DEVICE_UD_IP_CSUM = (1<<18),
c93570f2 127 IB_DEVICE_UD_TSO = (1<<19),
59991f94 128 IB_DEVICE_XRC = (1<<20),
00f7ec36 129 IB_DEVICE_MEM_MGT_EXTENSIONS = (1<<21),
47ee1b9f 130 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK = (1<<22),
7083e42e 131 IB_DEVICE_MEM_WINDOW_TYPE_2A = (1<<23),
319a441d 132 IB_DEVICE_MEM_WINDOW_TYPE_2B = (1<<24),
1b01d335 133 IB_DEVICE_MANAGED_FLOW_STEERING = (1<<29),
860f10a7
SG
134 IB_DEVICE_SIGNATURE_HANDOVER = (1<<30),
135 IB_DEVICE_ON_DEMAND_PAGING = (1<<31),
1b01d335
SG
136};
137
138enum ib_signature_prot_cap {
139 IB_PROT_T10DIF_TYPE_1 = 1,
140 IB_PROT_T10DIF_TYPE_2 = 1 << 1,
141 IB_PROT_T10DIF_TYPE_3 = 1 << 2,
142};
143
144enum ib_signature_guard_cap {
145 IB_GUARD_T10DIF_CRC = 1,
146 IB_GUARD_T10DIF_CSUM = 1 << 1,
1da177e4
LT
147};
148
149enum ib_atomic_cap {
150 IB_ATOMIC_NONE,
151 IB_ATOMIC_HCA,
152 IB_ATOMIC_GLOB
153};
154
860f10a7
SG
155enum ib_odp_general_cap_bits {
156 IB_ODP_SUPPORT = 1 << 0,
157};
158
159enum ib_odp_transport_cap_bits {
160 IB_ODP_SUPPORT_SEND = 1 << 0,
161 IB_ODP_SUPPORT_RECV = 1 << 1,
162 IB_ODP_SUPPORT_WRITE = 1 << 2,
163 IB_ODP_SUPPORT_READ = 1 << 3,
164 IB_ODP_SUPPORT_ATOMIC = 1 << 4,
165};
166
167struct ib_odp_caps {
168 uint64_t general_caps;
169 struct {
170 uint32_t rc_odp_caps;
171 uint32_t uc_odp_caps;
172 uint32_t ud_odp_caps;
173 } per_transport_caps;
174};
175
1da177e4
LT
176struct ib_device_attr {
177 u64 fw_ver;
97f52eb4 178 __be64 sys_image_guid;
1da177e4
LT
179 u64 max_mr_size;
180 u64 page_size_cap;
181 u32 vendor_id;
182 u32 vendor_part_id;
183 u32 hw_ver;
184 int max_qp;
185 int max_qp_wr;
186 int device_cap_flags;
187 int max_sge;
188 int max_sge_rd;
189 int max_cq;
190 int max_cqe;
191 int max_mr;
192 int max_pd;
193 int max_qp_rd_atom;
194 int max_ee_rd_atom;
195 int max_res_rd_atom;
196 int max_qp_init_rd_atom;
197 int max_ee_init_rd_atom;
198 enum ib_atomic_cap atomic_cap;
5e80ba8f 199 enum ib_atomic_cap masked_atomic_cap;
1da177e4
LT
200 int max_ee;
201 int max_rdd;
202 int max_mw;
203 int max_raw_ipv6_qp;
204 int max_raw_ethy_qp;
205 int max_mcast_grp;
206 int max_mcast_qp_attach;
207 int max_total_mcast_qp_attach;
208 int max_ah;
209 int max_fmr;
210 int max_map_per_fmr;
211 int max_srq;
212 int max_srq_wr;
213 int max_srq_sge;
00f7ec36 214 unsigned int max_fast_reg_page_list_len;
1da177e4
LT
215 u16 max_pkeys;
216 u8 local_ca_ack_delay;
1b01d335
SG
217 int sig_prot_cap;
218 int sig_guard_cap;
860f10a7 219 struct ib_odp_caps odp_caps;
1da177e4
LT
220};
221
222enum ib_mtu {
223 IB_MTU_256 = 1,
224 IB_MTU_512 = 2,
225 IB_MTU_1024 = 3,
226 IB_MTU_2048 = 4,
227 IB_MTU_4096 = 5
228};
229
230static inline int ib_mtu_enum_to_int(enum ib_mtu mtu)
231{
232 switch (mtu) {
233 case IB_MTU_256: return 256;
234 case IB_MTU_512: return 512;
235 case IB_MTU_1024: return 1024;
236 case IB_MTU_2048: return 2048;
237 case IB_MTU_4096: return 4096;
238 default: return -1;
239 }
240}
241
242enum ib_port_state {
243 IB_PORT_NOP = 0,
244 IB_PORT_DOWN = 1,
245 IB_PORT_INIT = 2,
246 IB_PORT_ARMED = 3,
247 IB_PORT_ACTIVE = 4,
248 IB_PORT_ACTIVE_DEFER = 5
249};
250
251enum ib_port_cap_flags {
252 IB_PORT_SM = 1 << 1,
253 IB_PORT_NOTICE_SUP = 1 << 2,
254 IB_PORT_TRAP_SUP = 1 << 3,
255 IB_PORT_OPT_IPD_SUP = 1 << 4,
256 IB_PORT_AUTO_MIGR_SUP = 1 << 5,
257 IB_PORT_SL_MAP_SUP = 1 << 6,
258 IB_PORT_MKEY_NVRAM = 1 << 7,
259 IB_PORT_PKEY_NVRAM = 1 << 8,
260 IB_PORT_LED_INFO_SUP = 1 << 9,
261 IB_PORT_SM_DISABLED = 1 << 10,
262 IB_PORT_SYS_IMAGE_GUID_SUP = 1 << 11,
263 IB_PORT_PKEY_SW_EXT_PORT_TRAP_SUP = 1 << 12,
71eeba16 264 IB_PORT_EXTENDED_SPEEDS_SUP = 1 << 14,
1da177e4
LT
265 IB_PORT_CM_SUP = 1 << 16,
266 IB_PORT_SNMP_TUNNEL_SUP = 1 << 17,
267 IB_PORT_REINIT_SUP = 1 << 18,
268 IB_PORT_DEVICE_MGMT_SUP = 1 << 19,
269 IB_PORT_VENDOR_CLASS_SUP = 1 << 20,
270 IB_PORT_DR_NOTICE_SUP = 1 << 21,
271 IB_PORT_CAP_MASK_NOTICE_SUP = 1 << 22,
272 IB_PORT_BOOT_MGMT_SUP = 1 << 23,
273 IB_PORT_LINK_LATENCY_SUP = 1 << 24,
b4a26a27
MS
274 IB_PORT_CLIENT_REG_SUP = 1 << 25,
275 IB_PORT_IP_BASED_GIDS = 1 << 26
1da177e4
LT
276};
277
278enum ib_port_width {
279 IB_WIDTH_1X = 1,
280 IB_WIDTH_4X = 2,
281 IB_WIDTH_8X = 4,
282 IB_WIDTH_12X = 8
283};
284
285static inline int ib_width_enum_to_int(enum ib_port_width width)
286{
287 switch (width) {
288 case IB_WIDTH_1X: return 1;
289 case IB_WIDTH_4X: return 4;
290 case IB_WIDTH_8X: return 8;
291 case IB_WIDTH_12X: return 12;
292 default: return -1;
293 }
294}
295
2e96691c
OG
296enum ib_port_speed {
297 IB_SPEED_SDR = 1,
298 IB_SPEED_DDR = 2,
299 IB_SPEED_QDR = 4,
300 IB_SPEED_FDR10 = 8,
301 IB_SPEED_FDR = 16,
302 IB_SPEED_EDR = 32
303};
304
7f624d02
SW
305struct ib_protocol_stats {
306 /* TBD... */
307};
308
309struct iw_protocol_stats {
310 u64 ipInReceives;
311 u64 ipInHdrErrors;
312 u64 ipInTooBigErrors;
313 u64 ipInNoRoutes;
314 u64 ipInAddrErrors;
315 u64 ipInUnknownProtos;
316 u64 ipInTruncatedPkts;
317 u64 ipInDiscards;
318 u64 ipInDelivers;
319 u64 ipOutForwDatagrams;
320 u64 ipOutRequests;
321 u64 ipOutDiscards;
322 u64 ipOutNoRoutes;
323 u64 ipReasmTimeout;
324 u64 ipReasmReqds;
325 u64 ipReasmOKs;
326 u64 ipReasmFails;
327 u64 ipFragOKs;
328 u64 ipFragFails;
329 u64 ipFragCreates;
330 u64 ipInMcastPkts;
331 u64 ipOutMcastPkts;
332 u64 ipInBcastPkts;
333 u64 ipOutBcastPkts;
334
335 u64 tcpRtoAlgorithm;
336 u64 tcpRtoMin;
337 u64 tcpRtoMax;
338 u64 tcpMaxConn;
339 u64 tcpActiveOpens;
340 u64 tcpPassiveOpens;
341 u64 tcpAttemptFails;
342 u64 tcpEstabResets;
343 u64 tcpCurrEstab;
344 u64 tcpInSegs;
345 u64 tcpOutSegs;
346 u64 tcpRetransSegs;
347 u64 tcpInErrs;
348 u64 tcpOutRsts;
349};
350
351union rdma_protocol_stats {
352 struct ib_protocol_stats ib;
353 struct iw_protocol_stats iw;
354};
355
f9b22e35
IW
356/* Define bits for the various functionality this port needs to be supported by
357 * the core.
358 */
359/* Management 0x00000FFF */
360#define RDMA_CORE_CAP_IB_MAD 0x00000001
361#define RDMA_CORE_CAP_IB_SMI 0x00000002
362#define RDMA_CORE_CAP_IB_CM 0x00000004
363#define RDMA_CORE_CAP_IW_CM 0x00000008
364#define RDMA_CORE_CAP_IB_SA 0x00000010
365
366/* Address format 0x000FF000 */
367#define RDMA_CORE_CAP_AF_IB 0x00001000
368#define RDMA_CORE_CAP_ETH_AH 0x00002000
369
370/* Protocol 0xFFF00000 */
371#define RDMA_CORE_CAP_PROT_IB 0x00100000
372#define RDMA_CORE_CAP_PROT_ROCE 0x00200000
373#define RDMA_CORE_CAP_PROT_IWARP 0x00400000
374
375#define RDMA_CORE_PORT_IBA_IB (RDMA_CORE_CAP_PROT_IB \
376 | RDMA_CORE_CAP_IB_MAD \
377 | RDMA_CORE_CAP_IB_SMI \
378 | RDMA_CORE_CAP_IB_CM \
379 | RDMA_CORE_CAP_IB_SA \
380 | RDMA_CORE_CAP_AF_IB)
381#define RDMA_CORE_PORT_IBA_ROCE (RDMA_CORE_CAP_PROT_ROCE \
382 | RDMA_CORE_CAP_IB_MAD \
383 | RDMA_CORE_CAP_IB_CM \
f9b22e35
IW
384 | RDMA_CORE_CAP_AF_IB \
385 | RDMA_CORE_CAP_ETH_AH)
386#define RDMA_CORE_PORT_IWARP (RDMA_CORE_CAP_PROT_IWARP \
387 | RDMA_CORE_CAP_IW_CM)
388
1da177e4
LT
389struct ib_port_attr {
390 enum ib_port_state state;
391 enum ib_mtu max_mtu;
392 enum ib_mtu active_mtu;
393 int gid_tbl_len;
394 u32 port_cap_flags;
395 u32 max_msg_sz;
396 u32 bad_pkey_cntr;
397 u32 qkey_viol_cntr;
398 u16 pkey_tbl_len;
399 u16 lid;
400 u16 sm_lid;
401 u8 lmc;
402 u8 max_vl_num;
403 u8 sm_sl;
404 u8 subnet_timeout;
405 u8 init_type_reply;
406 u8 active_width;
407 u8 active_speed;
408 u8 phys_state;
409};
410
411enum ib_device_modify_flags {
c5bcbbb9
RD
412 IB_DEVICE_MODIFY_SYS_IMAGE_GUID = 1 << 0,
413 IB_DEVICE_MODIFY_NODE_DESC = 1 << 1
1da177e4
LT
414};
415
416struct ib_device_modify {
417 u64 sys_image_guid;
c5bcbbb9 418 char node_desc[64];
1da177e4
LT
419};
420
421enum ib_port_modify_flags {
422 IB_PORT_SHUTDOWN = 1,
423 IB_PORT_INIT_TYPE = (1<<2),
424 IB_PORT_RESET_QKEY_CNTR = (1<<3)
425};
426
427struct ib_port_modify {
428 u32 set_port_cap_mask;
429 u32 clr_port_cap_mask;
430 u8 init_type;
431};
432
433enum ib_event_type {
434 IB_EVENT_CQ_ERR,
435 IB_EVENT_QP_FATAL,
436 IB_EVENT_QP_REQ_ERR,
437 IB_EVENT_QP_ACCESS_ERR,
438 IB_EVENT_COMM_EST,
439 IB_EVENT_SQ_DRAINED,
440 IB_EVENT_PATH_MIG,
441 IB_EVENT_PATH_MIG_ERR,
442 IB_EVENT_DEVICE_FATAL,
443 IB_EVENT_PORT_ACTIVE,
444 IB_EVENT_PORT_ERR,
445 IB_EVENT_LID_CHANGE,
446 IB_EVENT_PKEY_CHANGE,
d41fcc67
RD
447 IB_EVENT_SM_CHANGE,
448 IB_EVENT_SRQ_ERR,
449 IB_EVENT_SRQ_LIMIT_REACHED,
63942c9a 450 IB_EVENT_QP_LAST_WQE_REACHED,
761d90ed
OG
451 IB_EVENT_CLIENT_REREGISTER,
452 IB_EVENT_GID_CHANGE,
1da177e4
LT
453};
454
2b1b5b60
SG
455__attribute_const__ const char *ib_event_msg(enum ib_event_type event);
456
1da177e4
LT
457struct ib_event {
458 struct ib_device *device;
459 union {
460 struct ib_cq *cq;
461 struct ib_qp *qp;
d41fcc67 462 struct ib_srq *srq;
1da177e4
LT
463 u8 port_num;
464 } element;
465 enum ib_event_type event;
466};
467
468struct ib_event_handler {
469 struct ib_device *device;
470 void (*handler)(struct ib_event_handler *, struct ib_event *);
471 struct list_head list;
472};
473
474#define INIT_IB_EVENT_HANDLER(_ptr, _device, _handler) \
475 do { \
476 (_ptr)->device = _device; \
477 (_ptr)->handler = _handler; \
478 INIT_LIST_HEAD(&(_ptr)->list); \
479 } while (0)
480
481struct ib_global_route {
482 union ib_gid dgid;
483 u32 flow_label;
484 u8 sgid_index;
485 u8 hop_limit;
486 u8 traffic_class;
487};
488
513789ed 489struct ib_grh {
97f52eb4
SH
490 __be32 version_tclass_flow;
491 __be16 paylen;
513789ed
HR
492 u8 next_hdr;
493 u8 hop_limit;
494 union ib_gid sgid;
495 union ib_gid dgid;
496};
497
1da177e4
LT
498enum {
499 IB_MULTICAST_QPN = 0xffffff
500};
501
f3a7c66b 502#define IB_LID_PERMISSIVE cpu_to_be16(0xFFFF)
97f52eb4 503
1da177e4
LT
504enum ib_ah_flags {
505 IB_AH_GRH = 1
506};
507
bf6a9e31
JM
508enum ib_rate {
509 IB_RATE_PORT_CURRENT = 0,
510 IB_RATE_2_5_GBPS = 2,
511 IB_RATE_5_GBPS = 5,
512 IB_RATE_10_GBPS = 3,
513 IB_RATE_20_GBPS = 6,
514 IB_RATE_30_GBPS = 4,
515 IB_RATE_40_GBPS = 7,
516 IB_RATE_60_GBPS = 8,
517 IB_RATE_80_GBPS = 9,
71eeba16
MA
518 IB_RATE_120_GBPS = 10,
519 IB_RATE_14_GBPS = 11,
520 IB_RATE_56_GBPS = 12,
521 IB_RATE_112_GBPS = 13,
522 IB_RATE_168_GBPS = 14,
523 IB_RATE_25_GBPS = 15,
524 IB_RATE_100_GBPS = 16,
525 IB_RATE_200_GBPS = 17,
526 IB_RATE_300_GBPS = 18
bf6a9e31
JM
527};
528
529/**
530 * ib_rate_to_mult - Convert the IB rate enum to a multiple of the
531 * base rate of 2.5 Gbit/sec. For example, IB_RATE_5_GBPS will be
532 * converted to 2, since 5 Gbit/sec is 2 * 2.5 Gbit/sec.
533 * @rate: rate to convert.
534 */
8385fd84 535__attribute_const__ int ib_rate_to_mult(enum ib_rate rate);
bf6a9e31 536
71eeba16
MA
537/**
538 * ib_rate_to_mbps - Convert the IB rate enum to Mbps.
539 * For example, IB_RATE_2_5_GBPS will be converted to 2500.
540 * @rate: rate to convert.
541 */
8385fd84 542__attribute_const__ int ib_rate_to_mbps(enum ib_rate rate);
71eeba16 543
17cd3a2d
SG
544enum ib_mr_create_flags {
545 IB_MR_SIGNATURE_EN = 1,
546};
547
548/**
549 * ib_mr_init_attr - Memory region init attributes passed to routine
550 * ib_create_mr.
551 * @max_reg_descriptors: max number of registration descriptors that
552 * may be used with registration work requests.
553 * @flags: MR creation flags bit mask.
554 */
555struct ib_mr_init_attr {
556 int max_reg_descriptors;
557 u32 flags;
558};
559
1b01d335 560/**
78eda2bb
SG
561 * Signature types
562 * IB_SIG_TYPE_NONE: Unprotected.
563 * IB_SIG_TYPE_T10_DIF: Type T10-DIF
1b01d335 564 */
78eda2bb
SG
565enum ib_signature_type {
566 IB_SIG_TYPE_NONE,
567 IB_SIG_TYPE_T10_DIF,
1b01d335
SG
568};
569
570/**
571 * Signature T10-DIF block-guard types
572 * IB_T10DIF_CRC: Corresponds to T10-PI mandated CRC checksum rules.
573 * IB_T10DIF_CSUM: Corresponds to IP checksum rules.
574 */
575enum ib_t10_dif_bg_type {
576 IB_T10DIF_CRC,
577 IB_T10DIF_CSUM
578};
579
580/**
581 * struct ib_t10_dif_domain - Parameters specific for T10-DIF
582 * domain.
1b01d335
SG
583 * @bg_type: T10-DIF block guard type (CRC|CSUM)
584 * @pi_interval: protection information interval.
585 * @bg: seed of guard computation.
586 * @app_tag: application tag of guard block
587 * @ref_tag: initial guard block reference tag.
78eda2bb
SG
588 * @ref_remap: Indicate wethear the reftag increments each block
589 * @app_escape: Indicate to skip block check if apptag=0xffff
590 * @ref_escape: Indicate to skip block check if reftag=0xffffffff
591 * @apptag_check_mask: check bitmask of application tag.
1b01d335
SG
592 */
593struct ib_t10_dif_domain {
1b01d335
SG
594 enum ib_t10_dif_bg_type bg_type;
595 u16 pi_interval;
596 u16 bg;
597 u16 app_tag;
598 u32 ref_tag;
78eda2bb
SG
599 bool ref_remap;
600 bool app_escape;
601 bool ref_escape;
602 u16 apptag_check_mask;
1b01d335
SG
603};
604
605/**
606 * struct ib_sig_domain - Parameters for signature domain
607 * @sig_type: specific signauture type
608 * @sig: union of all signature domain attributes that may
609 * be used to set domain layout.
610 */
611struct ib_sig_domain {
612 enum ib_signature_type sig_type;
613 union {
614 struct ib_t10_dif_domain dif;
615 } sig;
616};
617
618/**
619 * struct ib_sig_attrs - Parameters for signature handover operation
620 * @check_mask: bitmask for signature byte check (8 bytes)
621 * @mem: memory domain layout desciptor.
622 * @wire: wire domain layout desciptor.
623 */
624struct ib_sig_attrs {
625 u8 check_mask;
626 struct ib_sig_domain mem;
627 struct ib_sig_domain wire;
628};
629
630enum ib_sig_err_type {
631 IB_SIG_BAD_GUARD,
632 IB_SIG_BAD_REFTAG,
633 IB_SIG_BAD_APPTAG,
634};
635
636/**
637 * struct ib_sig_err - signature error descriptor
638 */
639struct ib_sig_err {
640 enum ib_sig_err_type err_type;
641 u32 expected;
642 u32 actual;
643 u64 sig_err_offset;
644 u32 key;
645};
646
647enum ib_mr_status_check {
648 IB_MR_CHECK_SIG_STATUS = 1,
649};
650
651/**
652 * struct ib_mr_status - Memory region status container
653 *
654 * @fail_status: Bitmask of MR checks status. For each
655 * failed check a corresponding status bit is set.
656 * @sig_err: Additional info for IB_MR_CEHCK_SIG_STATUS
657 * failure.
658 */
659struct ib_mr_status {
660 u32 fail_status;
661 struct ib_sig_err sig_err;
662};
663
bf6a9e31
JM
664/**
665 * mult_to_ib_rate - Convert a multiple of 2.5 Gbit/sec to an IB rate
666 * enum.
667 * @mult: multiple to convert.
668 */
8385fd84 669__attribute_const__ enum ib_rate mult_to_ib_rate(int mult);
bf6a9e31 670
1da177e4
LT
671struct ib_ah_attr {
672 struct ib_global_route grh;
673 u16 dlid;
674 u8 sl;
675 u8 src_path_bits;
676 u8 static_rate;
677 u8 ah_flags;
678 u8 port_num;
dd5f03be
MB
679 u8 dmac[ETH_ALEN];
680 u16 vlan_id;
1da177e4
LT
681};
682
683enum ib_wc_status {
684 IB_WC_SUCCESS,
685 IB_WC_LOC_LEN_ERR,
686 IB_WC_LOC_QP_OP_ERR,
687 IB_WC_LOC_EEC_OP_ERR,
688 IB_WC_LOC_PROT_ERR,
689 IB_WC_WR_FLUSH_ERR,
690 IB_WC_MW_BIND_ERR,
691 IB_WC_BAD_RESP_ERR,
692 IB_WC_LOC_ACCESS_ERR,
693 IB_WC_REM_INV_REQ_ERR,
694 IB_WC_REM_ACCESS_ERR,
695 IB_WC_REM_OP_ERR,
696 IB_WC_RETRY_EXC_ERR,
697 IB_WC_RNR_RETRY_EXC_ERR,
698 IB_WC_LOC_RDD_VIOL_ERR,
699 IB_WC_REM_INV_RD_REQ_ERR,
700 IB_WC_REM_ABORT_ERR,
701 IB_WC_INV_EECN_ERR,
702 IB_WC_INV_EEC_STATE_ERR,
703 IB_WC_FATAL_ERR,
704 IB_WC_RESP_TIMEOUT_ERR,
705 IB_WC_GENERAL_ERR
706};
707
2b1b5b60
SG
708__attribute_const__ const char *ib_wc_status_msg(enum ib_wc_status status);
709
1da177e4
LT
710enum ib_wc_opcode {
711 IB_WC_SEND,
712 IB_WC_RDMA_WRITE,
713 IB_WC_RDMA_READ,
714 IB_WC_COMP_SWAP,
715 IB_WC_FETCH_ADD,
716 IB_WC_BIND_MW,
c93570f2 717 IB_WC_LSO,
00f7ec36
SW
718 IB_WC_LOCAL_INV,
719 IB_WC_FAST_REG_MR,
5e80ba8f
VS
720 IB_WC_MASKED_COMP_SWAP,
721 IB_WC_MASKED_FETCH_ADD,
1da177e4
LT
722/*
723 * Set value of IB_WC_RECV so consumers can test if a completion is a
724 * receive by testing (opcode & IB_WC_RECV).
725 */
726 IB_WC_RECV = 1 << 7,
727 IB_WC_RECV_RDMA_WITH_IMM
728};
729
730enum ib_wc_flags {
731 IB_WC_GRH = 1,
00f7ec36
SW
732 IB_WC_WITH_IMM = (1<<1),
733 IB_WC_WITH_INVALIDATE = (1<<2),
d927d505 734 IB_WC_IP_CSUM_OK = (1<<3),
dd5f03be
MB
735 IB_WC_WITH_SMAC = (1<<4),
736 IB_WC_WITH_VLAN = (1<<5),
1da177e4
LT
737};
738
739struct ib_wc {
740 u64 wr_id;
741 enum ib_wc_status status;
742 enum ib_wc_opcode opcode;
743 u32 vendor_err;
744 u32 byte_len;
062dbb69 745 struct ib_qp *qp;
00f7ec36
SW
746 union {
747 __be32 imm_data;
748 u32 invalidate_rkey;
749 } ex;
1da177e4
LT
750 u32 src_qp;
751 int wc_flags;
752 u16 pkey_index;
753 u16 slid;
754 u8 sl;
755 u8 dlid_path_bits;
756 u8 port_num; /* valid only for DR SMPs on switches */
dd5f03be
MB
757 u8 smac[ETH_ALEN];
758 u16 vlan_id;
1da177e4
LT
759};
760
ed23a727
RD
761enum ib_cq_notify_flags {
762 IB_CQ_SOLICITED = 1 << 0,
763 IB_CQ_NEXT_COMP = 1 << 1,
764 IB_CQ_SOLICITED_MASK = IB_CQ_SOLICITED | IB_CQ_NEXT_COMP,
765 IB_CQ_REPORT_MISSED_EVENTS = 1 << 2,
1da177e4
LT
766};
767
96104eda 768enum ib_srq_type {
418d5130
SH
769 IB_SRQT_BASIC,
770 IB_SRQT_XRC
96104eda
SH
771};
772
d41fcc67
RD
773enum ib_srq_attr_mask {
774 IB_SRQ_MAX_WR = 1 << 0,
775 IB_SRQ_LIMIT = 1 << 1,
776};
777
778struct ib_srq_attr {
779 u32 max_wr;
780 u32 max_sge;
781 u32 srq_limit;
782};
783
784struct ib_srq_init_attr {
785 void (*event_handler)(struct ib_event *, void *);
786 void *srq_context;
787 struct ib_srq_attr attr;
96104eda 788 enum ib_srq_type srq_type;
418d5130
SH
789
790 union {
791 struct {
792 struct ib_xrcd *xrcd;
793 struct ib_cq *cq;
794 } xrc;
795 } ext;
d41fcc67
RD
796};
797
1da177e4
LT
798struct ib_qp_cap {
799 u32 max_send_wr;
800 u32 max_recv_wr;
801 u32 max_send_sge;
802 u32 max_recv_sge;
803 u32 max_inline_data;
804};
805
806enum ib_sig_type {
807 IB_SIGNAL_ALL_WR,
808 IB_SIGNAL_REQ_WR
809};
810
811enum ib_qp_type {
812 /*
813 * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
814 * here (and in that order) since the MAD layer uses them as
815 * indices into a 2-entry table.
816 */
817 IB_QPT_SMI,
818 IB_QPT_GSI,
819
820 IB_QPT_RC,
821 IB_QPT_UC,
822 IB_QPT_UD,
823 IB_QPT_RAW_IPV6,
b42b63cf 824 IB_QPT_RAW_ETHERTYPE,
c938a616 825 IB_QPT_RAW_PACKET = 8,
b42b63cf
SH
826 IB_QPT_XRC_INI = 9,
827 IB_QPT_XRC_TGT,
0134f16b
JM
828 IB_QPT_MAX,
829 /* Reserve a range for qp types internal to the low level driver.
830 * These qp types will not be visible at the IB core layer, so the
831 * IB_QPT_MAX usages should not be affected in the core layer
832 */
833 IB_QPT_RESERVED1 = 0x1000,
834 IB_QPT_RESERVED2,
835 IB_QPT_RESERVED3,
836 IB_QPT_RESERVED4,
837 IB_QPT_RESERVED5,
838 IB_QPT_RESERVED6,
839 IB_QPT_RESERVED7,
840 IB_QPT_RESERVED8,
841 IB_QPT_RESERVED9,
842 IB_QPT_RESERVED10,
1da177e4
LT
843};
844
b846f25a 845enum ib_qp_create_flags {
47ee1b9f
RL
846 IB_QP_CREATE_IPOIB_UD_LSO = 1 << 0,
847 IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK = 1 << 1,
90f1d1b4 848 IB_QP_CREATE_NETIF_QP = 1 << 5,
1b01d335 849 IB_QP_CREATE_SIGNATURE_EN = 1 << 6,
09b93088 850 IB_QP_CREATE_USE_GFP_NOIO = 1 << 7,
d2b57063
JM
851 /* reserve bits 26-31 for low level drivers' internal use */
852 IB_QP_CREATE_RESERVED_START = 1 << 26,
853 IB_QP_CREATE_RESERVED_END = 1 << 31,
b846f25a
EC
854};
855
73c40c61
YH
856
857/*
858 * Note: users may not call ib_close_qp or ib_destroy_qp from the event_handler
859 * callback to destroy the passed in QP.
860 */
861
1da177e4
LT
862struct ib_qp_init_attr {
863 void (*event_handler)(struct ib_event *, void *);
864 void *qp_context;
865 struct ib_cq *send_cq;
866 struct ib_cq *recv_cq;
867 struct ib_srq *srq;
b42b63cf 868 struct ib_xrcd *xrcd; /* XRC TGT QPs only */
1da177e4
LT
869 struct ib_qp_cap cap;
870 enum ib_sig_type sq_sig_type;
871 enum ib_qp_type qp_type;
b846f25a 872 enum ib_qp_create_flags create_flags;
1da177e4
LT
873 u8 port_num; /* special QP types only */
874};
875
0e0ec7e0
SH
876struct ib_qp_open_attr {
877 void (*event_handler)(struct ib_event *, void *);
878 void *qp_context;
879 u32 qp_num;
880 enum ib_qp_type qp_type;
881};
882
1da177e4
LT
883enum ib_rnr_timeout {
884 IB_RNR_TIMER_655_36 = 0,
885 IB_RNR_TIMER_000_01 = 1,
886 IB_RNR_TIMER_000_02 = 2,
887 IB_RNR_TIMER_000_03 = 3,
888 IB_RNR_TIMER_000_04 = 4,
889 IB_RNR_TIMER_000_06 = 5,
890 IB_RNR_TIMER_000_08 = 6,
891 IB_RNR_TIMER_000_12 = 7,
892 IB_RNR_TIMER_000_16 = 8,
893 IB_RNR_TIMER_000_24 = 9,
894 IB_RNR_TIMER_000_32 = 10,
895 IB_RNR_TIMER_000_48 = 11,
896 IB_RNR_TIMER_000_64 = 12,
897 IB_RNR_TIMER_000_96 = 13,
898 IB_RNR_TIMER_001_28 = 14,
899 IB_RNR_TIMER_001_92 = 15,
900 IB_RNR_TIMER_002_56 = 16,
901 IB_RNR_TIMER_003_84 = 17,
902 IB_RNR_TIMER_005_12 = 18,
903 IB_RNR_TIMER_007_68 = 19,
904 IB_RNR_TIMER_010_24 = 20,
905 IB_RNR_TIMER_015_36 = 21,
906 IB_RNR_TIMER_020_48 = 22,
907 IB_RNR_TIMER_030_72 = 23,
908 IB_RNR_TIMER_040_96 = 24,
909 IB_RNR_TIMER_061_44 = 25,
910 IB_RNR_TIMER_081_92 = 26,
911 IB_RNR_TIMER_122_88 = 27,
912 IB_RNR_TIMER_163_84 = 28,
913 IB_RNR_TIMER_245_76 = 29,
914 IB_RNR_TIMER_327_68 = 30,
915 IB_RNR_TIMER_491_52 = 31
916};
917
918enum ib_qp_attr_mask {
919 IB_QP_STATE = 1,
920 IB_QP_CUR_STATE = (1<<1),
921 IB_QP_EN_SQD_ASYNC_NOTIFY = (1<<2),
922 IB_QP_ACCESS_FLAGS = (1<<3),
923 IB_QP_PKEY_INDEX = (1<<4),
924 IB_QP_PORT = (1<<5),
925 IB_QP_QKEY = (1<<6),
926 IB_QP_AV = (1<<7),
927 IB_QP_PATH_MTU = (1<<8),
928 IB_QP_TIMEOUT = (1<<9),
929 IB_QP_RETRY_CNT = (1<<10),
930 IB_QP_RNR_RETRY = (1<<11),
931 IB_QP_RQ_PSN = (1<<12),
932 IB_QP_MAX_QP_RD_ATOMIC = (1<<13),
933 IB_QP_ALT_PATH = (1<<14),
934 IB_QP_MIN_RNR_TIMER = (1<<15),
935 IB_QP_SQ_PSN = (1<<16),
936 IB_QP_MAX_DEST_RD_ATOMIC = (1<<17),
937 IB_QP_PATH_MIG_STATE = (1<<18),
938 IB_QP_CAP = (1<<19),
dd5f03be
MB
939 IB_QP_DEST_QPN = (1<<20),
940 IB_QP_SMAC = (1<<21),
941 IB_QP_ALT_SMAC = (1<<22),
942 IB_QP_VID = (1<<23),
943 IB_QP_ALT_VID = (1<<24),
1da177e4
LT
944};
945
946enum ib_qp_state {
947 IB_QPS_RESET,
948 IB_QPS_INIT,
949 IB_QPS_RTR,
950 IB_QPS_RTS,
951 IB_QPS_SQD,
952 IB_QPS_SQE,
953 IB_QPS_ERR
954};
955
956enum ib_mig_state {
957 IB_MIG_MIGRATED,
958 IB_MIG_REARM,
959 IB_MIG_ARMED
960};
961
7083e42e
SM
962enum ib_mw_type {
963 IB_MW_TYPE_1 = 1,
964 IB_MW_TYPE_2 = 2
965};
966
1da177e4
LT
967struct ib_qp_attr {
968 enum ib_qp_state qp_state;
969 enum ib_qp_state cur_qp_state;
970 enum ib_mtu path_mtu;
971 enum ib_mig_state path_mig_state;
972 u32 qkey;
973 u32 rq_psn;
974 u32 sq_psn;
975 u32 dest_qp_num;
976 int qp_access_flags;
977 struct ib_qp_cap cap;
978 struct ib_ah_attr ah_attr;
979 struct ib_ah_attr alt_ah_attr;
980 u16 pkey_index;
981 u16 alt_pkey_index;
982 u8 en_sqd_async_notify;
983 u8 sq_draining;
984 u8 max_rd_atomic;
985 u8 max_dest_rd_atomic;
986 u8 min_rnr_timer;
987 u8 port_num;
988 u8 timeout;
989 u8 retry_cnt;
990 u8 rnr_retry;
991 u8 alt_port_num;
992 u8 alt_timeout;
dd5f03be
MB
993 u8 smac[ETH_ALEN];
994 u8 alt_smac[ETH_ALEN];
995 u16 vlan_id;
996 u16 alt_vlan_id;
1da177e4
LT
997};
998
999enum ib_wr_opcode {
1000 IB_WR_RDMA_WRITE,
1001 IB_WR_RDMA_WRITE_WITH_IMM,
1002 IB_WR_SEND,
1003 IB_WR_SEND_WITH_IMM,
1004 IB_WR_RDMA_READ,
1005 IB_WR_ATOMIC_CMP_AND_SWP,
c93570f2 1006 IB_WR_ATOMIC_FETCH_AND_ADD,
0f39cf3d
RD
1007 IB_WR_LSO,
1008 IB_WR_SEND_WITH_INV,
00f7ec36
SW
1009 IB_WR_RDMA_READ_WITH_INV,
1010 IB_WR_LOCAL_INV,
1011 IB_WR_FAST_REG_MR,
5e80ba8f
VS
1012 IB_WR_MASKED_ATOMIC_CMP_AND_SWP,
1013 IB_WR_MASKED_ATOMIC_FETCH_AND_ADD,
7083e42e 1014 IB_WR_BIND_MW,
1b01d335 1015 IB_WR_REG_SIG_MR,
0134f16b
JM
1016 /* reserve values for low level drivers' internal use.
1017 * These values will not be used at all in the ib core layer.
1018 */
1019 IB_WR_RESERVED1 = 0xf0,
1020 IB_WR_RESERVED2,
1021 IB_WR_RESERVED3,
1022 IB_WR_RESERVED4,
1023 IB_WR_RESERVED5,
1024 IB_WR_RESERVED6,
1025 IB_WR_RESERVED7,
1026 IB_WR_RESERVED8,
1027 IB_WR_RESERVED9,
1028 IB_WR_RESERVED10,
1da177e4
LT
1029};
1030
1031enum ib_send_flags {
1032 IB_SEND_FENCE = 1,
1033 IB_SEND_SIGNALED = (1<<1),
1034 IB_SEND_SOLICITED = (1<<2),
e0605d91 1035 IB_SEND_INLINE = (1<<3),
0134f16b
JM
1036 IB_SEND_IP_CSUM = (1<<4),
1037
1038 /* reserve bits 26-31 for low level drivers' internal use */
1039 IB_SEND_RESERVED_START = (1 << 26),
1040 IB_SEND_RESERVED_END = (1 << 31),
1da177e4
LT
1041};
1042
1043struct ib_sge {
1044 u64 addr;
1045 u32 length;
1046 u32 lkey;
1047};
1048
00f7ec36
SW
1049struct ib_fast_reg_page_list {
1050 struct ib_device *device;
1051 u64 *page_list;
1052 unsigned int max_page_list_len;
1053};
1054
7083e42e
SM
1055/**
1056 * struct ib_mw_bind_info - Parameters for a memory window bind operation.
1057 * @mr: A memory region to bind the memory window to.
1058 * @addr: The address where the memory window should begin.
1059 * @length: The length of the memory window, in bytes.
1060 * @mw_access_flags: Access flags from enum ib_access_flags for the window.
1061 *
1062 * This struct contains the shared parameters for type 1 and type 2
1063 * memory window bind operations.
1064 */
1065struct ib_mw_bind_info {
1066 struct ib_mr *mr;
1067 u64 addr;
1068 u64 length;
1069 int mw_access_flags;
1070};
1071
1da177e4
LT
1072struct ib_send_wr {
1073 struct ib_send_wr *next;
1074 u64 wr_id;
1075 struct ib_sge *sg_list;
1076 int num_sge;
1077 enum ib_wr_opcode opcode;
1078 int send_flags;
0f39cf3d
RD
1079 union {
1080 __be32 imm_data;
1081 u32 invalidate_rkey;
1082 } ex;
1da177e4
LT
1083 union {
1084 struct {
1085 u64 remote_addr;
1086 u32 rkey;
1087 } rdma;
1088 struct {
1089 u64 remote_addr;
1090 u64 compare_add;
1091 u64 swap;
5e80ba8f
VS
1092 u64 compare_add_mask;
1093 u64 swap_mask;
1da177e4
LT
1094 u32 rkey;
1095 } atomic;
1096 struct {
1097 struct ib_ah *ah;
c93570f2
EC
1098 void *header;
1099 int hlen;
1100 int mss;
1da177e4
LT
1101 u32 remote_qpn;
1102 u32 remote_qkey;
1da177e4
LT
1103 u16 pkey_index; /* valid for GSI only */
1104 u8 port_num; /* valid for DR SMPs on switch only */
1105 } ud;
00f7ec36
SW
1106 struct {
1107 u64 iova_start;
1108 struct ib_fast_reg_page_list *page_list;
1109 unsigned int page_shift;
1110 unsigned int page_list_len;
1111 u32 length;
1112 int access_flags;
1113 u32 rkey;
1114 } fast_reg;
7083e42e
SM
1115 struct {
1116 struct ib_mw *mw;
1117 /* The new rkey for the memory window. */
1118 u32 rkey;
1119 struct ib_mw_bind_info bind_info;
1120 } bind_mw;
1b01d335
SG
1121 struct {
1122 struct ib_sig_attrs *sig_attrs;
1123 struct ib_mr *sig_mr;
1124 int access_flags;
1125 struct ib_sge *prot;
1126 } sig_handover;
1da177e4 1127 } wr;
b42b63cf 1128 u32 xrc_remote_srq_num; /* XRC TGT QPs only */
1da177e4
LT
1129};
1130
1131struct ib_recv_wr {
1132 struct ib_recv_wr *next;
1133 u64 wr_id;
1134 struct ib_sge *sg_list;
1135 int num_sge;
1136};
1137
1138enum ib_access_flags {
1139 IB_ACCESS_LOCAL_WRITE = 1,
1140 IB_ACCESS_REMOTE_WRITE = (1<<1),
1141 IB_ACCESS_REMOTE_READ = (1<<2),
1142 IB_ACCESS_REMOTE_ATOMIC = (1<<3),
7083e42e 1143 IB_ACCESS_MW_BIND = (1<<4),
860f10a7
SG
1144 IB_ZERO_BASED = (1<<5),
1145 IB_ACCESS_ON_DEMAND = (1<<6),
1da177e4
LT
1146};
1147
1148struct ib_phys_buf {
1149 u64 addr;
1150 u64 size;
1151};
1152
1153struct ib_mr_attr {
1154 struct ib_pd *pd;
1155 u64 device_virt_addr;
1156 u64 size;
1157 int mr_access_flags;
1158 u32 lkey;
1159 u32 rkey;
1160};
1161
1162enum ib_mr_rereg_flags {
1163 IB_MR_REREG_TRANS = 1,
1164 IB_MR_REREG_PD = (1<<1),
7e6edb9b
MB
1165 IB_MR_REREG_ACCESS = (1<<2),
1166 IB_MR_REREG_SUPPORTED = ((IB_MR_REREG_ACCESS << 1) - 1)
1da177e4
LT
1167};
1168
7083e42e
SM
1169/**
1170 * struct ib_mw_bind - Parameters for a type 1 memory window bind operation.
1171 * @wr_id: Work request id.
1172 * @send_flags: Flags from ib_send_flags enum.
1173 * @bind_info: More parameters of the bind operation.
1174 */
1da177e4 1175struct ib_mw_bind {
7083e42e
SM
1176 u64 wr_id;
1177 int send_flags;
1178 struct ib_mw_bind_info bind_info;
1da177e4
LT
1179};
1180
1181struct ib_fmr_attr {
1182 int max_pages;
1183 int max_maps;
d36f34aa 1184 u8 page_shift;
1da177e4
LT
1185};
1186
882214e2
HE
1187struct ib_umem;
1188
e2773c06
RD
1189struct ib_ucontext {
1190 struct ib_device *device;
1191 struct list_head pd_list;
1192 struct list_head mr_list;
1193 struct list_head mw_list;
1194 struct list_head cq_list;
1195 struct list_head qp_list;
1196 struct list_head srq_list;
1197 struct list_head ah_list;
53d0bd1e 1198 struct list_head xrcd_list;
436f2ad0 1199 struct list_head rule_list;
f7c6a7b5 1200 int closing;
8ada2c1c
SR
1201
1202 struct pid *tgid;
882214e2
HE
1203#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
1204 struct rb_root umem_tree;
1205 /*
1206 * Protects .umem_rbroot and tree, as well as odp_mrs_count and
1207 * mmu notifiers registration.
1208 */
1209 struct rw_semaphore umem_rwsem;
1210 void (*invalidate_range)(struct ib_umem *umem,
1211 unsigned long start, unsigned long end);
1212
1213 struct mmu_notifier mn;
1214 atomic_t notifier_count;
1215 /* A list of umems that don't have private mmu notifier counters yet. */
1216 struct list_head no_private_counters;
1217 int odp_mrs_count;
1218#endif
e2773c06
RD
1219};
1220
1221struct ib_uobject {
1222 u64 user_handle; /* handle given to us by userspace */
1223 struct ib_ucontext *context; /* associated user context */
9ead190b 1224 void *object; /* containing object */
e2773c06 1225 struct list_head list; /* link to context's list */
b3d636b0 1226 int id; /* index into kernel idr */
9ead190b
RD
1227 struct kref ref;
1228 struct rw_semaphore mutex; /* protects .live */
1229 int live;
e2773c06
RD
1230};
1231
e2773c06 1232struct ib_udata {
309243ec 1233 const void __user *inbuf;
e2773c06
RD
1234 void __user *outbuf;
1235 size_t inlen;
1236 size_t outlen;
1237};
1238
1da177e4 1239struct ib_pd {
e2773c06
RD
1240 struct ib_device *device;
1241 struct ib_uobject *uobject;
1242 atomic_t usecnt; /* count all resources */
1da177e4
LT
1243};
1244
59991f94
SH
1245struct ib_xrcd {
1246 struct ib_device *device;
d3d72d90 1247 atomic_t usecnt; /* count all exposed resources */
53d0bd1e 1248 struct inode *inode;
d3d72d90
SH
1249
1250 struct mutex tgt_qp_mutex;
1251 struct list_head tgt_qp_list;
59991f94
SH
1252};
1253
1da177e4
LT
1254struct ib_ah {
1255 struct ib_device *device;
1256 struct ib_pd *pd;
e2773c06 1257 struct ib_uobject *uobject;
1da177e4
LT
1258};
1259
1260typedef void (*ib_comp_handler)(struct ib_cq *cq, void *cq_context);
1261
1262struct ib_cq {
e2773c06
RD
1263 struct ib_device *device;
1264 struct ib_uobject *uobject;
1265 ib_comp_handler comp_handler;
1266 void (*event_handler)(struct ib_event *, void *);
4deccd6d 1267 void *cq_context;
e2773c06
RD
1268 int cqe;
1269 atomic_t usecnt; /* count number of work queues */
1da177e4
LT
1270};
1271
1272struct ib_srq {
d41fcc67
RD
1273 struct ib_device *device;
1274 struct ib_pd *pd;
1275 struct ib_uobject *uobject;
1276 void (*event_handler)(struct ib_event *, void *);
1277 void *srq_context;
96104eda 1278 enum ib_srq_type srq_type;
1da177e4 1279 atomic_t usecnt;
418d5130
SH
1280
1281 union {
1282 struct {
1283 struct ib_xrcd *xrcd;
1284 struct ib_cq *cq;
1285 u32 srq_num;
1286 } xrc;
1287 } ext;
1da177e4
LT
1288};
1289
1290struct ib_qp {
1291 struct ib_device *device;
1292 struct ib_pd *pd;
1293 struct ib_cq *send_cq;
1294 struct ib_cq *recv_cq;
1295 struct ib_srq *srq;
b42b63cf 1296 struct ib_xrcd *xrcd; /* XRC TGT QPs only */
d3d72d90 1297 struct list_head xrcd_list;
319a441d
HHZ
1298 /* count times opened, mcast attaches, flow attaches */
1299 atomic_t usecnt;
0e0ec7e0
SH
1300 struct list_head open_list;
1301 struct ib_qp *real_qp;
e2773c06 1302 struct ib_uobject *uobject;
1da177e4
LT
1303 void (*event_handler)(struct ib_event *, void *);
1304 void *qp_context;
1305 u32 qp_num;
1306 enum ib_qp_type qp_type;
1307};
1308
1309struct ib_mr {
e2773c06
RD
1310 struct ib_device *device;
1311 struct ib_pd *pd;
1312 struct ib_uobject *uobject;
1313 u32 lkey;
1314 u32 rkey;
1315 atomic_t usecnt; /* count number of MWs */
1da177e4
LT
1316};
1317
1318struct ib_mw {
1319 struct ib_device *device;
1320 struct ib_pd *pd;
e2773c06 1321 struct ib_uobject *uobject;
1da177e4 1322 u32 rkey;
7083e42e 1323 enum ib_mw_type type;
1da177e4
LT
1324};
1325
1326struct ib_fmr {
1327 struct ib_device *device;
1328 struct ib_pd *pd;
1329 struct list_head list;
1330 u32 lkey;
1331 u32 rkey;
1332};
1333
319a441d
HHZ
1334/* Supported steering options */
1335enum ib_flow_attr_type {
1336 /* steering according to rule specifications */
1337 IB_FLOW_ATTR_NORMAL = 0x0,
1338 /* default unicast and multicast rule -
1339 * receive all Eth traffic which isn't steered to any QP
1340 */
1341 IB_FLOW_ATTR_ALL_DEFAULT = 0x1,
1342 /* default multicast rule -
1343 * receive all Eth multicast traffic which isn't steered to any QP
1344 */
1345 IB_FLOW_ATTR_MC_DEFAULT = 0x2,
1346 /* sniffer rule - receive all port traffic */
1347 IB_FLOW_ATTR_SNIFFER = 0x3
1348};
1349
1350/* Supported steering header types */
1351enum ib_flow_spec_type {
1352 /* L2 headers*/
1353 IB_FLOW_SPEC_ETH = 0x20,
240ae00e 1354 IB_FLOW_SPEC_IB = 0x22,
319a441d
HHZ
1355 /* L3 header*/
1356 IB_FLOW_SPEC_IPV4 = 0x30,
1357 /* L4 headers*/
1358 IB_FLOW_SPEC_TCP = 0x40,
1359 IB_FLOW_SPEC_UDP = 0x41
1360};
240ae00e 1361#define IB_FLOW_SPEC_LAYER_MASK 0xF0
22878dbc
MB
1362#define IB_FLOW_SPEC_SUPPORT_LAYERS 4
1363
319a441d
HHZ
1364/* Flow steering rule priority is set according to it's domain.
1365 * Lower domain value means higher priority.
1366 */
1367enum ib_flow_domain {
1368 IB_FLOW_DOMAIN_USER,
1369 IB_FLOW_DOMAIN_ETHTOOL,
1370 IB_FLOW_DOMAIN_RFS,
1371 IB_FLOW_DOMAIN_NIC,
1372 IB_FLOW_DOMAIN_NUM /* Must be last */
1373};
1374
1375struct ib_flow_eth_filter {
1376 u8 dst_mac[6];
1377 u8 src_mac[6];
1378 __be16 ether_type;
1379 __be16 vlan_tag;
1380};
1381
1382struct ib_flow_spec_eth {
1383 enum ib_flow_spec_type type;
1384 u16 size;
1385 struct ib_flow_eth_filter val;
1386 struct ib_flow_eth_filter mask;
1387};
1388
240ae00e
MB
1389struct ib_flow_ib_filter {
1390 __be16 dlid;
1391 __u8 sl;
1392};
1393
1394struct ib_flow_spec_ib {
1395 enum ib_flow_spec_type type;
1396 u16 size;
1397 struct ib_flow_ib_filter val;
1398 struct ib_flow_ib_filter mask;
1399};
1400
319a441d
HHZ
1401struct ib_flow_ipv4_filter {
1402 __be32 src_ip;
1403 __be32 dst_ip;
1404};
1405
1406struct ib_flow_spec_ipv4 {
1407 enum ib_flow_spec_type type;
1408 u16 size;
1409 struct ib_flow_ipv4_filter val;
1410 struct ib_flow_ipv4_filter mask;
1411};
1412
1413struct ib_flow_tcp_udp_filter {
1414 __be16 dst_port;
1415 __be16 src_port;
1416};
1417
1418struct ib_flow_spec_tcp_udp {
1419 enum ib_flow_spec_type type;
1420 u16 size;
1421 struct ib_flow_tcp_udp_filter val;
1422 struct ib_flow_tcp_udp_filter mask;
1423};
1424
1425union ib_flow_spec {
1426 struct {
1427 enum ib_flow_spec_type type;
1428 u16 size;
1429 };
1430 struct ib_flow_spec_eth eth;
240ae00e 1431 struct ib_flow_spec_ib ib;
319a441d
HHZ
1432 struct ib_flow_spec_ipv4 ipv4;
1433 struct ib_flow_spec_tcp_udp tcp_udp;
1434};
1435
1436struct ib_flow_attr {
1437 enum ib_flow_attr_type type;
1438 u16 size;
1439 u16 priority;
1440 u32 flags;
1441 u8 num_of_specs;
1442 u8 port;
1443 /* Following are the optional layers according to user request
1444 * struct ib_flow_spec_xxx
1445 * struct ib_flow_spec_yyy
1446 */
1447};
1448
1449struct ib_flow {
1450 struct ib_qp *qp;
1451 struct ib_uobject *uobject;
1452};
1453
1da177e4
LT
1454struct ib_mad;
1455struct ib_grh;
1456
1457enum ib_process_mad_flags {
1458 IB_MAD_IGNORE_MKEY = 1,
1459 IB_MAD_IGNORE_BKEY = 2,
1460 IB_MAD_IGNORE_ALL = IB_MAD_IGNORE_MKEY | IB_MAD_IGNORE_BKEY
1461};
1462
1463enum ib_mad_result {
1464 IB_MAD_RESULT_FAILURE = 0, /* (!SUCCESS is the important flag) */
1465 IB_MAD_RESULT_SUCCESS = 1 << 0, /* MAD was successfully processed */
1466 IB_MAD_RESULT_REPLY = 1 << 1, /* Reply packet needs to be sent */
1467 IB_MAD_RESULT_CONSUMED = 1 << 2 /* Packet consumed: stop processing */
1468};
1469
1470#define IB_DEVICE_NAME_MAX 64
1471
1472struct ib_cache {
1473 rwlock_t lock;
1474 struct ib_event_handler event_handler;
1475 struct ib_pkey_cache **pkey_cache;
1476 struct ib_gid_cache **gid_cache;
6fb9cdbf 1477 u8 *lmc_cache;
1da177e4
LT
1478};
1479
9b513090
RC
1480struct ib_dma_mapping_ops {
1481 int (*mapping_error)(struct ib_device *dev,
1482 u64 dma_addr);
1483 u64 (*map_single)(struct ib_device *dev,
1484 void *ptr, size_t size,
1485 enum dma_data_direction direction);
1486 void (*unmap_single)(struct ib_device *dev,
1487 u64 addr, size_t size,
1488 enum dma_data_direction direction);
1489 u64 (*map_page)(struct ib_device *dev,
1490 struct page *page, unsigned long offset,
1491 size_t size,
1492 enum dma_data_direction direction);
1493 void (*unmap_page)(struct ib_device *dev,
1494 u64 addr, size_t size,
1495 enum dma_data_direction direction);
1496 int (*map_sg)(struct ib_device *dev,
1497 struct scatterlist *sg, int nents,
1498 enum dma_data_direction direction);
1499 void (*unmap_sg)(struct ib_device *dev,
1500 struct scatterlist *sg, int nents,
1501 enum dma_data_direction direction);
9b513090
RC
1502 void (*sync_single_for_cpu)(struct ib_device *dev,
1503 u64 dma_handle,
1504 size_t size,
4deccd6d 1505 enum dma_data_direction dir);
9b513090
RC
1506 void (*sync_single_for_device)(struct ib_device *dev,
1507 u64 dma_handle,
1508 size_t size,
1509 enum dma_data_direction dir);
1510 void *(*alloc_coherent)(struct ib_device *dev,
1511 size_t size,
1512 u64 *dma_handle,
1513 gfp_t flag);
1514 void (*free_coherent)(struct ib_device *dev,
1515 size_t size, void *cpu_addr,
1516 u64 dma_handle);
1517};
1518
07ebafba
TT
1519struct iw_cm_verbs;
1520
7738613e
IW
1521struct ib_port_immutable {
1522 int pkey_tbl_len;
1523 int gid_tbl_len;
f9b22e35 1524 u32 core_cap_flags;
7738613e
IW
1525};
1526
1da177e4
LT
1527struct ib_device {
1528 struct device *dma_device;
1529
1530 char name[IB_DEVICE_NAME_MAX];
1531
1532 struct list_head event_handler_list;
1533 spinlock_t event_handler_lock;
1534
17a55f79 1535 spinlock_t client_data_lock;
1da177e4
LT
1536 struct list_head core_list;
1537 struct list_head client_data_list;
1da177e4
LT
1538
1539 struct ib_cache cache;
7738613e
IW
1540 /**
1541 * port_immutable is indexed by port number
1542 */
1543 struct ib_port_immutable *port_immutable;
1da177e4 1544
f4fd0b22
MT
1545 int num_comp_vectors;
1546
07ebafba
TT
1547 struct iw_cm_verbs *iwcm;
1548
7f624d02
SW
1549 int (*get_protocol_stats)(struct ib_device *device,
1550 union rdma_protocol_stats *stats);
1da177e4
LT
1551 int (*query_device)(struct ib_device *device,
1552 struct ib_device_attr *device_attr);
1553 int (*query_port)(struct ib_device *device,
1554 u8 port_num,
1555 struct ib_port_attr *port_attr);
a3f5adaf
EC
1556 enum rdma_link_layer (*get_link_layer)(struct ib_device *device,
1557 u8 port_num);
1da177e4
LT
1558 int (*query_gid)(struct ib_device *device,
1559 u8 port_num, int index,
1560 union ib_gid *gid);
1561 int (*query_pkey)(struct ib_device *device,
1562 u8 port_num, u16 index, u16 *pkey);
1563 int (*modify_device)(struct ib_device *device,
1564 int device_modify_mask,
1565 struct ib_device_modify *device_modify);
1566 int (*modify_port)(struct ib_device *device,
1567 u8 port_num, int port_modify_mask,
1568 struct ib_port_modify *port_modify);
e2773c06
RD
1569 struct ib_ucontext * (*alloc_ucontext)(struct ib_device *device,
1570 struct ib_udata *udata);
1571 int (*dealloc_ucontext)(struct ib_ucontext *context);
1572 int (*mmap)(struct ib_ucontext *context,
1573 struct vm_area_struct *vma);
1574 struct ib_pd * (*alloc_pd)(struct ib_device *device,
1575 struct ib_ucontext *context,
1576 struct ib_udata *udata);
1da177e4
LT
1577 int (*dealloc_pd)(struct ib_pd *pd);
1578 struct ib_ah * (*create_ah)(struct ib_pd *pd,
1579 struct ib_ah_attr *ah_attr);
1580 int (*modify_ah)(struct ib_ah *ah,
1581 struct ib_ah_attr *ah_attr);
1582 int (*query_ah)(struct ib_ah *ah,
1583 struct ib_ah_attr *ah_attr);
1584 int (*destroy_ah)(struct ib_ah *ah);
d41fcc67
RD
1585 struct ib_srq * (*create_srq)(struct ib_pd *pd,
1586 struct ib_srq_init_attr *srq_init_attr,
1587 struct ib_udata *udata);
1588 int (*modify_srq)(struct ib_srq *srq,
1589 struct ib_srq_attr *srq_attr,
9bc57e2d
RC
1590 enum ib_srq_attr_mask srq_attr_mask,
1591 struct ib_udata *udata);
d41fcc67
RD
1592 int (*query_srq)(struct ib_srq *srq,
1593 struct ib_srq_attr *srq_attr);
1594 int (*destroy_srq)(struct ib_srq *srq);
1595 int (*post_srq_recv)(struct ib_srq *srq,
1596 struct ib_recv_wr *recv_wr,
1597 struct ib_recv_wr **bad_recv_wr);
1da177e4 1598 struct ib_qp * (*create_qp)(struct ib_pd *pd,
e2773c06
RD
1599 struct ib_qp_init_attr *qp_init_attr,
1600 struct ib_udata *udata);
1da177e4
LT
1601 int (*modify_qp)(struct ib_qp *qp,
1602 struct ib_qp_attr *qp_attr,
9bc57e2d
RC
1603 int qp_attr_mask,
1604 struct ib_udata *udata);
1da177e4
LT
1605 int (*query_qp)(struct ib_qp *qp,
1606 struct ib_qp_attr *qp_attr,
1607 int qp_attr_mask,
1608 struct ib_qp_init_attr *qp_init_attr);
1609 int (*destroy_qp)(struct ib_qp *qp);
1610 int (*post_send)(struct ib_qp *qp,
1611 struct ib_send_wr *send_wr,
1612 struct ib_send_wr **bad_send_wr);
1613 int (*post_recv)(struct ib_qp *qp,
1614 struct ib_recv_wr *recv_wr,
1615 struct ib_recv_wr **bad_recv_wr);
e2773c06 1616 struct ib_cq * (*create_cq)(struct ib_device *device, int cqe,
f4fd0b22 1617 int comp_vector,
e2773c06
RD
1618 struct ib_ucontext *context,
1619 struct ib_udata *udata);
2dd57162
EC
1620 int (*modify_cq)(struct ib_cq *cq, u16 cq_count,
1621 u16 cq_period);
1da177e4 1622 int (*destroy_cq)(struct ib_cq *cq);
33b9b3ee
RD
1623 int (*resize_cq)(struct ib_cq *cq, int cqe,
1624 struct ib_udata *udata);
1da177e4
LT
1625 int (*poll_cq)(struct ib_cq *cq, int num_entries,
1626 struct ib_wc *wc);
1627 int (*peek_cq)(struct ib_cq *cq, int wc_cnt);
1628 int (*req_notify_cq)(struct ib_cq *cq,
ed23a727 1629 enum ib_cq_notify_flags flags);
1da177e4
LT
1630 int (*req_ncomp_notif)(struct ib_cq *cq,
1631 int wc_cnt);
1632 struct ib_mr * (*get_dma_mr)(struct ib_pd *pd,
1633 int mr_access_flags);
1634 struct ib_mr * (*reg_phys_mr)(struct ib_pd *pd,
1635 struct ib_phys_buf *phys_buf_array,
1636 int num_phys_buf,
1637 int mr_access_flags,
1638 u64 *iova_start);
e2773c06 1639 struct ib_mr * (*reg_user_mr)(struct ib_pd *pd,
f7c6a7b5
RD
1640 u64 start, u64 length,
1641 u64 virt_addr,
e2773c06
RD
1642 int mr_access_flags,
1643 struct ib_udata *udata);
7e6edb9b
MB
1644 int (*rereg_user_mr)(struct ib_mr *mr,
1645 int flags,
1646 u64 start, u64 length,
1647 u64 virt_addr,
1648 int mr_access_flags,
1649 struct ib_pd *pd,
1650 struct ib_udata *udata);
1da177e4
LT
1651 int (*query_mr)(struct ib_mr *mr,
1652 struct ib_mr_attr *mr_attr);
1653 int (*dereg_mr)(struct ib_mr *mr);
17cd3a2d
SG
1654 int (*destroy_mr)(struct ib_mr *mr);
1655 struct ib_mr * (*create_mr)(struct ib_pd *pd,
1656 struct ib_mr_init_attr *mr_init_attr);
00f7ec36
SW
1657 struct ib_mr * (*alloc_fast_reg_mr)(struct ib_pd *pd,
1658 int max_page_list_len);
1659 struct ib_fast_reg_page_list * (*alloc_fast_reg_page_list)(struct ib_device *device,
1660 int page_list_len);
1661 void (*free_fast_reg_page_list)(struct ib_fast_reg_page_list *page_list);
1da177e4
LT
1662 int (*rereg_phys_mr)(struct ib_mr *mr,
1663 int mr_rereg_mask,
1664 struct ib_pd *pd,
1665 struct ib_phys_buf *phys_buf_array,
1666 int num_phys_buf,
1667 int mr_access_flags,
1668 u64 *iova_start);
7083e42e
SM
1669 struct ib_mw * (*alloc_mw)(struct ib_pd *pd,
1670 enum ib_mw_type type);
1da177e4
LT
1671 int (*bind_mw)(struct ib_qp *qp,
1672 struct ib_mw *mw,
1673 struct ib_mw_bind *mw_bind);
1674 int (*dealloc_mw)(struct ib_mw *mw);
1675 struct ib_fmr * (*alloc_fmr)(struct ib_pd *pd,
1676 int mr_access_flags,
1677 struct ib_fmr_attr *fmr_attr);
1678 int (*map_phys_fmr)(struct ib_fmr *fmr,
1679 u64 *page_list, int list_len,
1680 u64 iova);
1681 int (*unmap_fmr)(struct list_head *fmr_list);
1682 int (*dealloc_fmr)(struct ib_fmr *fmr);
1683 int (*attach_mcast)(struct ib_qp *qp,
1684 union ib_gid *gid,
1685 u16 lid);
1686 int (*detach_mcast)(struct ib_qp *qp,
1687 union ib_gid *gid,
1688 u16 lid);
1689 int (*process_mad)(struct ib_device *device,
1690 int process_mad_flags,
1691 u8 port_num,
a97e2d86
IW
1692 const struct ib_wc *in_wc,
1693 const struct ib_grh *in_grh,
1694 const struct ib_mad *in_mad,
1da177e4 1695 struct ib_mad *out_mad);
59991f94
SH
1696 struct ib_xrcd * (*alloc_xrcd)(struct ib_device *device,
1697 struct ib_ucontext *ucontext,
1698 struct ib_udata *udata);
1699 int (*dealloc_xrcd)(struct ib_xrcd *xrcd);
319a441d
HHZ
1700 struct ib_flow * (*create_flow)(struct ib_qp *qp,
1701 struct ib_flow_attr
1702 *flow_attr,
1703 int domain);
1704 int (*destroy_flow)(struct ib_flow *flow_id);
1b01d335
SG
1705 int (*check_mr_status)(struct ib_mr *mr, u32 check_mask,
1706 struct ib_mr_status *mr_status);
1da177e4 1707
9b513090
RC
1708 struct ib_dma_mapping_ops *dma_ops;
1709
e2773c06 1710 struct module *owner;
f4e91eb4 1711 struct device dev;
35be0681 1712 struct kobject *ports_parent;
1da177e4
LT
1713 struct list_head port_list;
1714
1715 enum {
1716 IB_DEV_UNINITIALIZED,
1717 IB_DEV_REGISTERED,
1718 IB_DEV_UNREGISTERED
1719 } reg_state;
1720
274c0891 1721 int uverbs_abi_ver;
17a55f79 1722 u64 uverbs_cmd_mask;
f21519b2 1723 u64 uverbs_ex_cmd_mask;
274c0891 1724
c5bcbbb9 1725 char node_desc[64];
cf311cd4 1726 __be64 node_guid;
96f15c03 1727 u32 local_dma_lkey;
1da177e4
LT
1728 u8 node_type;
1729 u8 phys_port_cnt;
7738613e
IW
1730
1731 /**
1732 * The following mandatory functions are used only at device
1733 * registration. Keep functions such as these at the end of this
1734 * structure to avoid cache line misses when accessing struct ib_device
1735 * in fast paths.
1736 */
1737 int (*get_port_immutable)(struct ib_device *, u8, struct ib_port_immutable *);
1da177e4
LT
1738};
1739
1740struct ib_client {
1741 char *name;
1742 void (*add) (struct ib_device *);
1743 void (*remove)(struct ib_device *);
1744
1745 struct list_head list;
1746};
1747
1748struct ib_device *ib_alloc_device(size_t size);
1749void ib_dealloc_device(struct ib_device *device);
1750
9a6edb60
RC
1751int ib_register_device(struct ib_device *device,
1752 int (*port_callback)(struct ib_device *,
1753 u8, struct kobject *));
1da177e4
LT
1754void ib_unregister_device(struct ib_device *device);
1755
1756int ib_register_client (struct ib_client *client);
1757void ib_unregister_client(struct ib_client *client);
1758
1759void *ib_get_client_data(struct ib_device *device, struct ib_client *client);
1760void ib_set_client_data(struct ib_device *device, struct ib_client *client,
1761 void *data);
1762
e2773c06
RD
1763static inline int ib_copy_from_udata(void *dest, struct ib_udata *udata, size_t len)
1764{
1765 return copy_from_user(dest, udata->inbuf, len) ? -EFAULT : 0;
1766}
1767
1768static inline int ib_copy_to_udata(struct ib_udata *udata, void *src, size_t len)
1769{
43c61165 1770 return copy_to_user(udata->outbuf, src, len) ? -EFAULT : 0;
e2773c06
RD
1771}
1772
8a51866f
RD
1773/**
1774 * ib_modify_qp_is_ok - Check that the supplied attribute mask
1775 * contains all required attributes and no attributes not allowed for
1776 * the given QP state transition.
1777 * @cur_state: Current QP state
1778 * @next_state: Next QP state
1779 * @type: QP type
1780 * @mask: Mask of supplied QP attributes
dd5f03be 1781 * @ll : link layer of port
8a51866f
RD
1782 *
1783 * This function is a helper function that a low-level driver's
1784 * modify_qp method can use to validate the consumer's input. It
1785 * checks that cur_state and next_state are valid QP states, that a
1786 * transition from cur_state to next_state is allowed by the IB spec,
1787 * and that the attribute mask supplied is allowed for the transition.
1788 */
1789int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
dd5f03be
MB
1790 enum ib_qp_type type, enum ib_qp_attr_mask mask,
1791 enum rdma_link_layer ll);
8a51866f 1792
1da177e4
LT
1793int ib_register_event_handler (struct ib_event_handler *event_handler);
1794int ib_unregister_event_handler(struct ib_event_handler *event_handler);
1795void ib_dispatch_event(struct ib_event *event);
1796
1797int ib_query_device(struct ib_device *device,
1798 struct ib_device_attr *device_attr);
1799
1800int ib_query_port(struct ib_device *device,
1801 u8 port_num, struct ib_port_attr *port_attr);
1802
a3f5adaf
EC
1803enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device,
1804 u8 port_num);
1805
0cf18d77
IW
1806/**
1807 * rdma_start_port - Return the first valid port number for the device
1808 * specified
1809 *
1810 * @device: Device to be checked
1811 *
1812 * Return start port number
1813 */
1814static inline u8 rdma_start_port(const struct ib_device *device)
1815{
1816 return (device->node_type == RDMA_NODE_IB_SWITCH) ? 0 : 1;
1817}
1818
1819/**
1820 * rdma_end_port - Return the last valid port number for the device
1821 * specified
1822 *
1823 * @device: Device to be checked
1824 *
1825 * Return last port number
1826 */
1827static inline u8 rdma_end_port(const struct ib_device *device)
1828{
1829 return (device->node_type == RDMA_NODE_IB_SWITCH) ?
1830 0 : device->phys_port_cnt;
1831}
1832
5ede9289 1833static inline bool rdma_protocol_ib(const struct ib_device *device, u8 port_num)
de66be94 1834{
f9b22e35 1835 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IB;
de66be94
MW
1836}
1837
5ede9289 1838static inline bool rdma_protocol_roce(const struct ib_device *device, u8 port_num)
de66be94 1839{
f9b22e35 1840 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_ROCE;
de66be94
MW
1841}
1842
5ede9289 1843static inline bool rdma_protocol_iwarp(const struct ib_device *device, u8 port_num)
de66be94 1844{
f9b22e35 1845 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IWARP;
de66be94
MW
1846}
1847
5ede9289 1848static inline bool rdma_ib_or_roce(const struct ib_device *device, u8 port_num)
de66be94 1849{
f9b22e35
IW
1850 return device->port_immutable[port_num].core_cap_flags &
1851 (RDMA_CORE_CAP_PROT_IB | RDMA_CORE_CAP_PROT_ROCE);
de66be94
MW
1852}
1853
c757dea8 1854/**
296ec009 1855 * rdma_cap_ib_mad - Check if the port of a device supports Infiniband
c757dea8 1856 * Management Datagrams.
296ec009
MW
1857 * @device: Device to check
1858 * @port_num: Port number to check
c757dea8 1859 *
296ec009
MW
1860 * Management Datagrams (MAD) are a required part of the InfiniBand
1861 * specification and are supported on all InfiniBand devices. A slightly
1862 * extended version are also supported on OPA interfaces.
c757dea8 1863 *
296ec009 1864 * Return: true if the port supports sending/receiving of MAD packets.
c757dea8 1865 */
5ede9289 1866static inline bool rdma_cap_ib_mad(const struct ib_device *device, u8 port_num)
c757dea8 1867{
f9b22e35 1868 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_MAD;
c757dea8
MW
1869}
1870
29541e3a 1871/**
296ec009
MW
1872 * rdma_cap_ib_smi - Check if the port of a device provides an Infiniband
1873 * Subnet Management Agent (SMA) on the Subnet Management Interface (SMI).
1874 * @device: Device to check
1875 * @port_num: Port number to check
29541e3a 1876 *
296ec009
MW
1877 * Each InfiniBand node is required to provide a Subnet Management Agent
1878 * that the subnet manager can access. Prior to the fabric being fully
1879 * configured by the subnet manager, the SMA is accessed via a well known
1880 * interface called the Subnet Management Interface (SMI). This interface
1881 * uses directed route packets to communicate with the SM to get around the
1882 * chicken and egg problem of the SM needing to know what's on the fabric
1883 * in order to configure the fabric, and needing to configure the fabric in
1884 * order to send packets to the devices on the fabric. These directed
1885 * route packets do not need the fabric fully configured in order to reach
1886 * their destination. The SMI is the only method allowed to send
1887 * directed route packets on an InfiniBand fabric.
29541e3a 1888 *
296ec009 1889 * Return: true if the port provides an SMI.
29541e3a 1890 */
5ede9289 1891static inline bool rdma_cap_ib_smi(const struct ib_device *device, u8 port_num)
29541e3a 1892{
f9b22e35 1893 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SMI;
29541e3a
MW
1894}
1895
72219cea
MW
1896/**
1897 * rdma_cap_ib_cm - Check if the port of device has the capability Infiniband
1898 * Communication Manager.
296ec009
MW
1899 * @device: Device to check
1900 * @port_num: Port number to check
72219cea 1901 *
296ec009
MW
1902 * The InfiniBand Communication Manager is one of many pre-defined General
1903 * Service Agents (GSA) that are accessed via the General Service
1904 * Interface (GSI). It's role is to facilitate establishment of connections
1905 * between nodes as well as other management related tasks for established
1906 * connections.
72219cea 1907 *
296ec009
MW
1908 * Return: true if the port supports an IB CM (this does not guarantee that
1909 * a CM is actually running however).
72219cea 1910 */
5ede9289 1911static inline bool rdma_cap_ib_cm(const struct ib_device *device, u8 port_num)
72219cea 1912{
f9b22e35 1913 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_CM;
72219cea
MW
1914}
1915
04215330
MW
1916/**
1917 * rdma_cap_iw_cm - Check if the port of device has the capability IWARP
1918 * Communication Manager.
296ec009
MW
1919 * @device: Device to check
1920 * @port_num: Port number to check
04215330 1921 *
296ec009
MW
1922 * Similar to above, but specific to iWARP connections which have a different
1923 * managment protocol than InfiniBand.
04215330 1924 *
296ec009
MW
1925 * Return: true if the port supports an iWARP CM (this does not guarantee that
1926 * a CM is actually running however).
04215330 1927 */
5ede9289 1928static inline bool rdma_cap_iw_cm(const struct ib_device *device, u8 port_num)
04215330 1929{
f9b22e35 1930 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IW_CM;
04215330
MW
1931}
1932
fe53ba2f
MW
1933/**
1934 * rdma_cap_ib_sa - Check if the port of device has the capability Infiniband
1935 * Subnet Administration.
296ec009
MW
1936 * @device: Device to check
1937 * @port_num: Port number to check
fe53ba2f 1938 *
296ec009
MW
1939 * An InfiniBand Subnet Administration (SA) service is a pre-defined General
1940 * Service Agent (GSA) provided by the Subnet Manager (SM). On InfiniBand
1941 * fabrics, devices should resolve routes to other hosts by contacting the
1942 * SA to query the proper route.
fe53ba2f 1943 *
296ec009
MW
1944 * Return: true if the port should act as a client to the fabric Subnet
1945 * Administration interface. This does not imply that the SA service is
1946 * running locally.
fe53ba2f 1947 */
5ede9289 1948static inline bool rdma_cap_ib_sa(const struct ib_device *device, u8 port_num)
fe53ba2f 1949{
f9b22e35 1950 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SA;
fe53ba2f
MW
1951}
1952
a31ad3b0
MW
1953/**
1954 * rdma_cap_ib_mcast - Check if the port of device has the capability Infiniband
1955 * Multicast.
296ec009
MW
1956 * @device: Device to check
1957 * @port_num: Port number to check
a31ad3b0 1958 *
296ec009
MW
1959 * InfiniBand multicast registration is more complex than normal IPv4 or
1960 * IPv6 multicast registration. Each Host Channel Adapter must register
1961 * with the Subnet Manager when it wishes to join a multicast group. It
1962 * should do so only once regardless of how many queue pairs it subscribes
1963 * to this group. And it should leave the group only after all queue pairs
1964 * attached to the group have been detached.
a31ad3b0 1965 *
296ec009
MW
1966 * Return: true if the port must undertake the additional adminstrative
1967 * overhead of registering/unregistering with the SM and tracking of the
1968 * total number of queue pairs attached to the multicast group.
a31ad3b0 1969 */
5ede9289 1970static inline bool rdma_cap_ib_mcast(const struct ib_device *device, u8 port_num)
a31ad3b0
MW
1971{
1972 return rdma_cap_ib_sa(device, port_num);
1973}
1974
30a74ef4
MW
1975/**
1976 * rdma_cap_af_ib - Check if the port of device has the capability
1977 * Native Infiniband Address.
296ec009
MW
1978 * @device: Device to check
1979 * @port_num: Port number to check
30a74ef4 1980 *
296ec009
MW
1981 * InfiniBand addressing uses a port's GUID + Subnet Prefix to make a default
1982 * GID. RoCE uses a different mechanism, but still generates a GID via
1983 * a prescribed mechanism and port specific data.
30a74ef4 1984 *
296ec009
MW
1985 * Return: true if the port uses a GID address to identify devices on the
1986 * network.
30a74ef4 1987 */
5ede9289 1988static inline bool rdma_cap_af_ib(const struct ib_device *device, u8 port_num)
30a74ef4 1989{
f9b22e35 1990 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_AF_IB;
30a74ef4
MW
1991}
1992
227128fc
MW
1993/**
1994 * rdma_cap_eth_ah - Check if the port of device has the capability
296ec009
MW
1995 * Ethernet Address Handle.
1996 * @device: Device to check
1997 * @port_num: Port number to check
227128fc 1998 *
296ec009
MW
1999 * RoCE is InfiniBand over Ethernet, and it uses a well defined technique
2000 * to fabricate GIDs over Ethernet/IP specific addresses native to the
2001 * port. Normally, packet headers are generated by the sending host
2002 * adapter, but when sending connectionless datagrams, we must manually
2003 * inject the proper headers for the fabric we are communicating over.
227128fc 2004 *
296ec009
MW
2005 * Return: true if we are running as a RoCE port and must force the
2006 * addition of a Global Route Header built from our Ethernet Address
2007 * Handle into our header list for connectionless packets.
227128fc 2008 */
5ede9289 2009static inline bool rdma_cap_eth_ah(const struct ib_device *device, u8 port_num)
227128fc 2010{
f9b22e35 2011 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_ETH_AH;
227128fc
MW
2012}
2013
bc0f1d71
MW
2014/**
2015 * rdma_cap_read_multi_sge - Check if the port of device has the capability
2016 * RDMA Read Multiple Scatter-Gather Entries.
296ec009
MW
2017 * @device: Device to check
2018 * @port_num: Port number to check
bc0f1d71 2019 *
296ec009
MW
2020 * iWARP has a restriction that RDMA READ requests may only have a single
2021 * Scatter/Gather Entry (SGE) in the work request.
bc0f1d71 2022 *
296ec009
MW
2023 * NOTE: although the linux kernel currently assumes all devices are either
2024 * single SGE RDMA READ devices or identical SGE maximums for RDMA READs and
2025 * WRITEs, according to Tom Talpey, this is not accurate. There are some
2026 * devices out there that support more than a single SGE on RDMA READ
2027 * requests, but do not support the same number of SGEs as they do on
2028 * RDMA WRITE requests. The linux kernel would need rearchitecting to
2029 * support these imbalanced READ/WRITE SGEs allowed devices. So, for now,
2030 * suffice with either the device supports the same READ/WRITE SGEs, or
2031 * it only gets one READ sge.
2032 *
2033 * Return: true for any device that allows more than one SGE in RDMA READ
2034 * requests.
bc0f1d71
MW
2035 */
2036static inline bool rdma_cap_read_multi_sge(struct ib_device *device,
2037 u8 port_num)
2038{
f9b22e35 2039 return !(device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IWARP);
bc0f1d71
MW
2040}
2041
1da177e4
LT
2042int ib_query_gid(struct ib_device *device,
2043 u8 port_num, int index, union ib_gid *gid);
2044
2045int ib_query_pkey(struct ib_device *device,
2046 u8 port_num, u16 index, u16 *pkey);
2047
2048int ib_modify_device(struct ib_device *device,
2049 int device_modify_mask,
2050 struct ib_device_modify *device_modify);
2051
2052int ib_modify_port(struct ib_device *device,
2053 u8 port_num, int port_modify_mask,
2054 struct ib_port_modify *port_modify);
2055
5eb620c8
YE
2056int ib_find_gid(struct ib_device *device, union ib_gid *gid,
2057 u8 *port_num, u16 *index);
2058
2059int ib_find_pkey(struct ib_device *device,
2060 u8 port_num, u16 pkey, u16 *index);
2061
1da177e4
LT
2062/**
2063 * ib_alloc_pd - Allocates an unused protection domain.
2064 * @device: The device on which to allocate the protection domain.
2065 *
2066 * A protection domain object provides an association between QPs, shared
2067 * receive queues, address handles, memory regions, and memory windows.
2068 */
2069struct ib_pd *ib_alloc_pd(struct ib_device *device);
2070
2071/**
2072 * ib_dealloc_pd - Deallocates a protection domain.
2073 * @pd: The protection domain to deallocate.
2074 */
2075int ib_dealloc_pd(struct ib_pd *pd);
2076
2077/**
2078 * ib_create_ah - Creates an address handle for the given address vector.
2079 * @pd: The protection domain associated with the address handle.
2080 * @ah_attr: The attributes of the address vector.
2081 *
2082 * The address handle is used to reference a local or global destination
2083 * in all UD QP post sends.
2084 */
2085struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
2086
4e00d694
SH
2087/**
2088 * ib_init_ah_from_wc - Initializes address handle attributes from a
2089 * work completion.
2090 * @device: Device on which the received message arrived.
2091 * @port_num: Port on which the received message arrived.
2092 * @wc: Work completion associated with the received message.
2093 * @grh: References the received global route header. This parameter is
2094 * ignored unless the work completion indicates that the GRH is valid.
2095 * @ah_attr: Returned attributes that can be used when creating an address
2096 * handle for replying to the message.
2097 */
73cdaaee
IW
2098int ib_init_ah_from_wc(struct ib_device *device, u8 port_num,
2099 const struct ib_wc *wc, const struct ib_grh *grh,
2100 struct ib_ah_attr *ah_attr);
4e00d694 2101
513789ed
HR
2102/**
2103 * ib_create_ah_from_wc - Creates an address handle associated with the
2104 * sender of the specified work completion.
2105 * @pd: The protection domain associated with the address handle.
2106 * @wc: Work completion information associated with a received message.
2107 * @grh: References the received global route header. This parameter is
2108 * ignored unless the work completion indicates that the GRH is valid.
2109 * @port_num: The outbound port number to associate with the address.
2110 *
2111 * The address handle is used to reference a local or global destination
2112 * in all UD QP post sends.
2113 */
73cdaaee
IW
2114struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc,
2115 const struct ib_grh *grh, u8 port_num);
513789ed 2116
1da177e4
LT
2117/**
2118 * ib_modify_ah - Modifies the address vector associated with an address
2119 * handle.
2120 * @ah: The address handle to modify.
2121 * @ah_attr: The new address vector attributes to associate with the
2122 * address handle.
2123 */
2124int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr);
2125
2126/**
2127 * ib_query_ah - Queries the address vector associated with an address
2128 * handle.
2129 * @ah: The address handle to query.
2130 * @ah_attr: The address vector attributes associated with the address
2131 * handle.
2132 */
2133int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr);
2134
2135/**
2136 * ib_destroy_ah - Destroys an address handle.
2137 * @ah: The address handle to destroy.
2138 */
2139int ib_destroy_ah(struct ib_ah *ah);
2140
d41fcc67
RD
2141/**
2142 * ib_create_srq - Creates a SRQ associated with the specified protection
2143 * domain.
2144 * @pd: The protection domain associated with the SRQ.
abb6e9ba
DB
2145 * @srq_init_attr: A list of initial attributes required to create the
2146 * SRQ. If SRQ creation succeeds, then the attributes are updated to
2147 * the actual capabilities of the created SRQ.
d41fcc67
RD
2148 *
2149 * srq_attr->max_wr and srq_attr->max_sge are read the determine the
2150 * requested size of the SRQ, and set to the actual values allocated
2151 * on return. If ib_create_srq() succeeds, then max_wr and max_sge
2152 * will always be at least as large as the requested values.
2153 */
2154struct ib_srq *ib_create_srq(struct ib_pd *pd,
2155 struct ib_srq_init_attr *srq_init_attr);
2156
2157/**
2158 * ib_modify_srq - Modifies the attributes for the specified SRQ.
2159 * @srq: The SRQ to modify.
2160 * @srq_attr: On input, specifies the SRQ attributes to modify. On output,
2161 * the current values of selected SRQ attributes are returned.
2162 * @srq_attr_mask: A bit-mask used to specify which attributes of the SRQ
2163 * are being modified.
2164 *
2165 * The mask may contain IB_SRQ_MAX_WR to resize the SRQ and/or
2166 * IB_SRQ_LIMIT to set the SRQ's limit and request notification when
2167 * the number of receives queued drops below the limit.
2168 */
2169int ib_modify_srq(struct ib_srq *srq,
2170 struct ib_srq_attr *srq_attr,
2171 enum ib_srq_attr_mask srq_attr_mask);
2172
2173/**
2174 * ib_query_srq - Returns the attribute list and current values for the
2175 * specified SRQ.
2176 * @srq: The SRQ to query.
2177 * @srq_attr: The attributes of the specified SRQ.
2178 */
2179int ib_query_srq(struct ib_srq *srq,
2180 struct ib_srq_attr *srq_attr);
2181
2182/**
2183 * ib_destroy_srq - Destroys the specified SRQ.
2184 * @srq: The SRQ to destroy.
2185 */
2186int ib_destroy_srq(struct ib_srq *srq);
2187
2188/**
2189 * ib_post_srq_recv - Posts a list of work requests to the specified SRQ.
2190 * @srq: The SRQ to post the work request on.
2191 * @recv_wr: A list of work requests to post on the receive queue.
2192 * @bad_recv_wr: On an immediate failure, this parameter will reference
2193 * the work request that failed to be posted on the QP.
2194 */
2195static inline int ib_post_srq_recv(struct ib_srq *srq,
2196 struct ib_recv_wr *recv_wr,
2197 struct ib_recv_wr **bad_recv_wr)
2198{
2199 return srq->device->post_srq_recv(srq, recv_wr, bad_recv_wr);
2200}
2201
1da177e4
LT
2202/**
2203 * ib_create_qp - Creates a QP associated with the specified protection
2204 * domain.
2205 * @pd: The protection domain associated with the QP.
abb6e9ba
DB
2206 * @qp_init_attr: A list of initial attributes required to create the
2207 * QP. If QP creation succeeds, then the attributes are updated to
2208 * the actual capabilities of the created QP.
1da177e4
LT
2209 */
2210struct ib_qp *ib_create_qp(struct ib_pd *pd,
2211 struct ib_qp_init_attr *qp_init_attr);
2212
2213/**
2214 * ib_modify_qp - Modifies the attributes for the specified QP and then
2215 * transitions the QP to the given state.
2216 * @qp: The QP to modify.
2217 * @qp_attr: On input, specifies the QP attributes to modify. On output,
2218 * the current values of selected QP attributes are returned.
2219 * @qp_attr_mask: A bit-mask used to specify which attributes of the QP
2220 * are being modified.
2221 */
2222int ib_modify_qp(struct ib_qp *qp,
2223 struct ib_qp_attr *qp_attr,
2224 int qp_attr_mask);
2225
2226/**
2227 * ib_query_qp - Returns the attribute list and current values for the
2228 * specified QP.
2229 * @qp: The QP to query.
2230 * @qp_attr: The attributes of the specified QP.
2231 * @qp_attr_mask: A bit-mask used to select specific attributes to query.
2232 * @qp_init_attr: Additional attributes of the selected QP.
2233 *
2234 * The qp_attr_mask may be used to limit the query to gathering only the
2235 * selected attributes.
2236 */
2237int ib_query_qp(struct ib_qp *qp,
2238 struct ib_qp_attr *qp_attr,
2239 int qp_attr_mask,
2240 struct ib_qp_init_attr *qp_init_attr);
2241
2242/**
2243 * ib_destroy_qp - Destroys the specified QP.
2244 * @qp: The QP to destroy.
2245 */
2246int ib_destroy_qp(struct ib_qp *qp);
2247
d3d72d90 2248/**
0e0ec7e0
SH
2249 * ib_open_qp - Obtain a reference to an existing sharable QP.
2250 * @xrcd - XRC domain
2251 * @qp_open_attr: Attributes identifying the QP to open.
2252 *
2253 * Returns a reference to a sharable QP.
2254 */
2255struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd,
2256 struct ib_qp_open_attr *qp_open_attr);
2257
2258/**
2259 * ib_close_qp - Release an external reference to a QP.
d3d72d90
SH
2260 * @qp: The QP handle to release
2261 *
0e0ec7e0
SH
2262 * The opened QP handle is released by the caller. The underlying
2263 * shared QP is not destroyed until all internal references are released.
d3d72d90 2264 */
0e0ec7e0 2265int ib_close_qp(struct ib_qp *qp);
d3d72d90 2266
1da177e4
LT
2267/**
2268 * ib_post_send - Posts a list of work requests to the send queue of
2269 * the specified QP.
2270 * @qp: The QP to post the work request on.
2271 * @send_wr: A list of work requests to post on the send queue.
2272 * @bad_send_wr: On an immediate failure, this parameter will reference
2273 * the work request that failed to be posted on the QP.
55464d46
BVA
2274 *
2275 * While IBA Vol. 1 section 11.4.1.1 specifies that if an immediate
2276 * error is returned, the QP state shall not be affected,
2277 * ib_post_send() will return an immediate error after queueing any
2278 * earlier work requests in the list.
1da177e4
LT
2279 */
2280static inline int ib_post_send(struct ib_qp *qp,
2281 struct ib_send_wr *send_wr,
2282 struct ib_send_wr **bad_send_wr)
2283{
2284 return qp->device->post_send(qp, send_wr, bad_send_wr);
2285}
2286
2287/**
2288 * ib_post_recv - Posts a list of work requests to the receive queue of
2289 * the specified QP.
2290 * @qp: The QP to post the work request on.
2291 * @recv_wr: A list of work requests to post on the receive queue.
2292 * @bad_recv_wr: On an immediate failure, this parameter will reference
2293 * the work request that failed to be posted on the QP.
2294 */
2295static inline int ib_post_recv(struct ib_qp *qp,
2296 struct ib_recv_wr *recv_wr,
2297 struct ib_recv_wr **bad_recv_wr)
2298{
2299 return qp->device->post_recv(qp, recv_wr, bad_recv_wr);
2300}
2301
2302/**
2303 * ib_create_cq - Creates a CQ on the specified device.
2304 * @device: The device on which to create the CQ.
2305 * @comp_handler: A user-specified callback that is invoked when a
2306 * completion event occurs on the CQ.
2307 * @event_handler: A user-specified callback that is invoked when an
2308 * asynchronous event not associated with a completion occurs on the CQ.
2309 * @cq_context: Context associated with the CQ returned to the user via
2310 * the associated completion and event handlers.
2311 * @cqe: The minimum size of the CQ.
f4fd0b22
MT
2312 * @comp_vector - Completion vector used to signal completion events.
2313 * Must be >= 0 and < context->num_comp_vectors.
1da177e4
LT
2314 *
2315 * Users can examine the cq structure to determine the actual CQ size.
2316 */
2317struct ib_cq *ib_create_cq(struct ib_device *device,
2318 ib_comp_handler comp_handler,
2319 void (*event_handler)(struct ib_event *, void *),
f4fd0b22 2320 void *cq_context, int cqe, int comp_vector);
1da177e4
LT
2321
2322/**
2323 * ib_resize_cq - Modifies the capacity of the CQ.
2324 * @cq: The CQ to resize.
2325 * @cqe: The minimum size of the CQ.
2326 *
2327 * Users can examine the cq structure to determine the actual CQ size.
2328 */
2329int ib_resize_cq(struct ib_cq *cq, int cqe);
2330
2dd57162
EC
2331/**
2332 * ib_modify_cq - Modifies moderation params of the CQ
2333 * @cq: The CQ to modify.
2334 * @cq_count: number of CQEs that will trigger an event
2335 * @cq_period: max period of time in usec before triggering an event
2336 *
2337 */
2338int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
2339
1da177e4
LT
2340/**
2341 * ib_destroy_cq - Destroys the specified CQ.
2342 * @cq: The CQ to destroy.
2343 */
2344int ib_destroy_cq(struct ib_cq *cq);
2345
2346/**
2347 * ib_poll_cq - poll a CQ for completion(s)
2348 * @cq:the CQ being polled
2349 * @num_entries:maximum number of completions to return
2350 * @wc:array of at least @num_entries &struct ib_wc where completions
2351 * will be returned
2352 *
2353 * Poll a CQ for (possibly multiple) completions. If the return value
2354 * is < 0, an error occurred. If the return value is >= 0, it is the
2355 * number of completions returned. If the return value is
2356 * non-negative and < num_entries, then the CQ was emptied.
2357 */
2358static inline int ib_poll_cq(struct ib_cq *cq, int num_entries,
2359 struct ib_wc *wc)
2360{
2361 return cq->device->poll_cq(cq, num_entries, wc);
2362}
2363
2364/**
2365 * ib_peek_cq - Returns the number of unreaped completions currently
2366 * on the specified CQ.
2367 * @cq: The CQ to peek.
2368 * @wc_cnt: A minimum number of unreaped completions to check for.
2369 *
2370 * If the number of unreaped completions is greater than or equal to wc_cnt,
2371 * this function returns wc_cnt, otherwise, it returns the actual number of
2372 * unreaped completions.
2373 */
2374int ib_peek_cq(struct ib_cq *cq, int wc_cnt);
2375
2376/**
2377 * ib_req_notify_cq - Request completion notification on a CQ.
2378 * @cq: The CQ to generate an event for.
ed23a727
RD
2379 * @flags:
2380 * Must contain exactly one of %IB_CQ_SOLICITED or %IB_CQ_NEXT_COMP
2381 * to request an event on the next solicited event or next work
2382 * completion at any type, respectively. %IB_CQ_REPORT_MISSED_EVENTS
2383 * may also be |ed in to request a hint about missed events, as
2384 * described below.
2385 *
2386 * Return Value:
2387 * < 0 means an error occurred while requesting notification
2388 * == 0 means notification was requested successfully, and if
2389 * IB_CQ_REPORT_MISSED_EVENTS was passed in, then no events
2390 * were missed and it is safe to wait for another event. In
2391 * this case is it guaranteed that any work completions added
2392 * to the CQ since the last CQ poll will trigger a completion
2393 * notification event.
2394 * > 0 is only returned if IB_CQ_REPORT_MISSED_EVENTS was passed
2395 * in. It means that the consumer must poll the CQ again to
2396 * make sure it is empty to avoid missing an event because of a
2397 * race between requesting notification and an entry being
2398 * added to the CQ. This return value means it is possible
2399 * (but not guaranteed) that a work completion has been added
2400 * to the CQ since the last poll without triggering a
2401 * completion notification event.
1da177e4
LT
2402 */
2403static inline int ib_req_notify_cq(struct ib_cq *cq,
ed23a727 2404 enum ib_cq_notify_flags flags)
1da177e4 2405{
ed23a727 2406 return cq->device->req_notify_cq(cq, flags);
1da177e4
LT
2407}
2408
2409/**
2410 * ib_req_ncomp_notif - Request completion notification when there are
2411 * at least the specified number of unreaped completions on the CQ.
2412 * @cq: The CQ to generate an event for.
2413 * @wc_cnt: The number of unreaped completions that should be on the
2414 * CQ before an event is generated.
2415 */
2416static inline int ib_req_ncomp_notif(struct ib_cq *cq, int wc_cnt)
2417{
2418 return cq->device->req_ncomp_notif ?
2419 cq->device->req_ncomp_notif(cq, wc_cnt) :
2420 -ENOSYS;
2421}
2422
2423/**
2424 * ib_get_dma_mr - Returns a memory region for system memory that is
2425 * usable for DMA.
2426 * @pd: The protection domain associated with the memory region.
2427 * @mr_access_flags: Specifies the memory access rights.
9b513090
RC
2428 *
2429 * Note that the ib_dma_*() functions defined below must be used
2430 * to create/destroy addresses used with the Lkey or Rkey returned
2431 * by ib_get_dma_mr().
1da177e4
LT
2432 */
2433struct ib_mr *ib_get_dma_mr(struct ib_pd *pd, int mr_access_flags);
2434
9b513090
RC
2435/**
2436 * ib_dma_mapping_error - check a DMA addr for error
2437 * @dev: The device for which the dma_addr was created
2438 * @dma_addr: The DMA address to check
2439 */
2440static inline int ib_dma_mapping_error(struct ib_device *dev, u64 dma_addr)
2441{
d1998ef3
BC
2442 if (dev->dma_ops)
2443 return dev->dma_ops->mapping_error(dev, dma_addr);
8d8bb39b 2444 return dma_mapping_error(dev->dma_device, dma_addr);
9b513090
RC
2445}
2446
2447/**
2448 * ib_dma_map_single - Map a kernel virtual address to DMA address
2449 * @dev: The device for which the dma_addr is to be created
2450 * @cpu_addr: The kernel virtual address
2451 * @size: The size of the region in bytes
2452 * @direction: The direction of the DMA
2453 */
2454static inline u64 ib_dma_map_single(struct ib_device *dev,
2455 void *cpu_addr, size_t size,
2456 enum dma_data_direction direction)
2457{
d1998ef3
BC
2458 if (dev->dma_ops)
2459 return dev->dma_ops->map_single(dev, cpu_addr, size, direction);
2460 return dma_map_single(dev->dma_device, cpu_addr, size, direction);
9b513090
RC
2461}
2462
2463/**
2464 * ib_dma_unmap_single - Destroy a mapping created by ib_dma_map_single()
2465 * @dev: The device for which the DMA address was created
2466 * @addr: The DMA address
2467 * @size: The size of the region in bytes
2468 * @direction: The direction of the DMA
2469 */
2470static inline void ib_dma_unmap_single(struct ib_device *dev,
2471 u64 addr, size_t size,
2472 enum dma_data_direction direction)
2473{
d1998ef3
BC
2474 if (dev->dma_ops)
2475 dev->dma_ops->unmap_single(dev, addr, size, direction);
2476 else
9b513090
RC
2477 dma_unmap_single(dev->dma_device, addr, size, direction);
2478}
2479
cb9fbc5c
AK
2480static inline u64 ib_dma_map_single_attrs(struct ib_device *dev,
2481 void *cpu_addr, size_t size,
2482 enum dma_data_direction direction,
2483 struct dma_attrs *attrs)
2484{
2485 return dma_map_single_attrs(dev->dma_device, cpu_addr, size,
2486 direction, attrs);
2487}
2488
2489static inline void ib_dma_unmap_single_attrs(struct ib_device *dev,
2490 u64 addr, size_t size,
2491 enum dma_data_direction direction,
2492 struct dma_attrs *attrs)
2493{
2494 return dma_unmap_single_attrs(dev->dma_device, addr, size,
2495 direction, attrs);
2496}
2497
9b513090
RC
2498/**
2499 * ib_dma_map_page - Map a physical page to DMA address
2500 * @dev: The device for which the dma_addr is to be created
2501 * @page: The page to be mapped
2502 * @offset: The offset within the page
2503 * @size: The size of the region in bytes
2504 * @direction: The direction of the DMA
2505 */
2506static inline u64 ib_dma_map_page(struct ib_device *dev,
2507 struct page *page,
2508 unsigned long offset,
2509 size_t size,
2510 enum dma_data_direction direction)
2511{
d1998ef3
BC
2512 if (dev->dma_ops)
2513 return dev->dma_ops->map_page(dev, page, offset, size, direction);
2514 return dma_map_page(dev->dma_device, page, offset, size, direction);
9b513090
RC
2515}
2516
2517/**
2518 * ib_dma_unmap_page - Destroy a mapping created by ib_dma_map_page()
2519 * @dev: The device for which the DMA address was created
2520 * @addr: The DMA address
2521 * @size: The size of the region in bytes
2522 * @direction: The direction of the DMA
2523 */
2524static inline void ib_dma_unmap_page(struct ib_device *dev,
2525 u64 addr, size_t size,
2526 enum dma_data_direction direction)
2527{
d1998ef3
BC
2528 if (dev->dma_ops)
2529 dev->dma_ops->unmap_page(dev, addr, size, direction);
2530 else
9b513090
RC
2531 dma_unmap_page(dev->dma_device, addr, size, direction);
2532}
2533
2534/**
2535 * ib_dma_map_sg - Map a scatter/gather list to DMA addresses
2536 * @dev: The device for which the DMA addresses are to be created
2537 * @sg: The array of scatter/gather entries
2538 * @nents: The number of scatter/gather entries
2539 * @direction: The direction of the DMA
2540 */
2541static inline int ib_dma_map_sg(struct ib_device *dev,
2542 struct scatterlist *sg, int nents,
2543 enum dma_data_direction direction)
2544{
d1998ef3
BC
2545 if (dev->dma_ops)
2546 return dev->dma_ops->map_sg(dev, sg, nents, direction);
2547 return dma_map_sg(dev->dma_device, sg, nents, direction);
9b513090
RC
2548}
2549
2550/**
2551 * ib_dma_unmap_sg - Unmap a scatter/gather list of DMA addresses
2552 * @dev: The device for which the DMA addresses were created
2553 * @sg: The array of scatter/gather entries
2554 * @nents: The number of scatter/gather entries
2555 * @direction: The direction of the DMA
2556 */
2557static inline void ib_dma_unmap_sg(struct ib_device *dev,
2558 struct scatterlist *sg, int nents,
2559 enum dma_data_direction direction)
2560{
d1998ef3
BC
2561 if (dev->dma_ops)
2562 dev->dma_ops->unmap_sg(dev, sg, nents, direction);
2563 else
9b513090
RC
2564 dma_unmap_sg(dev->dma_device, sg, nents, direction);
2565}
2566
cb9fbc5c
AK
2567static inline int ib_dma_map_sg_attrs(struct ib_device *dev,
2568 struct scatterlist *sg, int nents,
2569 enum dma_data_direction direction,
2570 struct dma_attrs *attrs)
2571{
2572 return dma_map_sg_attrs(dev->dma_device, sg, nents, direction, attrs);
2573}
2574
2575static inline void ib_dma_unmap_sg_attrs(struct ib_device *dev,
2576 struct scatterlist *sg, int nents,
2577 enum dma_data_direction direction,
2578 struct dma_attrs *attrs)
2579{
2580 dma_unmap_sg_attrs(dev->dma_device, sg, nents, direction, attrs);
2581}
9b513090
RC
2582/**
2583 * ib_sg_dma_address - Return the DMA address from a scatter/gather entry
2584 * @dev: The device for which the DMA addresses were created
2585 * @sg: The scatter/gather entry
ea58a595
MM
2586 *
2587 * Note: this function is obsolete. To do: change all occurrences of
2588 * ib_sg_dma_address() into sg_dma_address().
9b513090
RC
2589 */
2590static inline u64 ib_sg_dma_address(struct ib_device *dev,
2591 struct scatterlist *sg)
2592{
d1998ef3 2593 return sg_dma_address(sg);
9b513090
RC
2594}
2595
2596/**
2597 * ib_sg_dma_len - Return the DMA length from a scatter/gather entry
2598 * @dev: The device for which the DMA addresses were created
2599 * @sg: The scatter/gather entry
ea58a595
MM
2600 *
2601 * Note: this function is obsolete. To do: change all occurrences of
2602 * ib_sg_dma_len() into sg_dma_len().
9b513090
RC
2603 */
2604static inline unsigned int ib_sg_dma_len(struct ib_device *dev,
2605 struct scatterlist *sg)
2606{
d1998ef3 2607 return sg_dma_len(sg);
9b513090
RC
2608}
2609
2610/**
2611 * ib_dma_sync_single_for_cpu - Prepare DMA region to be accessed by CPU
2612 * @dev: The device for which the DMA address was created
2613 * @addr: The DMA address
2614 * @size: The size of the region in bytes
2615 * @dir: The direction of the DMA
2616 */
2617static inline void ib_dma_sync_single_for_cpu(struct ib_device *dev,
2618 u64 addr,
2619 size_t size,
2620 enum dma_data_direction dir)
2621{
d1998ef3
BC
2622 if (dev->dma_ops)
2623 dev->dma_ops->sync_single_for_cpu(dev, addr, size, dir);
2624 else
9b513090
RC
2625 dma_sync_single_for_cpu(dev->dma_device, addr, size, dir);
2626}
2627
2628/**
2629 * ib_dma_sync_single_for_device - Prepare DMA region to be accessed by device
2630 * @dev: The device for which the DMA address was created
2631 * @addr: The DMA address
2632 * @size: The size of the region in bytes
2633 * @dir: The direction of the DMA
2634 */
2635static inline void ib_dma_sync_single_for_device(struct ib_device *dev,
2636 u64 addr,
2637 size_t size,
2638 enum dma_data_direction dir)
2639{
d1998ef3
BC
2640 if (dev->dma_ops)
2641 dev->dma_ops->sync_single_for_device(dev, addr, size, dir);
2642 else
9b513090
RC
2643 dma_sync_single_for_device(dev->dma_device, addr, size, dir);
2644}
2645
2646/**
2647 * ib_dma_alloc_coherent - Allocate memory and map it for DMA
2648 * @dev: The device for which the DMA address is requested
2649 * @size: The size of the region to allocate in bytes
2650 * @dma_handle: A pointer for returning the DMA address of the region
2651 * @flag: memory allocator flags
2652 */
2653static inline void *ib_dma_alloc_coherent(struct ib_device *dev,
2654 size_t size,
2655 u64 *dma_handle,
2656 gfp_t flag)
2657{
d1998ef3
BC
2658 if (dev->dma_ops)
2659 return dev->dma_ops->alloc_coherent(dev, size, dma_handle, flag);
c59a3da1
RD
2660 else {
2661 dma_addr_t handle;
2662 void *ret;
2663
2664 ret = dma_alloc_coherent(dev->dma_device, size, &handle, flag);
2665 *dma_handle = handle;
2666 return ret;
2667 }
9b513090
RC
2668}
2669
2670/**
2671 * ib_dma_free_coherent - Free memory allocated by ib_dma_alloc_coherent()
2672 * @dev: The device for which the DMA addresses were allocated
2673 * @size: The size of the region
2674 * @cpu_addr: the address returned by ib_dma_alloc_coherent()
2675 * @dma_handle: the DMA address returned by ib_dma_alloc_coherent()
2676 */
2677static inline void ib_dma_free_coherent(struct ib_device *dev,
2678 size_t size, void *cpu_addr,
2679 u64 dma_handle)
2680{
d1998ef3
BC
2681 if (dev->dma_ops)
2682 dev->dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
2683 else
9b513090
RC
2684 dma_free_coherent(dev->dma_device, size, cpu_addr, dma_handle);
2685}
2686
1da177e4
LT
2687/**
2688 * ib_reg_phys_mr - Prepares a virtually addressed memory region for use
2689 * by an HCA.
2690 * @pd: The protection domain associated assigned to the registered region.
2691 * @phys_buf_array: Specifies a list of physical buffers to use in the
2692 * memory region.
2693 * @num_phys_buf: Specifies the size of the phys_buf_array.
2694 * @mr_access_flags: Specifies the memory access rights.
2695 * @iova_start: The offset of the region's starting I/O virtual address.
2696 */
2697struct ib_mr *ib_reg_phys_mr(struct ib_pd *pd,
2698 struct ib_phys_buf *phys_buf_array,
2699 int num_phys_buf,
2700 int mr_access_flags,
2701 u64 *iova_start);
2702
2703/**
2704 * ib_rereg_phys_mr - Modifies the attributes of an existing memory region.
2705 * Conceptually, this call performs the functions deregister memory region
2706 * followed by register physical memory region. Where possible,
2707 * resources are reused instead of deallocated and reallocated.
2708 * @mr: The memory region to modify.
2709 * @mr_rereg_mask: A bit-mask used to indicate which of the following
2710 * properties of the memory region are being modified.
2711 * @pd: If %IB_MR_REREG_PD is set in mr_rereg_mask, this field specifies
2712 * the new protection domain to associated with the memory region,
2713 * otherwise, this parameter is ignored.
2714 * @phys_buf_array: If %IB_MR_REREG_TRANS is set in mr_rereg_mask, this
2715 * field specifies a list of physical buffers to use in the new
2716 * translation, otherwise, this parameter is ignored.
2717 * @num_phys_buf: If %IB_MR_REREG_TRANS is set in mr_rereg_mask, this
2718 * field specifies the size of the phys_buf_array, otherwise, this
2719 * parameter is ignored.
2720 * @mr_access_flags: If %IB_MR_REREG_ACCESS is set in mr_rereg_mask, this
2721 * field specifies the new memory access rights, otherwise, this
2722 * parameter is ignored.
2723 * @iova_start: The offset of the region's starting I/O virtual address.
2724 */
2725int ib_rereg_phys_mr(struct ib_mr *mr,
2726 int mr_rereg_mask,
2727 struct ib_pd *pd,
2728 struct ib_phys_buf *phys_buf_array,
2729 int num_phys_buf,
2730 int mr_access_flags,
2731 u64 *iova_start);
2732
2733/**
2734 * ib_query_mr - Retrieves information about a specific memory region.
2735 * @mr: The memory region to retrieve information about.
2736 * @mr_attr: The attributes of the specified memory region.
2737 */
2738int ib_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr);
2739
2740/**
2741 * ib_dereg_mr - Deregisters a memory region and removes it from the
2742 * HCA translation table.
2743 * @mr: The memory region to deregister.
7083e42e
SM
2744 *
2745 * This function can fail, if the memory region has memory windows bound to it.
1da177e4
LT
2746 */
2747int ib_dereg_mr(struct ib_mr *mr);
2748
17cd3a2d
SG
2749
2750/**
2751 * ib_create_mr - Allocates a memory region that may be used for
2752 * signature handover operations.
2753 * @pd: The protection domain associated with the region.
2754 * @mr_init_attr: memory region init attributes.
2755 */
2756struct ib_mr *ib_create_mr(struct ib_pd *pd,
2757 struct ib_mr_init_attr *mr_init_attr);
2758
2759/**
2760 * ib_destroy_mr - Destroys a memory region that was created using
2761 * ib_create_mr and removes it from HW translation tables.
2762 * @mr: The memory region to destroy.
2763 *
2764 * This function can fail, if the memory region has memory windows bound to it.
2765 */
2766int ib_destroy_mr(struct ib_mr *mr);
2767
00f7ec36
SW
2768/**
2769 * ib_alloc_fast_reg_mr - Allocates memory region usable with the
2770 * IB_WR_FAST_REG_MR send work request.
2771 * @pd: The protection domain associated with the region.
2772 * @max_page_list_len: requested max physical buffer list length to be
2773 * used with fast register work requests for this MR.
2774 */
2775struct ib_mr *ib_alloc_fast_reg_mr(struct ib_pd *pd, int max_page_list_len);
2776
2777/**
2778 * ib_alloc_fast_reg_page_list - Allocates a page list array
2779 * @device - ib device pointer.
2780 * @page_list_len - size of the page list array to be allocated.
2781 *
2782 * This allocates and returns a struct ib_fast_reg_page_list * and a
2783 * page_list array that is at least page_list_len in size. The actual
2784 * size is returned in max_page_list_len. The caller is responsible
2785 * for initializing the contents of the page_list array before posting
2786 * a send work request with the IB_WC_FAST_REG_MR opcode.
2787 *
2788 * The page_list array entries must be translated using one of the
2789 * ib_dma_*() functions just like the addresses passed to
2790 * ib_map_phys_fmr(). Once the ib_post_send() is issued, the struct
2791 * ib_fast_reg_page_list must not be modified by the caller until the
2792 * IB_WC_FAST_REG_MR work request completes.
2793 */
2794struct ib_fast_reg_page_list *ib_alloc_fast_reg_page_list(
2795 struct ib_device *device, int page_list_len);
2796
2797/**
2798 * ib_free_fast_reg_page_list - Deallocates a previously allocated
2799 * page list array.
2800 * @page_list - struct ib_fast_reg_page_list pointer to be deallocated.
2801 */
2802void ib_free_fast_reg_page_list(struct ib_fast_reg_page_list *page_list);
2803
2804/**
2805 * ib_update_fast_reg_key - updates the key portion of the fast_reg MR
2806 * R_Key and L_Key.
2807 * @mr - struct ib_mr pointer to be updated.
2808 * @newkey - new key to be used.
2809 */
2810static inline void ib_update_fast_reg_key(struct ib_mr *mr, u8 newkey)
2811{
2812 mr->lkey = (mr->lkey & 0xffffff00) | newkey;
2813 mr->rkey = (mr->rkey & 0xffffff00) | newkey;
2814}
2815
7083e42e
SM
2816/**
2817 * ib_inc_rkey - increments the key portion of the given rkey. Can be used
2818 * for calculating a new rkey for type 2 memory windows.
2819 * @rkey - the rkey to increment.
2820 */
2821static inline u32 ib_inc_rkey(u32 rkey)
2822{
2823 const u32 mask = 0x000000ff;
2824 return ((rkey + 1) & mask) | (rkey & ~mask);
2825}
2826
1da177e4
LT
2827/**
2828 * ib_alloc_mw - Allocates a memory window.
2829 * @pd: The protection domain associated with the memory window.
7083e42e 2830 * @type: The type of the memory window (1 or 2).
1da177e4 2831 */
7083e42e 2832struct ib_mw *ib_alloc_mw(struct ib_pd *pd, enum ib_mw_type type);
1da177e4
LT
2833
2834/**
2835 * ib_bind_mw - Posts a work request to the send queue of the specified
2836 * QP, which binds the memory window to the given address range and
2837 * remote access attributes.
2838 * @qp: QP to post the bind work request on.
2839 * @mw: The memory window to bind.
2840 * @mw_bind: Specifies information about the memory window, including
2841 * its address range, remote access rights, and associated memory region.
7083e42e
SM
2842 *
2843 * If there is no immediate error, the function will update the rkey member
2844 * of the mw parameter to its new value. The bind operation can still fail
2845 * asynchronously.
1da177e4
LT
2846 */
2847static inline int ib_bind_mw(struct ib_qp *qp,
2848 struct ib_mw *mw,
2849 struct ib_mw_bind *mw_bind)
2850{
2851 /* XXX reference counting in corresponding MR? */
2852 return mw->device->bind_mw ?
2853 mw->device->bind_mw(qp, mw, mw_bind) :
2854 -ENOSYS;
2855}
2856
2857/**
2858 * ib_dealloc_mw - Deallocates a memory window.
2859 * @mw: The memory window to deallocate.
2860 */
2861int ib_dealloc_mw(struct ib_mw *mw);
2862
2863/**
2864 * ib_alloc_fmr - Allocates a unmapped fast memory region.
2865 * @pd: The protection domain associated with the unmapped region.
2866 * @mr_access_flags: Specifies the memory access rights.
2867 * @fmr_attr: Attributes of the unmapped region.
2868 *
2869 * A fast memory region must be mapped before it can be used as part of
2870 * a work request.
2871 */
2872struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd,
2873 int mr_access_flags,
2874 struct ib_fmr_attr *fmr_attr);
2875
2876/**
2877 * ib_map_phys_fmr - Maps a list of physical pages to a fast memory region.
2878 * @fmr: The fast memory region to associate with the pages.
2879 * @page_list: An array of physical pages to map to the fast memory region.
2880 * @list_len: The number of pages in page_list.
2881 * @iova: The I/O virtual address to use with the mapped region.
2882 */
2883static inline int ib_map_phys_fmr(struct ib_fmr *fmr,
2884 u64 *page_list, int list_len,
2885 u64 iova)
2886{
2887 return fmr->device->map_phys_fmr(fmr, page_list, list_len, iova);
2888}
2889
2890/**
2891 * ib_unmap_fmr - Removes the mapping from a list of fast memory regions.
2892 * @fmr_list: A linked list of fast memory regions to unmap.
2893 */
2894int ib_unmap_fmr(struct list_head *fmr_list);
2895
2896/**
2897 * ib_dealloc_fmr - Deallocates a fast memory region.
2898 * @fmr: The fast memory region to deallocate.
2899 */
2900int ib_dealloc_fmr(struct ib_fmr *fmr);
2901
2902/**
2903 * ib_attach_mcast - Attaches the specified QP to a multicast group.
2904 * @qp: QP to attach to the multicast group. The QP must be type
2905 * IB_QPT_UD.
2906 * @gid: Multicast group GID.
2907 * @lid: Multicast group LID in host byte order.
2908 *
2909 * In order to send and receive multicast packets, subnet
2910 * administration must have created the multicast group and configured
2911 * the fabric appropriately. The port associated with the specified
2912 * QP must also be a member of the multicast group.
2913 */
2914int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
2915
2916/**
2917 * ib_detach_mcast - Detaches the specified QP from a multicast group.
2918 * @qp: QP to detach from the multicast group.
2919 * @gid: Multicast group GID.
2920 * @lid: Multicast group LID in host byte order.
2921 */
2922int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
2923
59991f94
SH
2924/**
2925 * ib_alloc_xrcd - Allocates an XRC domain.
2926 * @device: The device on which to allocate the XRC domain.
2927 */
2928struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device);
2929
2930/**
2931 * ib_dealloc_xrcd - Deallocates an XRC domain.
2932 * @xrcd: The XRC domain to deallocate.
2933 */
2934int ib_dealloc_xrcd(struct ib_xrcd *xrcd);
2935
319a441d
HHZ
2936struct ib_flow *ib_create_flow(struct ib_qp *qp,
2937 struct ib_flow_attr *flow_attr, int domain);
2938int ib_destroy_flow(struct ib_flow *flow_id);
2939
1c636f80
EC
2940static inline int ib_check_mr_access(int flags)
2941{
2942 /*
2943 * Local write permission is required if remote write or
2944 * remote atomic permission is also requested.
2945 */
2946 if (flags & (IB_ACCESS_REMOTE_ATOMIC | IB_ACCESS_REMOTE_WRITE) &&
2947 !(flags & IB_ACCESS_LOCAL_WRITE))
2948 return -EINVAL;
2949
2950 return 0;
2951}
2952
1b01d335
SG
2953/**
2954 * ib_check_mr_status: lightweight check of MR status.
2955 * This routine may provide status checks on a selected
2956 * ib_mr. first use is for signature status check.
2957 *
2958 * @mr: A memory region.
2959 * @check_mask: Bitmask of which checks to perform from
2960 * ib_mr_status_check enumeration.
2961 * @mr_status: The container of relevant status checks.
2962 * failed checks will be indicated in the status bitmask
2963 * and the relevant info shall be in the error item.
2964 */
2965int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
2966 struct ib_mr_status *mr_status);
2967
1da177e4 2968#endif /* IB_VERBS_H */