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CommitLineData
1da177e4
LT
1/*
2 * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
3 * Copyright (c) 2004 Infinicon Corporation. All rights reserved.
4 * Copyright (c) 2004 Intel Corporation. All rights reserved.
5 * Copyright (c) 2004 Topspin Corporation. All rights reserved.
6 * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
2a1d9b7f 7 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
f7c6a7b5 8 * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved.
1da177e4
LT
9 *
10 * This software is available to you under a choice of one of two
11 * licenses. You may choose to be licensed under the terms of the GNU
12 * General Public License (GPL) Version 2, available from the file
13 * COPYING in the main directory of this source tree, or the
14 * OpenIB.org BSD license below:
15 *
16 * Redistribution and use in source and binary forms, with or
17 * without modification, are permitted provided that the following
18 * conditions are met:
19 *
20 * - Redistributions of source code must retain the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer.
23 *
24 * - Redistributions in binary form must reproduce the above
25 * copyright notice, this list of conditions and the following
26 * disclaimer in the documentation and/or other materials
27 * provided with the distribution.
28 *
29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
33 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * SOFTWARE.
1da177e4
LT
37 */
38
39#if !defined(IB_VERBS_H)
40#define IB_VERBS_H
41
42#include <linux/types.h>
43#include <linux/device.h>
9b513090
RC
44#include <linux/mm.h>
45#include <linux/dma-mapping.h>
459d6e2a 46#include <linux/kref.h>
bfb3ea12
DB
47#include <linux/list.h>
48#include <linux/rwsem.h>
87ae9afd 49#include <linux/scatterlist.h>
f0626710 50#include <linux/workqueue.h>
9268f72d 51#include <linux/socket.h>
14d3a3b2 52#include <linux/irq_poll.h>
dd5f03be 53#include <uapi/linux/if_ether.h>
c865f246
SK
54#include <net/ipv6.h>
55#include <net/ip.h>
301a721e
MB
56#include <linux/string.h>
57#include <linux/slab.h>
e2773c06 58
50174a7f 59#include <linux/if_link.h>
60063497 60#include <linux/atomic.h>
882214e2 61#include <linux/mmu_notifier.h>
e2773c06 62#include <asm/uaccess.h>
1da177e4 63
f0626710 64extern struct workqueue_struct *ib_wq;
14d3a3b2 65extern struct workqueue_struct *ib_comp_wq;
f0626710 66
1da177e4
LT
67union ib_gid {
68 u8 raw[16];
69 struct {
97f52eb4
SH
70 __be64 subnet_prefix;
71 __be64 interface_id;
1da177e4
LT
72 } global;
73};
74
e26be1bf
MS
75extern union ib_gid zgid;
76
b39ffa1d
MB
77enum ib_gid_type {
78 /* If link layer is Ethernet, this is RoCE V1 */
79 IB_GID_TYPE_IB = 0,
80 IB_GID_TYPE_ROCE = 0,
7766a99f 81 IB_GID_TYPE_ROCE_UDP_ENCAP = 1,
b39ffa1d
MB
82 IB_GID_TYPE_SIZE
83};
84
7ead4bcb 85#define ROCE_V2_UDP_DPORT 4791
03db3a2d 86struct ib_gid_attr {
b39ffa1d 87 enum ib_gid_type gid_type;
03db3a2d
MB
88 struct net_device *ndev;
89};
90
07ebafba
TT
91enum rdma_node_type {
92 /* IB values map to NodeInfo:NodeType. */
93 RDMA_NODE_IB_CA = 1,
94 RDMA_NODE_IB_SWITCH,
95 RDMA_NODE_IB_ROUTER,
180771a3
UM
96 RDMA_NODE_RNIC,
97 RDMA_NODE_USNIC,
5db5765e 98 RDMA_NODE_USNIC_UDP,
1da177e4
LT
99};
100
a0c1b2a3
EC
101enum {
102 /* set the local administered indication */
103 IB_SA_WELL_KNOWN_GUID = BIT_ULL(57) | 2,
104};
105
07ebafba
TT
106enum rdma_transport_type {
107 RDMA_TRANSPORT_IB,
180771a3 108 RDMA_TRANSPORT_IWARP,
248567f7
UM
109 RDMA_TRANSPORT_USNIC,
110 RDMA_TRANSPORT_USNIC_UDP
07ebafba
TT
111};
112
6b90a6d6
MW
113enum rdma_protocol_type {
114 RDMA_PROTOCOL_IB,
115 RDMA_PROTOCOL_IBOE,
116 RDMA_PROTOCOL_IWARP,
117 RDMA_PROTOCOL_USNIC_UDP
118};
119
8385fd84
RD
120__attribute_const__ enum rdma_transport_type
121rdma_node_get_transport(enum rdma_node_type node_type);
07ebafba 122
c865f246
SK
123enum rdma_network_type {
124 RDMA_NETWORK_IB,
125 RDMA_NETWORK_ROCE_V1 = RDMA_NETWORK_IB,
126 RDMA_NETWORK_IPV4,
127 RDMA_NETWORK_IPV6
128};
129
130static inline enum ib_gid_type ib_network_to_gid_type(enum rdma_network_type network_type)
131{
132 if (network_type == RDMA_NETWORK_IPV4 ||
133 network_type == RDMA_NETWORK_IPV6)
134 return IB_GID_TYPE_ROCE_UDP_ENCAP;
135
136 /* IB_GID_TYPE_IB same as RDMA_NETWORK_ROCE_V1 */
137 return IB_GID_TYPE_IB;
138}
139
140static inline enum rdma_network_type ib_gid_to_network_type(enum ib_gid_type gid_type,
141 union ib_gid *gid)
142{
143 if (gid_type == IB_GID_TYPE_IB)
144 return RDMA_NETWORK_IB;
145
146 if (ipv6_addr_v4mapped((struct in6_addr *)gid))
147 return RDMA_NETWORK_IPV4;
148 else
149 return RDMA_NETWORK_IPV6;
150}
151
a3f5adaf
EC
152enum rdma_link_layer {
153 IB_LINK_LAYER_UNSPECIFIED,
154 IB_LINK_LAYER_INFINIBAND,
155 IB_LINK_LAYER_ETHERNET,
156};
157
1da177e4 158enum ib_device_cap_flags {
7ca0bc53
LR
159 IB_DEVICE_RESIZE_MAX_WR = (1 << 0),
160 IB_DEVICE_BAD_PKEY_CNTR = (1 << 1),
161 IB_DEVICE_BAD_QKEY_CNTR = (1 << 2),
162 IB_DEVICE_RAW_MULTI = (1 << 3),
163 IB_DEVICE_AUTO_PATH_MIG = (1 << 4),
164 IB_DEVICE_CHANGE_PHY_PORT = (1 << 5),
165 IB_DEVICE_UD_AV_PORT_ENFORCE = (1 << 6),
166 IB_DEVICE_CURR_QP_STATE_MOD = (1 << 7),
167 IB_DEVICE_SHUTDOWN_PORT = (1 << 8),
168 IB_DEVICE_INIT_TYPE = (1 << 9),
169 IB_DEVICE_PORT_ACTIVE_EVENT = (1 << 10),
170 IB_DEVICE_SYS_IMAGE_GUID = (1 << 11),
171 IB_DEVICE_RC_RNR_NAK_GEN = (1 << 12),
172 IB_DEVICE_SRQ_RESIZE = (1 << 13),
173 IB_DEVICE_N_NOTIFY_CQ = (1 << 14),
b1adc714
CH
174
175 /*
176 * This device supports a per-device lkey or stag that can be
177 * used without performing a memory registration for the local
178 * memory. Note that ULPs should never check this flag, but
179 * instead of use the local_dma_lkey flag in the ib_pd structure,
180 * which will always contain a usable lkey.
181 */
7ca0bc53
LR
182 IB_DEVICE_LOCAL_DMA_LKEY = (1 << 15),
183 IB_DEVICE_RESERVED /* old SEND_W_INV */ = (1 << 16),
184 IB_DEVICE_MEM_WINDOW = (1 << 17),
e0605d91
EC
185 /*
186 * Devices should set IB_DEVICE_UD_IP_SUM if they support
187 * insertion of UDP and TCP checksum on outgoing UD IPoIB
188 * messages and can verify the validity of checksum for
189 * incoming messages. Setting this flag implies that the
190 * IPoIB driver may set NETIF_F_IP_CSUM for datagram mode.
191 */
7ca0bc53
LR
192 IB_DEVICE_UD_IP_CSUM = (1 << 18),
193 IB_DEVICE_UD_TSO = (1 << 19),
194 IB_DEVICE_XRC = (1 << 20),
b1adc714
CH
195
196 /*
197 * This device supports the IB "base memory management extension",
198 * which includes support for fast registrations (IB_WR_REG_MR,
199 * IB_WR_LOCAL_INV and IB_WR_SEND_WITH_INV verbs). This flag should
200 * also be set by any iWarp device which must support FRs to comply
201 * to the iWarp verbs spec. iWarp devices also support the
202 * IB_WR_RDMA_READ_WITH_INV verb for RDMA READs that invalidate the
203 * stag.
204 */
7ca0bc53
LR
205 IB_DEVICE_MEM_MGT_EXTENSIONS = (1 << 21),
206 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK = (1 << 22),
207 IB_DEVICE_MEM_WINDOW_TYPE_2A = (1 << 23),
208 IB_DEVICE_MEM_WINDOW_TYPE_2B = (1 << 24),
209 IB_DEVICE_RC_IP_CSUM = (1 << 25),
210 IB_DEVICE_RAW_IP_CSUM = (1 << 26),
8a06ce59
LR
211 /*
212 * Devices should set IB_DEVICE_CROSS_CHANNEL if they
213 * support execution of WQEs that involve synchronization
214 * of I/O operations with single completion queue managed
215 * by hardware.
216 */
217 IB_DEVICE_CROSS_CHANNEL = (1 << 27),
7ca0bc53
LR
218 IB_DEVICE_MANAGED_FLOW_STEERING = (1 << 29),
219 IB_DEVICE_SIGNATURE_HANDOVER = (1 << 30),
47355b3c 220 IB_DEVICE_ON_DEMAND_PAGING = (1ULL << 31),
f5aa9159 221 IB_DEVICE_SG_GAPS_REG = (1ULL << 32),
c7e162a4
MG
222 IB_DEVICE_VIRTUAL_FUNCTION = (1ULL << 33),
223 IB_DEVICE_RAW_SCATTER_FCS = (1ULL << 34),
1b01d335
SG
224};
225
226enum ib_signature_prot_cap {
227 IB_PROT_T10DIF_TYPE_1 = 1,
228 IB_PROT_T10DIF_TYPE_2 = 1 << 1,
229 IB_PROT_T10DIF_TYPE_3 = 1 << 2,
230};
231
232enum ib_signature_guard_cap {
233 IB_GUARD_T10DIF_CRC = 1,
234 IB_GUARD_T10DIF_CSUM = 1 << 1,
1da177e4
LT
235};
236
237enum ib_atomic_cap {
238 IB_ATOMIC_NONE,
239 IB_ATOMIC_HCA,
240 IB_ATOMIC_GLOB
241};
242
860f10a7
SG
243enum ib_odp_general_cap_bits {
244 IB_ODP_SUPPORT = 1 << 0,
245};
246
247enum ib_odp_transport_cap_bits {
248 IB_ODP_SUPPORT_SEND = 1 << 0,
249 IB_ODP_SUPPORT_RECV = 1 << 1,
250 IB_ODP_SUPPORT_WRITE = 1 << 2,
251 IB_ODP_SUPPORT_READ = 1 << 3,
252 IB_ODP_SUPPORT_ATOMIC = 1 << 4,
253};
254
255struct ib_odp_caps {
256 uint64_t general_caps;
257 struct {
258 uint32_t rc_odp_caps;
259 uint32_t uc_odp_caps;
260 uint32_t ud_odp_caps;
261 } per_transport_caps;
262};
263
b9926b92
MB
264enum ib_cq_creation_flags {
265 IB_CQ_FLAGS_TIMESTAMP_COMPLETION = 1 << 0,
8a06ce59 266 IB_CQ_FLAGS_IGNORE_OVERRUN = 1 << 1,
b9926b92
MB
267};
268
bcf4c1ea
MB
269struct ib_cq_init_attr {
270 unsigned int cqe;
271 int comp_vector;
272 u32 flags;
273};
274
1da177e4
LT
275struct ib_device_attr {
276 u64 fw_ver;
97f52eb4 277 __be64 sys_image_guid;
1da177e4
LT
278 u64 max_mr_size;
279 u64 page_size_cap;
280 u32 vendor_id;
281 u32 vendor_part_id;
282 u32 hw_ver;
283 int max_qp;
284 int max_qp_wr;
fb532d6a 285 u64 device_cap_flags;
1da177e4
LT
286 int max_sge;
287 int max_sge_rd;
288 int max_cq;
289 int max_cqe;
290 int max_mr;
291 int max_pd;
292 int max_qp_rd_atom;
293 int max_ee_rd_atom;
294 int max_res_rd_atom;
295 int max_qp_init_rd_atom;
296 int max_ee_init_rd_atom;
297 enum ib_atomic_cap atomic_cap;
5e80ba8f 298 enum ib_atomic_cap masked_atomic_cap;
1da177e4
LT
299 int max_ee;
300 int max_rdd;
301 int max_mw;
302 int max_raw_ipv6_qp;
303 int max_raw_ethy_qp;
304 int max_mcast_grp;
305 int max_mcast_qp_attach;
306 int max_total_mcast_qp_attach;
307 int max_ah;
308 int max_fmr;
309 int max_map_per_fmr;
310 int max_srq;
311 int max_srq_wr;
312 int max_srq_sge;
00f7ec36 313 unsigned int max_fast_reg_page_list_len;
1da177e4
LT
314 u16 max_pkeys;
315 u8 local_ca_ack_delay;
1b01d335
SG
316 int sig_prot_cap;
317 int sig_guard_cap;
860f10a7 318 struct ib_odp_caps odp_caps;
24306dc6
MB
319 uint64_t timestamp_mask;
320 uint64_t hca_core_clock; /* in KHZ */
1da177e4
LT
321};
322
323enum ib_mtu {
324 IB_MTU_256 = 1,
325 IB_MTU_512 = 2,
326 IB_MTU_1024 = 3,
327 IB_MTU_2048 = 4,
328 IB_MTU_4096 = 5
329};
330
331static inline int ib_mtu_enum_to_int(enum ib_mtu mtu)
332{
333 switch (mtu) {
334 case IB_MTU_256: return 256;
335 case IB_MTU_512: return 512;
336 case IB_MTU_1024: return 1024;
337 case IB_MTU_2048: return 2048;
338 case IB_MTU_4096: return 4096;
339 default: return -1;
340 }
341}
342
343enum ib_port_state {
344 IB_PORT_NOP = 0,
345 IB_PORT_DOWN = 1,
346 IB_PORT_INIT = 2,
347 IB_PORT_ARMED = 3,
348 IB_PORT_ACTIVE = 4,
349 IB_PORT_ACTIVE_DEFER = 5
350};
351
352enum ib_port_cap_flags {
353 IB_PORT_SM = 1 << 1,
354 IB_PORT_NOTICE_SUP = 1 << 2,
355 IB_PORT_TRAP_SUP = 1 << 3,
356 IB_PORT_OPT_IPD_SUP = 1 << 4,
357 IB_PORT_AUTO_MIGR_SUP = 1 << 5,
358 IB_PORT_SL_MAP_SUP = 1 << 6,
359 IB_PORT_MKEY_NVRAM = 1 << 7,
360 IB_PORT_PKEY_NVRAM = 1 << 8,
361 IB_PORT_LED_INFO_SUP = 1 << 9,
362 IB_PORT_SM_DISABLED = 1 << 10,
363 IB_PORT_SYS_IMAGE_GUID_SUP = 1 << 11,
364 IB_PORT_PKEY_SW_EXT_PORT_TRAP_SUP = 1 << 12,
71eeba16 365 IB_PORT_EXTENDED_SPEEDS_SUP = 1 << 14,
1da177e4
LT
366 IB_PORT_CM_SUP = 1 << 16,
367 IB_PORT_SNMP_TUNNEL_SUP = 1 << 17,
368 IB_PORT_REINIT_SUP = 1 << 18,
369 IB_PORT_DEVICE_MGMT_SUP = 1 << 19,
370 IB_PORT_VENDOR_CLASS_SUP = 1 << 20,
371 IB_PORT_DR_NOTICE_SUP = 1 << 21,
372 IB_PORT_CAP_MASK_NOTICE_SUP = 1 << 22,
373 IB_PORT_BOOT_MGMT_SUP = 1 << 23,
374 IB_PORT_LINK_LATENCY_SUP = 1 << 24,
b4a26a27 375 IB_PORT_CLIENT_REG_SUP = 1 << 25,
03db3a2d 376 IB_PORT_IP_BASED_GIDS = 1 << 26,
1da177e4
LT
377};
378
379enum ib_port_width {
380 IB_WIDTH_1X = 1,
381 IB_WIDTH_4X = 2,
382 IB_WIDTH_8X = 4,
383 IB_WIDTH_12X = 8
384};
385
386static inline int ib_width_enum_to_int(enum ib_port_width width)
387{
388 switch (width) {
389 case IB_WIDTH_1X: return 1;
390 case IB_WIDTH_4X: return 4;
391 case IB_WIDTH_8X: return 8;
392 case IB_WIDTH_12X: return 12;
393 default: return -1;
394 }
395}
396
2e96691c
OG
397enum ib_port_speed {
398 IB_SPEED_SDR = 1,
399 IB_SPEED_DDR = 2,
400 IB_SPEED_QDR = 4,
401 IB_SPEED_FDR10 = 8,
402 IB_SPEED_FDR = 16,
403 IB_SPEED_EDR = 32
404};
405
b40f4757
CL
406/**
407 * struct rdma_hw_stats
408 * @timestamp - Used by the core code to track when the last update was
409 * @lifespan - Used by the core code to determine how old the counters
410 * should be before being updated again. Stored in jiffies, defaults
411 * to 10 milliseconds, drivers can override the default be specifying
412 * their own value during their allocation routine.
413 * @name - Array of pointers to static names used for the counters in
414 * directory.
415 * @num_counters - How many hardware counters there are. If name is
416 * shorter than this number, a kernel oops will result. Driver authors
417 * are encouraged to leave BUILD_BUG_ON(ARRAY_SIZE(@name) < num_counters)
418 * in their code to prevent this.
419 * @value - Array of u64 counters that are accessed by the sysfs code and
420 * filled in by the drivers get_stats routine
421 */
422struct rdma_hw_stats {
423 unsigned long timestamp;
424 unsigned long lifespan;
425 const char * const *names;
426 int num_counters;
427 u64 value[];
7f624d02
SW
428};
429
b40f4757
CL
430#define RDMA_HW_STATS_DEFAULT_LIFESPAN 10
431/**
432 * rdma_alloc_hw_stats_struct - Helper function to allocate dynamic struct
433 * for drivers.
434 * @names - Array of static const char *
435 * @num_counters - How many elements in array
436 * @lifespan - How many milliseconds between updates
437 */
438static inline struct rdma_hw_stats *rdma_alloc_hw_stats_struct(
439 const char * const *names, int num_counters,
440 unsigned long lifespan)
441{
442 struct rdma_hw_stats *stats;
443
444 stats = kzalloc(sizeof(*stats) + num_counters * sizeof(u64),
445 GFP_KERNEL);
446 if (!stats)
447 return NULL;
448 stats->names = names;
449 stats->num_counters = num_counters;
450 stats->lifespan = msecs_to_jiffies(lifespan);
451
452 return stats;
453}
454
455
f9b22e35
IW
456/* Define bits for the various functionality this port needs to be supported by
457 * the core.
458 */
459/* Management 0x00000FFF */
460#define RDMA_CORE_CAP_IB_MAD 0x00000001
461#define RDMA_CORE_CAP_IB_SMI 0x00000002
462#define RDMA_CORE_CAP_IB_CM 0x00000004
463#define RDMA_CORE_CAP_IW_CM 0x00000008
464#define RDMA_CORE_CAP_IB_SA 0x00000010
65995fee 465#define RDMA_CORE_CAP_OPA_MAD 0x00000020
f9b22e35
IW
466
467/* Address format 0x000FF000 */
468#define RDMA_CORE_CAP_AF_IB 0x00001000
469#define RDMA_CORE_CAP_ETH_AH 0x00002000
470
471/* Protocol 0xFFF00000 */
472#define RDMA_CORE_CAP_PROT_IB 0x00100000
473#define RDMA_CORE_CAP_PROT_ROCE 0x00200000
474#define RDMA_CORE_CAP_PROT_IWARP 0x00400000
7766a99f 475#define RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP 0x00800000
f9b22e35
IW
476
477#define RDMA_CORE_PORT_IBA_IB (RDMA_CORE_CAP_PROT_IB \
478 | RDMA_CORE_CAP_IB_MAD \
479 | RDMA_CORE_CAP_IB_SMI \
480 | RDMA_CORE_CAP_IB_CM \
481 | RDMA_CORE_CAP_IB_SA \
482 | RDMA_CORE_CAP_AF_IB)
483#define RDMA_CORE_PORT_IBA_ROCE (RDMA_CORE_CAP_PROT_ROCE \
484 | RDMA_CORE_CAP_IB_MAD \
485 | RDMA_CORE_CAP_IB_CM \
f9b22e35
IW
486 | RDMA_CORE_CAP_AF_IB \
487 | RDMA_CORE_CAP_ETH_AH)
7766a99f
MB
488#define RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP \
489 (RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP \
490 | RDMA_CORE_CAP_IB_MAD \
491 | RDMA_CORE_CAP_IB_CM \
492 | RDMA_CORE_CAP_AF_IB \
493 | RDMA_CORE_CAP_ETH_AH)
f9b22e35
IW
494#define RDMA_CORE_PORT_IWARP (RDMA_CORE_CAP_PROT_IWARP \
495 | RDMA_CORE_CAP_IW_CM)
65995fee
IW
496#define RDMA_CORE_PORT_INTEL_OPA (RDMA_CORE_PORT_IBA_IB \
497 | RDMA_CORE_CAP_OPA_MAD)
f9b22e35 498
1da177e4 499struct ib_port_attr {
fad61ad4 500 u64 subnet_prefix;
1da177e4
LT
501 enum ib_port_state state;
502 enum ib_mtu max_mtu;
503 enum ib_mtu active_mtu;
504 int gid_tbl_len;
505 u32 port_cap_flags;
506 u32 max_msg_sz;
507 u32 bad_pkey_cntr;
508 u32 qkey_viol_cntr;
509 u16 pkey_tbl_len;
510 u16 lid;
511 u16 sm_lid;
512 u8 lmc;
513 u8 max_vl_num;
514 u8 sm_sl;
515 u8 subnet_timeout;
516 u8 init_type_reply;
517 u8 active_width;
518 u8 active_speed;
519 u8 phys_state;
a0c1b2a3 520 bool grh_required;
1da177e4
LT
521};
522
523enum ib_device_modify_flags {
c5bcbbb9
RD
524 IB_DEVICE_MODIFY_SYS_IMAGE_GUID = 1 << 0,
525 IB_DEVICE_MODIFY_NODE_DESC = 1 << 1
1da177e4
LT
526};
527
528struct ib_device_modify {
529 u64 sys_image_guid;
c5bcbbb9 530 char node_desc[64];
1da177e4
LT
531};
532
533enum ib_port_modify_flags {
534 IB_PORT_SHUTDOWN = 1,
535 IB_PORT_INIT_TYPE = (1<<2),
536 IB_PORT_RESET_QKEY_CNTR = (1<<3)
537};
538
539struct ib_port_modify {
540 u32 set_port_cap_mask;
541 u32 clr_port_cap_mask;
542 u8 init_type;
543};
544
545enum ib_event_type {
546 IB_EVENT_CQ_ERR,
547 IB_EVENT_QP_FATAL,
548 IB_EVENT_QP_REQ_ERR,
549 IB_EVENT_QP_ACCESS_ERR,
550 IB_EVENT_COMM_EST,
551 IB_EVENT_SQ_DRAINED,
552 IB_EVENT_PATH_MIG,
553 IB_EVENT_PATH_MIG_ERR,
554 IB_EVENT_DEVICE_FATAL,
555 IB_EVENT_PORT_ACTIVE,
556 IB_EVENT_PORT_ERR,
557 IB_EVENT_LID_CHANGE,
558 IB_EVENT_PKEY_CHANGE,
d41fcc67
RD
559 IB_EVENT_SM_CHANGE,
560 IB_EVENT_SRQ_ERR,
561 IB_EVENT_SRQ_LIMIT_REACHED,
63942c9a 562 IB_EVENT_QP_LAST_WQE_REACHED,
761d90ed
OG
563 IB_EVENT_CLIENT_REREGISTER,
564 IB_EVENT_GID_CHANGE,
f213c052 565 IB_EVENT_WQ_FATAL,
1da177e4
LT
566};
567
db7489e0 568const char *__attribute_const__ ib_event_msg(enum ib_event_type event);
2b1b5b60 569
1da177e4
LT
570struct ib_event {
571 struct ib_device *device;
572 union {
573 struct ib_cq *cq;
574 struct ib_qp *qp;
d41fcc67 575 struct ib_srq *srq;
f213c052 576 struct ib_wq *wq;
1da177e4
LT
577 u8 port_num;
578 } element;
579 enum ib_event_type event;
580};
581
582struct ib_event_handler {
583 struct ib_device *device;
584 void (*handler)(struct ib_event_handler *, struct ib_event *);
585 struct list_head list;
586};
587
588#define INIT_IB_EVENT_HANDLER(_ptr, _device, _handler) \
589 do { \
590 (_ptr)->device = _device; \
591 (_ptr)->handler = _handler; \
592 INIT_LIST_HEAD(&(_ptr)->list); \
593 } while (0)
594
595struct ib_global_route {
596 union ib_gid dgid;
597 u32 flow_label;
598 u8 sgid_index;
599 u8 hop_limit;
600 u8 traffic_class;
601};
602
513789ed 603struct ib_grh {
97f52eb4
SH
604 __be32 version_tclass_flow;
605 __be16 paylen;
513789ed
HR
606 u8 next_hdr;
607 u8 hop_limit;
608 union ib_gid sgid;
609 union ib_gid dgid;
610};
611
c865f246
SK
612union rdma_network_hdr {
613 struct ib_grh ibgrh;
614 struct {
615 /* The IB spec states that if it's IPv4, the header
616 * is located in the last 20 bytes of the header.
617 */
618 u8 reserved[20];
619 struct iphdr roce4grh;
620 };
621};
622
1da177e4
LT
623enum {
624 IB_MULTICAST_QPN = 0xffffff
625};
626
f3a7c66b 627#define IB_LID_PERMISSIVE cpu_to_be16(0xFFFF)
b4e64397 628#define IB_MULTICAST_LID_BASE cpu_to_be16(0xC000)
97f52eb4 629
1da177e4
LT
630enum ib_ah_flags {
631 IB_AH_GRH = 1
632};
633
bf6a9e31
JM
634enum ib_rate {
635 IB_RATE_PORT_CURRENT = 0,
636 IB_RATE_2_5_GBPS = 2,
637 IB_RATE_5_GBPS = 5,
638 IB_RATE_10_GBPS = 3,
639 IB_RATE_20_GBPS = 6,
640 IB_RATE_30_GBPS = 4,
641 IB_RATE_40_GBPS = 7,
642 IB_RATE_60_GBPS = 8,
643 IB_RATE_80_GBPS = 9,
71eeba16
MA
644 IB_RATE_120_GBPS = 10,
645 IB_RATE_14_GBPS = 11,
646 IB_RATE_56_GBPS = 12,
647 IB_RATE_112_GBPS = 13,
648 IB_RATE_168_GBPS = 14,
649 IB_RATE_25_GBPS = 15,
650 IB_RATE_100_GBPS = 16,
651 IB_RATE_200_GBPS = 17,
652 IB_RATE_300_GBPS = 18
bf6a9e31
JM
653};
654
655/**
656 * ib_rate_to_mult - Convert the IB rate enum to a multiple of the
657 * base rate of 2.5 Gbit/sec. For example, IB_RATE_5_GBPS will be
658 * converted to 2, since 5 Gbit/sec is 2 * 2.5 Gbit/sec.
659 * @rate: rate to convert.
660 */
8385fd84 661__attribute_const__ int ib_rate_to_mult(enum ib_rate rate);
bf6a9e31 662
71eeba16
MA
663/**
664 * ib_rate_to_mbps - Convert the IB rate enum to Mbps.
665 * For example, IB_RATE_2_5_GBPS will be converted to 2500.
666 * @rate: rate to convert.
667 */
8385fd84 668__attribute_const__ int ib_rate_to_mbps(enum ib_rate rate);
71eeba16 669
17cd3a2d
SG
670
671/**
9bee178b
SG
672 * enum ib_mr_type - memory region type
673 * @IB_MR_TYPE_MEM_REG: memory region that is used for
674 * normal registration
675 * @IB_MR_TYPE_SIGNATURE: memory region that is used for
676 * signature operations (data-integrity
677 * capable regions)
f5aa9159
SG
678 * @IB_MR_TYPE_SG_GAPS: memory region that is capable to
679 * register any arbitrary sg lists (without
680 * the normal mr constraints - see
681 * ib_map_mr_sg)
17cd3a2d 682 */
9bee178b
SG
683enum ib_mr_type {
684 IB_MR_TYPE_MEM_REG,
685 IB_MR_TYPE_SIGNATURE,
f5aa9159 686 IB_MR_TYPE_SG_GAPS,
17cd3a2d
SG
687};
688
1b01d335 689/**
78eda2bb
SG
690 * Signature types
691 * IB_SIG_TYPE_NONE: Unprotected.
692 * IB_SIG_TYPE_T10_DIF: Type T10-DIF
1b01d335 693 */
78eda2bb
SG
694enum ib_signature_type {
695 IB_SIG_TYPE_NONE,
696 IB_SIG_TYPE_T10_DIF,
1b01d335
SG
697};
698
699/**
700 * Signature T10-DIF block-guard types
701 * IB_T10DIF_CRC: Corresponds to T10-PI mandated CRC checksum rules.
702 * IB_T10DIF_CSUM: Corresponds to IP checksum rules.
703 */
704enum ib_t10_dif_bg_type {
705 IB_T10DIF_CRC,
706 IB_T10DIF_CSUM
707};
708
709/**
710 * struct ib_t10_dif_domain - Parameters specific for T10-DIF
711 * domain.
1b01d335
SG
712 * @bg_type: T10-DIF block guard type (CRC|CSUM)
713 * @pi_interval: protection information interval.
714 * @bg: seed of guard computation.
715 * @app_tag: application tag of guard block
716 * @ref_tag: initial guard block reference tag.
78eda2bb
SG
717 * @ref_remap: Indicate wethear the reftag increments each block
718 * @app_escape: Indicate to skip block check if apptag=0xffff
719 * @ref_escape: Indicate to skip block check if reftag=0xffffffff
720 * @apptag_check_mask: check bitmask of application tag.
1b01d335
SG
721 */
722struct ib_t10_dif_domain {
1b01d335
SG
723 enum ib_t10_dif_bg_type bg_type;
724 u16 pi_interval;
725 u16 bg;
726 u16 app_tag;
727 u32 ref_tag;
78eda2bb
SG
728 bool ref_remap;
729 bool app_escape;
730 bool ref_escape;
731 u16 apptag_check_mask;
1b01d335
SG
732};
733
734/**
735 * struct ib_sig_domain - Parameters for signature domain
736 * @sig_type: specific signauture type
737 * @sig: union of all signature domain attributes that may
738 * be used to set domain layout.
739 */
740struct ib_sig_domain {
741 enum ib_signature_type sig_type;
742 union {
743 struct ib_t10_dif_domain dif;
744 } sig;
745};
746
747/**
748 * struct ib_sig_attrs - Parameters for signature handover operation
749 * @check_mask: bitmask for signature byte check (8 bytes)
750 * @mem: memory domain layout desciptor.
751 * @wire: wire domain layout desciptor.
752 */
753struct ib_sig_attrs {
754 u8 check_mask;
755 struct ib_sig_domain mem;
756 struct ib_sig_domain wire;
757};
758
759enum ib_sig_err_type {
760 IB_SIG_BAD_GUARD,
761 IB_SIG_BAD_REFTAG,
762 IB_SIG_BAD_APPTAG,
763};
764
765/**
766 * struct ib_sig_err - signature error descriptor
767 */
768struct ib_sig_err {
769 enum ib_sig_err_type err_type;
770 u32 expected;
771 u32 actual;
772 u64 sig_err_offset;
773 u32 key;
774};
775
776enum ib_mr_status_check {
777 IB_MR_CHECK_SIG_STATUS = 1,
778};
779
780/**
781 * struct ib_mr_status - Memory region status container
782 *
783 * @fail_status: Bitmask of MR checks status. For each
784 * failed check a corresponding status bit is set.
785 * @sig_err: Additional info for IB_MR_CEHCK_SIG_STATUS
786 * failure.
787 */
788struct ib_mr_status {
789 u32 fail_status;
790 struct ib_sig_err sig_err;
791};
792
bf6a9e31
JM
793/**
794 * mult_to_ib_rate - Convert a multiple of 2.5 Gbit/sec to an IB rate
795 * enum.
796 * @mult: multiple to convert.
797 */
8385fd84 798__attribute_const__ enum ib_rate mult_to_ib_rate(int mult);
bf6a9e31 799
1da177e4
LT
800struct ib_ah_attr {
801 struct ib_global_route grh;
802 u16 dlid;
803 u8 sl;
804 u8 src_path_bits;
805 u8 static_rate;
806 u8 ah_flags;
807 u8 port_num;
dd5f03be 808 u8 dmac[ETH_ALEN];
1da177e4
LT
809};
810
811enum ib_wc_status {
812 IB_WC_SUCCESS,
813 IB_WC_LOC_LEN_ERR,
814 IB_WC_LOC_QP_OP_ERR,
815 IB_WC_LOC_EEC_OP_ERR,
816 IB_WC_LOC_PROT_ERR,
817 IB_WC_WR_FLUSH_ERR,
818 IB_WC_MW_BIND_ERR,
819 IB_WC_BAD_RESP_ERR,
820 IB_WC_LOC_ACCESS_ERR,
821 IB_WC_REM_INV_REQ_ERR,
822 IB_WC_REM_ACCESS_ERR,
823 IB_WC_REM_OP_ERR,
824 IB_WC_RETRY_EXC_ERR,
825 IB_WC_RNR_RETRY_EXC_ERR,
826 IB_WC_LOC_RDD_VIOL_ERR,
827 IB_WC_REM_INV_RD_REQ_ERR,
828 IB_WC_REM_ABORT_ERR,
829 IB_WC_INV_EECN_ERR,
830 IB_WC_INV_EEC_STATE_ERR,
831 IB_WC_FATAL_ERR,
832 IB_WC_RESP_TIMEOUT_ERR,
833 IB_WC_GENERAL_ERR
834};
835
db7489e0 836const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status);
2b1b5b60 837
1da177e4
LT
838enum ib_wc_opcode {
839 IB_WC_SEND,
840 IB_WC_RDMA_WRITE,
841 IB_WC_RDMA_READ,
842 IB_WC_COMP_SWAP,
843 IB_WC_FETCH_ADD,
c93570f2 844 IB_WC_LSO,
00f7ec36 845 IB_WC_LOCAL_INV,
4c67e2bf 846 IB_WC_REG_MR,
5e80ba8f
VS
847 IB_WC_MASKED_COMP_SWAP,
848 IB_WC_MASKED_FETCH_ADD,
1da177e4
LT
849/*
850 * Set value of IB_WC_RECV so consumers can test if a completion is a
851 * receive by testing (opcode & IB_WC_RECV).
852 */
853 IB_WC_RECV = 1 << 7,
854 IB_WC_RECV_RDMA_WITH_IMM
855};
856
857enum ib_wc_flags {
858 IB_WC_GRH = 1,
00f7ec36
SW
859 IB_WC_WITH_IMM = (1<<1),
860 IB_WC_WITH_INVALIDATE = (1<<2),
d927d505 861 IB_WC_IP_CSUM_OK = (1<<3),
dd5f03be
MB
862 IB_WC_WITH_SMAC = (1<<4),
863 IB_WC_WITH_VLAN = (1<<5),
c865f246 864 IB_WC_WITH_NETWORK_HDR_TYPE = (1<<6),
1da177e4
LT
865};
866
867struct ib_wc {
14d3a3b2
CH
868 union {
869 u64 wr_id;
870 struct ib_cqe *wr_cqe;
871 };
1da177e4
LT
872 enum ib_wc_status status;
873 enum ib_wc_opcode opcode;
874 u32 vendor_err;
875 u32 byte_len;
062dbb69 876 struct ib_qp *qp;
00f7ec36
SW
877 union {
878 __be32 imm_data;
879 u32 invalidate_rkey;
880 } ex;
1da177e4
LT
881 u32 src_qp;
882 int wc_flags;
883 u16 pkey_index;
884 u16 slid;
885 u8 sl;
886 u8 dlid_path_bits;
887 u8 port_num; /* valid only for DR SMPs on switches */
dd5f03be
MB
888 u8 smac[ETH_ALEN];
889 u16 vlan_id;
c865f246 890 u8 network_hdr_type;
1da177e4
LT
891};
892
ed23a727
RD
893enum ib_cq_notify_flags {
894 IB_CQ_SOLICITED = 1 << 0,
895 IB_CQ_NEXT_COMP = 1 << 1,
896 IB_CQ_SOLICITED_MASK = IB_CQ_SOLICITED | IB_CQ_NEXT_COMP,
897 IB_CQ_REPORT_MISSED_EVENTS = 1 << 2,
1da177e4
LT
898};
899
96104eda 900enum ib_srq_type {
418d5130
SH
901 IB_SRQT_BASIC,
902 IB_SRQT_XRC
96104eda
SH
903};
904
d41fcc67
RD
905enum ib_srq_attr_mask {
906 IB_SRQ_MAX_WR = 1 << 0,
907 IB_SRQ_LIMIT = 1 << 1,
908};
909
910struct ib_srq_attr {
911 u32 max_wr;
912 u32 max_sge;
913 u32 srq_limit;
914};
915
916struct ib_srq_init_attr {
917 void (*event_handler)(struct ib_event *, void *);
918 void *srq_context;
919 struct ib_srq_attr attr;
96104eda 920 enum ib_srq_type srq_type;
418d5130
SH
921
922 union {
923 struct {
924 struct ib_xrcd *xrcd;
925 struct ib_cq *cq;
926 } xrc;
927 } ext;
d41fcc67
RD
928};
929
1da177e4
LT
930struct ib_qp_cap {
931 u32 max_send_wr;
932 u32 max_recv_wr;
933 u32 max_send_sge;
934 u32 max_recv_sge;
935 u32 max_inline_data;
a060b562
CH
936
937 /*
938 * Maximum number of rdma_rw_ctx structures in flight at a time.
939 * ib_create_qp() will calculate the right amount of neededed WRs
940 * and MRs based on this.
941 */
942 u32 max_rdma_ctxs;
1da177e4
LT
943};
944
945enum ib_sig_type {
946 IB_SIGNAL_ALL_WR,
947 IB_SIGNAL_REQ_WR
948};
949
950enum ib_qp_type {
951 /*
952 * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
953 * here (and in that order) since the MAD layer uses them as
954 * indices into a 2-entry table.
955 */
956 IB_QPT_SMI,
957 IB_QPT_GSI,
958
959 IB_QPT_RC,
960 IB_QPT_UC,
961 IB_QPT_UD,
962 IB_QPT_RAW_IPV6,
b42b63cf 963 IB_QPT_RAW_ETHERTYPE,
c938a616 964 IB_QPT_RAW_PACKET = 8,
b42b63cf
SH
965 IB_QPT_XRC_INI = 9,
966 IB_QPT_XRC_TGT,
0134f16b
JM
967 IB_QPT_MAX,
968 /* Reserve a range for qp types internal to the low level driver.
969 * These qp types will not be visible at the IB core layer, so the
970 * IB_QPT_MAX usages should not be affected in the core layer
971 */
972 IB_QPT_RESERVED1 = 0x1000,
973 IB_QPT_RESERVED2,
974 IB_QPT_RESERVED3,
975 IB_QPT_RESERVED4,
976 IB_QPT_RESERVED5,
977 IB_QPT_RESERVED6,
978 IB_QPT_RESERVED7,
979 IB_QPT_RESERVED8,
980 IB_QPT_RESERVED9,
981 IB_QPT_RESERVED10,
1da177e4
LT
982};
983
b846f25a 984enum ib_qp_create_flags {
47ee1b9f
RL
985 IB_QP_CREATE_IPOIB_UD_LSO = 1 << 0,
986 IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK = 1 << 1,
8a06ce59
LR
987 IB_QP_CREATE_CROSS_CHANNEL = 1 << 2,
988 IB_QP_CREATE_MANAGED_SEND = 1 << 3,
989 IB_QP_CREATE_MANAGED_RECV = 1 << 4,
90f1d1b4 990 IB_QP_CREATE_NETIF_QP = 1 << 5,
1b01d335 991 IB_QP_CREATE_SIGNATURE_EN = 1 << 6,
09b93088 992 IB_QP_CREATE_USE_GFP_NOIO = 1 << 7,
b531b909 993 IB_QP_CREATE_SCATTER_FCS = 1 << 8,
d2b57063
JM
994 /* reserve bits 26-31 for low level drivers' internal use */
995 IB_QP_CREATE_RESERVED_START = 1 << 26,
996 IB_QP_CREATE_RESERVED_END = 1 << 31,
b846f25a
EC
997};
998
73c40c61
YH
999/*
1000 * Note: users may not call ib_close_qp or ib_destroy_qp from the event_handler
1001 * callback to destroy the passed in QP.
1002 */
1003
1da177e4
LT
1004struct ib_qp_init_attr {
1005 void (*event_handler)(struct ib_event *, void *);
1006 void *qp_context;
1007 struct ib_cq *send_cq;
1008 struct ib_cq *recv_cq;
1009 struct ib_srq *srq;
b42b63cf 1010 struct ib_xrcd *xrcd; /* XRC TGT QPs only */
1da177e4
LT
1011 struct ib_qp_cap cap;
1012 enum ib_sig_type sq_sig_type;
1013 enum ib_qp_type qp_type;
b846f25a 1014 enum ib_qp_create_flags create_flags;
a060b562
CH
1015
1016 /*
1017 * Only needed for special QP types, or when using the RW API.
1018 */
1019 u8 port_num;
a9017e23 1020 struct ib_rwq_ind_table *rwq_ind_tbl;
1da177e4
LT
1021};
1022
0e0ec7e0
SH
1023struct ib_qp_open_attr {
1024 void (*event_handler)(struct ib_event *, void *);
1025 void *qp_context;
1026 u32 qp_num;
1027 enum ib_qp_type qp_type;
1028};
1029
1da177e4
LT
1030enum ib_rnr_timeout {
1031 IB_RNR_TIMER_655_36 = 0,
1032 IB_RNR_TIMER_000_01 = 1,
1033 IB_RNR_TIMER_000_02 = 2,
1034 IB_RNR_TIMER_000_03 = 3,
1035 IB_RNR_TIMER_000_04 = 4,
1036 IB_RNR_TIMER_000_06 = 5,
1037 IB_RNR_TIMER_000_08 = 6,
1038 IB_RNR_TIMER_000_12 = 7,
1039 IB_RNR_TIMER_000_16 = 8,
1040 IB_RNR_TIMER_000_24 = 9,
1041 IB_RNR_TIMER_000_32 = 10,
1042 IB_RNR_TIMER_000_48 = 11,
1043 IB_RNR_TIMER_000_64 = 12,
1044 IB_RNR_TIMER_000_96 = 13,
1045 IB_RNR_TIMER_001_28 = 14,
1046 IB_RNR_TIMER_001_92 = 15,
1047 IB_RNR_TIMER_002_56 = 16,
1048 IB_RNR_TIMER_003_84 = 17,
1049 IB_RNR_TIMER_005_12 = 18,
1050 IB_RNR_TIMER_007_68 = 19,
1051 IB_RNR_TIMER_010_24 = 20,
1052 IB_RNR_TIMER_015_36 = 21,
1053 IB_RNR_TIMER_020_48 = 22,
1054 IB_RNR_TIMER_030_72 = 23,
1055 IB_RNR_TIMER_040_96 = 24,
1056 IB_RNR_TIMER_061_44 = 25,
1057 IB_RNR_TIMER_081_92 = 26,
1058 IB_RNR_TIMER_122_88 = 27,
1059 IB_RNR_TIMER_163_84 = 28,
1060 IB_RNR_TIMER_245_76 = 29,
1061 IB_RNR_TIMER_327_68 = 30,
1062 IB_RNR_TIMER_491_52 = 31
1063};
1064
1065enum ib_qp_attr_mask {
1066 IB_QP_STATE = 1,
1067 IB_QP_CUR_STATE = (1<<1),
1068 IB_QP_EN_SQD_ASYNC_NOTIFY = (1<<2),
1069 IB_QP_ACCESS_FLAGS = (1<<3),
1070 IB_QP_PKEY_INDEX = (1<<4),
1071 IB_QP_PORT = (1<<5),
1072 IB_QP_QKEY = (1<<6),
1073 IB_QP_AV = (1<<7),
1074 IB_QP_PATH_MTU = (1<<8),
1075 IB_QP_TIMEOUT = (1<<9),
1076 IB_QP_RETRY_CNT = (1<<10),
1077 IB_QP_RNR_RETRY = (1<<11),
1078 IB_QP_RQ_PSN = (1<<12),
1079 IB_QP_MAX_QP_RD_ATOMIC = (1<<13),
1080 IB_QP_ALT_PATH = (1<<14),
1081 IB_QP_MIN_RNR_TIMER = (1<<15),
1082 IB_QP_SQ_PSN = (1<<16),
1083 IB_QP_MAX_DEST_RD_ATOMIC = (1<<17),
1084 IB_QP_PATH_MIG_STATE = (1<<18),
1085 IB_QP_CAP = (1<<19),
dd5f03be 1086 IB_QP_DEST_QPN = (1<<20),
aa744cc0
MB
1087 IB_QP_RESERVED1 = (1<<21),
1088 IB_QP_RESERVED2 = (1<<22),
1089 IB_QP_RESERVED3 = (1<<23),
1090 IB_QP_RESERVED4 = (1<<24),
1da177e4
LT
1091};
1092
1093enum ib_qp_state {
1094 IB_QPS_RESET,
1095 IB_QPS_INIT,
1096 IB_QPS_RTR,
1097 IB_QPS_RTS,
1098 IB_QPS_SQD,
1099 IB_QPS_SQE,
1100 IB_QPS_ERR
1101};
1102
1103enum ib_mig_state {
1104 IB_MIG_MIGRATED,
1105 IB_MIG_REARM,
1106 IB_MIG_ARMED
1107};
1108
7083e42e
SM
1109enum ib_mw_type {
1110 IB_MW_TYPE_1 = 1,
1111 IB_MW_TYPE_2 = 2
1112};
1113
1da177e4
LT
1114struct ib_qp_attr {
1115 enum ib_qp_state qp_state;
1116 enum ib_qp_state cur_qp_state;
1117 enum ib_mtu path_mtu;
1118 enum ib_mig_state path_mig_state;
1119 u32 qkey;
1120 u32 rq_psn;
1121 u32 sq_psn;
1122 u32 dest_qp_num;
1123 int qp_access_flags;
1124 struct ib_qp_cap cap;
1125 struct ib_ah_attr ah_attr;
1126 struct ib_ah_attr alt_ah_attr;
1127 u16 pkey_index;
1128 u16 alt_pkey_index;
1129 u8 en_sqd_async_notify;
1130 u8 sq_draining;
1131 u8 max_rd_atomic;
1132 u8 max_dest_rd_atomic;
1133 u8 min_rnr_timer;
1134 u8 port_num;
1135 u8 timeout;
1136 u8 retry_cnt;
1137 u8 rnr_retry;
1138 u8 alt_port_num;
1139 u8 alt_timeout;
1140};
1141
1142enum ib_wr_opcode {
1143 IB_WR_RDMA_WRITE,
1144 IB_WR_RDMA_WRITE_WITH_IMM,
1145 IB_WR_SEND,
1146 IB_WR_SEND_WITH_IMM,
1147 IB_WR_RDMA_READ,
1148 IB_WR_ATOMIC_CMP_AND_SWP,
c93570f2 1149 IB_WR_ATOMIC_FETCH_AND_ADD,
0f39cf3d
RD
1150 IB_WR_LSO,
1151 IB_WR_SEND_WITH_INV,
00f7ec36
SW
1152 IB_WR_RDMA_READ_WITH_INV,
1153 IB_WR_LOCAL_INV,
4c67e2bf 1154 IB_WR_REG_MR,
5e80ba8f
VS
1155 IB_WR_MASKED_ATOMIC_CMP_AND_SWP,
1156 IB_WR_MASKED_ATOMIC_FETCH_AND_ADD,
1b01d335 1157 IB_WR_REG_SIG_MR,
0134f16b
JM
1158 /* reserve values for low level drivers' internal use.
1159 * These values will not be used at all in the ib core layer.
1160 */
1161 IB_WR_RESERVED1 = 0xf0,
1162 IB_WR_RESERVED2,
1163 IB_WR_RESERVED3,
1164 IB_WR_RESERVED4,
1165 IB_WR_RESERVED5,
1166 IB_WR_RESERVED6,
1167 IB_WR_RESERVED7,
1168 IB_WR_RESERVED8,
1169 IB_WR_RESERVED9,
1170 IB_WR_RESERVED10,
1da177e4
LT
1171};
1172
1173enum ib_send_flags {
1174 IB_SEND_FENCE = 1,
1175 IB_SEND_SIGNALED = (1<<1),
1176 IB_SEND_SOLICITED = (1<<2),
e0605d91 1177 IB_SEND_INLINE = (1<<3),
0134f16b
JM
1178 IB_SEND_IP_CSUM = (1<<4),
1179
1180 /* reserve bits 26-31 for low level drivers' internal use */
1181 IB_SEND_RESERVED_START = (1 << 26),
1182 IB_SEND_RESERVED_END = (1 << 31),
1da177e4
LT
1183};
1184
1185struct ib_sge {
1186 u64 addr;
1187 u32 length;
1188 u32 lkey;
1189};
1190
14d3a3b2
CH
1191struct ib_cqe {
1192 void (*done)(struct ib_cq *cq, struct ib_wc *wc);
1193};
1194
1da177e4
LT
1195struct ib_send_wr {
1196 struct ib_send_wr *next;
14d3a3b2
CH
1197 union {
1198 u64 wr_id;
1199 struct ib_cqe *wr_cqe;
1200 };
1da177e4
LT
1201 struct ib_sge *sg_list;
1202 int num_sge;
1203 enum ib_wr_opcode opcode;
1204 int send_flags;
0f39cf3d
RD
1205 union {
1206 __be32 imm_data;
1207 u32 invalidate_rkey;
1208 } ex;
1da177e4
LT
1209};
1210
e622f2f4
CH
1211struct ib_rdma_wr {
1212 struct ib_send_wr wr;
1213 u64 remote_addr;
1214 u32 rkey;
1215};
1216
1217static inline struct ib_rdma_wr *rdma_wr(struct ib_send_wr *wr)
1218{
1219 return container_of(wr, struct ib_rdma_wr, wr);
1220}
1221
1222struct ib_atomic_wr {
1223 struct ib_send_wr wr;
1224 u64 remote_addr;
1225 u64 compare_add;
1226 u64 swap;
1227 u64 compare_add_mask;
1228 u64 swap_mask;
1229 u32 rkey;
1230};
1231
1232static inline struct ib_atomic_wr *atomic_wr(struct ib_send_wr *wr)
1233{
1234 return container_of(wr, struct ib_atomic_wr, wr);
1235}
1236
1237struct ib_ud_wr {
1238 struct ib_send_wr wr;
1239 struct ib_ah *ah;
1240 void *header;
1241 int hlen;
1242 int mss;
1243 u32 remote_qpn;
1244 u32 remote_qkey;
1245 u16 pkey_index; /* valid for GSI only */
1246 u8 port_num; /* valid for DR SMPs on switch only */
1247};
1248
1249static inline struct ib_ud_wr *ud_wr(struct ib_send_wr *wr)
1250{
1251 return container_of(wr, struct ib_ud_wr, wr);
1252}
1253
4c67e2bf
SG
1254struct ib_reg_wr {
1255 struct ib_send_wr wr;
1256 struct ib_mr *mr;
1257 u32 key;
1258 int access;
1259};
1260
1261static inline struct ib_reg_wr *reg_wr(struct ib_send_wr *wr)
1262{
1263 return container_of(wr, struct ib_reg_wr, wr);
1264}
1265
e622f2f4
CH
1266struct ib_sig_handover_wr {
1267 struct ib_send_wr wr;
1268 struct ib_sig_attrs *sig_attrs;
1269 struct ib_mr *sig_mr;
1270 int access_flags;
1271 struct ib_sge *prot;
1272};
1273
1274static inline struct ib_sig_handover_wr *sig_handover_wr(struct ib_send_wr *wr)
1275{
1276 return container_of(wr, struct ib_sig_handover_wr, wr);
1277}
1278
1da177e4
LT
1279struct ib_recv_wr {
1280 struct ib_recv_wr *next;
14d3a3b2
CH
1281 union {
1282 u64 wr_id;
1283 struct ib_cqe *wr_cqe;
1284 };
1da177e4
LT
1285 struct ib_sge *sg_list;
1286 int num_sge;
1287};
1288
1289enum ib_access_flags {
1290 IB_ACCESS_LOCAL_WRITE = 1,
1291 IB_ACCESS_REMOTE_WRITE = (1<<1),
1292 IB_ACCESS_REMOTE_READ = (1<<2),
1293 IB_ACCESS_REMOTE_ATOMIC = (1<<3),
7083e42e 1294 IB_ACCESS_MW_BIND = (1<<4),
860f10a7
SG
1295 IB_ZERO_BASED = (1<<5),
1296 IB_ACCESS_ON_DEMAND = (1<<6),
1da177e4
LT
1297};
1298
b7d3e0a9
CH
1299/*
1300 * XXX: these are apparently used for ->rereg_user_mr, no idea why they
1301 * are hidden here instead of a uapi header!
1302 */
1da177e4
LT
1303enum ib_mr_rereg_flags {
1304 IB_MR_REREG_TRANS = 1,
1305 IB_MR_REREG_PD = (1<<1),
7e6edb9b
MB
1306 IB_MR_REREG_ACCESS = (1<<2),
1307 IB_MR_REREG_SUPPORTED = ((IB_MR_REREG_ACCESS << 1) - 1)
1da177e4
LT
1308};
1309
1da177e4
LT
1310struct ib_fmr_attr {
1311 int max_pages;
1312 int max_maps;
d36f34aa 1313 u8 page_shift;
1da177e4
LT
1314};
1315
882214e2
HE
1316struct ib_umem;
1317
e2773c06
RD
1318struct ib_ucontext {
1319 struct ib_device *device;
1320 struct list_head pd_list;
1321 struct list_head mr_list;
1322 struct list_head mw_list;
1323 struct list_head cq_list;
1324 struct list_head qp_list;
1325 struct list_head srq_list;
1326 struct list_head ah_list;
53d0bd1e 1327 struct list_head xrcd_list;
436f2ad0 1328 struct list_head rule_list;
f213c052 1329 struct list_head wq_list;
de019a94 1330 struct list_head rwq_ind_tbl_list;
f7c6a7b5 1331 int closing;
8ada2c1c
SR
1332
1333 struct pid *tgid;
882214e2
HE
1334#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
1335 struct rb_root umem_tree;
1336 /*
1337 * Protects .umem_rbroot and tree, as well as odp_mrs_count and
1338 * mmu notifiers registration.
1339 */
1340 struct rw_semaphore umem_rwsem;
1341 void (*invalidate_range)(struct ib_umem *umem,
1342 unsigned long start, unsigned long end);
1343
1344 struct mmu_notifier mn;
1345 atomic_t notifier_count;
1346 /* A list of umems that don't have private mmu notifier counters yet. */
1347 struct list_head no_private_counters;
1348 int odp_mrs_count;
1349#endif
e2773c06
RD
1350};
1351
1352struct ib_uobject {
1353 u64 user_handle; /* handle given to us by userspace */
1354 struct ib_ucontext *context; /* associated user context */
9ead190b 1355 void *object; /* containing object */
e2773c06 1356 struct list_head list; /* link to context's list */
b3d636b0 1357 int id; /* index into kernel idr */
9ead190b
RD
1358 struct kref ref;
1359 struct rw_semaphore mutex; /* protects .live */
d144da8c 1360 struct rcu_head rcu; /* kfree_rcu() overhead */
9ead190b 1361 int live;
e2773c06
RD
1362};
1363
e2773c06 1364struct ib_udata {
309243ec 1365 const void __user *inbuf;
e2773c06
RD
1366 void __user *outbuf;
1367 size_t inlen;
1368 size_t outlen;
1369};
1370
1da177e4 1371struct ib_pd {
96249d70 1372 u32 local_dma_lkey;
e2773c06
RD
1373 struct ib_device *device;
1374 struct ib_uobject *uobject;
1375 atomic_t usecnt; /* count all resources */
96249d70 1376 struct ib_mr *local_mr;
1da177e4
LT
1377};
1378
59991f94
SH
1379struct ib_xrcd {
1380 struct ib_device *device;
d3d72d90 1381 atomic_t usecnt; /* count all exposed resources */
53d0bd1e 1382 struct inode *inode;
d3d72d90
SH
1383
1384 struct mutex tgt_qp_mutex;
1385 struct list_head tgt_qp_list;
59991f94
SH
1386};
1387
1da177e4
LT
1388struct ib_ah {
1389 struct ib_device *device;
1390 struct ib_pd *pd;
e2773c06 1391 struct ib_uobject *uobject;
1da177e4
LT
1392};
1393
1394typedef void (*ib_comp_handler)(struct ib_cq *cq, void *cq_context);
1395
14d3a3b2
CH
1396enum ib_poll_context {
1397 IB_POLL_DIRECT, /* caller context, no hw completions */
1398 IB_POLL_SOFTIRQ, /* poll from softirq context */
1399 IB_POLL_WORKQUEUE, /* poll from workqueue */
1400};
1401
1da177e4 1402struct ib_cq {
e2773c06
RD
1403 struct ib_device *device;
1404 struct ib_uobject *uobject;
1405 ib_comp_handler comp_handler;
1406 void (*event_handler)(struct ib_event *, void *);
4deccd6d 1407 void *cq_context;
e2773c06
RD
1408 int cqe;
1409 atomic_t usecnt; /* count number of work queues */
14d3a3b2
CH
1410 enum ib_poll_context poll_ctx;
1411 struct ib_wc *wc;
1412 union {
1413 struct irq_poll iop;
1414 struct work_struct work;
1415 };
1da177e4
LT
1416};
1417
1418struct ib_srq {
d41fcc67
RD
1419 struct ib_device *device;
1420 struct ib_pd *pd;
1421 struct ib_uobject *uobject;
1422 void (*event_handler)(struct ib_event *, void *);
1423 void *srq_context;
96104eda 1424 enum ib_srq_type srq_type;
1da177e4 1425 atomic_t usecnt;
418d5130
SH
1426
1427 union {
1428 struct {
1429 struct ib_xrcd *xrcd;
1430 struct ib_cq *cq;
1431 u32 srq_num;
1432 } xrc;
1433 } ext;
1da177e4
LT
1434};
1435
5fd251c8
YH
1436enum ib_wq_type {
1437 IB_WQT_RQ
1438};
1439
1440enum ib_wq_state {
1441 IB_WQS_RESET,
1442 IB_WQS_RDY,
1443 IB_WQS_ERR
1444};
1445
1446struct ib_wq {
1447 struct ib_device *device;
1448 struct ib_uobject *uobject;
1449 void *wq_context;
1450 void (*event_handler)(struct ib_event *, void *);
1451 struct ib_pd *pd;
1452 struct ib_cq *cq;
1453 u32 wq_num;
1454 enum ib_wq_state state;
1455 enum ib_wq_type wq_type;
1456 atomic_t usecnt;
1457};
1458
1459struct ib_wq_init_attr {
1460 void *wq_context;
1461 enum ib_wq_type wq_type;
1462 u32 max_wr;
1463 u32 max_sge;
1464 struct ib_cq *cq;
1465 void (*event_handler)(struct ib_event *, void *);
1466};
1467
1468enum ib_wq_attr_mask {
1469 IB_WQ_STATE = 1 << 0,
1470 IB_WQ_CUR_STATE = 1 << 1,
1471};
1472
1473struct ib_wq_attr {
1474 enum ib_wq_state wq_state;
1475 enum ib_wq_state curr_wq_state;
1476};
1477
6d39786b
YH
1478struct ib_rwq_ind_table {
1479 struct ib_device *device;
1480 struct ib_uobject *uobject;
1481 atomic_t usecnt;
1482 u32 ind_tbl_num;
1483 u32 log_ind_tbl_size;
1484 struct ib_wq **ind_tbl;
1485};
1486
1487struct ib_rwq_ind_table_init_attr {
1488 u32 log_ind_tbl_size;
1489 /* Each entry is a pointer to Receive Work Queue */
1490 struct ib_wq **ind_tbl;
1491};
1492
632bc3f6
BVA
1493/*
1494 * @max_write_sge: Maximum SGE elements per RDMA WRITE request.
1495 * @max_read_sge: Maximum SGE elements per RDMA READ request.
1496 */
1da177e4
LT
1497struct ib_qp {
1498 struct ib_device *device;
1499 struct ib_pd *pd;
1500 struct ib_cq *send_cq;
1501 struct ib_cq *recv_cq;
fffb0383
CH
1502 spinlock_t mr_lock;
1503 int mrs_used;
a060b562 1504 struct list_head rdma_mrs;
0e353e34 1505 struct list_head sig_mrs;
1da177e4 1506 struct ib_srq *srq;
b42b63cf 1507 struct ib_xrcd *xrcd; /* XRC TGT QPs only */
d3d72d90 1508 struct list_head xrcd_list;
fffb0383 1509
319a441d
HHZ
1510 /* count times opened, mcast attaches, flow attaches */
1511 atomic_t usecnt;
0e0ec7e0
SH
1512 struct list_head open_list;
1513 struct ib_qp *real_qp;
e2773c06 1514 struct ib_uobject *uobject;
1da177e4
LT
1515 void (*event_handler)(struct ib_event *, void *);
1516 void *qp_context;
1517 u32 qp_num;
632bc3f6
BVA
1518 u32 max_write_sge;
1519 u32 max_read_sge;
1da177e4 1520 enum ib_qp_type qp_type;
a9017e23 1521 struct ib_rwq_ind_table *rwq_ind_tbl;
1da177e4
LT
1522};
1523
1524struct ib_mr {
e2773c06
RD
1525 struct ib_device *device;
1526 struct ib_pd *pd;
e2773c06
RD
1527 u32 lkey;
1528 u32 rkey;
4c67e2bf
SG
1529 u64 iova;
1530 u32 length;
1531 unsigned int page_size;
d4a85c30 1532 bool need_inval;
fffb0383
CH
1533 union {
1534 struct ib_uobject *uobject; /* user */
1535 struct list_head qp_entry; /* FR */
1536 };
1da177e4
LT
1537};
1538
1539struct ib_mw {
1540 struct ib_device *device;
1541 struct ib_pd *pd;
e2773c06 1542 struct ib_uobject *uobject;
1da177e4 1543 u32 rkey;
7083e42e 1544 enum ib_mw_type type;
1da177e4
LT
1545};
1546
1547struct ib_fmr {
1548 struct ib_device *device;
1549 struct ib_pd *pd;
1550 struct list_head list;
1551 u32 lkey;
1552 u32 rkey;
1553};
1554
319a441d
HHZ
1555/* Supported steering options */
1556enum ib_flow_attr_type {
1557 /* steering according to rule specifications */
1558 IB_FLOW_ATTR_NORMAL = 0x0,
1559 /* default unicast and multicast rule -
1560 * receive all Eth traffic which isn't steered to any QP
1561 */
1562 IB_FLOW_ATTR_ALL_DEFAULT = 0x1,
1563 /* default multicast rule -
1564 * receive all Eth multicast traffic which isn't steered to any QP
1565 */
1566 IB_FLOW_ATTR_MC_DEFAULT = 0x2,
1567 /* sniffer rule - receive all port traffic */
1568 IB_FLOW_ATTR_SNIFFER = 0x3
1569};
1570
1571/* Supported steering header types */
1572enum ib_flow_spec_type {
1573 /* L2 headers*/
1574 IB_FLOW_SPEC_ETH = 0x20,
240ae00e 1575 IB_FLOW_SPEC_IB = 0x22,
319a441d
HHZ
1576 /* L3 header*/
1577 IB_FLOW_SPEC_IPV4 = 0x30,
4c2aae71 1578 IB_FLOW_SPEC_IPV6 = 0x31,
319a441d
HHZ
1579 /* L4 headers*/
1580 IB_FLOW_SPEC_TCP = 0x40,
1581 IB_FLOW_SPEC_UDP = 0x41
1582};
240ae00e 1583#define IB_FLOW_SPEC_LAYER_MASK 0xF0
22878dbc
MB
1584#define IB_FLOW_SPEC_SUPPORT_LAYERS 4
1585
319a441d
HHZ
1586/* Flow steering rule priority is set according to it's domain.
1587 * Lower domain value means higher priority.
1588 */
1589enum ib_flow_domain {
1590 IB_FLOW_DOMAIN_USER,
1591 IB_FLOW_DOMAIN_ETHTOOL,
1592 IB_FLOW_DOMAIN_RFS,
1593 IB_FLOW_DOMAIN_NIC,
1594 IB_FLOW_DOMAIN_NUM /* Must be last */
1595};
1596
a3100a78
MV
1597enum ib_flow_flags {
1598 IB_FLOW_ATTR_FLAGS_DONT_TRAP = 1UL << 1, /* Continue match, no steal */
1599 IB_FLOW_ATTR_FLAGS_RESERVED = 1UL << 2 /* Must be last */
1600};
1601
319a441d
HHZ
1602struct ib_flow_eth_filter {
1603 u8 dst_mac[6];
1604 u8 src_mac[6];
1605 __be16 ether_type;
1606 __be16 vlan_tag;
1607};
1608
1609struct ib_flow_spec_eth {
1610 enum ib_flow_spec_type type;
1611 u16 size;
1612 struct ib_flow_eth_filter val;
1613 struct ib_flow_eth_filter mask;
1614};
1615
240ae00e
MB
1616struct ib_flow_ib_filter {
1617 __be16 dlid;
1618 __u8 sl;
1619};
1620
1621struct ib_flow_spec_ib {
1622 enum ib_flow_spec_type type;
1623 u16 size;
1624 struct ib_flow_ib_filter val;
1625 struct ib_flow_ib_filter mask;
1626};
1627
319a441d
HHZ
1628struct ib_flow_ipv4_filter {
1629 __be32 src_ip;
1630 __be32 dst_ip;
1631};
1632
1633struct ib_flow_spec_ipv4 {
1634 enum ib_flow_spec_type type;
1635 u16 size;
1636 struct ib_flow_ipv4_filter val;
1637 struct ib_flow_ipv4_filter mask;
1638};
1639
4c2aae71
MG
1640struct ib_flow_ipv6_filter {
1641 u8 src_ip[16];
1642 u8 dst_ip[16];
1643};
1644
1645struct ib_flow_spec_ipv6 {
1646 enum ib_flow_spec_type type;
1647 u16 size;
1648 struct ib_flow_ipv6_filter val;
1649 struct ib_flow_ipv6_filter mask;
1650};
1651
319a441d
HHZ
1652struct ib_flow_tcp_udp_filter {
1653 __be16 dst_port;
1654 __be16 src_port;
1655};
1656
1657struct ib_flow_spec_tcp_udp {
1658 enum ib_flow_spec_type type;
1659 u16 size;
1660 struct ib_flow_tcp_udp_filter val;
1661 struct ib_flow_tcp_udp_filter mask;
1662};
1663
1664union ib_flow_spec {
1665 struct {
1666 enum ib_flow_spec_type type;
1667 u16 size;
1668 };
1669 struct ib_flow_spec_eth eth;
240ae00e 1670 struct ib_flow_spec_ib ib;
319a441d
HHZ
1671 struct ib_flow_spec_ipv4 ipv4;
1672 struct ib_flow_spec_tcp_udp tcp_udp;
4c2aae71 1673 struct ib_flow_spec_ipv6 ipv6;
319a441d
HHZ
1674};
1675
1676struct ib_flow_attr {
1677 enum ib_flow_attr_type type;
1678 u16 size;
1679 u16 priority;
1680 u32 flags;
1681 u8 num_of_specs;
1682 u8 port;
1683 /* Following are the optional layers according to user request
1684 * struct ib_flow_spec_xxx
1685 * struct ib_flow_spec_yyy
1686 */
1687};
1688
1689struct ib_flow {
1690 struct ib_qp *qp;
1691 struct ib_uobject *uobject;
1692};
1693
4cd7c947 1694struct ib_mad_hdr;
1da177e4
LT
1695struct ib_grh;
1696
1697enum ib_process_mad_flags {
1698 IB_MAD_IGNORE_MKEY = 1,
1699 IB_MAD_IGNORE_BKEY = 2,
1700 IB_MAD_IGNORE_ALL = IB_MAD_IGNORE_MKEY | IB_MAD_IGNORE_BKEY
1701};
1702
1703enum ib_mad_result {
1704 IB_MAD_RESULT_FAILURE = 0, /* (!SUCCESS is the important flag) */
1705 IB_MAD_RESULT_SUCCESS = 1 << 0, /* MAD was successfully processed */
1706 IB_MAD_RESULT_REPLY = 1 << 1, /* Reply packet needs to be sent */
1707 IB_MAD_RESULT_CONSUMED = 1 << 2 /* Packet consumed: stop processing */
1708};
1709
1710#define IB_DEVICE_NAME_MAX 64
1711
1712struct ib_cache {
1713 rwlock_t lock;
1714 struct ib_event_handler event_handler;
1715 struct ib_pkey_cache **pkey_cache;
03db3a2d 1716 struct ib_gid_table **gid_cache;
6fb9cdbf 1717 u8 *lmc_cache;
1da177e4
LT
1718};
1719
9b513090
RC
1720struct ib_dma_mapping_ops {
1721 int (*mapping_error)(struct ib_device *dev,
1722 u64 dma_addr);
1723 u64 (*map_single)(struct ib_device *dev,
1724 void *ptr, size_t size,
1725 enum dma_data_direction direction);
1726 void (*unmap_single)(struct ib_device *dev,
1727 u64 addr, size_t size,
1728 enum dma_data_direction direction);
1729 u64 (*map_page)(struct ib_device *dev,
1730 struct page *page, unsigned long offset,
1731 size_t size,
1732 enum dma_data_direction direction);
1733 void (*unmap_page)(struct ib_device *dev,
1734 u64 addr, size_t size,
1735 enum dma_data_direction direction);
1736 int (*map_sg)(struct ib_device *dev,
1737 struct scatterlist *sg, int nents,
1738 enum dma_data_direction direction);
1739 void (*unmap_sg)(struct ib_device *dev,
1740 struct scatterlist *sg, int nents,
1741 enum dma_data_direction direction);
9b513090
RC
1742 void (*sync_single_for_cpu)(struct ib_device *dev,
1743 u64 dma_handle,
1744 size_t size,
4deccd6d 1745 enum dma_data_direction dir);
9b513090
RC
1746 void (*sync_single_for_device)(struct ib_device *dev,
1747 u64 dma_handle,
1748 size_t size,
1749 enum dma_data_direction dir);
1750 void *(*alloc_coherent)(struct ib_device *dev,
1751 size_t size,
1752 u64 *dma_handle,
1753 gfp_t flag);
1754 void (*free_coherent)(struct ib_device *dev,
1755 size_t size, void *cpu_addr,
1756 u64 dma_handle);
1757};
1758
07ebafba
TT
1759struct iw_cm_verbs;
1760
7738613e
IW
1761struct ib_port_immutable {
1762 int pkey_tbl_len;
1763 int gid_tbl_len;
f9b22e35 1764 u32 core_cap_flags;
337877a4 1765 u32 max_mad_size;
7738613e
IW
1766};
1767
1da177e4
LT
1768struct ib_device {
1769 struct device *dma_device;
1770
1771 char name[IB_DEVICE_NAME_MAX];
1772
1773 struct list_head event_handler_list;
1774 spinlock_t event_handler_lock;
1775
17a55f79 1776 spinlock_t client_data_lock;
1da177e4 1777 struct list_head core_list;
7c1eb45a
HE
1778 /* Access to the client_data_list is protected by the client_data_lock
1779 * spinlock and the lists_rwsem read-write semaphore */
1da177e4 1780 struct list_head client_data_list;
1da177e4
LT
1781
1782 struct ib_cache cache;
7738613e
IW
1783 /**
1784 * port_immutable is indexed by port number
1785 */
1786 struct ib_port_immutable *port_immutable;
1da177e4 1787
f4fd0b22
MT
1788 int num_comp_vectors;
1789
07ebafba
TT
1790 struct iw_cm_verbs *iwcm;
1791
b40f4757
CL
1792 /**
1793 * alloc_hw_stats - Allocate a struct rdma_hw_stats and fill in the
1794 * driver initialized data. The struct is kfree()'ed by the sysfs
1795 * core when the device is removed. A lifespan of -1 in the return
1796 * struct tells the core to set a default lifespan.
1797 */
1798 struct rdma_hw_stats *(*alloc_hw_stats)(struct ib_device *device,
1799 u8 port_num);
1800 /**
1801 * get_hw_stats - Fill in the counter value(s) in the stats struct.
1802 * @index - The index in the value array we wish to have updated, or
1803 * num_counters if we want all stats updated
1804 * Return codes -
1805 * < 0 - Error, no counters updated
1806 * index - Updated the single counter pointed to by index
1807 * num_counters - Updated all counters (will reset the timestamp
1808 * and prevent further calls for lifespan milliseconds)
1809 * Drivers are allowed to update all counters in leiu of just the
1810 * one given in index at their option
1811 */
1812 int (*get_hw_stats)(struct ib_device *device,
1813 struct rdma_hw_stats *stats,
1814 u8 port, int index);
1da177e4 1815 int (*query_device)(struct ib_device *device,
2528e33e
MB
1816 struct ib_device_attr *device_attr,
1817 struct ib_udata *udata);
1da177e4
LT
1818 int (*query_port)(struct ib_device *device,
1819 u8 port_num,
1820 struct ib_port_attr *port_attr);
a3f5adaf
EC
1821 enum rdma_link_layer (*get_link_layer)(struct ib_device *device,
1822 u8 port_num);
03db3a2d
MB
1823 /* When calling get_netdev, the HW vendor's driver should return the
1824 * net device of device @device at port @port_num or NULL if such
1825 * a net device doesn't exist. The vendor driver should call dev_hold
1826 * on this net device. The HW vendor's device driver must guarantee
1827 * that this function returns NULL before the net device reaches
1828 * NETDEV_UNREGISTER_FINAL state.
1829 */
1830 struct net_device *(*get_netdev)(struct ib_device *device,
1831 u8 port_num);
1da177e4
LT
1832 int (*query_gid)(struct ib_device *device,
1833 u8 port_num, int index,
1834 union ib_gid *gid);
03db3a2d
MB
1835 /* When calling add_gid, the HW vendor's driver should
1836 * add the gid of device @device at gid index @index of
1837 * port @port_num to be @gid. Meta-info of that gid (for example,
1838 * the network device related to this gid is available
1839 * at @attr. @context allows the HW vendor driver to store extra
1840 * information together with a GID entry. The HW vendor may allocate
1841 * memory to contain this information and store it in @context when a
1842 * new GID entry is written to. Params are consistent until the next
1843 * call of add_gid or delete_gid. The function should return 0 on
1844 * success or error otherwise. The function could be called
1845 * concurrently for different ports. This function is only called
1846 * when roce_gid_table is used.
1847 */
1848 int (*add_gid)(struct ib_device *device,
1849 u8 port_num,
1850 unsigned int index,
1851 const union ib_gid *gid,
1852 const struct ib_gid_attr *attr,
1853 void **context);
1854 /* When calling del_gid, the HW vendor's driver should delete the
1855 * gid of device @device at gid index @index of port @port_num.
1856 * Upon the deletion of a GID entry, the HW vendor must free any
1857 * allocated memory. The caller will clear @context afterwards.
1858 * This function is only called when roce_gid_table is used.
1859 */
1860 int (*del_gid)(struct ib_device *device,
1861 u8 port_num,
1862 unsigned int index,
1863 void **context);
1da177e4
LT
1864 int (*query_pkey)(struct ib_device *device,
1865 u8 port_num, u16 index, u16 *pkey);
1866 int (*modify_device)(struct ib_device *device,
1867 int device_modify_mask,
1868 struct ib_device_modify *device_modify);
1869 int (*modify_port)(struct ib_device *device,
1870 u8 port_num, int port_modify_mask,
1871 struct ib_port_modify *port_modify);
e2773c06
RD
1872 struct ib_ucontext * (*alloc_ucontext)(struct ib_device *device,
1873 struct ib_udata *udata);
1874 int (*dealloc_ucontext)(struct ib_ucontext *context);
1875 int (*mmap)(struct ib_ucontext *context,
1876 struct vm_area_struct *vma);
1877 struct ib_pd * (*alloc_pd)(struct ib_device *device,
1878 struct ib_ucontext *context,
1879 struct ib_udata *udata);
1da177e4
LT
1880 int (*dealloc_pd)(struct ib_pd *pd);
1881 struct ib_ah * (*create_ah)(struct ib_pd *pd,
1882 struct ib_ah_attr *ah_attr);
1883 int (*modify_ah)(struct ib_ah *ah,
1884 struct ib_ah_attr *ah_attr);
1885 int (*query_ah)(struct ib_ah *ah,
1886 struct ib_ah_attr *ah_attr);
1887 int (*destroy_ah)(struct ib_ah *ah);
d41fcc67
RD
1888 struct ib_srq * (*create_srq)(struct ib_pd *pd,
1889 struct ib_srq_init_attr *srq_init_attr,
1890 struct ib_udata *udata);
1891 int (*modify_srq)(struct ib_srq *srq,
1892 struct ib_srq_attr *srq_attr,
9bc57e2d
RC
1893 enum ib_srq_attr_mask srq_attr_mask,
1894 struct ib_udata *udata);
d41fcc67
RD
1895 int (*query_srq)(struct ib_srq *srq,
1896 struct ib_srq_attr *srq_attr);
1897 int (*destroy_srq)(struct ib_srq *srq);
1898 int (*post_srq_recv)(struct ib_srq *srq,
1899 struct ib_recv_wr *recv_wr,
1900 struct ib_recv_wr **bad_recv_wr);
1da177e4 1901 struct ib_qp * (*create_qp)(struct ib_pd *pd,
e2773c06
RD
1902 struct ib_qp_init_attr *qp_init_attr,
1903 struct ib_udata *udata);
1da177e4
LT
1904 int (*modify_qp)(struct ib_qp *qp,
1905 struct ib_qp_attr *qp_attr,
9bc57e2d
RC
1906 int qp_attr_mask,
1907 struct ib_udata *udata);
1da177e4
LT
1908 int (*query_qp)(struct ib_qp *qp,
1909 struct ib_qp_attr *qp_attr,
1910 int qp_attr_mask,
1911 struct ib_qp_init_attr *qp_init_attr);
1912 int (*destroy_qp)(struct ib_qp *qp);
1913 int (*post_send)(struct ib_qp *qp,
1914 struct ib_send_wr *send_wr,
1915 struct ib_send_wr **bad_send_wr);
1916 int (*post_recv)(struct ib_qp *qp,
1917 struct ib_recv_wr *recv_wr,
1918 struct ib_recv_wr **bad_recv_wr);
bcf4c1ea
MB
1919 struct ib_cq * (*create_cq)(struct ib_device *device,
1920 const struct ib_cq_init_attr *attr,
e2773c06
RD
1921 struct ib_ucontext *context,
1922 struct ib_udata *udata);
2dd57162
EC
1923 int (*modify_cq)(struct ib_cq *cq, u16 cq_count,
1924 u16 cq_period);
1da177e4 1925 int (*destroy_cq)(struct ib_cq *cq);
33b9b3ee
RD
1926 int (*resize_cq)(struct ib_cq *cq, int cqe,
1927 struct ib_udata *udata);
1da177e4
LT
1928 int (*poll_cq)(struct ib_cq *cq, int num_entries,
1929 struct ib_wc *wc);
1930 int (*peek_cq)(struct ib_cq *cq, int wc_cnt);
1931 int (*req_notify_cq)(struct ib_cq *cq,
ed23a727 1932 enum ib_cq_notify_flags flags);
1da177e4
LT
1933 int (*req_ncomp_notif)(struct ib_cq *cq,
1934 int wc_cnt);
1935 struct ib_mr * (*get_dma_mr)(struct ib_pd *pd,
1936 int mr_access_flags);
e2773c06 1937 struct ib_mr * (*reg_user_mr)(struct ib_pd *pd,
f7c6a7b5
RD
1938 u64 start, u64 length,
1939 u64 virt_addr,
e2773c06
RD
1940 int mr_access_flags,
1941 struct ib_udata *udata);
7e6edb9b
MB
1942 int (*rereg_user_mr)(struct ib_mr *mr,
1943 int flags,
1944 u64 start, u64 length,
1945 u64 virt_addr,
1946 int mr_access_flags,
1947 struct ib_pd *pd,
1948 struct ib_udata *udata);
1da177e4 1949 int (*dereg_mr)(struct ib_mr *mr);
9bee178b
SG
1950 struct ib_mr * (*alloc_mr)(struct ib_pd *pd,
1951 enum ib_mr_type mr_type,
1952 u32 max_num_sg);
4c67e2bf
SG
1953 int (*map_mr_sg)(struct ib_mr *mr,
1954 struct scatterlist *sg,
ff2ba993 1955 int sg_nents,
9aa8b321 1956 unsigned int *sg_offset);
7083e42e 1957 struct ib_mw * (*alloc_mw)(struct ib_pd *pd,
b2a239df
MB
1958 enum ib_mw_type type,
1959 struct ib_udata *udata);
1da177e4
LT
1960 int (*dealloc_mw)(struct ib_mw *mw);
1961 struct ib_fmr * (*alloc_fmr)(struct ib_pd *pd,
1962 int mr_access_flags,
1963 struct ib_fmr_attr *fmr_attr);
1964 int (*map_phys_fmr)(struct ib_fmr *fmr,
1965 u64 *page_list, int list_len,
1966 u64 iova);
1967 int (*unmap_fmr)(struct list_head *fmr_list);
1968 int (*dealloc_fmr)(struct ib_fmr *fmr);
1969 int (*attach_mcast)(struct ib_qp *qp,
1970 union ib_gid *gid,
1971 u16 lid);
1972 int (*detach_mcast)(struct ib_qp *qp,
1973 union ib_gid *gid,
1974 u16 lid);
1975 int (*process_mad)(struct ib_device *device,
1976 int process_mad_flags,
1977 u8 port_num,
a97e2d86
IW
1978 const struct ib_wc *in_wc,
1979 const struct ib_grh *in_grh,
4cd7c947
IW
1980 const struct ib_mad_hdr *in_mad,
1981 size_t in_mad_size,
1982 struct ib_mad_hdr *out_mad,
1983 size_t *out_mad_size,
1984 u16 *out_mad_pkey_index);
59991f94
SH
1985 struct ib_xrcd * (*alloc_xrcd)(struct ib_device *device,
1986 struct ib_ucontext *ucontext,
1987 struct ib_udata *udata);
1988 int (*dealloc_xrcd)(struct ib_xrcd *xrcd);
319a441d
HHZ
1989 struct ib_flow * (*create_flow)(struct ib_qp *qp,
1990 struct ib_flow_attr
1991 *flow_attr,
1992 int domain);
1993 int (*destroy_flow)(struct ib_flow *flow_id);
1b01d335
SG
1994 int (*check_mr_status)(struct ib_mr *mr, u32 check_mask,
1995 struct ib_mr_status *mr_status);
036b1063 1996 void (*disassociate_ucontext)(struct ib_ucontext *ibcontext);
765d6774
SW
1997 void (*drain_rq)(struct ib_qp *qp);
1998 void (*drain_sq)(struct ib_qp *qp);
50174a7f
EC
1999 int (*set_vf_link_state)(struct ib_device *device, int vf, u8 port,
2000 int state);
2001 int (*get_vf_config)(struct ib_device *device, int vf, u8 port,
2002 struct ifla_vf_info *ivf);
2003 int (*get_vf_stats)(struct ib_device *device, int vf, u8 port,
2004 struct ifla_vf_stats *stats);
2005 int (*set_vf_guid)(struct ib_device *device, int vf, u8 port, u64 guid,
2006 int type);
5fd251c8
YH
2007 struct ib_wq * (*create_wq)(struct ib_pd *pd,
2008 struct ib_wq_init_attr *init_attr,
2009 struct ib_udata *udata);
2010 int (*destroy_wq)(struct ib_wq *wq);
2011 int (*modify_wq)(struct ib_wq *wq,
2012 struct ib_wq_attr *attr,
2013 u32 wq_attr_mask,
2014 struct ib_udata *udata);
6d39786b
YH
2015 struct ib_rwq_ind_table * (*create_rwq_ind_table)(struct ib_device *device,
2016 struct ib_rwq_ind_table_init_attr *init_attr,
2017 struct ib_udata *udata);
2018 int (*destroy_rwq_ind_table)(struct ib_rwq_ind_table *wq_ind_table);
9b513090
RC
2019 struct ib_dma_mapping_ops *dma_ops;
2020
e2773c06 2021 struct module *owner;
f4e91eb4 2022 struct device dev;
35be0681 2023 struct kobject *ports_parent;
1da177e4
LT
2024 struct list_head port_list;
2025
2026 enum {
2027 IB_DEV_UNINITIALIZED,
2028 IB_DEV_REGISTERED,
2029 IB_DEV_UNREGISTERED
2030 } reg_state;
2031
274c0891 2032 int uverbs_abi_ver;
17a55f79 2033 u64 uverbs_cmd_mask;
f21519b2 2034 u64 uverbs_ex_cmd_mask;
274c0891 2035
c5bcbbb9 2036 char node_desc[64];
cf311cd4 2037 __be64 node_guid;
96f15c03 2038 u32 local_dma_lkey;
4139032b 2039 u16 is_switch:1;
1da177e4
LT
2040 u8 node_type;
2041 u8 phys_port_cnt;
3e153a93 2042 struct ib_device_attr attrs;
b40f4757
CL
2043 struct attribute_group *hw_stats_ag;
2044 struct rdma_hw_stats *hw_stats;
7738613e
IW
2045
2046 /**
2047 * The following mandatory functions are used only at device
2048 * registration. Keep functions such as these at the end of this
2049 * structure to avoid cache line misses when accessing struct ib_device
2050 * in fast paths.
2051 */
2052 int (*get_port_immutable)(struct ib_device *, u8, struct ib_port_immutable *);
5fa76c20 2053 void (*get_dev_fw_str)(struct ib_device *, char *str, size_t str_len);
1da177e4
LT
2054};
2055
2056struct ib_client {
2057 char *name;
2058 void (*add) (struct ib_device *);
7c1eb45a 2059 void (*remove)(struct ib_device *, void *client_data);
1da177e4 2060
9268f72d
YK
2061 /* Returns the net_dev belonging to this ib_client and matching the
2062 * given parameters.
2063 * @dev: An RDMA device that the net_dev use for communication.
2064 * @port: A physical port number on the RDMA device.
2065 * @pkey: P_Key that the net_dev uses if applicable.
2066 * @gid: A GID that the net_dev uses to communicate.
2067 * @addr: An IP address the net_dev is configured with.
2068 * @client_data: The device's client data set by ib_set_client_data().
2069 *
2070 * An ib_client that implements a net_dev on top of RDMA devices
2071 * (such as IP over IB) should implement this callback, allowing the
2072 * rdma_cm module to find the right net_dev for a given request.
2073 *
2074 * The caller is responsible for calling dev_put on the returned
2075 * netdev. */
2076 struct net_device *(*get_net_dev_by_params)(
2077 struct ib_device *dev,
2078 u8 port,
2079 u16 pkey,
2080 const union ib_gid *gid,
2081 const struct sockaddr *addr,
2082 void *client_data);
1da177e4
LT
2083 struct list_head list;
2084};
2085
2086struct ib_device *ib_alloc_device(size_t size);
2087void ib_dealloc_device(struct ib_device *device);
2088
5fa76c20
IW
2089void ib_get_device_fw_str(struct ib_device *device, char *str, size_t str_len);
2090
9a6edb60
RC
2091int ib_register_device(struct ib_device *device,
2092 int (*port_callback)(struct ib_device *,
2093 u8, struct kobject *));
1da177e4
LT
2094void ib_unregister_device(struct ib_device *device);
2095
2096int ib_register_client (struct ib_client *client);
2097void ib_unregister_client(struct ib_client *client);
2098
2099void *ib_get_client_data(struct ib_device *device, struct ib_client *client);
2100void ib_set_client_data(struct ib_device *device, struct ib_client *client,
2101 void *data);
2102
e2773c06
RD
2103static inline int ib_copy_from_udata(void *dest, struct ib_udata *udata, size_t len)
2104{
2105 return copy_from_user(dest, udata->inbuf, len) ? -EFAULT : 0;
2106}
2107
2108static inline int ib_copy_to_udata(struct ib_udata *udata, void *src, size_t len)
2109{
43c61165 2110 return copy_to_user(udata->outbuf, src, len) ? -EFAULT : 0;
e2773c06
RD
2111}
2112
301a721e
MB
2113static inline bool ib_is_udata_cleared(struct ib_udata *udata,
2114 size_t offset,
2115 size_t len)
2116{
2117 const void __user *p = udata->inbuf + offset;
92d27ae6 2118 bool ret;
301a721e
MB
2119 u8 *buf;
2120
2121 if (len > USHRT_MAX)
2122 return false;
2123
92d27ae6
ME
2124 buf = memdup_user(p, len);
2125 if (IS_ERR(buf))
301a721e
MB
2126 return false;
2127
301a721e 2128 ret = !memchr_inv(buf, 0, len);
301a721e
MB
2129 kfree(buf);
2130 return ret;
2131}
2132
8a51866f
RD
2133/**
2134 * ib_modify_qp_is_ok - Check that the supplied attribute mask
2135 * contains all required attributes and no attributes not allowed for
2136 * the given QP state transition.
2137 * @cur_state: Current QP state
2138 * @next_state: Next QP state
2139 * @type: QP type
2140 * @mask: Mask of supplied QP attributes
dd5f03be 2141 * @ll : link layer of port
8a51866f
RD
2142 *
2143 * This function is a helper function that a low-level driver's
2144 * modify_qp method can use to validate the consumer's input. It
2145 * checks that cur_state and next_state are valid QP states, that a
2146 * transition from cur_state to next_state is allowed by the IB spec,
2147 * and that the attribute mask supplied is allowed for the transition.
2148 */
2149int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
dd5f03be
MB
2150 enum ib_qp_type type, enum ib_qp_attr_mask mask,
2151 enum rdma_link_layer ll);
8a51866f 2152
1da177e4
LT
2153int ib_register_event_handler (struct ib_event_handler *event_handler);
2154int ib_unregister_event_handler(struct ib_event_handler *event_handler);
2155void ib_dispatch_event(struct ib_event *event);
2156
1da177e4
LT
2157int ib_query_port(struct ib_device *device,
2158 u8 port_num, struct ib_port_attr *port_attr);
2159
a3f5adaf
EC
2160enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device,
2161 u8 port_num);
2162
4139032b
HR
2163/**
2164 * rdma_cap_ib_switch - Check if the device is IB switch
2165 * @device: Device to check
2166 *
2167 * Device driver is responsible for setting is_switch bit on
2168 * in ib_device structure at init time.
2169 *
2170 * Return: true if the device is IB switch.
2171 */
2172static inline bool rdma_cap_ib_switch(const struct ib_device *device)
2173{
2174 return device->is_switch;
2175}
2176
0cf18d77
IW
2177/**
2178 * rdma_start_port - Return the first valid port number for the device
2179 * specified
2180 *
2181 * @device: Device to be checked
2182 *
2183 * Return start port number
2184 */
2185static inline u8 rdma_start_port(const struct ib_device *device)
2186{
4139032b 2187 return rdma_cap_ib_switch(device) ? 0 : 1;
0cf18d77
IW
2188}
2189
2190/**
2191 * rdma_end_port - Return the last valid port number for the device
2192 * specified
2193 *
2194 * @device: Device to be checked
2195 *
2196 * Return last port number
2197 */
2198static inline u8 rdma_end_port(const struct ib_device *device)
2199{
4139032b 2200 return rdma_cap_ib_switch(device) ? 0 : device->phys_port_cnt;
0cf18d77
IW
2201}
2202
5ede9289 2203static inline bool rdma_protocol_ib(const struct ib_device *device, u8 port_num)
de66be94 2204{
f9b22e35 2205 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IB;
de66be94
MW
2206}
2207
5ede9289 2208static inline bool rdma_protocol_roce(const struct ib_device *device, u8 port_num)
7766a99f
MB
2209{
2210 return device->port_immutable[port_num].core_cap_flags &
2211 (RDMA_CORE_CAP_PROT_ROCE | RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP);
2212}
2213
2214static inline bool rdma_protocol_roce_udp_encap(const struct ib_device *device, u8 port_num)
2215{
2216 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP;
2217}
2218
2219static inline bool rdma_protocol_roce_eth_encap(const struct ib_device *device, u8 port_num)
de66be94 2220{
f9b22e35 2221 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_ROCE;
de66be94
MW
2222}
2223
5ede9289 2224static inline bool rdma_protocol_iwarp(const struct ib_device *device, u8 port_num)
de66be94 2225{
f9b22e35 2226 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IWARP;
de66be94
MW
2227}
2228
5ede9289 2229static inline bool rdma_ib_or_roce(const struct ib_device *device, u8 port_num)
de66be94 2230{
7766a99f
MB
2231 return rdma_protocol_ib(device, port_num) ||
2232 rdma_protocol_roce(device, port_num);
de66be94
MW
2233}
2234
c757dea8 2235/**
296ec009 2236 * rdma_cap_ib_mad - Check if the port of a device supports Infiniband
c757dea8 2237 * Management Datagrams.
296ec009
MW
2238 * @device: Device to check
2239 * @port_num: Port number to check
c757dea8 2240 *
296ec009
MW
2241 * Management Datagrams (MAD) are a required part of the InfiniBand
2242 * specification and are supported on all InfiniBand devices. A slightly
2243 * extended version are also supported on OPA interfaces.
c757dea8 2244 *
296ec009 2245 * Return: true if the port supports sending/receiving of MAD packets.
c757dea8 2246 */
5ede9289 2247static inline bool rdma_cap_ib_mad(const struct ib_device *device, u8 port_num)
c757dea8 2248{
f9b22e35 2249 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_MAD;
c757dea8
MW
2250}
2251
65995fee
IW
2252/**
2253 * rdma_cap_opa_mad - Check if the port of device provides support for OPA
2254 * Management Datagrams.
2255 * @device: Device to check
2256 * @port_num: Port number to check
2257 *
2258 * Intel OmniPath devices extend and/or replace the InfiniBand Management
2259 * datagrams with their own versions. These OPA MADs share many but not all of
2260 * the characteristics of InfiniBand MADs.
2261 *
2262 * OPA MADs differ in the following ways:
2263 *
2264 * 1) MADs are variable size up to 2K
2265 * IBTA defined MADs remain fixed at 256 bytes
2266 * 2) OPA SMPs must carry valid PKeys
2267 * 3) OPA SMP packets are a different format
2268 *
2269 * Return: true if the port supports OPA MAD packet formats.
2270 */
2271static inline bool rdma_cap_opa_mad(struct ib_device *device, u8 port_num)
2272{
2273 return (device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_OPA_MAD)
2274 == RDMA_CORE_CAP_OPA_MAD;
2275}
2276
29541e3a 2277/**
296ec009
MW
2278 * rdma_cap_ib_smi - Check if the port of a device provides an Infiniband
2279 * Subnet Management Agent (SMA) on the Subnet Management Interface (SMI).
2280 * @device: Device to check
2281 * @port_num: Port number to check
29541e3a 2282 *
296ec009
MW
2283 * Each InfiniBand node is required to provide a Subnet Management Agent
2284 * that the subnet manager can access. Prior to the fabric being fully
2285 * configured by the subnet manager, the SMA is accessed via a well known
2286 * interface called the Subnet Management Interface (SMI). This interface
2287 * uses directed route packets to communicate with the SM to get around the
2288 * chicken and egg problem of the SM needing to know what's on the fabric
2289 * in order to configure the fabric, and needing to configure the fabric in
2290 * order to send packets to the devices on the fabric. These directed
2291 * route packets do not need the fabric fully configured in order to reach
2292 * their destination. The SMI is the only method allowed to send
2293 * directed route packets on an InfiniBand fabric.
29541e3a 2294 *
296ec009 2295 * Return: true if the port provides an SMI.
29541e3a 2296 */
5ede9289 2297static inline bool rdma_cap_ib_smi(const struct ib_device *device, u8 port_num)
29541e3a 2298{
f9b22e35 2299 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SMI;
29541e3a
MW
2300}
2301
72219cea
MW
2302/**
2303 * rdma_cap_ib_cm - Check if the port of device has the capability Infiniband
2304 * Communication Manager.
296ec009
MW
2305 * @device: Device to check
2306 * @port_num: Port number to check
72219cea 2307 *
296ec009
MW
2308 * The InfiniBand Communication Manager is one of many pre-defined General
2309 * Service Agents (GSA) that are accessed via the General Service
2310 * Interface (GSI). It's role is to facilitate establishment of connections
2311 * between nodes as well as other management related tasks for established
2312 * connections.
72219cea 2313 *
296ec009
MW
2314 * Return: true if the port supports an IB CM (this does not guarantee that
2315 * a CM is actually running however).
72219cea 2316 */
5ede9289 2317static inline bool rdma_cap_ib_cm(const struct ib_device *device, u8 port_num)
72219cea 2318{
f9b22e35 2319 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_CM;
72219cea
MW
2320}
2321
04215330
MW
2322/**
2323 * rdma_cap_iw_cm - Check if the port of device has the capability IWARP
2324 * Communication Manager.
296ec009
MW
2325 * @device: Device to check
2326 * @port_num: Port number to check
04215330 2327 *
296ec009
MW
2328 * Similar to above, but specific to iWARP connections which have a different
2329 * managment protocol than InfiniBand.
04215330 2330 *
296ec009
MW
2331 * Return: true if the port supports an iWARP CM (this does not guarantee that
2332 * a CM is actually running however).
04215330 2333 */
5ede9289 2334static inline bool rdma_cap_iw_cm(const struct ib_device *device, u8 port_num)
04215330 2335{
f9b22e35 2336 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IW_CM;
04215330
MW
2337}
2338
fe53ba2f
MW
2339/**
2340 * rdma_cap_ib_sa - Check if the port of device has the capability Infiniband
2341 * Subnet Administration.
296ec009
MW
2342 * @device: Device to check
2343 * @port_num: Port number to check
fe53ba2f 2344 *
296ec009
MW
2345 * An InfiniBand Subnet Administration (SA) service is a pre-defined General
2346 * Service Agent (GSA) provided by the Subnet Manager (SM). On InfiniBand
2347 * fabrics, devices should resolve routes to other hosts by contacting the
2348 * SA to query the proper route.
fe53ba2f 2349 *
296ec009
MW
2350 * Return: true if the port should act as a client to the fabric Subnet
2351 * Administration interface. This does not imply that the SA service is
2352 * running locally.
fe53ba2f 2353 */
5ede9289 2354static inline bool rdma_cap_ib_sa(const struct ib_device *device, u8 port_num)
fe53ba2f 2355{
f9b22e35 2356 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SA;
fe53ba2f
MW
2357}
2358
a31ad3b0
MW
2359/**
2360 * rdma_cap_ib_mcast - Check if the port of device has the capability Infiniband
2361 * Multicast.
296ec009
MW
2362 * @device: Device to check
2363 * @port_num: Port number to check
a31ad3b0 2364 *
296ec009
MW
2365 * InfiniBand multicast registration is more complex than normal IPv4 or
2366 * IPv6 multicast registration. Each Host Channel Adapter must register
2367 * with the Subnet Manager when it wishes to join a multicast group. It
2368 * should do so only once regardless of how many queue pairs it subscribes
2369 * to this group. And it should leave the group only after all queue pairs
2370 * attached to the group have been detached.
a31ad3b0 2371 *
296ec009
MW
2372 * Return: true if the port must undertake the additional adminstrative
2373 * overhead of registering/unregistering with the SM and tracking of the
2374 * total number of queue pairs attached to the multicast group.
a31ad3b0 2375 */
5ede9289 2376static inline bool rdma_cap_ib_mcast(const struct ib_device *device, u8 port_num)
a31ad3b0
MW
2377{
2378 return rdma_cap_ib_sa(device, port_num);
2379}
2380
30a74ef4
MW
2381/**
2382 * rdma_cap_af_ib - Check if the port of device has the capability
2383 * Native Infiniband Address.
296ec009
MW
2384 * @device: Device to check
2385 * @port_num: Port number to check
30a74ef4 2386 *
296ec009
MW
2387 * InfiniBand addressing uses a port's GUID + Subnet Prefix to make a default
2388 * GID. RoCE uses a different mechanism, but still generates a GID via
2389 * a prescribed mechanism and port specific data.
30a74ef4 2390 *
296ec009
MW
2391 * Return: true if the port uses a GID address to identify devices on the
2392 * network.
30a74ef4 2393 */
5ede9289 2394static inline bool rdma_cap_af_ib(const struct ib_device *device, u8 port_num)
30a74ef4 2395{
f9b22e35 2396 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_AF_IB;
30a74ef4
MW
2397}
2398
227128fc
MW
2399/**
2400 * rdma_cap_eth_ah - Check if the port of device has the capability
296ec009
MW
2401 * Ethernet Address Handle.
2402 * @device: Device to check
2403 * @port_num: Port number to check
227128fc 2404 *
296ec009
MW
2405 * RoCE is InfiniBand over Ethernet, and it uses a well defined technique
2406 * to fabricate GIDs over Ethernet/IP specific addresses native to the
2407 * port. Normally, packet headers are generated by the sending host
2408 * adapter, but when sending connectionless datagrams, we must manually
2409 * inject the proper headers for the fabric we are communicating over.
227128fc 2410 *
296ec009
MW
2411 * Return: true if we are running as a RoCE port and must force the
2412 * addition of a Global Route Header built from our Ethernet Address
2413 * Handle into our header list for connectionless packets.
227128fc 2414 */
5ede9289 2415static inline bool rdma_cap_eth_ah(const struct ib_device *device, u8 port_num)
227128fc 2416{
f9b22e35 2417 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_ETH_AH;
227128fc
MW
2418}
2419
337877a4
IW
2420/**
2421 * rdma_max_mad_size - Return the max MAD size required by this RDMA Port.
2422 *
2423 * @device: Device
2424 * @port_num: Port number
2425 *
2426 * This MAD size includes the MAD headers and MAD payload. No other headers
2427 * are included.
2428 *
2429 * Return the max MAD size required by the Port. Will return 0 if the port
2430 * does not support MADs
2431 */
2432static inline size_t rdma_max_mad_size(const struct ib_device *device, u8 port_num)
2433{
2434 return device->port_immutable[port_num].max_mad_size;
2435}
2436
03db3a2d
MB
2437/**
2438 * rdma_cap_roce_gid_table - Check if the port of device uses roce_gid_table
2439 * @device: Device to check
2440 * @port_num: Port number to check
2441 *
2442 * RoCE GID table mechanism manages the various GIDs for a device.
2443 *
2444 * NOTE: if allocating the port's GID table has failed, this call will still
2445 * return true, but any RoCE GID table API will fail.
2446 *
2447 * Return: true if the port uses RoCE GID table mechanism in order to manage
2448 * its GIDs.
2449 */
2450static inline bool rdma_cap_roce_gid_table(const struct ib_device *device,
2451 u8 port_num)
2452{
2453 return rdma_protocol_roce(device, port_num) &&
2454 device->add_gid && device->del_gid;
2455}
2456
002516ed
CH
2457/*
2458 * Check if the device supports READ W/ INVALIDATE.
2459 */
2460static inline bool rdma_cap_read_inv(struct ib_device *dev, u32 port_num)
2461{
2462 /*
2463 * iWarp drivers must support READ W/ INVALIDATE. No other protocol
2464 * has support for it yet.
2465 */
2466 return rdma_protocol_iwarp(dev, port_num);
2467}
2468
1da177e4 2469int ib_query_gid(struct ib_device *device,
55ee3ab2
MB
2470 u8 port_num, int index, union ib_gid *gid,
2471 struct ib_gid_attr *attr);
1da177e4 2472
50174a7f
EC
2473int ib_set_vf_link_state(struct ib_device *device, int vf, u8 port,
2474 int state);
2475int ib_get_vf_config(struct ib_device *device, int vf, u8 port,
2476 struct ifla_vf_info *info);
2477int ib_get_vf_stats(struct ib_device *device, int vf, u8 port,
2478 struct ifla_vf_stats *stats);
2479int ib_set_vf_guid(struct ib_device *device, int vf, u8 port, u64 guid,
2480 int type);
2481
1da177e4
LT
2482int ib_query_pkey(struct ib_device *device,
2483 u8 port_num, u16 index, u16 *pkey);
2484
2485int ib_modify_device(struct ib_device *device,
2486 int device_modify_mask,
2487 struct ib_device_modify *device_modify);
2488
2489int ib_modify_port(struct ib_device *device,
2490 u8 port_num, int port_modify_mask,
2491 struct ib_port_modify *port_modify);
2492
5eb620c8 2493int ib_find_gid(struct ib_device *device, union ib_gid *gid,
b39ffa1d
MB
2494 enum ib_gid_type gid_type, struct net_device *ndev,
2495 u8 *port_num, u16 *index);
5eb620c8
YE
2496
2497int ib_find_pkey(struct ib_device *device,
2498 u8 port_num, u16 pkey, u16 *index);
2499
1da177e4
LT
2500struct ib_pd *ib_alloc_pd(struct ib_device *device);
2501
7dd78647 2502void ib_dealloc_pd(struct ib_pd *pd);
1da177e4
LT
2503
2504/**
2505 * ib_create_ah - Creates an address handle for the given address vector.
2506 * @pd: The protection domain associated with the address handle.
2507 * @ah_attr: The attributes of the address vector.
2508 *
2509 * The address handle is used to reference a local or global destination
2510 * in all UD QP post sends.
2511 */
2512struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
2513
4e00d694
SH
2514/**
2515 * ib_init_ah_from_wc - Initializes address handle attributes from a
2516 * work completion.
2517 * @device: Device on which the received message arrived.
2518 * @port_num: Port on which the received message arrived.
2519 * @wc: Work completion associated with the received message.
2520 * @grh: References the received global route header. This parameter is
2521 * ignored unless the work completion indicates that the GRH is valid.
2522 * @ah_attr: Returned attributes that can be used when creating an address
2523 * handle for replying to the message.
2524 */
73cdaaee
IW
2525int ib_init_ah_from_wc(struct ib_device *device, u8 port_num,
2526 const struct ib_wc *wc, const struct ib_grh *grh,
2527 struct ib_ah_attr *ah_attr);
4e00d694 2528
513789ed
HR
2529/**
2530 * ib_create_ah_from_wc - Creates an address handle associated with the
2531 * sender of the specified work completion.
2532 * @pd: The protection domain associated with the address handle.
2533 * @wc: Work completion information associated with a received message.
2534 * @grh: References the received global route header. This parameter is
2535 * ignored unless the work completion indicates that the GRH is valid.
2536 * @port_num: The outbound port number to associate with the address.
2537 *
2538 * The address handle is used to reference a local or global destination
2539 * in all UD QP post sends.
2540 */
73cdaaee
IW
2541struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc,
2542 const struct ib_grh *grh, u8 port_num);
513789ed 2543
1da177e4
LT
2544/**
2545 * ib_modify_ah - Modifies the address vector associated with an address
2546 * handle.
2547 * @ah: The address handle to modify.
2548 * @ah_attr: The new address vector attributes to associate with the
2549 * address handle.
2550 */
2551int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr);
2552
2553/**
2554 * ib_query_ah - Queries the address vector associated with an address
2555 * handle.
2556 * @ah: The address handle to query.
2557 * @ah_attr: The address vector attributes associated with the address
2558 * handle.
2559 */
2560int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr);
2561
2562/**
2563 * ib_destroy_ah - Destroys an address handle.
2564 * @ah: The address handle to destroy.
2565 */
2566int ib_destroy_ah(struct ib_ah *ah);
2567
d41fcc67
RD
2568/**
2569 * ib_create_srq - Creates a SRQ associated with the specified protection
2570 * domain.
2571 * @pd: The protection domain associated with the SRQ.
abb6e9ba
DB
2572 * @srq_init_attr: A list of initial attributes required to create the
2573 * SRQ. If SRQ creation succeeds, then the attributes are updated to
2574 * the actual capabilities of the created SRQ.
d41fcc67
RD
2575 *
2576 * srq_attr->max_wr and srq_attr->max_sge are read the determine the
2577 * requested size of the SRQ, and set to the actual values allocated
2578 * on return. If ib_create_srq() succeeds, then max_wr and max_sge
2579 * will always be at least as large as the requested values.
2580 */
2581struct ib_srq *ib_create_srq(struct ib_pd *pd,
2582 struct ib_srq_init_attr *srq_init_attr);
2583
2584/**
2585 * ib_modify_srq - Modifies the attributes for the specified SRQ.
2586 * @srq: The SRQ to modify.
2587 * @srq_attr: On input, specifies the SRQ attributes to modify. On output,
2588 * the current values of selected SRQ attributes are returned.
2589 * @srq_attr_mask: A bit-mask used to specify which attributes of the SRQ
2590 * are being modified.
2591 *
2592 * The mask may contain IB_SRQ_MAX_WR to resize the SRQ and/or
2593 * IB_SRQ_LIMIT to set the SRQ's limit and request notification when
2594 * the number of receives queued drops below the limit.
2595 */
2596int ib_modify_srq(struct ib_srq *srq,
2597 struct ib_srq_attr *srq_attr,
2598 enum ib_srq_attr_mask srq_attr_mask);
2599
2600/**
2601 * ib_query_srq - Returns the attribute list and current values for the
2602 * specified SRQ.
2603 * @srq: The SRQ to query.
2604 * @srq_attr: The attributes of the specified SRQ.
2605 */
2606int ib_query_srq(struct ib_srq *srq,
2607 struct ib_srq_attr *srq_attr);
2608
2609/**
2610 * ib_destroy_srq - Destroys the specified SRQ.
2611 * @srq: The SRQ to destroy.
2612 */
2613int ib_destroy_srq(struct ib_srq *srq);
2614
2615/**
2616 * ib_post_srq_recv - Posts a list of work requests to the specified SRQ.
2617 * @srq: The SRQ to post the work request on.
2618 * @recv_wr: A list of work requests to post on the receive queue.
2619 * @bad_recv_wr: On an immediate failure, this parameter will reference
2620 * the work request that failed to be posted on the QP.
2621 */
2622static inline int ib_post_srq_recv(struct ib_srq *srq,
2623 struct ib_recv_wr *recv_wr,
2624 struct ib_recv_wr **bad_recv_wr)
2625{
2626 return srq->device->post_srq_recv(srq, recv_wr, bad_recv_wr);
2627}
2628
1da177e4
LT
2629/**
2630 * ib_create_qp - Creates a QP associated with the specified protection
2631 * domain.
2632 * @pd: The protection domain associated with the QP.
abb6e9ba
DB
2633 * @qp_init_attr: A list of initial attributes required to create the
2634 * QP. If QP creation succeeds, then the attributes are updated to
2635 * the actual capabilities of the created QP.
1da177e4
LT
2636 */
2637struct ib_qp *ib_create_qp(struct ib_pd *pd,
2638 struct ib_qp_init_attr *qp_init_attr);
2639
2640/**
2641 * ib_modify_qp - Modifies the attributes for the specified QP and then
2642 * transitions the QP to the given state.
2643 * @qp: The QP to modify.
2644 * @qp_attr: On input, specifies the QP attributes to modify. On output,
2645 * the current values of selected QP attributes are returned.
2646 * @qp_attr_mask: A bit-mask used to specify which attributes of the QP
2647 * are being modified.
2648 */
2649int ib_modify_qp(struct ib_qp *qp,
2650 struct ib_qp_attr *qp_attr,
2651 int qp_attr_mask);
2652
2653/**
2654 * ib_query_qp - Returns the attribute list and current values for the
2655 * specified QP.
2656 * @qp: The QP to query.
2657 * @qp_attr: The attributes of the specified QP.
2658 * @qp_attr_mask: A bit-mask used to select specific attributes to query.
2659 * @qp_init_attr: Additional attributes of the selected QP.
2660 *
2661 * The qp_attr_mask may be used to limit the query to gathering only the
2662 * selected attributes.
2663 */
2664int ib_query_qp(struct ib_qp *qp,
2665 struct ib_qp_attr *qp_attr,
2666 int qp_attr_mask,
2667 struct ib_qp_init_attr *qp_init_attr);
2668
2669/**
2670 * ib_destroy_qp - Destroys the specified QP.
2671 * @qp: The QP to destroy.
2672 */
2673int ib_destroy_qp(struct ib_qp *qp);
2674
d3d72d90 2675/**
0e0ec7e0
SH
2676 * ib_open_qp - Obtain a reference to an existing sharable QP.
2677 * @xrcd - XRC domain
2678 * @qp_open_attr: Attributes identifying the QP to open.
2679 *
2680 * Returns a reference to a sharable QP.
2681 */
2682struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd,
2683 struct ib_qp_open_attr *qp_open_attr);
2684
2685/**
2686 * ib_close_qp - Release an external reference to a QP.
d3d72d90
SH
2687 * @qp: The QP handle to release
2688 *
0e0ec7e0
SH
2689 * The opened QP handle is released by the caller. The underlying
2690 * shared QP is not destroyed until all internal references are released.
d3d72d90 2691 */
0e0ec7e0 2692int ib_close_qp(struct ib_qp *qp);
d3d72d90 2693
1da177e4
LT
2694/**
2695 * ib_post_send - Posts a list of work requests to the send queue of
2696 * the specified QP.
2697 * @qp: The QP to post the work request on.
2698 * @send_wr: A list of work requests to post on the send queue.
2699 * @bad_send_wr: On an immediate failure, this parameter will reference
2700 * the work request that failed to be posted on the QP.
55464d46
BVA
2701 *
2702 * While IBA Vol. 1 section 11.4.1.1 specifies that if an immediate
2703 * error is returned, the QP state shall not be affected,
2704 * ib_post_send() will return an immediate error after queueing any
2705 * earlier work requests in the list.
1da177e4
LT
2706 */
2707static inline int ib_post_send(struct ib_qp *qp,
2708 struct ib_send_wr *send_wr,
2709 struct ib_send_wr **bad_send_wr)
2710{
2711 return qp->device->post_send(qp, send_wr, bad_send_wr);
2712}
2713
2714/**
2715 * ib_post_recv - Posts a list of work requests to the receive queue of
2716 * the specified QP.
2717 * @qp: The QP to post the work request on.
2718 * @recv_wr: A list of work requests to post on the receive queue.
2719 * @bad_recv_wr: On an immediate failure, this parameter will reference
2720 * the work request that failed to be posted on the QP.
2721 */
2722static inline int ib_post_recv(struct ib_qp *qp,
2723 struct ib_recv_wr *recv_wr,
2724 struct ib_recv_wr **bad_recv_wr)
2725{
2726 return qp->device->post_recv(qp, recv_wr, bad_recv_wr);
2727}
2728
14d3a3b2
CH
2729struct ib_cq *ib_alloc_cq(struct ib_device *dev, void *private,
2730 int nr_cqe, int comp_vector, enum ib_poll_context poll_ctx);
2731void ib_free_cq(struct ib_cq *cq);
2732int ib_process_cq_direct(struct ib_cq *cq, int budget);
2733
1da177e4
LT
2734/**
2735 * ib_create_cq - Creates a CQ on the specified device.
2736 * @device: The device on which to create the CQ.
2737 * @comp_handler: A user-specified callback that is invoked when a
2738 * completion event occurs on the CQ.
2739 * @event_handler: A user-specified callback that is invoked when an
2740 * asynchronous event not associated with a completion occurs on the CQ.
2741 * @cq_context: Context associated with the CQ returned to the user via
2742 * the associated completion and event handlers.
8e37210b 2743 * @cq_attr: The attributes the CQ should be created upon.
1da177e4
LT
2744 *
2745 * Users can examine the cq structure to determine the actual CQ size.
2746 */
2747struct ib_cq *ib_create_cq(struct ib_device *device,
2748 ib_comp_handler comp_handler,
2749 void (*event_handler)(struct ib_event *, void *),
8e37210b
MB
2750 void *cq_context,
2751 const struct ib_cq_init_attr *cq_attr);
1da177e4
LT
2752
2753/**
2754 * ib_resize_cq - Modifies the capacity of the CQ.
2755 * @cq: The CQ to resize.
2756 * @cqe: The minimum size of the CQ.
2757 *
2758 * Users can examine the cq structure to determine the actual CQ size.
2759 */
2760int ib_resize_cq(struct ib_cq *cq, int cqe);
2761
2dd57162
EC
2762/**
2763 * ib_modify_cq - Modifies moderation params of the CQ
2764 * @cq: The CQ to modify.
2765 * @cq_count: number of CQEs that will trigger an event
2766 * @cq_period: max period of time in usec before triggering an event
2767 *
2768 */
2769int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
2770
1da177e4
LT
2771/**
2772 * ib_destroy_cq - Destroys the specified CQ.
2773 * @cq: The CQ to destroy.
2774 */
2775int ib_destroy_cq(struct ib_cq *cq);
2776
2777/**
2778 * ib_poll_cq - poll a CQ for completion(s)
2779 * @cq:the CQ being polled
2780 * @num_entries:maximum number of completions to return
2781 * @wc:array of at least @num_entries &struct ib_wc where completions
2782 * will be returned
2783 *
2784 * Poll a CQ for (possibly multiple) completions. If the return value
2785 * is < 0, an error occurred. If the return value is >= 0, it is the
2786 * number of completions returned. If the return value is
2787 * non-negative and < num_entries, then the CQ was emptied.
2788 */
2789static inline int ib_poll_cq(struct ib_cq *cq, int num_entries,
2790 struct ib_wc *wc)
2791{
2792 return cq->device->poll_cq(cq, num_entries, wc);
2793}
2794
2795/**
2796 * ib_peek_cq - Returns the number of unreaped completions currently
2797 * on the specified CQ.
2798 * @cq: The CQ to peek.
2799 * @wc_cnt: A minimum number of unreaped completions to check for.
2800 *
2801 * If the number of unreaped completions is greater than or equal to wc_cnt,
2802 * this function returns wc_cnt, otherwise, it returns the actual number of
2803 * unreaped completions.
2804 */
2805int ib_peek_cq(struct ib_cq *cq, int wc_cnt);
2806
2807/**
2808 * ib_req_notify_cq - Request completion notification on a CQ.
2809 * @cq: The CQ to generate an event for.
ed23a727
RD
2810 * @flags:
2811 * Must contain exactly one of %IB_CQ_SOLICITED or %IB_CQ_NEXT_COMP
2812 * to request an event on the next solicited event or next work
2813 * completion at any type, respectively. %IB_CQ_REPORT_MISSED_EVENTS
2814 * may also be |ed in to request a hint about missed events, as
2815 * described below.
2816 *
2817 * Return Value:
2818 * < 0 means an error occurred while requesting notification
2819 * == 0 means notification was requested successfully, and if
2820 * IB_CQ_REPORT_MISSED_EVENTS was passed in, then no events
2821 * were missed and it is safe to wait for another event. In
2822 * this case is it guaranteed that any work completions added
2823 * to the CQ since the last CQ poll will trigger a completion
2824 * notification event.
2825 * > 0 is only returned if IB_CQ_REPORT_MISSED_EVENTS was passed
2826 * in. It means that the consumer must poll the CQ again to
2827 * make sure it is empty to avoid missing an event because of a
2828 * race between requesting notification and an entry being
2829 * added to the CQ. This return value means it is possible
2830 * (but not guaranteed) that a work completion has been added
2831 * to the CQ since the last poll without triggering a
2832 * completion notification event.
1da177e4
LT
2833 */
2834static inline int ib_req_notify_cq(struct ib_cq *cq,
ed23a727 2835 enum ib_cq_notify_flags flags)
1da177e4 2836{
ed23a727 2837 return cq->device->req_notify_cq(cq, flags);
1da177e4
LT
2838}
2839
2840/**
2841 * ib_req_ncomp_notif - Request completion notification when there are
2842 * at least the specified number of unreaped completions on the CQ.
2843 * @cq: The CQ to generate an event for.
2844 * @wc_cnt: The number of unreaped completions that should be on the
2845 * CQ before an event is generated.
2846 */
2847static inline int ib_req_ncomp_notif(struct ib_cq *cq, int wc_cnt)
2848{
2849 return cq->device->req_ncomp_notif ?
2850 cq->device->req_ncomp_notif(cq, wc_cnt) :
2851 -ENOSYS;
2852}
2853
2854/**
2855 * ib_get_dma_mr - Returns a memory region for system memory that is
2856 * usable for DMA.
2857 * @pd: The protection domain associated with the memory region.
2858 * @mr_access_flags: Specifies the memory access rights.
9b513090
RC
2859 *
2860 * Note that the ib_dma_*() functions defined below must be used
2861 * to create/destroy addresses used with the Lkey or Rkey returned
2862 * by ib_get_dma_mr().
1da177e4
LT
2863 */
2864struct ib_mr *ib_get_dma_mr(struct ib_pd *pd, int mr_access_flags);
2865
9b513090
RC
2866/**
2867 * ib_dma_mapping_error - check a DMA addr for error
2868 * @dev: The device for which the dma_addr was created
2869 * @dma_addr: The DMA address to check
2870 */
2871static inline int ib_dma_mapping_error(struct ib_device *dev, u64 dma_addr)
2872{
d1998ef3
BC
2873 if (dev->dma_ops)
2874 return dev->dma_ops->mapping_error(dev, dma_addr);
8d8bb39b 2875 return dma_mapping_error(dev->dma_device, dma_addr);
9b513090
RC
2876}
2877
2878/**
2879 * ib_dma_map_single - Map a kernel virtual address to DMA address
2880 * @dev: The device for which the dma_addr is to be created
2881 * @cpu_addr: The kernel virtual address
2882 * @size: The size of the region in bytes
2883 * @direction: The direction of the DMA
2884 */
2885static inline u64 ib_dma_map_single(struct ib_device *dev,
2886 void *cpu_addr, size_t size,
2887 enum dma_data_direction direction)
2888{
d1998ef3
BC
2889 if (dev->dma_ops)
2890 return dev->dma_ops->map_single(dev, cpu_addr, size, direction);
2891 return dma_map_single(dev->dma_device, cpu_addr, size, direction);
9b513090
RC
2892}
2893
2894/**
2895 * ib_dma_unmap_single - Destroy a mapping created by ib_dma_map_single()
2896 * @dev: The device for which the DMA address was created
2897 * @addr: The DMA address
2898 * @size: The size of the region in bytes
2899 * @direction: The direction of the DMA
2900 */
2901static inline void ib_dma_unmap_single(struct ib_device *dev,
2902 u64 addr, size_t size,
2903 enum dma_data_direction direction)
2904{
d1998ef3
BC
2905 if (dev->dma_ops)
2906 dev->dma_ops->unmap_single(dev, addr, size, direction);
2907 else
9b513090
RC
2908 dma_unmap_single(dev->dma_device, addr, size, direction);
2909}
2910
cb9fbc5c
AK
2911static inline u64 ib_dma_map_single_attrs(struct ib_device *dev,
2912 void *cpu_addr, size_t size,
2913 enum dma_data_direction direction,
00085f1e 2914 unsigned long dma_attrs)
cb9fbc5c
AK
2915{
2916 return dma_map_single_attrs(dev->dma_device, cpu_addr, size,
00085f1e 2917 direction, dma_attrs);
cb9fbc5c
AK
2918}
2919
2920static inline void ib_dma_unmap_single_attrs(struct ib_device *dev,
2921 u64 addr, size_t size,
2922 enum dma_data_direction direction,
00085f1e 2923 unsigned long dma_attrs)
cb9fbc5c
AK
2924{
2925 return dma_unmap_single_attrs(dev->dma_device, addr, size,
00085f1e 2926 direction, dma_attrs);
cb9fbc5c
AK
2927}
2928
9b513090
RC
2929/**
2930 * ib_dma_map_page - Map a physical page to DMA address
2931 * @dev: The device for which the dma_addr is to be created
2932 * @page: The page to be mapped
2933 * @offset: The offset within the page
2934 * @size: The size of the region in bytes
2935 * @direction: The direction of the DMA
2936 */
2937static inline u64 ib_dma_map_page(struct ib_device *dev,
2938 struct page *page,
2939 unsigned long offset,
2940 size_t size,
2941 enum dma_data_direction direction)
2942{
d1998ef3
BC
2943 if (dev->dma_ops)
2944 return dev->dma_ops->map_page(dev, page, offset, size, direction);
2945 return dma_map_page(dev->dma_device, page, offset, size, direction);
9b513090
RC
2946}
2947
2948/**
2949 * ib_dma_unmap_page - Destroy a mapping created by ib_dma_map_page()
2950 * @dev: The device for which the DMA address was created
2951 * @addr: The DMA address
2952 * @size: The size of the region in bytes
2953 * @direction: The direction of the DMA
2954 */
2955static inline void ib_dma_unmap_page(struct ib_device *dev,
2956 u64 addr, size_t size,
2957 enum dma_data_direction direction)
2958{
d1998ef3
BC
2959 if (dev->dma_ops)
2960 dev->dma_ops->unmap_page(dev, addr, size, direction);
2961 else
9b513090
RC
2962 dma_unmap_page(dev->dma_device, addr, size, direction);
2963}
2964
2965/**
2966 * ib_dma_map_sg - Map a scatter/gather list to DMA addresses
2967 * @dev: The device for which the DMA addresses are to be created
2968 * @sg: The array of scatter/gather entries
2969 * @nents: The number of scatter/gather entries
2970 * @direction: The direction of the DMA
2971 */
2972static inline int ib_dma_map_sg(struct ib_device *dev,
2973 struct scatterlist *sg, int nents,
2974 enum dma_data_direction direction)
2975{
d1998ef3
BC
2976 if (dev->dma_ops)
2977 return dev->dma_ops->map_sg(dev, sg, nents, direction);
2978 return dma_map_sg(dev->dma_device, sg, nents, direction);
9b513090
RC
2979}
2980
2981/**
2982 * ib_dma_unmap_sg - Unmap a scatter/gather list of DMA addresses
2983 * @dev: The device for which the DMA addresses were created
2984 * @sg: The array of scatter/gather entries
2985 * @nents: The number of scatter/gather entries
2986 * @direction: The direction of the DMA
2987 */
2988static inline void ib_dma_unmap_sg(struct ib_device *dev,
2989 struct scatterlist *sg, int nents,
2990 enum dma_data_direction direction)
2991{
d1998ef3
BC
2992 if (dev->dma_ops)
2993 dev->dma_ops->unmap_sg(dev, sg, nents, direction);
2994 else
9b513090
RC
2995 dma_unmap_sg(dev->dma_device, sg, nents, direction);
2996}
2997
cb9fbc5c
AK
2998static inline int ib_dma_map_sg_attrs(struct ib_device *dev,
2999 struct scatterlist *sg, int nents,
3000 enum dma_data_direction direction,
00085f1e 3001 unsigned long dma_attrs)
cb9fbc5c 3002{
00085f1e
KK
3003 return dma_map_sg_attrs(dev->dma_device, sg, nents, direction,
3004 dma_attrs);
cb9fbc5c
AK
3005}
3006
3007static inline void ib_dma_unmap_sg_attrs(struct ib_device *dev,
3008 struct scatterlist *sg, int nents,
3009 enum dma_data_direction direction,
00085f1e 3010 unsigned long dma_attrs)
cb9fbc5c 3011{
00085f1e 3012 dma_unmap_sg_attrs(dev->dma_device, sg, nents, direction, dma_attrs);
cb9fbc5c 3013}
9b513090
RC
3014/**
3015 * ib_sg_dma_address - Return the DMA address from a scatter/gather entry
3016 * @dev: The device for which the DMA addresses were created
3017 * @sg: The scatter/gather entry
ea58a595
MM
3018 *
3019 * Note: this function is obsolete. To do: change all occurrences of
3020 * ib_sg_dma_address() into sg_dma_address().
9b513090
RC
3021 */
3022static inline u64 ib_sg_dma_address(struct ib_device *dev,
3023 struct scatterlist *sg)
3024{
d1998ef3 3025 return sg_dma_address(sg);
9b513090
RC
3026}
3027
3028/**
3029 * ib_sg_dma_len - Return the DMA length from a scatter/gather entry
3030 * @dev: The device for which the DMA addresses were created
3031 * @sg: The scatter/gather entry
ea58a595
MM
3032 *
3033 * Note: this function is obsolete. To do: change all occurrences of
3034 * ib_sg_dma_len() into sg_dma_len().
9b513090
RC
3035 */
3036static inline unsigned int ib_sg_dma_len(struct ib_device *dev,
3037 struct scatterlist *sg)
3038{
d1998ef3 3039 return sg_dma_len(sg);
9b513090
RC
3040}
3041
3042/**
3043 * ib_dma_sync_single_for_cpu - Prepare DMA region to be accessed by CPU
3044 * @dev: The device for which the DMA address was created
3045 * @addr: The DMA address
3046 * @size: The size of the region in bytes
3047 * @dir: The direction of the DMA
3048 */
3049static inline void ib_dma_sync_single_for_cpu(struct ib_device *dev,
3050 u64 addr,
3051 size_t size,
3052 enum dma_data_direction dir)
3053{
d1998ef3
BC
3054 if (dev->dma_ops)
3055 dev->dma_ops->sync_single_for_cpu(dev, addr, size, dir);
3056 else
9b513090
RC
3057 dma_sync_single_for_cpu(dev->dma_device, addr, size, dir);
3058}
3059
3060/**
3061 * ib_dma_sync_single_for_device - Prepare DMA region to be accessed by device
3062 * @dev: The device for which the DMA address was created
3063 * @addr: The DMA address
3064 * @size: The size of the region in bytes
3065 * @dir: The direction of the DMA
3066 */
3067static inline void ib_dma_sync_single_for_device(struct ib_device *dev,
3068 u64 addr,
3069 size_t size,
3070 enum dma_data_direction dir)
3071{
d1998ef3
BC
3072 if (dev->dma_ops)
3073 dev->dma_ops->sync_single_for_device(dev, addr, size, dir);
3074 else
9b513090
RC
3075 dma_sync_single_for_device(dev->dma_device, addr, size, dir);
3076}
3077
3078/**
3079 * ib_dma_alloc_coherent - Allocate memory and map it for DMA
3080 * @dev: The device for which the DMA address is requested
3081 * @size: The size of the region to allocate in bytes
3082 * @dma_handle: A pointer for returning the DMA address of the region
3083 * @flag: memory allocator flags
3084 */
3085static inline void *ib_dma_alloc_coherent(struct ib_device *dev,
3086 size_t size,
3087 u64 *dma_handle,
3088 gfp_t flag)
3089{
d1998ef3
BC
3090 if (dev->dma_ops)
3091 return dev->dma_ops->alloc_coherent(dev, size, dma_handle, flag);
c59a3da1
RD
3092 else {
3093 dma_addr_t handle;
3094 void *ret;
3095
3096 ret = dma_alloc_coherent(dev->dma_device, size, &handle, flag);
3097 *dma_handle = handle;
3098 return ret;
3099 }
9b513090
RC
3100}
3101
3102/**
3103 * ib_dma_free_coherent - Free memory allocated by ib_dma_alloc_coherent()
3104 * @dev: The device for which the DMA addresses were allocated
3105 * @size: The size of the region
3106 * @cpu_addr: the address returned by ib_dma_alloc_coherent()
3107 * @dma_handle: the DMA address returned by ib_dma_alloc_coherent()
3108 */
3109static inline void ib_dma_free_coherent(struct ib_device *dev,
3110 size_t size, void *cpu_addr,
3111 u64 dma_handle)
3112{
d1998ef3
BC
3113 if (dev->dma_ops)
3114 dev->dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
3115 else
9b513090
RC
3116 dma_free_coherent(dev->dma_device, size, cpu_addr, dma_handle);
3117}
3118
1da177e4
LT
3119/**
3120 * ib_dereg_mr - Deregisters a memory region and removes it from the
3121 * HCA translation table.
3122 * @mr: The memory region to deregister.
7083e42e
SM
3123 *
3124 * This function can fail, if the memory region has memory windows bound to it.
1da177e4
LT
3125 */
3126int ib_dereg_mr(struct ib_mr *mr);
3127
9bee178b
SG
3128struct ib_mr *ib_alloc_mr(struct ib_pd *pd,
3129 enum ib_mr_type mr_type,
3130 u32 max_num_sg);
00f7ec36 3131
00f7ec36
SW
3132/**
3133 * ib_update_fast_reg_key - updates the key portion of the fast_reg MR
3134 * R_Key and L_Key.
3135 * @mr - struct ib_mr pointer to be updated.
3136 * @newkey - new key to be used.
3137 */
3138static inline void ib_update_fast_reg_key(struct ib_mr *mr, u8 newkey)
3139{
3140 mr->lkey = (mr->lkey & 0xffffff00) | newkey;
3141 mr->rkey = (mr->rkey & 0xffffff00) | newkey;
3142}
3143
7083e42e
SM
3144/**
3145 * ib_inc_rkey - increments the key portion of the given rkey. Can be used
3146 * for calculating a new rkey for type 2 memory windows.
3147 * @rkey - the rkey to increment.
3148 */
3149static inline u32 ib_inc_rkey(u32 rkey)
3150{
3151 const u32 mask = 0x000000ff;
3152 return ((rkey + 1) & mask) | (rkey & ~mask);
3153}
3154
1da177e4
LT
3155/**
3156 * ib_alloc_fmr - Allocates a unmapped fast memory region.
3157 * @pd: The protection domain associated with the unmapped region.
3158 * @mr_access_flags: Specifies the memory access rights.
3159 * @fmr_attr: Attributes of the unmapped region.
3160 *
3161 * A fast memory region must be mapped before it can be used as part of
3162 * a work request.
3163 */
3164struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd,
3165 int mr_access_flags,
3166 struct ib_fmr_attr *fmr_attr);
3167
3168/**
3169 * ib_map_phys_fmr - Maps a list of physical pages to a fast memory region.
3170 * @fmr: The fast memory region to associate with the pages.
3171 * @page_list: An array of physical pages to map to the fast memory region.
3172 * @list_len: The number of pages in page_list.
3173 * @iova: The I/O virtual address to use with the mapped region.
3174 */
3175static inline int ib_map_phys_fmr(struct ib_fmr *fmr,
3176 u64 *page_list, int list_len,
3177 u64 iova)
3178{
3179 return fmr->device->map_phys_fmr(fmr, page_list, list_len, iova);
3180}
3181
3182/**
3183 * ib_unmap_fmr - Removes the mapping from a list of fast memory regions.
3184 * @fmr_list: A linked list of fast memory regions to unmap.
3185 */
3186int ib_unmap_fmr(struct list_head *fmr_list);
3187
3188/**
3189 * ib_dealloc_fmr - Deallocates a fast memory region.
3190 * @fmr: The fast memory region to deallocate.
3191 */
3192int ib_dealloc_fmr(struct ib_fmr *fmr);
3193
3194/**
3195 * ib_attach_mcast - Attaches the specified QP to a multicast group.
3196 * @qp: QP to attach to the multicast group. The QP must be type
3197 * IB_QPT_UD.
3198 * @gid: Multicast group GID.
3199 * @lid: Multicast group LID in host byte order.
3200 *
3201 * In order to send and receive multicast packets, subnet
3202 * administration must have created the multicast group and configured
3203 * the fabric appropriately. The port associated with the specified
3204 * QP must also be a member of the multicast group.
3205 */
3206int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
3207
3208/**
3209 * ib_detach_mcast - Detaches the specified QP from a multicast group.
3210 * @qp: QP to detach from the multicast group.
3211 * @gid: Multicast group GID.
3212 * @lid: Multicast group LID in host byte order.
3213 */
3214int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
3215
59991f94
SH
3216/**
3217 * ib_alloc_xrcd - Allocates an XRC domain.
3218 * @device: The device on which to allocate the XRC domain.
3219 */
3220struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device);
3221
3222/**
3223 * ib_dealloc_xrcd - Deallocates an XRC domain.
3224 * @xrcd: The XRC domain to deallocate.
3225 */
3226int ib_dealloc_xrcd(struct ib_xrcd *xrcd);
3227
319a441d
HHZ
3228struct ib_flow *ib_create_flow(struct ib_qp *qp,
3229 struct ib_flow_attr *flow_attr, int domain);
3230int ib_destroy_flow(struct ib_flow *flow_id);
3231
1c636f80
EC
3232static inline int ib_check_mr_access(int flags)
3233{
3234 /*
3235 * Local write permission is required if remote write or
3236 * remote atomic permission is also requested.
3237 */
3238 if (flags & (IB_ACCESS_REMOTE_ATOMIC | IB_ACCESS_REMOTE_WRITE) &&
3239 !(flags & IB_ACCESS_LOCAL_WRITE))
3240 return -EINVAL;
3241
3242 return 0;
3243}
3244
1b01d335
SG
3245/**
3246 * ib_check_mr_status: lightweight check of MR status.
3247 * This routine may provide status checks on a selected
3248 * ib_mr. first use is for signature status check.
3249 *
3250 * @mr: A memory region.
3251 * @check_mask: Bitmask of which checks to perform from
3252 * ib_mr_status_check enumeration.
3253 * @mr_status: The container of relevant status checks.
3254 * failed checks will be indicated in the status bitmask
3255 * and the relevant info shall be in the error item.
3256 */
3257int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
3258 struct ib_mr_status *mr_status);
3259
9268f72d
YK
3260struct net_device *ib_get_net_dev_by_params(struct ib_device *dev, u8 port,
3261 u16 pkey, const union ib_gid *gid,
3262 const struct sockaddr *addr);
5fd251c8
YH
3263struct ib_wq *ib_create_wq(struct ib_pd *pd,
3264 struct ib_wq_init_attr *init_attr);
3265int ib_destroy_wq(struct ib_wq *wq);
3266int ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *attr,
3267 u32 wq_attr_mask);
6d39786b
YH
3268struct ib_rwq_ind_table *ib_create_rwq_ind_table(struct ib_device *device,
3269 struct ib_rwq_ind_table_init_attr*
3270 wq_ind_table_init_attr);
3271int ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *wq_ind_table);
9268f72d 3272
ff2ba993 3273int ib_map_mr_sg(struct ib_mr *mr, struct scatterlist *sg, int sg_nents,
9aa8b321 3274 unsigned int *sg_offset, unsigned int page_size);
4c67e2bf
SG
3275
3276static inline int
ff2ba993 3277ib_map_mr_sg_zbva(struct ib_mr *mr, struct scatterlist *sg, int sg_nents,
9aa8b321 3278 unsigned int *sg_offset, unsigned int page_size)
4c67e2bf
SG
3279{
3280 int n;
3281
ff2ba993 3282 n = ib_map_mr_sg(mr, sg, sg_nents, sg_offset, page_size);
4c67e2bf
SG
3283 mr->iova = 0;
3284
3285 return n;
3286}
3287
ff2ba993 3288int ib_sg_to_pages(struct ib_mr *mr, struct scatterlist *sgl, int sg_nents,
9aa8b321 3289 unsigned int *sg_offset, int (*set_page)(struct ib_mr *, u64));
4c67e2bf 3290
765d6774
SW
3291void ib_drain_rq(struct ib_qp *qp);
3292void ib_drain_sq(struct ib_qp *qp);
3293void ib_drain_qp(struct ib_qp *qp);
1da177e4 3294#endif /* IB_VERBS_H */