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CommitLineData
1da177e4
LT
1/*
2 * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
3 * Copyright (c) 2004 Infinicon Corporation. All rights reserved.
4 * Copyright (c) 2004 Intel Corporation. All rights reserved.
5 * Copyright (c) 2004 Topspin Corporation. All rights reserved.
6 * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
2a1d9b7f 7 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
f7c6a7b5 8 * Copyright (c) 2005, 2006, 2007 Cisco Systems. All rights reserved.
1da177e4
LT
9 *
10 * This software is available to you under a choice of one of two
11 * licenses. You may choose to be licensed under the terms of the GNU
12 * General Public License (GPL) Version 2, available from the file
13 * COPYING in the main directory of this source tree, or the
14 * OpenIB.org BSD license below:
15 *
16 * Redistribution and use in source and binary forms, with or
17 * without modification, are permitted provided that the following
18 * conditions are met:
19 *
20 * - Redistributions of source code must retain the above
21 * copyright notice, this list of conditions and the following
22 * disclaimer.
23 *
24 * - Redistributions in binary form must reproduce the above
25 * copyright notice, this list of conditions and the following
26 * disclaimer in the documentation and/or other materials
27 * provided with the distribution.
28 *
29 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
31 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
33 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
34 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
35 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * SOFTWARE.
1da177e4
LT
37 */
38
39#if !defined(IB_VERBS_H)
40#define IB_VERBS_H
41
42#include <linux/types.h>
43#include <linux/device.h>
9b513090
RC
44#include <linux/mm.h>
45#include <linux/dma-mapping.h>
459d6e2a 46#include <linux/kref.h>
bfb3ea12
DB
47#include <linux/list.h>
48#include <linux/rwsem.h>
87ae9afd 49#include <linux/scatterlist.h>
f0626710 50#include <linux/workqueue.h>
9268f72d 51#include <linux/socket.h>
14d3a3b2 52#include <linux/irq_poll.h>
dd5f03be 53#include <uapi/linux/if_ether.h>
c865f246
SK
54#include <net/ipv6.h>
55#include <net/ip.h>
301a721e
MB
56#include <linux/string.h>
57#include <linux/slab.h>
e2773c06 58
50174a7f 59#include <linux/if_link.h>
60063497 60#include <linux/atomic.h>
882214e2 61#include <linux/mmu_notifier.h>
e2773c06 62#include <asm/uaccess.h>
1da177e4 63
f0626710 64extern struct workqueue_struct *ib_wq;
14d3a3b2 65extern struct workqueue_struct *ib_comp_wq;
f0626710 66
1da177e4
LT
67union ib_gid {
68 u8 raw[16];
69 struct {
97f52eb4
SH
70 __be64 subnet_prefix;
71 __be64 interface_id;
1da177e4
LT
72 } global;
73};
74
e26be1bf
MS
75extern union ib_gid zgid;
76
b39ffa1d
MB
77enum ib_gid_type {
78 /* If link layer is Ethernet, this is RoCE V1 */
79 IB_GID_TYPE_IB = 0,
80 IB_GID_TYPE_ROCE = 0,
7766a99f 81 IB_GID_TYPE_ROCE_UDP_ENCAP = 1,
b39ffa1d
MB
82 IB_GID_TYPE_SIZE
83};
84
7ead4bcb 85#define ROCE_V2_UDP_DPORT 4791
03db3a2d 86struct ib_gid_attr {
b39ffa1d 87 enum ib_gid_type gid_type;
03db3a2d
MB
88 struct net_device *ndev;
89};
90
07ebafba
TT
91enum rdma_node_type {
92 /* IB values map to NodeInfo:NodeType. */
93 RDMA_NODE_IB_CA = 1,
94 RDMA_NODE_IB_SWITCH,
95 RDMA_NODE_IB_ROUTER,
180771a3
UM
96 RDMA_NODE_RNIC,
97 RDMA_NODE_USNIC,
5db5765e 98 RDMA_NODE_USNIC_UDP,
1da177e4
LT
99};
100
a0c1b2a3
EC
101enum {
102 /* set the local administered indication */
103 IB_SA_WELL_KNOWN_GUID = BIT_ULL(57) | 2,
104};
105
07ebafba
TT
106enum rdma_transport_type {
107 RDMA_TRANSPORT_IB,
180771a3 108 RDMA_TRANSPORT_IWARP,
248567f7
UM
109 RDMA_TRANSPORT_USNIC,
110 RDMA_TRANSPORT_USNIC_UDP
07ebafba
TT
111};
112
6b90a6d6
MW
113enum rdma_protocol_type {
114 RDMA_PROTOCOL_IB,
115 RDMA_PROTOCOL_IBOE,
116 RDMA_PROTOCOL_IWARP,
117 RDMA_PROTOCOL_USNIC_UDP
118};
119
8385fd84
RD
120__attribute_const__ enum rdma_transport_type
121rdma_node_get_transport(enum rdma_node_type node_type);
07ebafba 122
c865f246
SK
123enum rdma_network_type {
124 RDMA_NETWORK_IB,
125 RDMA_NETWORK_ROCE_V1 = RDMA_NETWORK_IB,
126 RDMA_NETWORK_IPV4,
127 RDMA_NETWORK_IPV6
128};
129
130static inline enum ib_gid_type ib_network_to_gid_type(enum rdma_network_type network_type)
131{
132 if (network_type == RDMA_NETWORK_IPV4 ||
133 network_type == RDMA_NETWORK_IPV6)
134 return IB_GID_TYPE_ROCE_UDP_ENCAP;
135
136 /* IB_GID_TYPE_IB same as RDMA_NETWORK_ROCE_V1 */
137 return IB_GID_TYPE_IB;
138}
139
140static inline enum rdma_network_type ib_gid_to_network_type(enum ib_gid_type gid_type,
141 union ib_gid *gid)
142{
143 if (gid_type == IB_GID_TYPE_IB)
144 return RDMA_NETWORK_IB;
145
146 if (ipv6_addr_v4mapped((struct in6_addr *)gid))
147 return RDMA_NETWORK_IPV4;
148 else
149 return RDMA_NETWORK_IPV6;
150}
151
a3f5adaf
EC
152enum rdma_link_layer {
153 IB_LINK_LAYER_UNSPECIFIED,
154 IB_LINK_LAYER_INFINIBAND,
155 IB_LINK_LAYER_ETHERNET,
156};
157
1da177e4 158enum ib_device_cap_flags {
7ca0bc53
LR
159 IB_DEVICE_RESIZE_MAX_WR = (1 << 0),
160 IB_DEVICE_BAD_PKEY_CNTR = (1 << 1),
161 IB_DEVICE_BAD_QKEY_CNTR = (1 << 2),
162 IB_DEVICE_RAW_MULTI = (1 << 3),
163 IB_DEVICE_AUTO_PATH_MIG = (1 << 4),
164 IB_DEVICE_CHANGE_PHY_PORT = (1 << 5),
165 IB_DEVICE_UD_AV_PORT_ENFORCE = (1 << 6),
166 IB_DEVICE_CURR_QP_STATE_MOD = (1 << 7),
167 IB_DEVICE_SHUTDOWN_PORT = (1 << 8),
168 IB_DEVICE_INIT_TYPE = (1 << 9),
169 IB_DEVICE_PORT_ACTIVE_EVENT = (1 << 10),
170 IB_DEVICE_SYS_IMAGE_GUID = (1 << 11),
171 IB_DEVICE_RC_RNR_NAK_GEN = (1 << 12),
172 IB_DEVICE_SRQ_RESIZE = (1 << 13),
173 IB_DEVICE_N_NOTIFY_CQ = (1 << 14),
b1adc714
CH
174
175 /*
176 * This device supports a per-device lkey or stag that can be
177 * used without performing a memory registration for the local
178 * memory. Note that ULPs should never check this flag, but
179 * instead of use the local_dma_lkey flag in the ib_pd structure,
180 * which will always contain a usable lkey.
181 */
7ca0bc53
LR
182 IB_DEVICE_LOCAL_DMA_LKEY = (1 << 15),
183 IB_DEVICE_RESERVED /* old SEND_W_INV */ = (1 << 16),
184 IB_DEVICE_MEM_WINDOW = (1 << 17),
e0605d91
EC
185 /*
186 * Devices should set IB_DEVICE_UD_IP_SUM if they support
187 * insertion of UDP and TCP checksum on outgoing UD IPoIB
188 * messages and can verify the validity of checksum for
189 * incoming messages. Setting this flag implies that the
190 * IPoIB driver may set NETIF_F_IP_CSUM for datagram mode.
191 */
7ca0bc53
LR
192 IB_DEVICE_UD_IP_CSUM = (1 << 18),
193 IB_DEVICE_UD_TSO = (1 << 19),
194 IB_DEVICE_XRC = (1 << 20),
b1adc714
CH
195
196 /*
197 * This device supports the IB "base memory management extension",
198 * which includes support for fast registrations (IB_WR_REG_MR,
199 * IB_WR_LOCAL_INV and IB_WR_SEND_WITH_INV verbs). This flag should
200 * also be set by any iWarp device which must support FRs to comply
201 * to the iWarp verbs spec. iWarp devices also support the
202 * IB_WR_RDMA_READ_WITH_INV verb for RDMA READs that invalidate the
203 * stag.
204 */
7ca0bc53
LR
205 IB_DEVICE_MEM_MGT_EXTENSIONS = (1 << 21),
206 IB_DEVICE_BLOCK_MULTICAST_LOOPBACK = (1 << 22),
207 IB_DEVICE_MEM_WINDOW_TYPE_2A = (1 << 23),
208 IB_DEVICE_MEM_WINDOW_TYPE_2B = (1 << 24),
209 IB_DEVICE_RC_IP_CSUM = (1 << 25),
210 IB_DEVICE_RAW_IP_CSUM = (1 << 26),
8a06ce59
LR
211 /*
212 * Devices should set IB_DEVICE_CROSS_CHANNEL if they
213 * support execution of WQEs that involve synchronization
214 * of I/O operations with single completion queue managed
215 * by hardware.
216 */
217 IB_DEVICE_CROSS_CHANNEL = (1 << 27),
7ca0bc53
LR
218 IB_DEVICE_MANAGED_FLOW_STEERING = (1 << 29),
219 IB_DEVICE_SIGNATURE_HANDOVER = (1 << 30),
47355b3c 220 IB_DEVICE_ON_DEMAND_PAGING = (1ULL << 31),
f5aa9159 221 IB_DEVICE_SG_GAPS_REG = (1ULL << 32),
c7e162a4
MG
222 IB_DEVICE_VIRTUAL_FUNCTION = (1ULL << 33),
223 IB_DEVICE_RAW_SCATTER_FCS = (1ULL << 34),
1b01d335
SG
224};
225
226enum ib_signature_prot_cap {
227 IB_PROT_T10DIF_TYPE_1 = 1,
228 IB_PROT_T10DIF_TYPE_2 = 1 << 1,
229 IB_PROT_T10DIF_TYPE_3 = 1 << 2,
230};
231
232enum ib_signature_guard_cap {
233 IB_GUARD_T10DIF_CRC = 1,
234 IB_GUARD_T10DIF_CSUM = 1 << 1,
1da177e4
LT
235};
236
237enum ib_atomic_cap {
238 IB_ATOMIC_NONE,
239 IB_ATOMIC_HCA,
240 IB_ATOMIC_GLOB
241};
242
860f10a7
SG
243enum ib_odp_general_cap_bits {
244 IB_ODP_SUPPORT = 1 << 0,
245};
246
247enum ib_odp_transport_cap_bits {
248 IB_ODP_SUPPORT_SEND = 1 << 0,
249 IB_ODP_SUPPORT_RECV = 1 << 1,
250 IB_ODP_SUPPORT_WRITE = 1 << 2,
251 IB_ODP_SUPPORT_READ = 1 << 3,
252 IB_ODP_SUPPORT_ATOMIC = 1 << 4,
253};
254
255struct ib_odp_caps {
256 uint64_t general_caps;
257 struct {
258 uint32_t rc_odp_caps;
259 uint32_t uc_odp_caps;
260 uint32_t ud_odp_caps;
261 } per_transport_caps;
262};
263
ccf20562
YH
264struct ib_rss_caps {
265 /* Corresponding bit will be set if qp type from
266 * 'enum ib_qp_type' is supported, e.g.
267 * supported_qpts |= 1 << IB_QPT_UD
268 */
269 u32 supported_qpts;
270 u32 max_rwq_indirection_tables;
271 u32 max_rwq_indirection_table_size;
272};
273
b9926b92
MB
274enum ib_cq_creation_flags {
275 IB_CQ_FLAGS_TIMESTAMP_COMPLETION = 1 << 0,
8a06ce59 276 IB_CQ_FLAGS_IGNORE_OVERRUN = 1 << 1,
b9926b92
MB
277};
278
bcf4c1ea
MB
279struct ib_cq_init_attr {
280 unsigned int cqe;
281 int comp_vector;
282 u32 flags;
283};
284
1da177e4
LT
285struct ib_device_attr {
286 u64 fw_ver;
97f52eb4 287 __be64 sys_image_guid;
1da177e4
LT
288 u64 max_mr_size;
289 u64 page_size_cap;
290 u32 vendor_id;
291 u32 vendor_part_id;
292 u32 hw_ver;
293 int max_qp;
294 int max_qp_wr;
fb532d6a 295 u64 device_cap_flags;
1da177e4
LT
296 int max_sge;
297 int max_sge_rd;
298 int max_cq;
299 int max_cqe;
300 int max_mr;
301 int max_pd;
302 int max_qp_rd_atom;
303 int max_ee_rd_atom;
304 int max_res_rd_atom;
305 int max_qp_init_rd_atom;
306 int max_ee_init_rd_atom;
307 enum ib_atomic_cap atomic_cap;
5e80ba8f 308 enum ib_atomic_cap masked_atomic_cap;
1da177e4
LT
309 int max_ee;
310 int max_rdd;
311 int max_mw;
312 int max_raw_ipv6_qp;
313 int max_raw_ethy_qp;
314 int max_mcast_grp;
315 int max_mcast_qp_attach;
316 int max_total_mcast_qp_attach;
317 int max_ah;
318 int max_fmr;
319 int max_map_per_fmr;
320 int max_srq;
321 int max_srq_wr;
322 int max_srq_sge;
00f7ec36 323 unsigned int max_fast_reg_page_list_len;
1da177e4
LT
324 u16 max_pkeys;
325 u8 local_ca_ack_delay;
1b01d335
SG
326 int sig_prot_cap;
327 int sig_guard_cap;
860f10a7 328 struct ib_odp_caps odp_caps;
24306dc6
MB
329 uint64_t timestamp_mask;
330 uint64_t hca_core_clock; /* in KHZ */
ccf20562
YH
331 struct ib_rss_caps rss_caps;
332 u32 max_wq_type_rq;
1da177e4
LT
333};
334
335enum ib_mtu {
336 IB_MTU_256 = 1,
337 IB_MTU_512 = 2,
338 IB_MTU_1024 = 3,
339 IB_MTU_2048 = 4,
340 IB_MTU_4096 = 5
341};
342
343static inline int ib_mtu_enum_to_int(enum ib_mtu mtu)
344{
345 switch (mtu) {
346 case IB_MTU_256: return 256;
347 case IB_MTU_512: return 512;
348 case IB_MTU_1024: return 1024;
349 case IB_MTU_2048: return 2048;
350 case IB_MTU_4096: return 4096;
351 default: return -1;
352 }
353}
354
355enum ib_port_state {
356 IB_PORT_NOP = 0,
357 IB_PORT_DOWN = 1,
358 IB_PORT_INIT = 2,
359 IB_PORT_ARMED = 3,
360 IB_PORT_ACTIVE = 4,
361 IB_PORT_ACTIVE_DEFER = 5
362};
363
364enum ib_port_cap_flags {
365 IB_PORT_SM = 1 << 1,
366 IB_PORT_NOTICE_SUP = 1 << 2,
367 IB_PORT_TRAP_SUP = 1 << 3,
368 IB_PORT_OPT_IPD_SUP = 1 << 4,
369 IB_PORT_AUTO_MIGR_SUP = 1 << 5,
370 IB_PORT_SL_MAP_SUP = 1 << 6,
371 IB_PORT_MKEY_NVRAM = 1 << 7,
372 IB_PORT_PKEY_NVRAM = 1 << 8,
373 IB_PORT_LED_INFO_SUP = 1 << 9,
374 IB_PORT_SM_DISABLED = 1 << 10,
375 IB_PORT_SYS_IMAGE_GUID_SUP = 1 << 11,
376 IB_PORT_PKEY_SW_EXT_PORT_TRAP_SUP = 1 << 12,
71eeba16 377 IB_PORT_EXTENDED_SPEEDS_SUP = 1 << 14,
1da177e4
LT
378 IB_PORT_CM_SUP = 1 << 16,
379 IB_PORT_SNMP_TUNNEL_SUP = 1 << 17,
380 IB_PORT_REINIT_SUP = 1 << 18,
381 IB_PORT_DEVICE_MGMT_SUP = 1 << 19,
382 IB_PORT_VENDOR_CLASS_SUP = 1 << 20,
383 IB_PORT_DR_NOTICE_SUP = 1 << 21,
384 IB_PORT_CAP_MASK_NOTICE_SUP = 1 << 22,
385 IB_PORT_BOOT_MGMT_SUP = 1 << 23,
386 IB_PORT_LINK_LATENCY_SUP = 1 << 24,
b4a26a27 387 IB_PORT_CLIENT_REG_SUP = 1 << 25,
03db3a2d 388 IB_PORT_IP_BASED_GIDS = 1 << 26,
1da177e4
LT
389};
390
391enum ib_port_width {
392 IB_WIDTH_1X = 1,
393 IB_WIDTH_4X = 2,
394 IB_WIDTH_8X = 4,
395 IB_WIDTH_12X = 8
396};
397
398static inline int ib_width_enum_to_int(enum ib_port_width width)
399{
400 switch (width) {
401 case IB_WIDTH_1X: return 1;
402 case IB_WIDTH_4X: return 4;
403 case IB_WIDTH_8X: return 8;
404 case IB_WIDTH_12X: return 12;
405 default: return -1;
406 }
407}
408
2e96691c
OG
409enum ib_port_speed {
410 IB_SPEED_SDR = 1,
411 IB_SPEED_DDR = 2,
412 IB_SPEED_QDR = 4,
413 IB_SPEED_FDR10 = 8,
414 IB_SPEED_FDR = 16,
415 IB_SPEED_EDR = 32
416};
417
b40f4757
CL
418/**
419 * struct rdma_hw_stats
420 * @timestamp - Used by the core code to track when the last update was
421 * @lifespan - Used by the core code to determine how old the counters
422 * should be before being updated again. Stored in jiffies, defaults
423 * to 10 milliseconds, drivers can override the default be specifying
424 * their own value during their allocation routine.
425 * @name - Array of pointers to static names used for the counters in
426 * directory.
427 * @num_counters - How many hardware counters there are. If name is
428 * shorter than this number, a kernel oops will result. Driver authors
429 * are encouraged to leave BUILD_BUG_ON(ARRAY_SIZE(@name) < num_counters)
430 * in their code to prevent this.
431 * @value - Array of u64 counters that are accessed by the sysfs code and
432 * filled in by the drivers get_stats routine
433 */
434struct rdma_hw_stats {
435 unsigned long timestamp;
436 unsigned long lifespan;
437 const char * const *names;
438 int num_counters;
439 u64 value[];
7f624d02
SW
440};
441
b40f4757
CL
442#define RDMA_HW_STATS_DEFAULT_LIFESPAN 10
443/**
444 * rdma_alloc_hw_stats_struct - Helper function to allocate dynamic struct
445 * for drivers.
446 * @names - Array of static const char *
447 * @num_counters - How many elements in array
448 * @lifespan - How many milliseconds between updates
449 */
450static inline struct rdma_hw_stats *rdma_alloc_hw_stats_struct(
451 const char * const *names, int num_counters,
452 unsigned long lifespan)
453{
454 struct rdma_hw_stats *stats;
455
456 stats = kzalloc(sizeof(*stats) + num_counters * sizeof(u64),
457 GFP_KERNEL);
458 if (!stats)
459 return NULL;
460 stats->names = names;
461 stats->num_counters = num_counters;
462 stats->lifespan = msecs_to_jiffies(lifespan);
463
464 return stats;
465}
466
467
f9b22e35
IW
468/* Define bits for the various functionality this port needs to be supported by
469 * the core.
470 */
471/* Management 0x00000FFF */
472#define RDMA_CORE_CAP_IB_MAD 0x00000001
473#define RDMA_CORE_CAP_IB_SMI 0x00000002
474#define RDMA_CORE_CAP_IB_CM 0x00000004
475#define RDMA_CORE_CAP_IW_CM 0x00000008
476#define RDMA_CORE_CAP_IB_SA 0x00000010
65995fee 477#define RDMA_CORE_CAP_OPA_MAD 0x00000020
f9b22e35
IW
478
479/* Address format 0x000FF000 */
480#define RDMA_CORE_CAP_AF_IB 0x00001000
481#define RDMA_CORE_CAP_ETH_AH 0x00002000
482
483/* Protocol 0xFFF00000 */
484#define RDMA_CORE_CAP_PROT_IB 0x00100000
485#define RDMA_CORE_CAP_PROT_ROCE 0x00200000
486#define RDMA_CORE_CAP_PROT_IWARP 0x00400000
7766a99f 487#define RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP 0x00800000
f9b22e35
IW
488
489#define RDMA_CORE_PORT_IBA_IB (RDMA_CORE_CAP_PROT_IB \
490 | RDMA_CORE_CAP_IB_MAD \
491 | RDMA_CORE_CAP_IB_SMI \
492 | RDMA_CORE_CAP_IB_CM \
493 | RDMA_CORE_CAP_IB_SA \
494 | RDMA_CORE_CAP_AF_IB)
495#define RDMA_CORE_PORT_IBA_ROCE (RDMA_CORE_CAP_PROT_ROCE \
496 | RDMA_CORE_CAP_IB_MAD \
497 | RDMA_CORE_CAP_IB_CM \
f9b22e35
IW
498 | RDMA_CORE_CAP_AF_IB \
499 | RDMA_CORE_CAP_ETH_AH)
7766a99f
MB
500#define RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP \
501 (RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP \
502 | RDMA_CORE_CAP_IB_MAD \
503 | RDMA_CORE_CAP_IB_CM \
504 | RDMA_CORE_CAP_AF_IB \
505 | RDMA_CORE_CAP_ETH_AH)
f9b22e35
IW
506#define RDMA_CORE_PORT_IWARP (RDMA_CORE_CAP_PROT_IWARP \
507 | RDMA_CORE_CAP_IW_CM)
65995fee
IW
508#define RDMA_CORE_PORT_INTEL_OPA (RDMA_CORE_PORT_IBA_IB \
509 | RDMA_CORE_CAP_OPA_MAD)
f9b22e35 510
1da177e4 511struct ib_port_attr {
fad61ad4 512 u64 subnet_prefix;
1da177e4
LT
513 enum ib_port_state state;
514 enum ib_mtu max_mtu;
515 enum ib_mtu active_mtu;
516 int gid_tbl_len;
517 u32 port_cap_flags;
518 u32 max_msg_sz;
519 u32 bad_pkey_cntr;
520 u32 qkey_viol_cntr;
521 u16 pkey_tbl_len;
522 u16 lid;
523 u16 sm_lid;
524 u8 lmc;
525 u8 max_vl_num;
526 u8 sm_sl;
527 u8 subnet_timeout;
528 u8 init_type_reply;
529 u8 active_width;
530 u8 active_speed;
531 u8 phys_state;
a0c1b2a3 532 bool grh_required;
1da177e4
LT
533};
534
535enum ib_device_modify_flags {
c5bcbbb9
RD
536 IB_DEVICE_MODIFY_SYS_IMAGE_GUID = 1 << 0,
537 IB_DEVICE_MODIFY_NODE_DESC = 1 << 1
1da177e4
LT
538};
539
bd99fdea
YS
540#define IB_DEVICE_NODE_DESC_MAX 64
541
1da177e4
LT
542struct ib_device_modify {
543 u64 sys_image_guid;
bd99fdea 544 char node_desc[IB_DEVICE_NODE_DESC_MAX];
1da177e4
LT
545};
546
547enum ib_port_modify_flags {
548 IB_PORT_SHUTDOWN = 1,
549 IB_PORT_INIT_TYPE = (1<<2),
550 IB_PORT_RESET_QKEY_CNTR = (1<<3)
551};
552
553struct ib_port_modify {
554 u32 set_port_cap_mask;
555 u32 clr_port_cap_mask;
556 u8 init_type;
557};
558
559enum ib_event_type {
560 IB_EVENT_CQ_ERR,
561 IB_EVENT_QP_FATAL,
562 IB_EVENT_QP_REQ_ERR,
563 IB_EVENT_QP_ACCESS_ERR,
564 IB_EVENT_COMM_EST,
565 IB_EVENT_SQ_DRAINED,
566 IB_EVENT_PATH_MIG,
567 IB_EVENT_PATH_MIG_ERR,
568 IB_EVENT_DEVICE_FATAL,
569 IB_EVENT_PORT_ACTIVE,
570 IB_EVENT_PORT_ERR,
571 IB_EVENT_LID_CHANGE,
572 IB_EVENT_PKEY_CHANGE,
d41fcc67
RD
573 IB_EVENT_SM_CHANGE,
574 IB_EVENT_SRQ_ERR,
575 IB_EVENT_SRQ_LIMIT_REACHED,
63942c9a 576 IB_EVENT_QP_LAST_WQE_REACHED,
761d90ed
OG
577 IB_EVENT_CLIENT_REREGISTER,
578 IB_EVENT_GID_CHANGE,
f213c052 579 IB_EVENT_WQ_FATAL,
1da177e4
LT
580};
581
db7489e0 582const char *__attribute_const__ ib_event_msg(enum ib_event_type event);
2b1b5b60 583
1da177e4
LT
584struct ib_event {
585 struct ib_device *device;
586 union {
587 struct ib_cq *cq;
588 struct ib_qp *qp;
d41fcc67 589 struct ib_srq *srq;
f213c052 590 struct ib_wq *wq;
1da177e4
LT
591 u8 port_num;
592 } element;
593 enum ib_event_type event;
594};
595
596struct ib_event_handler {
597 struct ib_device *device;
598 void (*handler)(struct ib_event_handler *, struct ib_event *);
599 struct list_head list;
600};
601
602#define INIT_IB_EVENT_HANDLER(_ptr, _device, _handler) \
603 do { \
604 (_ptr)->device = _device; \
605 (_ptr)->handler = _handler; \
606 INIT_LIST_HEAD(&(_ptr)->list); \
607 } while (0)
608
609struct ib_global_route {
610 union ib_gid dgid;
611 u32 flow_label;
612 u8 sgid_index;
613 u8 hop_limit;
614 u8 traffic_class;
615};
616
513789ed 617struct ib_grh {
97f52eb4
SH
618 __be32 version_tclass_flow;
619 __be16 paylen;
513789ed
HR
620 u8 next_hdr;
621 u8 hop_limit;
622 union ib_gid sgid;
623 union ib_gid dgid;
624};
625
c865f246
SK
626union rdma_network_hdr {
627 struct ib_grh ibgrh;
628 struct {
629 /* The IB spec states that if it's IPv4, the header
630 * is located in the last 20 bytes of the header.
631 */
632 u8 reserved[20];
633 struct iphdr roce4grh;
634 };
635};
636
1da177e4
LT
637enum {
638 IB_MULTICAST_QPN = 0xffffff
639};
640
f3a7c66b 641#define IB_LID_PERMISSIVE cpu_to_be16(0xFFFF)
b4e64397 642#define IB_MULTICAST_LID_BASE cpu_to_be16(0xC000)
97f52eb4 643
1da177e4
LT
644enum ib_ah_flags {
645 IB_AH_GRH = 1
646};
647
bf6a9e31
JM
648enum ib_rate {
649 IB_RATE_PORT_CURRENT = 0,
650 IB_RATE_2_5_GBPS = 2,
651 IB_RATE_5_GBPS = 5,
652 IB_RATE_10_GBPS = 3,
653 IB_RATE_20_GBPS = 6,
654 IB_RATE_30_GBPS = 4,
655 IB_RATE_40_GBPS = 7,
656 IB_RATE_60_GBPS = 8,
657 IB_RATE_80_GBPS = 9,
71eeba16
MA
658 IB_RATE_120_GBPS = 10,
659 IB_RATE_14_GBPS = 11,
660 IB_RATE_56_GBPS = 12,
661 IB_RATE_112_GBPS = 13,
662 IB_RATE_168_GBPS = 14,
663 IB_RATE_25_GBPS = 15,
664 IB_RATE_100_GBPS = 16,
665 IB_RATE_200_GBPS = 17,
666 IB_RATE_300_GBPS = 18
bf6a9e31
JM
667};
668
669/**
670 * ib_rate_to_mult - Convert the IB rate enum to a multiple of the
671 * base rate of 2.5 Gbit/sec. For example, IB_RATE_5_GBPS will be
672 * converted to 2, since 5 Gbit/sec is 2 * 2.5 Gbit/sec.
673 * @rate: rate to convert.
674 */
8385fd84 675__attribute_const__ int ib_rate_to_mult(enum ib_rate rate);
bf6a9e31 676
71eeba16
MA
677/**
678 * ib_rate_to_mbps - Convert the IB rate enum to Mbps.
679 * For example, IB_RATE_2_5_GBPS will be converted to 2500.
680 * @rate: rate to convert.
681 */
8385fd84 682__attribute_const__ int ib_rate_to_mbps(enum ib_rate rate);
71eeba16 683
17cd3a2d
SG
684
685/**
9bee178b
SG
686 * enum ib_mr_type - memory region type
687 * @IB_MR_TYPE_MEM_REG: memory region that is used for
688 * normal registration
689 * @IB_MR_TYPE_SIGNATURE: memory region that is used for
690 * signature operations (data-integrity
691 * capable regions)
f5aa9159
SG
692 * @IB_MR_TYPE_SG_GAPS: memory region that is capable to
693 * register any arbitrary sg lists (without
694 * the normal mr constraints - see
695 * ib_map_mr_sg)
17cd3a2d 696 */
9bee178b
SG
697enum ib_mr_type {
698 IB_MR_TYPE_MEM_REG,
699 IB_MR_TYPE_SIGNATURE,
f5aa9159 700 IB_MR_TYPE_SG_GAPS,
17cd3a2d
SG
701};
702
1b01d335 703/**
78eda2bb
SG
704 * Signature types
705 * IB_SIG_TYPE_NONE: Unprotected.
706 * IB_SIG_TYPE_T10_DIF: Type T10-DIF
1b01d335 707 */
78eda2bb
SG
708enum ib_signature_type {
709 IB_SIG_TYPE_NONE,
710 IB_SIG_TYPE_T10_DIF,
1b01d335
SG
711};
712
713/**
714 * Signature T10-DIF block-guard types
715 * IB_T10DIF_CRC: Corresponds to T10-PI mandated CRC checksum rules.
716 * IB_T10DIF_CSUM: Corresponds to IP checksum rules.
717 */
718enum ib_t10_dif_bg_type {
719 IB_T10DIF_CRC,
720 IB_T10DIF_CSUM
721};
722
723/**
724 * struct ib_t10_dif_domain - Parameters specific for T10-DIF
725 * domain.
1b01d335
SG
726 * @bg_type: T10-DIF block guard type (CRC|CSUM)
727 * @pi_interval: protection information interval.
728 * @bg: seed of guard computation.
729 * @app_tag: application tag of guard block
730 * @ref_tag: initial guard block reference tag.
78eda2bb
SG
731 * @ref_remap: Indicate wethear the reftag increments each block
732 * @app_escape: Indicate to skip block check if apptag=0xffff
733 * @ref_escape: Indicate to skip block check if reftag=0xffffffff
734 * @apptag_check_mask: check bitmask of application tag.
1b01d335
SG
735 */
736struct ib_t10_dif_domain {
1b01d335
SG
737 enum ib_t10_dif_bg_type bg_type;
738 u16 pi_interval;
739 u16 bg;
740 u16 app_tag;
741 u32 ref_tag;
78eda2bb
SG
742 bool ref_remap;
743 bool app_escape;
744 bool ref_escape;
745 u16 apptag_check_mask;
1b01d335
SG
746};
747
748/**
749 * struct ib_sig_domain - Parameters for signature domain
750 * @sig_type: specific signauture type
751 * @sig: union of all signature domain attributes that may
752 * be used to set domain layout.
753 */
754struct ib_sig_domain {
755 enum ib_signature_type sig_type;
756 union {
757 struct ib_t10_dif_domain dif;
758 } sig;
759};
760
761/**
762 * struct ib_sig_attrs - Parameters for signature handover operation
763 * @check_mask: bitmask for signature byte check (8 bytes)
764 * @mem: memory domain layout desciptor.
765 * @wire: wire domain layout desciptor.
766 */
767struct ib_sig_attrs {
768 u8 check_mask;
769 struct ib_sig_domain mem;
770 struct ib_sig_domain wire;
771};
772
773enum ib_sig_err_type {
774 IB_SIG_BAD_GUARD,
775 IB_SIG_BAD_REFTAG,
776 IB_SIG_BAD_APPTAG,
777};
778
779/**
780 * struct ib_sig_err - signature error descriptor
781 */
782struct ib_sig_err {
783 enum ib_sig_err_type err_type;
784 u32 expected;
785 u32 actual;
786 u64 sig_err_offset;
787 u32 key;
788};
789
790enum ib_mr_status_check {
791 IB_MR_CHECK_SIG_STATUS = 1,
792};
793
794/**
795 * struct ib_mr_status - Memory region status container
796 *
797 * @fail_status: Bitmask of MR checks status. For each
798 * failed check a corresponding status bit is set.
799 * @sig_err: Additional info for IB_MR_CEHCK_SIG_STATUS
800 * failure.
801 */
802struct ib_mr_status {
803 u32 fail_status;
804 struct ib_sig_err sig_err;
805};
806
bf6a9e31
JM
807/**
808 * mult_to_ib_rate - Convert a multiple of 2.5 Gbit/sec to an IB rate
809 * enum.
810 * @mult: multiple to convert.
811 */
8385fd84 812__attribute_const__ enum ib_rate mult_to_ib_rate(int mult);
bf6a9e31 813
1da177e4
LT
814struct ib_ah_attr {
815 struct ib_global_route grh;
816 u16 dlid;
817 u8 sl;
818 u8 src_path_bits;
819 u8 static_rate;
820 u8 ah_flags;
821 u8 port_num;
dd5f03be 822 u8 dmac[ETH_ALEN];
1da177e4
LT
823};
824
825enum ib_wc_status {
826 IB_WC_SUCCESS,
827 IB_WC_LOC_LEN_ERR,
828 IB_WC_LOC_QP_OP_ERR,
829 IB_WC_LOC_EEC_OP_ERR,
830 IB_WC_LOC_PROT_ERR,
831 IB_WC_WR_FLUSH_ERR,
832 IB_WC_MW_BIND_ERR,
833 IB_WC_BAD_RESP_ERR,
834 IB_WC_LOC_ACCESS_ERR,
835 IB_WC_REM_INV_REQ_ERR,
836 IB_WC_REM_ACCESS_ERR,
837 IB_WC_REM_OP_ERR,
838 IB_WC_RETRY_EXC_ERR,
839 IB_WC_RNR_RETRY_EXC_ERR,
840 IB_WC_LOC_RDD_VIOL_ERR,
841 IB_WC_REM_INV_RD_REQ_ERR,
842 IB_WC_REM_ABORT_ERR,
843 IB_WC_INV_EECN_ERR,
844 IB_WC_INV_EEC_STATE_ERR,
845 IB_WC_FATAL_ERR,
846 IB_WC_RESP_TIMEOUT_ERR,
847 IB_WC_GENERAL_ERR
848};
849
db7489e0 850const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status);
2b1b5b60 851
1da177e4
LT
852enum ib_wc_opcode {
853 IB_WC_SEND,
854 IB_WC_RDMA_WRITE,
855 IB_WC_RDMA_READ,
856 IB_WC_COMP_SWAP,
857 IB_WC_FETCH_ADD,
c93570f2 858 IB_WC_LSO,
00f7ec36 859 IB_WC_LOCAL_INV,
4c67e2bf 860 IB_WC_REG_MR,
5e80ba8f
VS
861 IB_WC_MASKED_COMP_SWAP,
862 IB_WC_MASKED_FETCH_ADD,
1da177e4
LT
863/*
864 * Set value of IB_WC_RECV so consumers can test if a completion is a
865 * receive by testing (opcode & IB_WC_RECV).
866 */
867 IB_WC_RECV = 1 << 7,
868 IB_WC_RECV_RDMA_WITH_IMM
869};
870
871enum ib_wc_flags {
872 IB_WC_GRH = 1,
00f7ec36
SW
873 IB_WC_WITH_IMM = (1<<1),
874 IB_WC_WITH_INVALIDATE = (1<<2),
d927d505 875 IB_WC_IP_CSUM_OK = (1<<3),
dd5f03be
MB
876 IB_WC_WITH_SMAC = (1<<4),
877 IB_WC_WITH_VLAN = (1<<5),
c865f246 878 IB_WC_WITH_NETWORK_HDR_TYPE = (1<<6),
1da177e4
LT
879};
880
881struct ib_wc {
14d3a3b2
CH
882 union {
883 u64 wr_id;
884 struct ib_cqe *wr_cqe;
885 };
1da177e4
LT
886 enum ib_wc_status status;
887 enum ib_wc_opcode opcode;
888 u32 vendor_err;
889 u32 byte_len;
062dbb69 890 struct ib_qp *qp;
00f7ec36
SW
891 union {
892 __be32 imm_data;
893 u32 invalidate_rkey;
894 } ex;
1da177e4
LT
895 u32 src_qp;
896 int wc_flags;
897 u16 pkey_index;
898 u16 slid;
899 u8 sl;
900 u8 dlid_path_bits;
901 u8 port_num; /* valid only for DR SMPs on switches */
dd5f03be
MB
902 u8 smac[ETH_ALEN];
903 u16 vlan_id;
c865f246 904 u8 network_hdr_type;
1da177e4
LT
905};
906
ed23a727
RD
907enum ib_cq_notify_flags {
908 IB_CQ_SOLICITED = 1 << 0,
909 IB_CQ_NEXT_COMP = 1 << 1,
910 IB_CQ_SOLICITED_MASK = IB_CQ_SOLICITED | IB_CQ_NEXT_COMP,
911 IB_CQ_REPORT_MISSED_EVENTS = 1 << 2,
1da177e4
LT
912};
913
96104eda 914enum ib_srq_type {
418d5130
SH
915 IB_SRQT_BASIC,
916 IB_SRQT_XRC
96104eda
SH
917};
918
d41fcc67
RD
919enum ib_srq_attr_mask {
920 IB_SRQ_MAX_WR = 1 << 0,
921 IB_SRQ_LIMIT = 1 << 1,
922};
923
924struct ib_srq_attr {
925 u32 max_wr;
926 u32 max_sge;
927 u32 srq_limit;
928};
929
930struct ib_srq_init_attr {
931 void (*event_handler)(struct ib_event *, void *);
932 void *srq_context;
933 struct ib_srq_attr attr;
96104eda 934 enum ib_srq_type srq_type;
418d5130
SH
935
936 union {
937 struct {
938 struct ib_xrcd *xrcd;
939 struct ib_cq *cq;
940 } xrc;
941 } ext;
d41fcc67
RD
942};
943
1da177e4
LT
944struct ib_qp_cap {
945 u32 max_send_wr;
946 u32 max_recv_wr;
947 u32 max_send_sge;
948 u32 max_recv_sge;
949 u32 max_inline_data;
a060b562
CH
950
951 /*
952 * Maximum number of rdma_rw_ctx structures in flight at a time.
953 * ib_create_qp() will calculate the right amount of neededed WRs
954 * and MRs based on this.
955 */
956 u32 max_rdma_ctxs;
1da177e4
LT
957};
958
959enum ib_sig_type {
960 IB_SIGNAL_ALL_WR,
961 IB_SIGNAL_REQ_WR
962};
963
964enum ib_qp_type {
965 /*
966 * IB_QPT_SMI and IB_QPT_GSI have to be the first two entries
967 * here (and in that order) since the MAD layer uses them as
968 * indices into a 2-entry table.
969 */
970 IB_QPT_SMI,
971 IB_QPT_GSI,
972
973 IB_QPT_RC,
974 IB_QPT_UC,
975 IB_QPT_UD,
976 IB_QPT_RAW_IPV6,
b42b63cf 977 IB_QPT_RAW_ETHERTYPE,
c938a616 978 IB_QPT_RAW_PACKET = 8,
b42b63cf
SH
979 IB_QPT_XRC_INI = 9,
980 IB_QPT_XRC_TGT,
0134f16b
JM
981 IB_QPT_MAX,
982 /* Reserve a range for qp types internal to the low level driver.
983 * These qp types will not be visible at the IB core layer, so the
984 * IB_QPT_MAX usages should not be affected in the core layer
985 */
986 IB_QPT_RESERVED1 = 0x1000,
987 IB_QPT_RESERVED2,
988 IB_QPT_RESERVED3,
989 IB_QPT_RESERVED4,
990 IB_QPT_RESERVED5,
991 IB_QPT_RESERVED6,
992 IB_QPT_RESERVED7,
993 IB_QPT_RESERVED8,
994 IB_QPT_RESERVED9,
995 IB_QPT_RESERVED10,
1da177e4
LT
996};
997
b846f25a 998enum ib_qp_create_flags {
47ee1b9f
RL
999 IB_QP_CREATE_IPOIB_UD_LSO = 1 << 0,
1000 IB_QP_CREATE_BLOCK_MULTICAST_LOOPBACK = 1 << 1,
8a06ce59
LR
1001 IB_QP_CREATE_CROSS_CHANNEL = 1 << 2,
1002 IB_QP_CREATE_MANAGED_SEND = 1 << 3,
1003 IB_QP_CREATE_MANAGED_RECV = 1 << 4,
90f1d1b4 1004 IB_QP_CREATE_NETIF_QP = 1 << 5,
1b01d335 1005 IB_QP_CREATE_SIGNATURE_EN = 1 << 6,
09b93088 1006 IB_QP_CREATE_USE_GFP_NOIO = 1 << 7,
b531b909 1007 IB_QP_CREATE_SCATTER_FCS = 1 << 8,
d2b57063
JM
1008 /* reserve bits 26-31 for low level drivers' internal use */
1009 IB_QP_CREATE_RESERVED_START = 1 << 26,
1010 IB_QP_CREATE_RESERVED_END = 1 << 31,
b846f25a
EC
1011};
1012
73c40c61
YH
1013/*
1014 * Note: users may not call ib_close_qp or ib_destroy_qp from the event_handler
1015 * callback to destroy the passed in QP.
1016 */
1017
1da177e4
LT
1018struct ib_qp_init_attr {
1019 void (*event_handler)(struct ib_event *, void *);
1020 void *qp_context;
1021 struct ib_cq *send_cq;
1022 struct ib_cq *recv_cq;
1023 struct ib_srq *srq;
b42b63cf 1024 struct ib_xrcd *xrcd; /* XRC TGT QPs only */
1da177e4
LT
1025 struct ib_qp_cap cap;
1026 enum ib_sig_type sq_sig_type;
1027 enum ib_qp_type qp_type;
b846f25a 1028 enum ib_qp_create_flags create_flags;
a060b562
CH
1029
1030 /*
1031 * Only needed for special QP types, or when using the RW API.
1032 */
1033 u8 port_num;
a9017e23 1034 struct ib_rwq_ind_table *rwq_ind_tbl;
1da177e4
LT
1035};
1036
0e0ec7e0
SH
1037struct ib_qp_open_attr {
1038 void (*event_handler)(struct ib_event *, void *);
1039 void *qp_context;
1040 u32 qp_num;
1041 enum ib_qp_type qp_type;
1042};
1043
1da177e4
LT
1044enum ib_rnr_timeout {
1045 IB_RNR_TIMER_655_36 = 0,
1046 IB_RNR_TIMER_000_01 = 1,
1047 IB_RNR_TIMER_000_02 = 2,
1048 IB_RNR_TIMER_000_03 = 3,
1049 IB_RNR_TIMER_000_04 = 4,
1050 IB_RNR_TIMER_000_06 = 5,
1051 IB_RNR_TIMER_000_08 = 6,
1052 IB_RNR_TIMER_000_12 = 7,
1053 IB_RNR_TIMER_000_16 = 8,
1054 IB_RNR_TIMER_000_24 = 9,
1055 IB_RNR_TIMER_000_32 = 10,
1056 IB_RNR_TIMER_000_48 = 11,
1057 IB_RNR_TIMER_000_64 = 12,
1058 IB_RNR_TIMER_000_96 = 13,
1059 IB_RNR_TIMER_001_28 = 14,
1060 IB_RNR_TIMER_001_92 = 15,
1061 IB_RNR_TIMER_002_56 = 16,
1062 IB_RNR_TIMER_003_84 = 17,
1063 IB_RNR_TIMER_005_12 = 18,
1064 IB_RNR_TIMER_007_68 = 19,
1065 IB_RNR_TIMER_010_24 = 20,
1066 IB_RNR_TIMER_015_36 = 21,
1067 IB_RNR_TIMER_020_48 = 22,
1068 IB_RNR_TIMER_030_72 = 23,
1069 IB_RNR_TIMER_040_96 = 24,
1070 IB_RNR_TIMER_061_44 = 25,
1071 IB_RNR_TIMER_081_92 = 26,
1072 IB_RNR_TIMER_122_88 = 27,
1073 IB_RNR_TIMER_163_84 = 28,
1074 IB_RNR_TIMER_245_76 = 29,
1075 IB_RNR_TIMER_327_68 = 30,
1076 IB_RNR_TIMER_491_52 = 31
1077};
1078
1079enum ib_qp_attr_mask {
1080 IB_QP_STATE = 1,
1081 IB_QP_CUR_STATE = (1<<1),
1082 IB_QP_EN_SQD_ASYNC_NOTIFY = (1<<2),
1083 IB_QP_ACCESS_FLAGS = (1<<3),
1084 IB_QP_PKEY_INDEX = (1<<4),
1085 IB_QP_PORT = (1<<5),
1086 IB_QP_QKEY = (1<<6),
1087 IB_QP_AV = (1<<7),
1088 IB_QP_PATH_MTU = (1<<8),
1089 IB_QP_TIMEOUT = (1<<9),
1090 IB_QP_RETRY_CNT = (1<<10),
1091 IB_QP_RNR_RETRY = (1<<11),
1092 IB_QP_RQ_PSN = (1<<12),
1093 IB_QP_MAX_QP_RD_ATOMIC = (1<<13),
1094 IB_QP_ALT_PATH = (1<<14),
1095 IB_QP_MIN_RNR_TIMER = (1<<15),
1096 IB_QP_SQ_PSN = (1<<16),
1097 IB_QP_MAX_DEST_RD_ATOMIC = (1<<17),
1098 IB_QP_PATH_MIG_STATE = (1<<18),
1099 IB_QP_CAP = (1<<19),
dd5f03be 1100 IB_QP_DEST_QPN = (1<<20),
aa744cc0
MB
1101 IB_QP_RESERVED1 = (1<<21),
1102 IB_QP_RESERVED2 = (1<<22),
1103 IB_QP_RESERVED3 = (1<<23),
1104 IB_QP_RESERVED4 = (1<<24),
1da177e4
LT
1105};
1106
1107enum ib_qp_state {
1108 IB_QPS_RESET,
1109 IB_QPS_INIT,
1110 IB_QPS_RTR,
1111 IB_QPS_RTS,
1112 IB_QPS_SQD,
1113 IB_QPS_SQE,
1114 IB_QPS_ERR
1115};
1116
1117enum ib_mig_state {
1118 IB_MIG_MIGRATED,
1119 IB_MIG_REARM,
1120 IB_MIG_ARMED
1121};
1122
7083e42e
SM
1123enum ib_mw_type {
1124 IB_MW_TYPE_1 = 1,
1125 IB_MW_TYPE_2 = 2
1126};
1127
1da177e4
LT
1128struct ib_qp_attr {
1129 enum ib_qp_state qp_state;
1130 enum ib_qp_state cur_qp_state;
1131 enum ib_mtu path_mtu;
1132 enum ib_mig_state path_mig_state;
1133 u32 qkey;
1134 u32 rq_psn;
1135 u32 sq_psn;
1136 u32 dest_qp_num;
1137 int qp_access_flags;
1138 struct ib_qp_cap cap;
1139 struct ib_ah_attr ah_attr;
1140 struct ib_ah_attr alt_ah_attr;
1141 u16 pkey_index;
1142 u16 alt_pkey_index;
1143 u8 en_sqd_async_notify;
1144 u8 sq_draining;
1145 u8 max_rd_atomic;
1146 u8 max_dest_rd_atomic;
1147 u8 min_rnr_timer;
1148 u8 port_num;
1149 u8 timeout;
1150 u8 retry_cnt;
1151 u8 rnr_retry;
1152 u8 alt_port_num;
1153 u8 alt_timeout;
1154};
1155
1156enum ib_wr_opcode {
1157 IB_WR_RDMA_WRITE,
1158 IB_WR_RDMA_WRITE_WITH_IMM,
1159 IB_WR_SEND,
1160 IB_WR_SEND_WITH_IMM,
1161 IB_WR_RDMA_READ,
1162 IB_WR_ATOMIC_CMP_AND_SWP,
c93570f2 1163 IB_WR_ATOMIC_FETCH_AND_ADD,
0f39cf3d
RD
1164 IB_WR_LSO,
1165 IB_WR_SEND_WITH_INV,
00f7ec36
SW
1166 IB_WR_RDMA_READ_WITH_INV,
1167 IB_WR_LOCAL_INV,
4c67e2bf 1168 IB_WR_REG_MR,
5e80ba8f
VS
1169 IB_WR_MASKED_ATOMIC_CMP_AND_SWP,
1170 IB_WR_MASKED_ATOMIC_FETCH_AND_ADD,
1b01d335 1171 IB_WR_REG_SIG_MR,
0134f16b
JM
1172 /* reserve values for low level drivers' internal use.
1173 * These values will not be used at all in the ib core layer.
1174 */
1175 IB_WR_RESERVED1 = 0xf0,
1176 IB_WR_RESERVED2,
1177 IB_WR_RESERVED3,
1178 IB_WR_RESERVED4,
1179 IB_WR_RESERVED5,
1180 IB_WR_RESERVED6,
1181 IB_WR_RESERVED7,
1182 IB_WR_RESERVED8,
1183 IB_WR_RESERVED9,
1184 IB_WR_RESERVED10,
1da177e4
LT
1185};
1186
1187enum ib_send_flags {
1188 IB_SEND_FENCE = 1,
1189 IB_SEND_SIGNALED = (1<<1),
1190 IB_SEND_SOLICITED = (1<<2),
e0605d91 1191 IB_SEND_INLINE = (1<<3),
0134f16b
JM
1192 IB_SEND_IP_CSUM = (1<<4),
1193
1194 /* reserve bits 26-31 for low level drivers' internal use */
1195 IB_SEND_RESERVED_START = (1 << 26),
1196 IB_SEND_RESERVED_END = (1 << 31),
1da177e4
LT
1197};
1198
1199struct ib_sge {
1200 u64 addr;
1201 u32 length;
1202 u32 lkey;
1203};
1204
14d3a3b2
CH
1205struct ib_cqe {
1206 void (*done)(struct ib_cq *cq, struct ib_wc *wc);
1207};
1208
1da177e4
LT
1209struct ib_send_wr {
1210 struct ib_send_wr *next;
14d3a3b2
CH
1211 union {
1212 u64 wr_id;
1213 struct ib_cqe *wr_cqe;
1214 };
1da177e4
LT
1215 struct ib_sge *sg_list;
1216 int num_sge;
1217 enum ib_wr_opcode opcode;
1218 int send_flags;
0f39cf3d
RD
1219 union {
1220 __be32 imm_data;
1221 u32 invalidate_rkey;
1222 } ex;
1da177e4
LT
1223};
1224
e622f2f4
CH
1225struct ib_rdma_wr {
1226 struct ib_send_wr wr;
1227 u64 remote_addr;
1228 u32 rkey;
1229};
1230
1231static inline struct ib_rdma_wr *rdma_wr(struct ib_send_wr *wr)
1232{
1233 return container_of(wr, struct ib_rdma_wr, wr);
1234}
1235
1236struct ib_atomic_wr {
1237 struct ib_send_wr wr;
1238 u64 remote_addr;
1239 u64 compare_add;
1240 u64 swap;
1241 u64 compare_add_mask;
1242 u64 swap_mask;
1243 u32 rkey;
1244};
1245
1246static inline struct ib_atomic_wr *atomic_wr(struct ib_send_wr *wr)
1247{
1248 return container_of(wr, struct ib_atomic_wr, wr);
1249}
1250
1251struct ib_ud_wr {
1252 struct ib_send_wr wr;
1253 struct ib_ah *ah;
1254 void *header;
1255 int hlen;
1256 int mss;
1257 u32 remote_qpn;
1258 u32 remote_qkey;
1259 u16 pkey_index; /* valid for GSI only */
1260 u8 port_num; /* valid for DR SMPs on switch only */
1261};
1262
1263static inline struct ib_ud_wr *ud_wr(struct ib_send_wr *wr)
1264{
1265 return container_of(wr, struct ib_ud_wr, wr);
1266}
1267
4c67e2bf
SG
1268struct ib_reg_wr {
1269 struct ib_send_wr wr;
1270 struct ib_mr *mr;
1271 u32 key;
1272 int access;
1273};
1274
1275static inline struct ib_reg_wr *reg_wr(struct ib_send_wr *wr)
1276{
1277 return container_of(wr, struct ib_reg_wr, wr);
1278}
1279
e622f2f4
CH
1280struct ib_sig_handover_wr {
1281 struct ib_send_wr wr;
1282 struct ib_sig_attrs *sig_attrs;
1283 struct ib_mr *sig_mr;
1284 int access_flags;
1285 struct ib_sge *prot;
1286};
1287
1288static inline struct ib_sig_handover_wr *sig_handover_wr(struct ib_send_wr *wr)
1289{
1290 return container_of(wr, struct ib_sig_handover_wr, wr);
1291}
1292
1da177e4
LT
1293struct ib_recv_wr {
1294 struct ib_recv_wr *next;
14d3a3b2
CH
1295 union {
1296 u64 wr_id;
1297 struct ib_cqe *wr_cqe;
1298 };
1da177e4
LT
1299 struct ib_sge *sg_list;
1300 int num_sge;
1301};
1302
1303enum ib_access_flags {
1304 IB_ACCESS_LOCAL_WRITE = 1,
1305 IB_ACCESS_REMOTE_WRITE = (1<<1),
1306 IB_ACCESS_REMOTE_READ = (1<<2),
1307 IB_ACCESS_REMOTE_ATOMIC = (1<<3),
7083e42e 1308 IB_ACCESS_MW_BIND = (1<<4),
860f10a7
SG
1309 IB_ZERO_BASED = (1<<5),
1310 IB_ACCESS_ON_DEMAND = (1<<6),
1da177e4
LT
1311};
1312
b7d3e0a9
CH
1313/*
1314 * XXX: these are apparently used for ->rereg_user_mr, no idea why they
1315 * are hidden here instead of a uapi header!
1316 */
1da177e4
LT
1317enum ib_mr_rereg_flags {
1318 IB_MR_REREG_TRANS = 1,
1319 IB_MR_REREG_PD = (1<<1),
7e6edb9b
MB
1320 IB_MR_REREG_ACCESS = (1<<2),
1321 IB_MR_REREG_SUPPORTED = ((IB_MR_REREG_ACCESS << 1) - 1)
1da177e4
LT
1322};
1323
1da177e4
LT
1324struct ib_fmr_attr {
1325 int max_pages;
1326 int max_maps;
d36f34aa 1327 u8 page_shift;
1da177e4
LT
1328};
1329
882214e2
HE
1330struct ib_umem;
1331
e2773c06
RD
1332struct ib_ucontext {
1333 struct ib_device *device;
1334 struct list_head pd_list;
1335 struct list_head mr_list;
1336 struct list_head mw_list;
1337 struct list_head cq_list;
1338 struct list_head qp_list;
1339 struct list_head srq_list;
1340 struct list_head ah_list;
53d0bd1e 1341 struct list_head xrcd_list;
436f2ad0 1342 struct list_head rule_list;
f213c052 1343 struct list_head wq_list;
de019a94 1344 struct list_head rwq_ind_tbl_list;
f7c6a7b5 1345 int closing;
8ada2c1c
SR
1346
1347 struct pid *tgid;
882214e2
HE
1348#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
1349 struct rb_root umem_tree;
1350 /*
1351 * Protects .umem_rbroot and tree, as well as odp_mrs_count and
1352 * mmu notifiers registration.
1353 */
1354 struct rw_semaphore umem_rwsem;
1355 void (*invalidate_range)(struct ib_umem *umem,
1356 unsigned long start, unsigned long end);
1357
1358 struct mmu_notifier mn;
1359 atomic_t notifier_count;
1360 /* A list of umems that don't have private mmu notifier counters yet. */
1361 struct list_head no_private_counters;
1362 int odp_mrs_count;
1363#endif
e2773c06
RD
1364};
1365
1366struct ib_uobject {
1367 u64 user_handle; /* handle given to us by userspace */
1368 struct ib_ucontext *context; /* associated user context */
9ead190b 1369 void *object; /* containing object */
e2773c06 1370 struct list_head list; /* link to context's list */
b3d636b0 1371 int id; /* index into kernel idr */
9ead190b
RD
1372 struct kref ref;
1373 struct rw_semaphore mutex; /* protects .live */
d144da8c 1374 struct rcu_head rcu; /* kfree_rcu() overhead */
9ead190b 1375 int live;
e2773c06
RD
1376};
1377
e2773c06 1378struct ib_udata {
309243ec 1379 const void __user *inbuf;
e2773c06
RD
1380 void __user *outbuf;
1381 size_t inlen;
1382 size_t outlen;
1383};
1384
1da177e4 1385struct ib_pd {
96249d70 1386 u32 local_dma_lkey;
ed082d36 1387 u32 flags;
e2773c06
RD
1388 struct ib_device *device;
1389 struct ib_uobject *uobject;
1390 atomic_t usecnt; /* count all resources */
50d46335 1391
ed082d36
CH
1392 u32 unsafe_global_rkey;
1393
50d46335
CH
1394 /*
1395 * Implementation details of the RDMA core, don't use in drivers:
1396 */
1397 struct ib_mr *__internal_mr;
1da177e4
LT
1398};
1399
59991f94
SH
1400struct ib_xrcd {
1401 struct ib_device *device;
d3d72d90 1402 atomic_t usecnt; /* count all exposed resources */
53d0bd1e 1403 struct inode *inode;
d3d72d90
SH
1404
1405 struct mutex tgt_qp_mutex;
1406 struct list_head tgt_qp_list;
59991f94
SH
1407};
1408
1da177e4
LT
1409struct ib_ah {
1410 struct ib_device *device;
1411 struct ib_pd *pd;
e2773c06 1412 struct ib_uobject *uobject;
1da177e4
LT
1413};
1414
1415typedef void (*ib_comp_handler)(struct ib_cq *cq, void *cq_context);
1416
14d3a3b2
CH
1417enum ib_poll_context {
1418 IB_POLL_DIRECT, /* caller context, no hw completions */
1419 IB_POLL_SOFTIRQ, /* poll from softirq context */
1420 IB_POLL_WORKQUEUE, /* poll from workqueue */
1421};
1422
1da177e4 1423struct ib_cq {
e2773c06
RD
1424 struct ib_device *device;
1425 struct ib_uobject *uobject;
1426 ib_comp_handler comp_handler;
1427 void (*event_handler)(struct ib_event *, void *);
4deccd6d 1428 void *cq_context;
e2773c06
RD
1429 int cqe;
1430 atomic_t usecnt; /* count number of work queues */
14d3a3b2
CH
1431 enum ib_poll_context poll_ctx;
1432 struct ib_wc *wc;
1433 union {
1434 struct irq_poll iop;
1435 struct work_struct work;
1436 };
1da177e4
LT
1437};
1438
1439struct ib_srq {
d41fcc67
RD
1440 struct ib_device *device;
1441 struct ib_pd *pd;
1442 struct ib_uobject *uobject;
1443 void (*event_handler)(struct ib_event *, void *);
1444 void *srq_context;
96104eda 1445 enum ib_srq_type srq_type;
1da177e4 1446 atomic_t usecnt;
418d5130
SH
1447
1448 union {
1449 struct {
1450 struct ib_xrcd *xrcd;
1451 struct ib_cq *cq;
1452 u32 srq_num;
1453 } xrc;
1454 } ext;
1da177e4
LT
1455};
1456
5fd251c8
YH
1457enum ib_wq_type {
1458 IB_WQT_RQ
1459};
1460
1461enum ib_wq_state {
1462 IB_WQS_RESET,
1463 IB_WQS_RDY,
1464 IB_WQS_ERR
1465};
1466
1467struct ib_wq {
1468 struct ib_device *device;
1469 struct ib_uobject *uobject;
1470 void *wq_context;
1471 void (*event_handler)(struct ib_event *, void *);
1472 struct ib_pd *pd;
1473 struct ib_cq *cq;
1474 u32 wq_num;
1475 enum ib_wq_state state;
1476 enum ib_wq_type wq_type;
1477 atomic_t usecnt;
1478};
1479
1480struct ib_wq_init_attr {
1481 void *wq_context;
1482 enum ib_wq_type wq_type;
1483 u32 max_wr;
1484 u32 max_sge;
1485 struct ib_cq *cq;
1486 void (*event_handler)(struct ib_event *, void *);
1487};
1488
1489enum ib_wq_attr_mask {
1490 IB_WQ_STATE = 1 << 0,
1491 IB_WQ_CUR_STATE = 1 << 1,
1492};
1493
1494struct ib_wq_attr {
1495 enum ib_wq_state wq_state;
1496 enum ib_wq_state curr_wq_state;
1497};
1498
6d39786b
YH
1499struct ib_rwq_ind_table {
1500 struct ib_device *device;
1501 struct ib_uobject *uobject;
1502 atomic_t usecnt;
1503 u32 ind_tbl_num;
1504 u32 log_ind_tbl_size;
1505 struct ib_wq **ind_tbl;
1506};
1507
1508struct ib_rwq_ind_table_init_attr {
1509 u32 log_ind_tbl_size;
1510 /* Each entry is a pointer to Receive Work Queue */
1511 struct ib_wq **ind_tbl;
1512};
1513
632bc3f6
BVA
1514/*
1515 * @max_write_sge: Maximum SGE elements per RDMA WRITE request.
1516 * @max_read_sge: Maximum SGE elements per RDMA READ request.
1517 */
1da177e4
LT
1518struct ib_qp {
1519 struct ib_device *device;
1520 struct ib_pd *pd;
1521 struct ib_cq *send_cq;
1522 struct ib_cq *recv_cq;
fffb0383
CH
1523 spinlock_t mr_lock;
1524 int mrs_used;
a060b562 1525 struct list_head rdma_mrs;
0e353e34 1526 struct list_head sig_mrs;
1da177e4 1527 struct ib_srq *srq;
b42b63cf 1528 struct ib_xrcd *xrcd; /* XRC TGT QPs only */
d3d72d90 1529 struct list_head xrcd_list;
fffb0383 1530
319a441d
HHZ
1531 /* count times opened, mcast attaches, flow attaches */
1532 atomic_t usecnt;
0e0ec7e0
SH
1533 struct list_head open_list;
1534 struct ib_qp *real_qp;
e2773c06 1535 struct ib_uobject *uobject;
1da177e4
LT
1536 void (*event_handler)(struct ib_event *, void *);
1537 void *qp_context;
1538 u32 qp_num;
632bc3f6
BVA
1539 u32 max_write_sge;
1540 u32 max_read_sge;
1da177e4 1541 enum ib_qp_type qp_type;
a9017e23 1542 struct ib_rwq_ind_table *rwq_ind_tbl;
1da177e4
LT
1543};
1544
1545struct ib_mr {
e2773c06
RD
1546 struct ib_device *device;
1547 struct ib_pd *pd;
e2773c06
RD
1548 u32 lkey;
1549 u32 rkey;
4c67e2bf
SG
1550 u64 iova;
1551 u32 length;
1552 unsigned int page_size;
d4a85c30 1553 bool need_inval;
fffb0383
CH
1554 union {
1555 struct ib_uobject *uobject; /* user */
1556 struct list_head qp_entry; /* FR */
1557 };
1da177e4
LT
1558};
1559
1560struct ib_mw {
1561 struct ib_device *device;
1562 struct ib_pd *pd;
e2773c06 1563 struct ib_uobject *uobject;
1da177e4 1564 u32 rkey;
7083e42e 1565 enum ib_mw_type type;
1da177e4
LT
1566};
1567
1568struct ib_fmr {
1569 struct ib_device *device;
1570 struct ib_pd *pd;
1571 struct list_head list;
1572 u32 lkey;
1573 u32 rkey;
1574};
1575
319a441d
HHZ
1576/* Supported steering options */
1577enum ib_flow_attr_type {
1578 /* steering according to rule specifications */
1579 IB_FLOW_ATTR_NORMAL = 0x0,
1580 /* default unicast and multicast rule -
1581 * receive all Eth traffic which isn't steered to any QP
1582 */
1583 IB_FLOW_ATTR_ALL_DEFAULT = 0x1,
1584 /* default multicast rule -
1585 * receive all Eth multicast traffic which isn't steered to any QP
1586 */
1587 IB_FLOW_ATTR_MC_DEFAULT = 0x2,
1588 /* sniffer rule - receive all port traffic */
1589 IB_FLOW_ATTR_SNIFFER = 0x3
1590};
1591
1592/* Supported steering header types */
1593enum ib_flow_spec_type {
1594 /* L2 headers*/
1595 IB_FLOW_SPEC_ETH = 0x20,
240ae00e 1596 IB_FLOW_SPEC_IB = 0x22,
319a441d
HHZ
1597 /* L3 header*/
1598 IB_FLOW_SPEC_IPV4 = 0x30,
4c2aae71 1599 IB_FLOW_SPEC_IPV6 = 0x31,
319a441d
HHZ
1600 /* L4 headers*/
1601 IB_FLOW_SPEC_TCP = 0x40,
1602 IB_FLOW_SPEC_UDP = 0x41
1603};
240ae00e 1604#define IB_FLOW_SPEC_LAYER_MASK 0xF0
22878dbc
MB
1605#define IB_FLOW_SPEC_SUPPORT_LAYERS 4
1606
319a441d
HHZ
1607/* Flow steering rule priority is set according to it's domain.
1608 * Lower domain value means higher priority.
1609 */
1610enum ib_flow_domain {
1611 IB_FLOW_DOMAIN_USER,
1612 IB_FLOW_DOMAIN_ETHTOOL,
1613 IB_FLOW_DOMAIN_RFS,
1614 IB_FLOW_DOMAIN_NIC,
1615 IB_FLOW_DOMAIN_NUM /* Must be last */
1616};
1617
a3100a78
MV
1618enum ib_flow_flags {
1619 IB_FLOW_ATTR_FLAGS_DONT_TRAP = 1UL << 1, /* Continue match, no steal */
1620 IB_FLOW_ATTR_FLAGS_RESERVED = 1UL << 2 /* Must be last */
1621};
1622
319a441d
HHZ
1623struct ib_flow_eth_filter {
1624 u8 dst_mac[6];
1625 u8 src_mac[6];
1626 __be16 ether_type;
1627 __be16 vlan_tag;
15dfbd6b
MG
1628 /* Must be last */
1629 u8 real_sz[0];
319a441d
HHZ
1630};
1631
1632struct ib_flow_spec_eth {
1633 enum ib_flow_spec_type type;
1634 u16 size;
1635 struct ib_flow_eth_filter val;
1636 struct ib_flow_eth_filter mask;
1637};
1638
240ae00e
MB
1639struct ib_flow_ib_filter {
1640 __be16 dlid;
1641 __u8 sl;
15dfbd6b
MG
1642 /* Must be last */
1643 u8 real_sz[0];
240ae00e
MB
1644};
1645
1646struct ib_flow_spec_ib {
1647 enum ib_flow_spec_type type;
1648 u16 size;
1649 struct ib_flow_ib_filter val;
1650 struct ib_flow_ib_filter mask;
1651};
1652
989a3a8f
MG
1653/* IPv4 header flags */
1654enum ib_ipv4_flags {
1655 IB_IPV4_DONT_FRAG = 0x2, /* Don't enable packet fragmentation */
1656 IB_IPV4_MORE_FRAG = 0X4 /* For All fragmented packets except the
1657 last have this flag set */
1658};
1659
319a441d
HHZ
1660struct ib_flow_ipv4_filter {
1661 __be32 src_ip;
1662 __be32 dst_ip;
989a3a8f
MG
1663 u8 proto;
1664 u8 tos;
1665 u8 ttl;
1666 u8 flags;
15dfbd6b
MG
1667 /* Must be last */
1668 u8 real_sz[0];
319a441d
HHZ
1669};
1670
1671struct ib_flow_spec_ipv4 {
1672 enum ib_flow_spec_type type;
1673 u16 size;
1674 struct ib_flow_ipv4_filter val;
1675 struct ib_flow_ipv4_filter mask;
1676};
1677
4c2aae71
MG
1678struct ib_flow_ipv6_filter {
1679 u8 src_ip[16];
1680 u8 dst_ip[16];
a72c6a2b
MG
1681 __be32 flow_label;
1682 u8 next_hdr;
1683 u8 traffic_class;
1684 u8 hop_limit;
15dfbd6b
MG
1685 /* Must be last */
1686 u8 real_sz[0];
4c2aae71
MG
1687};
1688
1689struct ib_flow_spec_ipv6 {
1690 enum ib_flow_spec_type type;
1691 u16 size;
1692 struct ib_flow_ipv6_filter val;
1693 struct ib_flow_ipv6_filter mask;
1694};
1695
319a441d
HHZ
1696struct ib_flow_tcp_udp_filter {
1697 __be16 dst_port;
1698 __be16 src_port;
15dfbd6b
MG
1699 /* Must be last */
1700 u8 real_sz[0];
319a441d
HHZ
1701};
1702
1703struct ib_flow_spec_tcp_udp {
1704 enum ib_flow_spec_type type;
1705 u16 size;
1706 struct ib_flow_tcp_udp_filter val;
1707 struct ib_flow_tcp_udp_filter mask;
1708};
1709
1710union ib_flow_spec {
1711 struct {
1712 enum ib_flow_spec_type type;
1713 u16 size;
1714 };
1715 struct ib_flow_spec_eth eth;
240ae00e 1716 struct ib_flow_spec_ib ib;
319a441d
HHZ
1717 struct ib_flow_spec_ipv4 ipv4;
1718 struct ib_flow_spec_tcp_udp tcp_udp;
4c2aae71 1719 struct ib_flow_spec_ipv6 ipv6;
319a441d
HHZ
1720};
1721
1722struct ib_flow_attr {
1723 enum ib_flow_attr_type type;
1724 u16 size;
1725 u16 priority;
1726 u32 flags;
1727 u8 num_of_specs;
1728 u8 port;
1729 /* Following are the optional layers according to user request
1730 * struct ib_flow_spec_xxx
1731 * struct ib_flow_spec_yyy
1732 */
1733};
1734
1735struct ib_flow {
1736 struct ib_qp *qp;
1737 struct ib_uobject *uobject;
1738};
1739
4cd7c947 1740struct ib_mad_hdr;
1da177e4
LT
1741struct ib_grh;
1742
1743enum ib_process_mad_flags {
1744 IB_MAD_IGNORE_MKEY = 1,
1745 IB_MAD_IGNORE_BKEY = 2,
1746 IB_MAD_IGNORE_ALL = IB_MAD_IGNORE_MKEY | IB_MAD_IGNORE_BKEY
1747};
1748
1749enum ib_mad_result {
1750 IB_MAD_RESULT_FAILURE = 0, /* (!SUCCESS is the important flag) */
1751 IB_MAD_RESULT_SUCCESS = 1 << 0, /* MAD was successfully processed */
1752 IB_MAD_RESULT_REPLY = 1 << 1, /* Reply packet needs to be sent */
1753 IB_MAD_RESULT_CONSUMED = 1 << 2 /* Packet consumed: stop processing */
1754};
1755
1756#define IB_DEVICE_NAME_MAX 64
1757
1758struct ib_cache {
1759 rwlock_t lock;
1760 struct ib_event_handler event_handler;
1761 struct ib_pkey_cache **pkey_cache;
03db3a2d 1762 struct ib_gid_table **gid_cache;
6fb9cdbf 1763 u8 *lmc_cache;
1da177e4
LT
1764};
1765
9b513090
RC
1766struct ib_dma_mapping_ops {
1767 int (*mapping_error)(struct ib_device *dev,
1768 u64 dma_addr);
1769 u64 (*map_single)(struct ib_device *dev,
1770 void *ptr, size_t size,
1771 enum dma_data_direction direction);
1772 void (*unmap_single)(struct ib_device *dev,
1773 u64 addr, size_t size,
1774 enum dma_data_direction direction);
1775 u64 (*map_page)(struct ib_device *dev,
1776 struct page *page, unsigned long offset,
1777 size_t size,
1778 enum dma_data_direction direction);
1779 void (*unmap_page)(struct ib_device *dev,
1780 u64 addr, size_t size,
1781 enum dma_data_direction direction);
1782 int (*map_sg)(struct ib_device *dev,
1783 struct scatterlist *sg, int nents,
1784 enum dma_data_direction direction);
1785 void (*unmap_sg)(struct ib_device *dev,
1786 struct scatterlist *sg, int nents,
1787 enum dma_data_direction direction);
d9703650
PP
1788 int (*map_sg_attrs)(struct ib_device *dev,
1789 struct scatterlist *sg, int nents,
1790 enum dma_data_direction direction,
1791 unsigned long attrs);
1792 void (*unmap_sg_attrs)(struct ib_device *dev,
1793 struct scatterlist *sg, int nents,
1794 enum dma_data_direction direction,
1795 unsigned long attrs);
9b513090
RC
1796 void (*sync_single_for_cpu)(struct ib_device *dev,
1797 u64 dma_handle,
1798 size_t size,
4deccd6d 1799 enum dma_data_direction dir);
9b513090
RC
1800 void (*sync_single_for_device)(struct ib_device *dev,
1801 u64 dma_handle,
1802 size_t size,
1803 enum dma_data_direction dir);
1804 void *(*alloc_coherent)(struct ib_device *dev,
1805 size_t size,
1806 u64 *dma_handle,
1807 gfp_t flag);
1808 void (*free_coherent)(struct ib_device *dev,
1809 size_t size, void *cpu_addr,
1810 u64 dma_handle);
1811};
1812
07ebafba
TT
1813struct iw_cm_verbs;
1814
7738613e
IW
1815struct ib_port_immutable {
1816 int pkey_tbl_len;
1817 int gid_tbl_len;
f9b22e35 1818 u32 core_cap_flags;
337877a4 1819 u32 max_mad_size;
7738613e
IW
1820};
1821
1da177e4
LT
1822struct ib_device {
1823 struct device *dma_device;
1824
1825 char name[IB_DEVICE_NAME_MAX];
1826
1827 struct list_head event_handler_list;
1828 spinlock_t event_handler_lock;
1829
17a55f79 1830 spinlock_t client_data_lock;
1da177e4 1831 struct list_head core_list;
7c1eb45a
HE
1832 /* Access to the client_data_list is protected by the client_data_lock
1833 * spinlock and the lists_rwsem read-write semaphore */
1da177e4 1834 struct list_head client_data_list;
1da177e4
LT
1835
1836 struct ib_cache cache;
7738613e
IW
1837 /**
1838 * port_immutable is indexed by port number
1839 */
1840 struct ib_port_immutable *port_immutable;
1da177e4 1841
f4fd0b22
MT
1842 int num_comp_vectors;
1843
07ebafba
TT
1844 struct iw_cm_verbs *iwcm;
1845
b40f4757
CL
1846 /**
1847 * alloc_hw_stats - Allocate a struct rdma_hw_stats and fill in the
1848 * driver initialized data. The struct is kfree()'ed by the sysfs
1849 * core when the device is removed. A lifespan of -1 in the return
1850 * struct tells the core to set a default lifespan.
1851 */
1852 struct rdma_hw_stats *(*alloc_hw_stats)(struct ib_device *device,
1853 u8 port_num);
1854 /**
1855 * get_hw_stats - Fill in the counter value(s) in the stats struct.
1856 * @index - The index in the value array we wish to have updated, or
1857 * num_counters if we want all stats updated
1858 * Return codes -
1859 * < 0 - Error, no counters updated
1860 * index - Updated the single counter pointed to by index
1861 * num_counters - Updated all counters (will reset the timestamp
1862 * and prevent further calls for lifespan milliseconds)
1863 * Drivers are allowed to update all counters in leiu of just the
1864 * one given in index at their option
1865 */
1866 int (*get_hw_stats)(struct ib_device *device,
1867 struct rdma_hw_stats *stats,
1868 u8 port, int index);
1da177e4 1869 int (*query_device)(struct ib_device *device,
2528e33e
MB
1870 struct ib_device_attr *device_attr,
1871 struct ib_udata *udata);
1da177e4
LT
1872 int (*query_port)(struct ib_device *device,
1873 u8 port_num,
1874 struct ib_port_attr *port_attr);
a3f5adaf
EC
1875 enum rdma_link_layer (*get_link_layer)(struct ib_device *device,
1876 u8 port_num);
03db3a2d
MB
1877 /* When calling get_netdev, the HW vendor's driver should return the
1878 * net device of device @device at port @port_num or NULL if such
1879 * a net device doesn't exist. The vendor driver should call dev_hold
1880 * on this net device. The HW vendor's device driver must guarantee
1881 * that this function returns NULL before the net device reaches
1882 * NETDEV_UNREGISTER_FINAL state.
1883 */
1884 struct net_device *(*get_netdev)(struct ib_device *device,
1885 u8 port_num);
1da177e4
LT
1886 int (*query_gid)(struct ib_device *device,
1887 u8 port_num, int index,
1888 union ib_gid *gid);
03db3a2d
MB
1889 /* When calling add_gid, the HW vendor's driver should
1890 * add the gid of device @device at gid index @index of
1891 * port @port_num to be @gid. Meta-info of that gid (for example,
1892 * the network device related to this gid is available
1893 * at @attr. @context allows the HW vendor driver to store extra
1894 * information together with a GID entry. The HW vendor may allocate
1895 * memory to contain this information and store it in @context when a
1896 * new GID entry is written to. Params are consistent until the next
1897 * call of add_gid or delete_gid. The function should return 0 on
1898 * success or error otherwise. The function could be called
1899 * concurrently for different ports. This function is only called
1900 * when roce_gid_table is used.
1901 */
1902 int (*add_gid)(struct ib_device *device,
1903 u8 port_num,
1904 unsigned int index,
1905 const union ib_gid *gid,
1906 const struct ib_gid_attr *attr,
1907 void **context);
1908 /* When calling del_gid, the HW vendor's driver should delete the
1909 * gid of device @device at gid index @index of port @port_num.
1910 * Upon the deletion of a GID entry, the HW vendor must free any
1911 * allocated memory. The caller will clear @context afterwards.
1912 * This function is only called when roce_gid_table is used.
1913 */
1914 int (*del_gid)(struct ib_device *device,
1915 u8 port_num,
1916 unsigned int index,
1917 void **context);
1da177e4
LT
1918 int (*query_pkey)(struct ib_device *device,
1919 u8 port_num, u16 index, u16 *pkey);
1920 int (*modify_device)(struct ib_device *device,
1921 int device_modify_mask,
1922 struct ib_device_modify *device_modify);
1923 int (*modify_port)(struct ib_device *device,
1924 u8 port_num, int port_modify_mask,
1925 struct ib_port_modify *port_modify);
e2773c06
RD
1926 struct ib_ucontext * (*alloc_ucontext)(struct ib_device *device,
1927 struct ib_udata *udata);
1928 int (*dealloc_ucontext)(struct ib_ucontext *context);
1929 int (*mmap)(struct ib_ucontext *context,
1930 struct vm_area_struct *vma);
1931 struct ib_pd * (*alloc_pd)(struct ib_device *device,
1932 struct ib_ucontext *context,
1933 struct ib_udata *udata);
1da177e4
LT
1934 int (*dealloc_pd)(struct ib_pd *pd);
1935 struct ib_ah * (*create_ah)(struct ib_pd *pd,
1936 struct ib_ah_attr *ah_attr);
1937 int (*modify_ah)(struct ib_ah *ah,
1938 struct ib_ah_attr *ah_attr);
1939 int (*query_ah)(struct ib_ah *ah,
1940 struct ib_ah_attr *ah_attr);
1941 int (*destroy_ah)(struct ib_ah *ah);
d41fcc67
RD
1942 struct ib_srq * (*create_srq)(struct ib_pd *pd,
1943 struct ib_srq_init_attr *srq_init_attr,
1944 struct ib_udata *udata);
1945 int (*modify_srq)(struct ib_srq *srq,
1946 struct ib_srq_attr *srq_attr,
9bc57e2d
RC
1947 enum ib_srq_attr_mask srq_attr_mask,
1948 struct ib_udata *udata);
d41fcc67
RD
1949 int (*query_srq)(struct ib_srq *srq,
1950 struct ib_srq_attr *srq_attr);
1951 int (*destroy_srq)(struct ib_srq *srq);
1952 int (*post_srq_recv)(struct ib_srq *srq,
1953 struct ib_recv_wr *recv_wr,
1954 struct ib_recv_wr **bad_recv_wr);
1da177e4 1955 struct ib_qp * (*create_qp)(struct ib_pd *pd,
e2773c06
RD
1956 struct ib_qp_init_attr *qp_init_attr,
1957 struct ib_udata *udata);
1da177e4
LT
1958 int (*modify_qp)(struct ib_qp *qp,
1959 struct ib_qp_attr *qp_attr,
9bc57e2d
RC
1960 int qp_attr_mask,
1961 struct ib_udata *udata);
1da177e4
LT
1962 int (*query_qp)(struct ib_qp *qp,
1963 struct ib_qp_attr *qp_attr,
1964 int qp_attr_mask,
1965 struct ib_qp_init_attr *qp_init_attr);
1966 int (*destroy_qp)(struct ib_qp *qp);
1967 int (*post_send)(struct ib_qp *qp,
1968 struct ib_send_wr *send_wr,
1969 struct ib_send_wr **bad_send_wr);
1970 int (*post_recv)(struct ib_qp *qp,
1971 struct ib_recv_wr *recv_wr,
1972 struct ib_recv_wr **bad_recv_wr);
bcf4c1ea
MB
1973 struct ib_cq * (*create_cq)(struct ib_device *device,
1974 const struct ib_cq_init_attr *attr,
e2773c06
RD
1975 struct ib_ucontext *context,
1976 struct ib_udata *udata);
2dd57162
EC
1977 int (*modify_cq)(struct ib_cq *cq, u16 cq_count,
1978 u16 cq_period);
1da177e4 1979 int (*destroy_cq)(struct ib_cq *cq);
33b9b3ee
RD
1980 int (*resize_cq)(struct ib_cq *cq, int cqe,
1981 struct ib_udata *udata);
1da177e4
LT
1982 int (*poll_cq)(struct ib_cq *cq, int num_entries,
1983 struct ib_wc *wc);
1984 int (*peek_cq)(struct ib_cq *cq, int wc_cnt);
1985 int (*req_notify_cq)(struct ib_cq *cq,
ed23a727 1986 enum ib_cq_notify_flags flags);
1da177e4
LT
1987 int (*req_ncomp_notif)(struct ib_cq *cq,
1988 int wc_cnt);
1989 struct ib_mr * (*get_dma_mr)(struct ib_pd *pd,
1990 int mr_access_flags);
e2773c06 1991 struct ib_mr * (*reg_user_mr)(struct ib_pd *pd,
f7c6a7b5
RD
1992 u64 start, u64 length,
1993 u64 virt_addr,
e2773c06
RD
1994 int mr_access_flags,
1995 struct ib_udata *udata);
7e6edb9b
MB
1996 int (*rereg_user_mr)(struct ib_mr *mr,
1997 int flags,
1998 u64 start, u64 length,
1999 u64 virt_addr,
2000 int mr_access_flags,
2001 struct ib_pd *pd,
2002 struct ib_udata *udata);
1da177e4 2003 int (*dereg_mr)(struct ib_mr *mr);
9bee178b
SG
2004 struct ib_mr * (*alloc_mr)(struct ib_pd *pd,
2005 enum ib_mr_type mr_type,
2006 u32 max_num_sg);
4c67e2bf
SG
2007 int (*map_mr_sg)(struct ib_mr *mr,
2008 struct scatterlist *sg,
ff2ba993 2009 int sg_nents,
9aa8b321 2010 unsigned int *sg_offset);
7083e42e 2011 struct ib_mw * (*alloc_mw)(struct ib_pd *pd,
b2a239df
MB
2012 enum ib_mw_type type,
2013 struct ib_udata *udata);
1da177e4
LT
2014 int (*dealloc_mw)(struct ib_mw *mw);
2015 struct ib_fmr * (*alloc_fmr)(struct ib_pd *pd,
2016 int mr_access_flags,
2017 struct ib_fmr_attr *fmr_attr);
2018 int (*map_phys_fmr)(struct ib_fmr *fmr,
2019 u64 *page_list, int list_len,
2020 u64 iova);
2021 int (*unmap_fmr)(struct list_head *fmr_list);
2022 int (*dealloc_fmr)(struct ib_fmr *fmr);
2023 int (*attach_mcast)(struct ib_qp *qp,
2024 union ib_gid *gid,
2025 u16 lid);
2026 int (*detach_mcast)(struct ib_qp *qp,
2027 union ib_gid *gid,
2028 u16 lid);
2029 int (*process_mad)(struct ib_device *device,
2030 int process_mad_flags,
2031 u8 port_num,
a97e2d86
IW
2032 const struct ib_wc *in_wc,
2033 const struct ib_grh *in_grh,
4cd7c947
IW
2034 const struct ib_mad_hdr *in_mad,
2035 size_t in_mad_size,
2036 struct ib_mad_hdr *out_mad,
2037 size_t *out_mad_size,
2038 u16 *out_mad_pkey_index);
59991f94
SH
2039 struct ib_xrcd * (*alloc_xrcd)(struct ib_device *device,
2040 struct ib_ucontext *ucontext,
2041 struct ib_udata *udata);
2042 int (*dealloc_xrcd)(struct ib_xrcd *xrcd);
319a441d
HHZ
2043 struct ib_flow * (*create_flow)(struct ib_qp *qp,
2044 struct ib_flow_attr
2045 *flow_attr,
2046 int domain);
2047 int (*destroy_flow)(struct ib_flow *flow_id);
1b01d335
SG
2048 int (*check_mr_status)(struct ib_mr *mr, u32 check_mask,
2049 struct ib_mr_status *mr_status);
036b1063 2050 void (*disassociate_ucontext)(struct ib_ucontext *ibcontext);
765d6774
SW
2051 void (*drain_rq)(struct ib_qp *qp);
2052 void (*drain_sq)(struct ib_qp *qp);
50174a7f
EC
2053 int (*set_vf_link_state)(struct ib_device *device, int vf, u8 port,
2054 int state);
2055 int (*get_vf_config)(struct ib_device *device, int vf, u8 port,
2056 struct ifla_vf_info *ivf);
2057 int (*get_vf_stats)(struct ib_device *device, int vf, u8 port,
2058 struct ifla_vf_stats *stats);
2059 int (*set_vf_guid)(struct ib_device *device, int vf, u8 port, u64 guid,
2060 int type);
5fd251c8
YH
2061 struct ib_wq * (*create_wq)(struct ib_pd *pd,
2062 struct ib_wq_init_attr *init_attr,
2063 struct ib_udata *udata);
2064 int (*destroy_wq)(struct ib_wq *wq);
2065 int (*modify_wq)(struct ib_wq *wq,
2066 struct ib_wq_attr *attr,
2067 u32 wq_attr_mask,
2068 struct ib_udata *udata);
6d39786b
YH
2069 struct ib_rwq_ind_table * (*create_rwq_ind_table)(struct ib_device *device,
2070 struct ib_rwq_ind_table_init_attr *init_attr,
2071 struct ib_udata *udata);
2072 int (*destroy_rwq_ind_table)(struct ib_rwq_ind_table *wq_ind_table);
9b513090
RC
2073 struct ib_dma_mapping_ops *dma_ops;
2074
e2773c06 2075 struct module *owner;
f4e91eb4 2076 struct device dev;
35be0681 2077 struct kobject *ports_parent;
1da177e4
LT
2078 struct list_head port_list;
2079
2080 enum {
2081 IB_DEV_UNINITIALIZED,
2082 IB_DEV_REGISTERED,
2083 IB_DEV_UNREGISTERED
2084 } reg_state;
2085
274c0891 2086 int uverbs_abi_ver;
17a55f79 2087 u64 uverbs_cmd_mask;
f21519b2 2088 u64 uverbs_ex_cmd_mask;
274c0891 2089
bd99fdea 2090 char node_desc[IB_DEVICE_NODE_DESC_MAX];
cf311cd4 2091 __be64 node_guid;
96f15c03 2092 u32 local_dma_lkey;
4139032b 2093 u16 is_switch:1;
1da177e4
LT
2094 u8 node_type;
2095 u8 phys_port_cnt;
3e153a93 2096 struct ib_device_attr attrs;
b40f4757
CL
2097 struct attribute_group *hw_stats_ag;
2098 struct rdma_hw_stats *hw_stats;
7738613e
IW
2099
2100 /**
2101 * The following mandatory functions are used only at device
2102 * registration. Keep functions such as these at the end of this
2103 * structure to avoid cache line misses when accessing struct ib_device
2104 * in fast paths.
2105 */
2106 int (*get_port_immutable)(struct ib_device *, u8, struct ib_port_immutable *);
5fa76c20 2107 void (*get_dev_fw_str)(struct ib_device *, char *str, size_t str_len);
1da177e4
LT
2108};
2109
2110struct ib_client {
2111 char *name;
2112 void (*add) (struct ib_device *);
7c1eb45a 2113 void (*remove)(struct ib_device *, void *client_data);
1da177e4 2114
9268f72d
YK
2115 /* Returns the net_dev belonging to this ib_client and matching the
2116 * given parameters.
2117 * @dev: An RDMA device that the net_dev use for communication.
2118 * @port: A physical port number on the RDMA device.
2119 * @pkey: P_Key that the net_dev uses if applicable.
2120 * @gid: A GID that the net_dev uses to communicate.
2121 * @addr: An IP address the net_dev is configured with.
2122 * @client_data: The device's client data set by ib_set_client_data().
2123 *
2124 * An ib_client that implements a net_dev on top of RDMA devices
2125 * (such as IP over IB) should implement this callback, allowing the
2126 * rdma_cm module to find the right net_dev for a given request.
2127 *
2128 * The caller is responsible for calling dev_put on the returned
2129 * netdev. */
2130 struct net_device *(*get_net_dev_by_params)(
2131 struct ib_device *dev,
2132 u8 port,
2133 u16 pkey,
2134 const union ib_gid *gid,
2135 const struct sockaddr *addr,
2136 void *client_data);
1da177e4
LT
2137 struct list_head list;
2138};
2139
2140struct ib_device *ib_alloc_device(size_t size);
2141void ib_dealloc_device(struct ib_device *device);
2142
5fa76c20
IW
2143void ib_get_device_fw_str(struct ib_device *device, char *str, size_t str_len);
2144
9a6edb60
RC
2145int ib_register_device(struct ib_device *device,
2146 int (*port_callback)(struct ib_device *,
2147 u8, struct kobject *));
1da177e4
LT
2148void ib_unregister_device(struct ib_device *device);
2149
2150int ib_register_client (struct ib_client *client);
2151void ib_unregister_client(struct ib_client *client);
2152
2153void *ib_get_client_data(struct ib_device *device, struct ib_client *client);
2154void ib_set_client_data(struct ib_device *device, struct ib_client *client,
2155 void *data);
2156
e2773c06
RD
2157static inline int ib_copy_from_udata(void *dest, struct ib_udata *udata, size_t len)
2158{
2159 return copy_from_user(dest, udata->inbuf, len) ? -EFAULT : 0;
2160}
2161
2162static inline int ib_copy_to_udata(struct ib_udata *udata, void *src, size_t len)
2163{
43c61165 2164 return copy_to_user(udata->outbuf, src, len) ? -EFAULT : 0;
e2773c06
RD
2165}
2166
301a721e
MB
2167static inline bool ib_is_udata_cleared(struct ib_udata *udata,
2168 size_t offset,
2169 size_t len)
2170{
2171 const void __user *p = udata->inbuf + offset;
92d27ae6 2172 bool ret;
301a721e
MB
2173 u8 *buf;
2174
2175 if (len > USHRT_MAX)
2176 return false;
2177
92d27ae6
ME
2178 buf = memdup_user(p, len);
2179 if (IS_ERR(buf))
301a721e
MB
2180 return false;
2181
301a721e 2182 ret = !memchr_inv(buf, 0, len);
301a721e
MB
2183 kfree(buf);
2184 return ret;
2185}
2186
8a51866f
RD
2187/**
2188 * ib_modify_qp_is_ok - Check that the supplied attribute mask
2189 * contains all required attributes and no attributes not allowed for
2190 * the given QP state transition.
2191 * @cur_state: Current QP state
2192 * @next_state: Next QP state
2193 * @type: QP type
2194 * @mask: Mask of supplied QP attributes
dd5f03be 2195 * @ll : link layer of port
8a51866f
RD
2196 *
2197 * This function is a helper function that a low-level driver's
2198 * modify_qp method can use to validate the consumer's input. It
2199 * checks that cur_state and next_state are valid QP states, that a
2200 * transition from cur_state to next_state is allowed by the IB spec,
2201 * and that the attribute mask supplied is allowed for the transition.
2202 */
2203int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
dd5f03be
MB
2204 enum ib_qp_type type, enum ib_qp_attr_mask mask,
2205 enum rdma_link_layer ll);
8a51866f 2206
1da177e4
LT
2207int ib_register_event_handler (struct ib_event_handler *event_handler);
2208int ib_unregister_event_handler(struct ib_event_handler *event_handler);
2209void ib_dispatch_event(struct ib_event *event);
2210
1da177e4
LT
2211int ib_query_port(struct ib_device *device,
2212 u8 port_num, struct ib_port_attr *port_attr);
2213
a3f5adaf
EC
2214enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device,
2215 u8 port_num);
2216
4139032b
HR
2217/**
2218 * rdma_cap_ib_switch - Check if the device is IB switch
2219 * @device: Device to check
2220 *
2221 * Device driver is responsible for setting is_switch bit on
2222 * in ib_device structure at init time.
2223 *
2224 * Return: true if the device is IB switch.
2225 */
2226static inline bool rdma_cap_ib_switch(const struct ib_device *device)
2227{
2228 return device->is_switch;
2229}
2230
0cf18d77
IW
2231/**
2232 * rdma_start_port - Return the first valid port number for the device
2233 * specified
2234 *
2235 * @device: Device to be checked
2236 *
2237 * Return start port number
2238 */
2239static inline u8 rdma_start_port(const struct ib_device *device)
2240{
4139032b 2241 return rdma_cap_ib_switch(device) ? 0 : 1;
0cf18d77
IW
2242}
2243
2244/**
2245 * rdma_end_port - Return the last valid port number for the device
2246 * specified
2247 *
2248 * @device: Device to be checked
2249 *
2250 * Return last port number
2251 */
2252static inline u8 rdma_end_port(const struct ib_device *device)
2253{
4139032b 2254 return rdma_cap_ib_switch(device) ? 0 : device->phys_port_cnt;
0cf18d77
IW
2255}
2256
5ede9289 2257static inline bool rdma_protocol_ib(const struct ib_device *device, u8 port_num)
de66be94 2258{
f9b22e35 2259 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IB;
de66be94
MW
2260}
2261
5ede9289 2262static inline bool rdma_protocol_roce(const struct ib_device *device, u8 port_num)
7766a99f
MB
2263{
2264 return device->port_immutable[port_num].core_cap_flags &
2265 (RDMA_CORE_CAP_PROT_ROCE | RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP);
2266}
2267
2268static inline bool rdma_protocol_roce_udp_encap(const struct ib_device *device, u8 port_num)
2269{
2270 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_ROCE_UDP_ENCAP;
2271}
2272
2273static inline bool rdma_protocol_roce_eth_encap(const struct ib_device *device, u8 port_num)
de66be94 2274{
f9b22e35 2275 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_ROCE;
de66be94
MW
2276}
2277
5ede9289 2278static inline bool rdma_protocol_iwarp(const struct ib_device *device, u8 port_num)
de66be94 2279{
f9b22e35 2280 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_PROT_IWARP;
de66be94
MW
2281}
2282
5ede9289 2283static inline bool rdma_ib_or_roce(const struct ib_device *device, u8 port_num)
de66be94 2284{
7766a99f
MB
2285 return rdma_protocol_ib(device, port_num) ||
2286 rdma_protocol_roce(device, port_num);
de66be94
MW
2287}
2288
c757dea8 2289/**
296ec009 2290 * rdma_cap_ib_mad - Check if the port of a device supports Infiniband
c757dea8 2291 * Management Datagrams.
296ec009
MW
2292 * @device: Device to check
2293 * @port_num: Port number to check
c757dea8 2294 *
296ec009
MW
2295 * Management Datagrams (MAD) are a required part of the InfiniBand
2296 * specification and are supported on all InfiniBand devices. A slightly
2297 * extended version are also supported on OPA interfaces.
c757dea8 2298 *
296ec009 2299 * Return: true if the port supports sending/receiving of MAD packets.
c757dea8 2300 */
5ede9289 2301static inline bool rdma_cap_ib_mad(const struct ib_device *device, u8 port_num)
c757dea8 2302{
f9b22e35 2303 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_MAD;
c757dea8
MW
2304}
2305
65995fee
IW
2306/**
2307 * rdma_cap_opa_mad - Check if the port of device provides support for OPA
2308 * Management Datagrams.
2309 * @device: Device to check
2310 * @port_num: Port number to check
2311 *
2312 * Intel OmniPath devices extend and/or replace the InfiniBand Management
2313 * datagrams with their own versions. These OPA MADs share many but not all of
2314 * the characteristics of InfiniBand MADs.
2315 *
2316 * OPA MADs differ in the following ways:
2317 *
2318 * 1) MADs are variable size up to 2K
2319 * IBTA defined MADs remain fixed at 256 bytes
2320 * 2) OPA SMPs must carry valid PKeys
2321 * 3) OPA SMP packets are a different format
2322 *
2323 * Return: true if the port supports OPA MAD packet formats.
2324 */
2325static inline bool rdma_cap_opa_mad(struct ib_device *device, u8 port_num)
2326{
2327 return (device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_OPA_MAD)
2328 == RDMA_CORE_CAP_OPA_MAD;
2329}
2330
29541e3a 2331/**
296ec009
MW
2332 * rdma_cap_ib_smi - Check if the port of a device provides an Infiniband
2333 * Subnet Management Agent (SMA) on the Subnet Management Interface (SMI).
2334 * @device: Device to check
2335 * @port_num: Port number to check
29541e3a 2336 *
296ec009
MW
2337 * Each InfiniBand node is required to provide a Subnet Management Agent
2338 * that the subnet manager can access. Prior to the fabric being fully
2339 * configured by the subnet manager, the SMA is accessed via a well known
2340 * interface called the Subnet Management Interface (SMI). This interface
2341 * uses directed route packets to communicate with the SM to get around the
2342 * chicken and egg problem of the SM needing to know what's on the fabric
2343 * in order to configure the fabric, and needing to configure the fabric in
2344 * order to send packets to the devices on the fabric. These directed
2345 * route packets do not need the fabric fully configured in order to reach
2346 * their destination. The SMI is the only method allowed to send
2347 * directed route packets on an InfiniBand fabric.
29541e3a 2348 *
296ec009 2349 * Return: true if the port provides an SMI.
29541e3a 2350 */
5ede9289 2351static inline bool rdma_cap_ib_smi(const struct ib_device *device, u8 port_num)
29541e3a 2352{
f9b22e35 2353 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SMI;
29541e3a
MW
2354}
2355
72219cea
MW
2356/**
2357 * rdma_cap_ib_cm - Check if the port of device has the capability Infiniband
2358 * Communication Manager.
296ec009
MW
2359 * @device: Device to check
2360 * @port_num: Port number to check
72219cea 2361 *
296ec009
MW
2362 * The InfiniBand Communication Manager is one of many pre-defined General
2363 * Service Agents (GSA) that are accessed via the General Service
2364 * Interface (GSI). It's role is to facilitate establishment of connections
2365 * between nodes as well as other management related tasks for established
2366 * connections.
72219cea 2367 *
296ec009
MW
2368 * Return: true if the port supports an IB CM (this does not guarantee that
2369 * a CM is actually running however).
72219cea 2370 */
5ede9289 2371static inline bool rdma_cap_ib_cm(const struct ib_device *device, u8 port_num)
72219cea 2372{
f9b22e35 2373 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_CM;
72219cea
MW
2374}
2375
04215330
MW
2376/**
2377 * rdma_cap_iw_cm - Check if the port of device has the capability IWARP
2378 * Communication Manager.
296ec009
MW
2379 * @device: Device to check
2380 * @port_num: Port number to check
04215330 2381 *
296ec009
MW
2382 * Similar to above, but specific to iWARP connections which have a different
2383 * managment protocol than InfiniBand.
04215330 2384 *
296ec009
MW
2385 * Return: true if the port supports an iWARP CM (this does not guarantee that
2386 * a CM is actually running however).
04215330 2387 */
5ede9289 2388static inline bool rdma_cap_iw_cm(const struct ib_device *device, u8 port_num)
04215330 2389{
f9b22e35 2390 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IW_CM;
04215330
MW
2391}
2392
fe53ba2f
MW
2393/**
2394 * rdma_cap_ib_sa - Check if the port of device has the capability Infiniband
2395 * Subnet Administration.
296ec009
MW
2396 * @device: Device to check
2397 * @port_num: Port number to check
fe53ba2f 2398 *
296ec009
MW
2399 * An InfiniBand Subnet Administration (SA) service is a pre-defined General
2400 * Service Agent (GSA) provided by the Subnet Manager (SM). On InfiniBand
2401 * fabrics, devices should resolve routes to other hosts by contacting the
2402 * SA to query the proper route.
fe53ba2f 2403 *
296ec009
MW
2404 * Return: true if the port should act as a client to the fabric Subnet
2405 * Administration interface. This does not imply that the SA service is
2406 * running locally.
fe53ba2f 2407 */
5ede9289 2408static inline bool rdma_cap_ib_sa(const struct ib_device *device, u8 port_num)
fe53ba2f 2409{
f9b22e35 2410 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_IB_SA;
fe53ba2f
MW
2411}
2412
a31ad3b0
MW
2413/**
2414 * rdma_cap_ib_mcast - Check if the port of device has the capability Infiniband
2415 * Multicast.
296ec009
MW
2416 * @device: Device to check
2417 * @port_num: Port number to check
a31ad3b0 2418 *
296ec009
MW
2419 * InfiniBand multicast registration is more complex than normal IPv4 or
2420 * IPv6 multicast registration. Each Host Channel Adapter must register
2421 * with the Subnet Manager when it wishes to join a multicast group. It
2422 * should do so only once regardless of how many queue pairs it subscribes
2423 * to this group. And it should leave the group only after all queue pairs
2424 * attached to the group have been detached.
a31ad3b0 2425 *
296ec009
MW
2426 * Return: true if the port must undertake the additional adminstrative
2427 * overhead of registering/unregistering with the SM and tracking of the
2428 * total number of queue pairs attached to the multicast group.
a31ad3b0 2429 */
5ede9289 2430static inline bool rdma_cap_ib_mcast(const struct ib_device *device, u8 port_num)
a31ad3b0
MW
2431{
2432 return rdma_cap_ib_sa(device, port_num);
2433}
2434
30a74ef4
MW
2435/**
2436 * rdma_cap_af_ib - Check if the port of device has the capability
2437 * Native Infiniband Address.
296ec009
MW
2438 * @device: Device to check
2439 * @port_num: Port number to check
30a74ef4 2440 *
296ec009
MW
2441 * InfiniBand addressing uses a port's GUID + Subnet Prefix to make a default
2442 * GID. RoCE uses a different mechanism, but still generates a GID via
2443 * a prescribed mechanism and port specific data.
30a74ef4 2444 *
296ec009
MW
2445 * Return: true if the port uses a GID address to identify devices on the
2446 * network.
30a74ef4 2447 */
5ede9289 2448static inline bool rdma_cap_af_ib(const struct ib_device *device, u8 port_num)
30a74ef4 2449{
f9b22e35 2450 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_AF_IB;
30a74ef4
MW
2451}
2452
227128fc
MW
2453/**
2454 * rdma_cap_eth_ah - Check if the port of device has the capability
296ec009
MW
2455 * Ethernet Address Handle.
2456 * @device: Device to check
2457 * @port_num: Port number to check
227128fc 2458 *
296ec009
MW
2459 * RoCE is InfiniBand over Ethernet, and it uses a well defined technique
2460 * to fabricate GIDs over Ethernet/IP specific addresses native to the
2461 * port. Normally, packet headers are generated by the sending host
2462 * adapter, but when sending connectionless datagrams, we must manually
2463 * inject the proper headers for the fabric we are communicating over.
227128fc 2464 *
296ec009
MW
2465 * Return: true if we are running as a RoCE port and must force the
2466 * addition of a Global Route Header built from our Ethernet Address
2467 * Handle into our header list for connectionless packets.
227128fc 2468 */
5ede9289 2469static inline bool rdma_cap_eth_ah(const struct ib_device *device, u8 port_num)
227128fc 2470{
f9b22e35 2471 return device->port_immutable[port_num].core_cap_flags & RDMA_CORE_CAP_ETH_AH;
227128fc
MW
2472}
2473
337877a4
IW
2474/**
2475 * rdma_max_mad_size - Return the max MAD size required by this RDMA Port.
2476 *
2477 * @device: Device
2478 * @port_num: Port number
2479 *
2480 * This MAD size includes the MAD headers and MAD payload. No other headers
2481 * are included.
2482 *
2483 * Return the max MAD size required by the Port. Will return 0 if the port
2484 * does not support MADs
2485 */
2486static inline size_t rdma_max_mad_size(const struct ib_device *device, u8 port_num)
2487{
2488 return device->port_immutable[port_num].max_mad_size;
2489}
2490
03db3a2d
MB
2491/**
2492 * rdma_cap_roce_gid_table - Check if the port of device uses roce_gid_table
2493 * @device: Device to check
2494 * @port_num: Port number to check
2495 *
2496 * RoCE GID table mechanism manages the various GIDs for a device.
2497 *
2498 * NOTE: if allocating the port's GID table has failed, this call will still
2499 * return true, but any RoCE GID table API will fail.
2500 *
2501 * Return: true if the port uses RoCE GID table mechanism in order to manage
2502 * its GIDs.
2503 */
2504static inline bool rdma_cap_roce_gid_table(const struct ib_device *device,
2505 u8 port_num)
2506{
2507 return rdma_protocol_roce(device, port_num) &&
2508 device->add_gid && device->del_gid;
2509}
2510
002516ed
CH
2511/*
2512 * Check if the device supports READ W/ INVALIDATE.
2513 */
2514static inline bool rdma_cap_read_inv(struct ib_device *dev, u32 port_num)
2515{
2516 /*
2517 * iWarp drivers must support READ W/ INVALIDATE. No other protocol
2518 * has support for it yet.
2519 */
2520 return rdma_protocol_iwarp(dev, port_num);
2521}
2522
1da177e4 2523int ib_query_gid(struct ib_device *device,
55ee3ab2
MB
2524 u8 port_num, int index, union ib_gid *gid,
2525 struct ib_gid_attr *attr);
1da177e4 2526
50174a7f
EC
2527int ib_set_vf_link_state(struct ib_device *device, int vf, u8 port,
2528 int state);
2529int ib_get_vf_config(struct ib_device *device, int vf, u8 port,
2530 struct ifla_vf_info *info);
2531int ib_get_vf_stats(struct ib_device *device, int vf, u8 port,
2532 struct ifla_vf_stats *stats);
2533int ib_set_vf_guid(struct ib_device *device, int vf, u8 port, u64 guid,
2534 int type);
2535
1da177e4
LT
2536int ib_query_pkey(struct ib_device *device,
2537 u8 port_num, u16 index, u16 *pkey);
2538
2539int ib_modify_device(struct ib_device *device,
2540 int device_modify_mask,
2541 struct ib_device_modify *device_modify);
2542
2543int ib_modify_port(struct ib_device *device,
2544 u8 port_num, int port_modify_mask,
2545 struct ib_port_modify *port_modify);
2546
5eb620c8 2547int ib_find_gid(struct ib_device *device, union ib_gid *gid,
b39ffa1d
MB
2548 enum ib_gid_type gid_type, struct net_device *ndev,
2549 u8 *port_num, u16 *index);
5eb620c8
YE
2550
2551int ib_find_pkey(struct ib_device *device,
2552 u8 port_num, u16 pkey, u16 *index);
2553
ed082d36
CH
2554enum ib_pd_flags {
2555 /*
2556 * Create a memory registration for all memory in the system and place
2557 * the rkey for it into pd->unsafe_global_rkey. This can be used by
2558 * ULPs to avoid the overhead of dynamic MRs.
2559 *
2560 * This flag is generally considered unsafe and must only be used in
2561 * extremly trusted environments. Every use of it will log a warning
2562 * in the kernel log.
2563 */
2564 IB_PD_UNSAFE_GLOBAL_RKEY = 0x01,
2565};
1da177e4 2566
ed082d36
CH
2567struct ib_pd *__ib_alloc_pd(struct ib_device *device, unsigned int flags,
2568 const char *caller);
2569#define ib_alloc_pd(device, flags) \
2570 __ib_alloc_pd((device), (flags), __func__)
7dd78647 2571void ib_dealloc_pd(struct ib_pd *pd);
1da177e4
LT
2572
2573/**
2574 * ib_create_ah - Creates an address handle for the given address vector.
2575 * @pd: The protection domain associated with the address handle.
2576 * @ah_attr: The attributes of the address vector.
2577 *
2578 * The address handle is used to reference a local or global destination
2579 * in all UD QP post sends.
2580 */
2581struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr);
2582
4e00d694
SH
2583/**
2584 * ib_init_ah_from_wc - Initializes address handle attributes from a
2585 * work completion.
2586 * @device: Device on which the received message arrived.
2587 * @port_num: Port on which the received message arrived.
2588 * @wc: Work completion associated with the received message.
2589 * @grh: References the received global route header. This parameter is
2590 * ignored unless the work completion indicates that the GRH is valid.
2591 * @ah_attr: Returned attributes that can be used when creating an address
2592 * handle for replying to the message.
2593 */
73cdaaee
IW
2594int ib_init_ah_from_wc(struct ib_device *device, u8 port_num,
2595 const struct ib_wc *wc, const struct ib_grh *grh,
2596 struct ib_ah_attr *ah_attr);
4e00d694 2597
513789ed
HR
2598/**
2599 * ib_create_ah_from_wc - Creates an address handle associated with the
2600 * sender of the specified work completion.
2601 * @pd: The protection domain associated with the address handle.
2602 * @wc: Work completion information associated with a received message.
2603 * @grh: References the received global route header. This parameter is
2604 * ignored unless the work completion indicates that the GRH is valid.
2605 * @port_num: The outbound port number to associate with the address.
2606 *
2607 * The address handle is used to reference a local or global destination
2608 * in all UD QP post sends.
2609 */
73cdaaee
IW
2610struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc,
2611 const struct ib_grh *grh, u8 port_num);
513789ed 2612
1da177e4
LT
2613/**
2614 * ib_modify_ah - Modifies the address vector associated with an address
2615 * handle.
2616 * @ah: The address handle to modify.
2617 * @ah_attr: The new address vector attributes to associate with the
2618 * address handle.
2619 */
2620int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr);
2621
2622/**
2623 * ib_query_ah - Queries the address vector associated with an address
2624 * handle.
2625 * @ah: The address handle to query.
2626 * @ah_attr: The address vector attributes associated with the address
2627 * handle.
2628 */
2629int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr);
2630
2631/**
2632 * ib_destroy_ah - Destroys an address handle.
2633 * @ah: The address handle to destroy.
2634 */
2635int ib_destroy_ah(struct ib_ah *ah);
2636
d41fcc67
RD
2637/**
2638 * ib_create_srq - Creates a SRQ associated with the specified protection
2639 * domain.
2640 * @pd: The protection domain associated with the SRQ.
abb6e9ba
DB
2641 * @srq_init_attr: A list of initial attributes required to create the
2642 * SRQ. If SRQ creation succeeds, then the attributes are updated to
2643 * the actual capabilities of the created SRQ.
d41fcc67
RD
2644 *
2645 * srq_attr->max_wr and srq_attr->max_sge are read the determine the
2646 * requested size of the SRQ, and set to the actual values allocated
2647 * on return. If ib_create_srq() succeeds, then max_wr and max_sge
2648 * will always be at least as large as the requested values.
2649 */
2650struct ib_srq *ib_create_srq(struct ib_pd *pd,
2651 struct ib_srq_init_attr *srq_init_attr);
2652
2653/**
2654 * ib_modify_srq - Modifies the attributes for the specified SRQ.
2655 * @srq: The SRQ to modify.
2656 * @srq_attr: On input, specifies the SRQ attributes to modify. On output,
2657 * the current values of selected SRQ attributes are returned.
2658 * @srq_attr_mask: A bit-mask used to specify which attributes of the SRQ
2659 * are being modified.
2660 *
2661 * The mask may contain IB_SRQ_MAX_WR to resize the SRQ and/or
2662 * IB_SRQ_LIMIT to set the SRQ's limit and request notification when
2663 * the number of receives queued drops below the limit.
2664 */
2665int ib_modify_srq(struct ib_srq *srq,
2666 struct ib_srq_attr *srq_attr,
2667 enum ib_srq_attr_mask srq_attr_mask);
2668
2669/**
2670 * ib_query_srq - Returns the attribute list and current values for the
2671 * specified SRQ.
2672 * @srq: The SRQ to query.
2673 * @srq_attr: The attributes of the specified SRQ.
2674 */
2675int ib_query_srq(struct ib_srq *srq,
2676 struct ib_srq_attr *srq_attr);
2677
2678/**
2679 * ib_destroy_srq - Destroys the specified SRQ.
2680 * @srq: The SRQ to destroy.
2681 */
2682int ib_destroy_srq(struct ib_srq *srq);
2683
2684/**
2685 * ib_post_srq_recv - Posts a list of work requests to the specified SRQ.
2686 * @srq: The SRQ to post the work request on.
2687 * @recv_wr: A list of work requests to post on the receive queue.
2688 * @bad_recv_wr: On an immediate failure, this parameter will reference
2689 * the work request that failed to be posted on the QP.
2690 */
2691static inline int ib_post_srq_recv(struct ib_srq *srq,
2692 struct ib_recv_wr *recv_wr,
2693 struct ib_recv_wr **bad_recv_wr)
2694{
2695 return srq->device->post_srq_recv(srq, recv_wr, bad_recv_wr);
2696}
2697
1da177e4
LT
2698/**
2699 * ib_create_qp - Creates a QP associated with the specified protection
2700 * domain.
2701 * @pd: The protection domain associated with the QP.
abb6e9ba
DB
2702 * @qp_init_attr: A list of initial attributes required to create the
2703 * QP. If QP creation succeeds, then the attributes are updated to
2704 * the actual capabilities of the created QP.
1da177e4
LT
2705 */
2706struct ib_qp *ib_create_qp(struct ib_pd *pd,
2707 struct ib_qp_init_attr *qp_init_attr);
2708
2709/**
2710 * ib_modify_qp - Modifies the attributes for the specified QP and then
2711 * transitions the QP to the given state.
2712 * @qp: The QP to modify.
2713 * @qp_attr: On input, specifies the QP attributes to modify. On output,
2714 * the current values of selected QP attributes are returned.
2715 * @qp_attr_mask: A bit-mask used to specify which attributes of the QP
2716 * are being modified.
2717 */
2718int ib_modify_qp(struct ib_qp *qp,
2719 struct ib_qp_attr *qp_attr,
2720 int qp_attr_mask);
2721
2722/**
2723 * ib_query_qp - Returns the attribute list and current values for the
2724 * specified QP.
2725 * @qp: The QP to query.
2726 * @qp_attr: The attributes of the specified QP.
2727 * @qp_attr_mask: A bit-mask used to select specific attributes to query.
2728 * @qp_init_attr: Additional attributes of the selected QP.
2729 *
2730 * The qp_attr_mask may be used to limit the query to gathering only the
2731 * selected attributes.
2732 */
2733int ib_query_qp(struct ib_qp *qp,
2734 struct ib_qp_attr *qp_attr,
2735 int qp_attr_mask,
2736 struct ib_qp_init_attr *qp_init_attr);
2737
2738/**
2739 * ib_destroy_qp - Destroys the specified QP.
2740 * @qp: The QP to destroy.
2741 */
2742int ib_destroy_qp(struct ib_qp *qp);
2743
d3d72d90 2744/**
0e0ec7e0
SH
2745 * ib_open_qp - Obtain a reference to an existing sharable QP.
2746 * @xrcd - XRC domain
2747 * @qp_open_attr: Attributes identifying the QP to open.
2748 *
2749 * Returns a reference to a sharable QP.
2750 */
2751struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd,
2752 struct ib_qp_open_attr *qp_open_attr);
2753
2754/**
2755 * ib_close_qp - Release an external reference to a QP.
d3d72d90
SH
2756 * @qp: The QP handle to release
2757 *
0e0ec7e0
SH
2758 * The opened QP handle is released by the caller. The underlying
2759 * shared QP is not destroyed until all internal references are released.
d3d72d90 2760 */
0e0ec7e0 2761int ib_close_qp(struct ib_qp *qp);
d3d72d90 2762
1da177e4
LT
2763/**
2764 * ib_post_send - Posts a list of work requests to the send queue of
2765 * the specified QP.
2766 * @qp: The QP to post the work request on.
2767 * @send_wr: A list of work requests to post on the send queue.
2768 * @bad_send_wr: On an immediate failure, this parameter will reference
2769 * the work request that failed to be posted on the QP.
55464d46
BVA
2770 *
2771 * While IBA Vol. 1 section 11.4.1.1 specifies that if an immediate
2772 * error is returned, the QP state shall not be affected,
2773 * ib_post_send() will return an immediate error after queueing any
2774 * earlier work requests in the list.
1da177e4
LT
2775 */
2776static inline int ib_post_send(struct ib_qp *qp,
2777 struct ib_send_wr *send_wr,
2778 struct ib_send_wr **bad_send_wr)
2779{
2780 return qp->device->post_send(qp, send_wr, bad_send_wr);
2781}
2782
2783/**
2784 * ib_post_recv - Posts a list of work requests to the receive queue of
2785 * the specified QP.
2786 * @qp: The QP to post the work request on.
2787 * @recv_wr: A list of work requests to post on the receive queue.
2788 * @bad_recv_wr: On an immediate failure, this parameter will reference
2789 * the work request that failed to be posted on the QP.
2790 */
2791static inline int ib_post_recv(struct ib_qp *qp,
2792 struct ib_recv_wr *recv_wr,
2793 struct ib_recv_wr **bad_recv_wr)
2794{
2795 return qp->device->post_recv(qp, recv_wr, bad_recv_wr);
2796}
2797
14d3a3b2
CH
2798struct ib_cq *ib_alloc_cq(struct ib_device *dev, void *private,
2799 int nr_cqe, int comp_vector, enum ib_poll_context poll_ctx);
2800void ib_free_cq(struct ib_cq *cq);
2801int ib_process_cq_direct(struct ib_cq *cq, int budget);
2802
1da177e4
LT
2803/**
2804 * ib_create_cq - Creates a CQ on the specified device.
2805 * @device: The device on which to create the CQ.
2806 * @comp_handler: A user-specified callback that is invoked when a
2807 * completion event occurs on the CQ.
2808 * @event_handler: A user-specified callback that is invoked when an
2809 * asynchronous event not associated with a completion occurs on the CQ.
2810 * @cq_context: Context associated with the CQ returned to the user via
2811 * the associated completion and event handlers.
8e37210b 2812 * @cq_attr: The attributes the CQ should be created upon.
1da177e4
LT
2813 *
2814 * Users can examine the cq structure to determine the actual CQ size.
2815 */
2816struct ib_cq *ib_create_cq(struct ib_device *device,
2817 ib_comp_handler comp_handler,
2818 void (*event_handler)(struct ib_event *, void *),
8e37210b
MB
2819 void *cq_context,
2820 const struct ib_cq_init_attr *cq_attr);
1da177e4
LT
2821
2822/**
2823 * ib_resize_cq - Modifies the capacity of the CQ.
2824 * @cq: The CQ to resize.
2825 * @cqe: The minimum size of the CQ.
2826 *
2827 * Users can examine the cq structure to determine the actual CQ size.
2828 */
2829int ib_resize_cq(struct ib_cq *cq, int cqe);
2830
2dd57162
EC
2831/**
2832 * ib_modify_cq - Modifies moderation params of the CQ
2833 * @cq: The CQ to modify.
2834 * @cq_count: number of CQEs that will trigger an event
2835 * @cq_period: max period of time in usec before triggering an event
2836 *
2837 */
2838int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period);
2839
1da177e4
LT
2840/**
2841 * ib_destroy_cq - Destroys the specified CQ.
2842 * @cq: The CQ to destroy.
2843 */
2844int ib_destroy_cq(struct ib_cq *cq);
2845
2846/**
2847 * ib_poll_cq - poll a CQ for completion(s)
2848 * @cq:the CQ being polled
2849 * @num_entries:maximum number of completions to return
2850 * @wc:array of at least @num_entries &struct ib_wc where completions
2851 * will be returned
2852 *
2853 * Poll a CQ for (possibly multiple) completions. If the return value
2854 * is < 0, an error occurred. If the return value is >= 0, it is the
2855 * number of completions returned. If the return value is
2856 * non-negative and < num_entries, then the CQ was emptied.
2857 */
2858static inline int ib_poll_cq(struct ib_cq *cq, int num_entries,
2859 struct ib_wc *wc)
2860{
2861 return cq->device->poll_cq(cq, num_entries, wc);
2862}
2863
2864/**
2865 * ib_peek_cq - Returns the number of unreaped completions currently
2866 * on the specified CQ.
2867 * @cq: The CQ to peek.
2868 * @wc_cnt: A minimum number of unreaped completions to check for.
2869 *
2870 * If the number of unreaped completions is greater than or equal to wc_cnt,
2871 * this function returns wc_cnt, otherwise, it returns the actual number of
2872 * unreaped completions.
2873 */
2874int ib_peek_cq(struct ib_cq *cq, int wc_cnt);
2875
2876/**
2877 * ib_req_notify_cq - Request completion notification on a CQ.
2878 * @cq: The CQ to generate an event for.
ed23a727
RD
2879 * @flags:
2880 * Must contain exactly one of %IB_CQ_SOLICITED or %IB_CQ_NEXT_COMP
2881 * to request an event on the next solicited event or next work
2882 * completion at any type, respectively. %IB_CQ_REPORT_MISSED_EVENTS
2883 * may also be |ed in to request a hint about missed events, as
2884 * described below.
2885 *
2886 * Return Value:
2887 * < 0 means an error occurred while requesting notification
2888 * == 0 means notification was requested successfully, and if
2889 * IB_CQ_REPORT_MISSED_EVENTS was passed in, then no events
2890 * were missed and it is safe to wait for another event. In
2891 * this case is it guaranteed that any work completions added
2892 * to the CQ since the last CQ poll will trigger a completion
2893 * notification event.
2894 * > 0 is only returned if IB_CQ_REPORT_MISSED_EVENTS was passed
2895 * in. It means that the consumer must poll the CQ again to
2896 * make sure it is empty to avoid missing an event because of a
2897 * race between requesting notification and an entry being
2898 * added to the CQ. This return value means it is possible
2899 * (but not guaranteed) that a work completion has been added
2900 * to the CQ since the last poll without triggering a
2901 * completion notification event.
1da177e4
LT
2902 */
2903static inline int ib_req_notify_cq(struct ib_cq *cq,
ed23a727 2904 enum ib_cq_notify_flags flags)
1da177e4 2905{
ed23a727 2906 return cq->device->req_notify_cq(cq, flags);
1da177e4
LT
2907}
2908
2909/**
2910 * ib_req_ncomp_notif - Request completion notification when there are
2911 * at least the specified number of unreaped completions on the CQ.
2912 * @cq: The CQ to generate an event for.
2913 * @wc_cnt: The number of unreaped completions that should be on the
2914 * CQ before an event is generated.
2915 */
2916static inline int ib_req_ncomp_notif(struct ib_cq *cq, int wc_cnt)
2917{
2918 return cq->device->req_ncomp_notif ?
2919 cq->device->req_ncomp_notif(cq, wc_cnt) :
2920 -ENOSYS;
2921}
2922
9b513090
RC
2923/**
2924 * ib_dma_mapping_error - check a DMA addr for error
2925 * @dev: The device for which the dma_addr was created
2926 * @dma_addr: The DMA address to check
2927 */
2928static inline int ib_dma_mapping_error(struct ib_device *dev, u64 dma_addr)
2929{
d1998ef3
BC
2930 if (dev->dma_ops)
2931 return dev->dma_ops->mapping_error(dev, dma_addr);
8d8bb39b 2932 return dma_mapping_error(dev->dma_device, dma_addr);
9b513090
RC
2933}
2934
2935/**
2936 * ib_dma_map_single - Map a kernel virtual address to DMA address
2937 * @dev: The device for which the dma_addr is to be created
2938 * @cpu_addr: The kernel virtual address
2939 * @size: The size of the region in bytes
2940 * @direction: The direction of the DMA
2941 */
2942static inline u64 ib_dma_map_single(struct ib_device *dev,
2943 void *cpu_addr, size_t size,
2944 enum dma_data_direction direction)
2945{
d1998ef3
BC
2946 if (dev->dma_ops)
2947 return dev->dma_ops->map_single(dev, cpu_addr, size, direction);
2948 return dma_map_single(dev->dma_device, cpu_addr, size, direction);
9b513090
RC
2949}
2950
2951/**
2952 * ib_dma_unmap_single - Destroy a mapping created by ib_dma_map_single()
2953 * @dev: The device for which the DMA address was created
2954 * @addr: The DMA address
2955 * @size: The size of the region in bytes
2956 * @direction: The direction of the DMA
2957 */
2958static inline void ib_dma_unmap_single(struct ib_device *dev,
2959 u64 addr, size_t size,
2960 enum dma_data_direction direction)
2961{
d1998ef3
BC
2962 if (dev->dma_ops)
2963 dev->dma_ops->unmap_single(dev, addr, size, direction);
2964 else
9b513090
RC
2965 dma_unmap_single(dev->dma_device, addr, size, direction);
2966}
2967
cb9fbc5c
AK
2968static inline u64 ib_dma_map_single_attrs(struct ib_device *dev,
2969 void *cpu_addr, size_t size,
2970 enum dma_data_direction direction,
00085f1e 2971 unsigned long dma_attrs)
cb9fbc5c
AK
2972{
2973 return dma_map_single_attrs(dev->dma_device, cpu_addr, size,
00085f1e 2974 direction, dma_attrs);
cb9fbc5c
AK
2975}
2976
2977static inline void ib_dma_unmap_single_attrs(struct ib_device *dev,
2978 u64 addr, size_t size,
2979 enum dma_data_direction direction,
00085f1e 2980 unsigned long dma_attrs)
cb9fbc5c
AK
2981{
2982 return dma_unmap_single_attrs(dev->dma_device, addr, size,
00085f1e 2983 direction, dma_attrs);
cb9fbc5c
AK
2984}
2985
9b513090
RC
2986/**
2987 * ib_dma_map_page - Map a physical page to DMA address
2988 * @dev: The device for which the dma_addr is to be created
2989 * @page: The page to be mapped
2990 * @offset: The offset within the page
2991 * @size: The size of the region in bytes
2992 * @direction: The direction of the DMA
2993 */
2994static inline u64 ib_dma_map_page(struct ib_device *dev,
2995 struct page *page,
2996 unsigned long offset,
2997 size_t size,
2998 enum dma_data_direction direction)
2999{
d1998ef3
BC
3000 if (dev->dma_ops)
3001 return dev->dma_ops->map_page(dev, page, offset, size, direction);
3002 return dma_map_page(dev->dma_device, page, offset, size, direction);
9b513090
RC
3003}
3004
3005/**
3006 * ib_dma_unmap_page - Destroy a mapping created by ib_dma_map_page()
3007 * @dev: The device for which the DMA address was created
3008 * @addr: The DMA address
3009 * @size: The size of the region in bytes
3010 * @direction: The direction of the DMA
3011 */
3012static inline void ib_dma_unmap_page(struct ib_device *dev,
3013 u64 addr, size_t size,
3014 enum dma_data_direction direction)
3015{
d1998ef3
BC
3016 if (dev->dma_ops)
3017 dev->dma_ops->unmap_page(dev, addr, size, direction);
3018 else
9b513090
RC
3019 dma_unmap_page(dev->dma_device, addr, size, direction);
3020}
3021
3022/**
3023 * ib_dma_map_sg - Map a scatter/gather list to DMA addresses
3024 * @dev: The device for which the DMA addresses are to be created
3025 * @sg: The array of scatter/gather entries
3026 * @nents: The number of scatter/gather entries
3027 * @direction: The direction of the DMA
3028 */
3029static inline int ib_dma_map_sg(struct ib_device *dev,
3030 struct scatterlist *sg, int nents,
3031 enum dma_data_direction direction)
3032{
d1998ef3
BC
3033 if (dev->dma_ops)
3034 return dev->dma_ops->map_sg(dev, sg, nents, direction);
3035 return dma_map_sg(dev->dma_device, sg, nents, direction);
9b513090
RC
3036}
3037
3038/**
3039 * ib_dma_unmap_sg - Unmap a scatter/gather list of DMA addresses
3040 * @dev: The device for which the DMA addresses were created
3041 * @sg: The array of scatter/gather entries
3042 * @nents: The number of scatter/gather entries
3043 * @direction: The direction of the DMA
3044 */
3045static inline void ib_dma_unmap_sg(struct ib_device *dev,
3046 struct scatterlist *sg, int nents,
3047 enum dma_data_direction direction)
3048{
d1998ef3
BC
3049 if (dev->dma_ops)
3050 dev->dma_ops->unmap_sg(dev, sg, nents, direction);
3051 else
9b513090
RC
3052 dma_unmap_sg(dev->dma_device, sg, nents, direction);
3053}
3054
cb9fbc5c
AK
3055static inline int ib_dma_map_sg_attrs(struct ib_device *dev,
3056 struct scatterlist *sg, int nents,
3057 enum dma_data_direction direction,
00085f1e 3058 unsigned long dma_attrs)
cb9fbc5c 3059{
d9703650
PP
3060 if (dev->dma_ops)
3061 return dev->dma_ops->map_sg_attrs(dev, sg, nents, direction,
3062 dma_attrs);
3063 else
3064 return dma_map_sg_attrs(dev->dma_device, sg, nents, direction,
3065 dma_attrs);
cb9fbc5c
AK
3066}
3067
3068static inline void ib_dma_unmap_sg_attrs(struct ib_device *dev,
3069 struct scatterlist *sg, int nents,
3070 enum dma_data_direction direction,
00085f1e 3071 unsigned long dma_attrs)
cb9fbc5c 3072{
d9703650
PP
3073 if (dev->dma_ops)
3074 return dev->dma_ops->unmap_sg_attrs(dev, sg, nents, direction,
3075 dma_attrs);
3076 else
3077 dma_unmap_sg_attrs(dev->dma_device, sg, nents, direction,
3078 dma_attrs);
cb9fbc5c 3079}
9b513090
RC
3080/**
3081 * ib_sg_dma_address - Return the DMA address from a scatter/gather entry
3082 * @dev: The device for which the DMA addresses were created
3083 * @sg: The scatter/gather entry
ea58a595
MM
3084 *
3085 * Note: this function is obsolete. To do: change all occurrences of
3086 * ib_sg_dma_address() into sg_dma_address().
9b513090
RC
3087 */
3088static inline u64 ib_sg_dma_address(struct ib_device *dev,
3089 struct scatterlist *sg)
3090{
d1998ef3 3091 return sg_dma_address(sg);
9b513090
RC
3092}
3093
3094/**
3095 * ib_sg_dma_len - Return the DMA length from a scatter/gather entry
3096 * @dev: The device for which the DMA addresses were created
3097 * @sg: The scatter/gather entry
ea58a595
MM
3098 *
3099 * Note: this function is obsolete. To do: change all occurrences of
3100 * ib_sg_dma_len() into sg_dma_len().
9b513090
RC
3101 */
3102static inline unsigned int ib_sg_dma_len(struct ib_device *dev,
3103 struct scatterlist *sg)
3104{
d1998ef3 3105 return sg_dma_len(sg);
9b513090
RC
3106}
3107
3108/**
3109 * ib_dma_sync_single_for_cpu - Prepare DMA region to be accessed by CPU
3110 * @dev: The device for which the DMA address was created
3111 * @addr: The DMA address
3112 * @size: The size of the region in bytes
3113 * @dir: The direction of the DMA
3114 */
3115static inline void ib_dma_sync_single_for_cpu(struct ib_device *dev,
3116 u64 addr,
3117 size_t size,
3118 enum dma_data_direction dir)
3119{
d1998ef3
BC
3120 if (dev->dma_ops)
3121 dev->dma_ops->sync_single_for_cpu(dev, addr, size, dir);
3122 else
9b513090
RC
3123 dma_sync_single_for_cpu(dev->dma_device, addr, size, dir);
3124}
3125
3126/**
3127 * ib_dma_sync_single_for_device - Prepare DMA region to be accessed by device
3128 * @dev: The device for which the DMA address was created
3129 * @addr: The DMA address
3130 * @size: The size of the region in bytes
3131 * @dir: The direction of the DMA
3132 */
3133static inline void ib_dma_sync_single_for_device(struct ib_device *dev,
3134 u64 addr,
3135 size_t size,
3136 enum dma_data_direction dir)
3137{
d1998ef3
BC
3138 if (dev->dma_ops)
3139 dev->dma_ops->sync_single_for_device(dev, addr, size, dir);
3140 else
9b513090
RC
3141 dma_sync_single_for_device(dev->dma_device, addr, size, dir);
3142}
3143
3144/**
3145 * ib_dma_alloc_coherent - Allocate memory and map it for DMA
3146 * @dev: The device for which the DMA address is requested
3147 * @size: The size of the region to allocate in bytes
3148 * @dma_handle: A pointer for returning the DMA address of the region
3149 * @flag: memory allocator flags
3150 */
3151static inline void *ib_dma_alloc_coherent(struct ib_device *dev,
3152 size_t size,
3153 u64 *dma_handle,
3154 gfp_t flag)
3155{
d1998ef3
BC
3156 if (dev->dma_ops)
3157 return dev->dma_ops->alloc_coherent(dev, size, dma_handle, flag);
c59a3da1
RD
3158 else {
3159 dma_addr_t handle;
3160 void *ret;
3161
3162 ret = dma_alloc_coherent(dev->dma_device, size, &handle, flag);
3163 *dma_handle = handle;
3164 return ret;
3165 }
9b513090
RC
3166}
3167
3168/**
3169 * ib_dma_free_coherent - Free memory allocated by ib_dma_alloc_coherent()
3170 * @dev: The device for which the DMA addresses were allocated
3171 * @size: The size of the region
3172 * @cpu_addr: the address returned by ib_dma_alloc_coherent()
3173 * @dma_handle: the DMA address returned by ib_dma_alloc_coherent()
3174 */
3175static inline void ib_dma_free_coherent(struct ib_device *dev,
3176 size_t size, void *cpu_addr,
3177 u64 dma_handle)
3178{
d1998ef3
BC
3179 if (dev->dma_ops)
3180 dev->dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
3181 else
9b513090
RC
3182 dma_free_coherent(dev->dma_device, size, cpu_addr, dma_handle);
3183}
3184
1da177e4
LT
3185/**
3186 * ib_dereg_mr - Deregisters a memory region and removes it from the
3187 * HCA translation table.
3188 * @mr: The memory region to deregister.
7083e42e
SM
3189 *
3190 * This function can fail, if the memory region has memory windows bound to it.
1da177e4
LT
3191 */
3192int ib_dereg_mr(struct ib_mr *mr);
3193
9bee178b
SG
3194struct ib_mr *ib_alloc_mr(struct ib_pd *pd,
3195 enum ib_mr_type mr_type,
3196 u32 max_num_sg);
00f7ec36 3197
00f7ec36
SW
3198/**
3199 * ib_update_fast_reg_key - updates the key portion of the fast_reg MR
3200 * R_Key and L_Key.
3201 * @mr - struct ib_mr pointer to be updated.
3202 * @newkey - new key to be used.
3203 */
3204static inline void ib_update_fast_reg_key(struct ib_mr *mr, u8 newkey)
3205{
3206 mr->lkey = (mr->lkey & 0xffffff00) | newkey;
3207 mr->rkey = (mr->rkey & 0xffffff00) | newkey;
3208}
3209
7083e42e
SM
3210/**
3211 * ib_inc_rkey - increments the key portion of the given rkey. Can be used
3212 * for calculating a new rkey for type 2 memory windows.
3213 * @rkey - the rkey to increment.
3214 */
3215static inline u32 ib_inc_rkey(u32 rkey)
3216{
3217 const u32 mask = 0x000000ff;
3218 return ((rkey + 1) & mask) | (rkey & ~mask);
3219}
3220
1da177e4
LT
3221/**
3222 * ib_alloc_fmr - Allocates a unmapped fast memory region.
3223 * @pd: The protection domain associated with the unmapped region.
3224 * @mr_access_flags: Specifies the memory access rights.
3225 * @fmr_attr: Attributes of the unmapped region.
3226 *
3227 * A fast memory region must be mapped before it can be used as part of
3228 * a work request.
3229 */
3230struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd,
3231 int mr_access_flags,
3232 struct ib_fmr_attr *fmr_attr);
3233
3234/**
3235 * ib_map_phys_fmr - Maps a list of physical pages to a fast memory region.
3236 * @fmr: The fast memory region to associate with the pages.
3237 * @page_list: An array of physical pages to map to the fast memory region.
3238 * @list_len: The number of pages in page_list.
3239 * @iova: The I/O virtual address to use with the mapped region.
3240 */
3241static inline int ib_map_phys_fmr(struct ib_fmr *fmr,
3242 u64 *page_list, int list_len,
3243 u64 iova)
3244{
3245 return fmr->device->map_phys_fmr(fmr, page_list, list_len, iova);
3246}
3247
3248/**
3249 * ib_unmap_fmr - Removes the mapping from a list of fast memory regions.
3250 * @fmr_list: A linked list of fast memory regions to unmap.
3251 */
3252int ib_unmap_fmr(struct list_head *fmr_list);
3253
3254/**
3255 * ib_dealloc_fmr - Deallocates a fast memory region.
3256 * @fmr: The fast memory region to deallocate.
3257 */
3258int ib_dealloc_fmr(struct ib_fmr *fmr);
3259
3260/**
3261 * ib_attach_mcast - Attaches the specified QP to a multicast group.
3262 * @qp: QP to attach to the multicast group. The QP must be type
3263 * IB_QPT_UD.
3264 * @gid: Multicast group GID.
3265 * @lid: Multicast group LID in host byte order.
3266 *
3267 * In order to send and receive multicast packets, subnet
3268 * administration must have created the multicast group and configured
3269 * the fabric appropriately. The port associated with the specified
3270 * QP must also be a member of the multicast group.
3271 */
3272int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
3273
3274/**
3275 * ib_detach_mcast - Detaches the specified QP from a multicast group.
3276 * @qp: QP to detach from the multicast group.
3277 * @gid: Multicast group GID.
3278 * @lid: Multicast group LID in host byte order.
3279 */
3280int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid);
3281
59991f94
SH
3282/**
3283 * ib_alloc_xrcd - Allocates an XRC domain.
3284 * @device: The device on which to allocate the XRC domain.
3285 */
3286struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device);
3287
3288/**
3289 * ib_dealloc_xrcd - Deallocates an XRC domain.
3290 * @xrcd: The XRC domain to deallocate.
3291 */
3292int ib_dealloc_xrcd(struct ib_xrcd *xrcd);
3293
319a441d
HHZ
3294struct ib_flow *ib_create_flow(struct ib_qp *qp,
3295 struct ib_flow_attr *flow_attr, int domain);
3296int ib_destroy_flow(struct ib_flow *flow_id);
3297
1c636f80
EC
3298static inline int ib_check_mr_access(int flags)
3299{
3300 /*
3301 * Local write permission is required if remote write or
3302 * remote atomic permission is also requested.
3303 */
3304 if (flags & (IB_ACCESS_REMOTE_ATOMIC | IB_ACCESS_REMOTE_WRITE) &&
3305 !(flags & IB_ACCESS_LOCAL_WRITE))
3306 return -EINVAL;
3307
3308 return 0;
3309}
3310
1b01d335
SG
3311/**
3312 * ib_check_mr_status: lightweight check of MR status.
3313 * This routine may provide status checks on a selected
3314 * ib_mr. first use is for signature status check.
3315 *
3316 * @mr: A memory region.
3317 * @check_mask: Bitmask of which checks to perform from
3318 * ib_mr_status_check enumeration.
3319 * @mr_status: The container of relevant status checks.
3320 * failed checks will be indicated in the status bitmask
3321 * and the relevant info shall be in the error item.
3322 */
3323int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
3324 struct ib_mr_status *mr_status);
3325
9268f72d
YK
3326struct net_device *ib_get_net_dev_by_params(struct ib_device *dev, u8 port,
3327 u16 pkey, const union ib_gid *gid,
3328 const struct sockaddr *addr);
5fd251c8
YH
3329struct ib_wq *ib_create_wq(struct ib_pd *pd,
3330 struct ib_wq_init_attr *init_attr);
3331int ib_destroy_wq(struct ib_wq *wq);
3332int ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *attr,
3333 u32 wq_attr_mask);
6d39786b
YH
3334struct ib_rwq_ind_table *ib_create_rwq_ind_table(struct ib_device *device,
3335 struct ib_rwq_ind_table_init_attr*
3336 wq_ind_table_init_attr);
3337int ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *wq_ind_table);
9268f72d 3338
ff2ba993 3339int ib_map_mr_sg(struct ib_mr *mr, struct scatterlist *sg, int sg_nents,
9aa8b321 3340 unsigned int *sg_offset, unsigned int page_size);
4c67e2bf
SG
3341
3342static inline int
ff2ba993 3343ib_map_mr_sg_zbva(struct ib_mr *mr, struct scatterlist *sg, int sg_nents,
9aa8b321 3344 unsigned int *sg_offset, unsigned int page_size)
4c67e2bf
SG
3345{
3346 int n;
3347
ff2ba993 3348 n = ib_map_mr_sg(mr, sg, sg_nents, sg_offset, page_size);
4c67e2bf
SG
3349 mr->iova = 0;
3350
3351 return n;
3352}
3353
ff2ba993 3354int ib_sg_to_pages(struct ib_mr *mr, struct scatterlist *sgl, int sg_nents,
9aa8b321 3355 unsigned int *sg_offset, int (*set_page)(struct ib_mr *, u64));
4c67e2bf 3356
765d6774
SW
3357void ib_drain_rq(struct ib_qp *qp);
3358void ib_drain_sq(struct ib_qp *qp);
3359void ib_drain_qp(struct ib_qp *qp);
1da177e4 3360#endif /* IB_VERBS_H */