[mirror_ubuntu-artful-kernel.git] / include / sound / ad1848.h

#ifndef __SOUND_AD1848_H
#define __SOUND_AD1848_H

/*
 *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
 *  Definitions for AD1847/AD1848/CS4248 chips
 *
 *
 *   This program is free software; you can redistribute it and/or modify
 *   it under the terms of the GNU General Public License as published by
 *   the Free Software Foundation; either version 2 of the License, or
 *   (at your option) any later version.
 *
 *   This program is distributed in the hope that it will be useful,
 *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *   GNU General Public License for more details.
 *
 *   You should have received a copy of the GNU General Public License
 *   along with this program; if not, write to the Free Software
 *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 *
 */

#include "pcm.h"
#include <linux/interrupt.h>

#include "wss.h"	/* temporary till the driver is removed */

/* IO ports */

#define AD1848P( chip, x ) ( (chip) -> port + c_d_c_AD1848##x )

#define c_d_c_AD1848REGSEL	0
#define c_d_c_AD1848REG		1
#define c_d_c_AD1848STATUS	2
#define c_d_c_AD1848PIO		3

/* codec registers */

#define AD1848_LEFT_INPUT	0x00	/* left input control */
#define AD1848_RIGHT_INPUT	0x01	/* right input control */
#define AD1848_AUX1_LEFT_INPUT	0x02	/* left AUX1 input control */
#define AD1848_AUX1_RIGHT_INPUT	0x03	/* right AUX1 input control */
#define AD1848_AUX2_LEFT_INPUT	0x04	/* left AUX2 input control */
#define AD1848_AUX2_RIGHT_INPUT	0x05	/* right AUX2 input control */
#define AD1848_LEFT_OUTPUT	0x06	/* left output control register */
#define AD1848_RIGHT_OUTPUT	0x07	/* right output control register */
#define AD1848_DATA_FORMAT	0x08	/* clock and data format - playback/capture - bits 7-0 MCE */
#define AD1848_IFACE_CTRL	0x09	/* interface control - bits 7-2 MCE */
#define AD1848_PIN_CTRL		0x0a	/* pin control */
#define AD1848_TEST_INIT	0x0b	/* test and initialization */
#define AD1848_MISC_INFO	0x0c	/* miscellaneous information */
#define AD1848_LOOPBACK		0x0d	/* loopback control */
#define AD1848_DATA_UPR_CNT	0x0e	/* playback/capture upper base count */
#define AD1848_DATA_LWR_CNT	0x0f	/* playback/capture lower base count */

/* definitions for codec register select port - CODECP( REGSEL ) */

#define AD1848_INIT		0x80	/* CODEC is initializing */
#define AD1848_MCE		0x40	/* mode change enable */
#define AD1848_TRD		0x20	/* transfer request disable */

/* definitions for codec status register - CODECP( STATUS ) */

#define AD1848_GLOBALIRQ	0x01	/* IRQ is active */

/* definitions for AD1848_LEFT_INPUT and AD1848_RIGHT_INPUT registers */

#define AD1848_ENABLE_MIC_GAIN	0x20

#define AD1848_MIXS_LINE1	0x00
#define AD1848_MIXS_AUX1	0x40
#define AD1848_MIXS_LINE2	0x80
#define AD1848_MIXS_ALL		0xc0

/* definitions for clock and data format register - AD1848_PLAYBK_FORMAT */

#define AD1848_LINEAR_8		0x00	/* 8-bit unsigned data */
#define AD1848_ALAW_8		0x60	/* 8-bit A-law companded */
#define AD1848_ULAW_8		0x20	/* 8-bit U-law companded */
#define AD1848_LINEAR_16	0x40	/* 16-bit twos complement data - little endian */
#define AD1848_STEREO		0x10	/* stereo mode */
/* bits 3-1 define frequency divisor */
#define AD1848_XTAL1		0x00	/* 24.576 crystal */
#define AD1848_XTAL2		0x01	/* 16.9344 crystal */

/* definitions for interface control register - AD1848_IFACE_CTRL */

#define AD1848_CAPTURE_PIO	0x80	/* capture PIO enable */
#define AD1848_PLAYBACK_PIO	0x40	/* playback PIO enable */
#define AD1848_CALIB_MODE	0x18	/* calibration mode bits */
#define AD1848_AUTOCALIB	0x08	/* auto calibrate */
#define AD1848_SINGLE_DMA	0x04	/* use single DMA channel */
#define AD1848_CAPTURE_ENABLE	0x02	/* capture enable */
#define AD1848_PLAYBACK_ENABLE	0x01	/* playback enable */

/* definitions for pin control register - AD1848_PIN_CTRL */

#define AD1848_IRQ_ENABLE	0x02	/* enable IRQ */
#define AD1848_XCTL1		0x40	/* external control #1 */
#define AD1848_XCTL0		0x80	/* external control #0 */

/* definitions for test and init register - AD1848_TEST_INIT */

#define AD1848_CALIB_IN_PROGRESS 0x20	/* auto calibrate in progress */
#define AD1848_DMA_REQUEST	0x10	/* DMA request in progress */

/* defines for codec.mode */

#define AD1848_MODE_NONE	0x0000
#define AD1848_MODE_PLAY	0x0001
#define AD1848_MODE_CAPTURE	0x0002
#define AD1848_MODE_TIMER	0x0004
#define AD1848_MODE_OPEN	(AD1848_MODE_PLAY|AD1848_MODE_CAPTURE|AD1848_MODE_TIMER)
#define AD1848_MODE_RUNNING	0x0010

/* defines for codec.hardware */

#define AD1848_HW_DETECT	0x0000	/* let AD1848 driver detect chip */
#define AD1848_HW_AD1847	0x0001	/* AD1847 chip */
#define AD1848_HW_AD1848	0x0002	/* AD1848 chip */
#define AD1848_HW_CS4248	0x0003	/* CS4248 chip */
#define AD1848_HW_CMI8330	0x0004	/* CMI8330 chip */
#define AD1848_HW_THINKPAD	0x0005	/* Thinkpad 360/750/755 */

/* IBM Thinkpad specific stuff */
#define AD1848_THINKPAD_CTL_PORT1		0x15e8
#define AD1848_THINKPAD_CTL_PORT2		0x15e9
#define AD1848_THINKPAD_CS4248_ENABLE_BIT	0x02

/* exported functions */

void snd_ad1848_out(struct snd_wss *chip, unsigned char reg,
		    unsigned char value);

int snd_ad1848_create(struct snd_card *card,
		      unsigned long port,
		      int irq, int dma,
		      unsigned short hardware,
		      struct snd_wss **chip);

int snd_ad1848_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm);
const struct snd_pcm_ops *snd_ad1848_get_pcm_ops(int direction);
int snd_ad1848_mixer(struct snd_wss *chip);

/* exported mixer stuffs */
enum { AD1848_MIX_SINGLE, AD1848_MIX_DOUBLE, AD1848_MIX_CAPTURE };

#define AD1848_MIXVAL_SINGLE(reg, shift, mask, invert) \
	((reg) | ((shift) << 8) | ((mask) << 16) | ((invert) << 24))
#define AD1848_MIXVAL_DOUBLE(left_reg, right_reg, shift_left, shift_right, mask, invert) \
	((left_reg) | ((right_reg) << 8) | ((shift_left) << 16) | ((shift_right) << 19) | ((mask) << 24) | ((invert) << 22))

/* for ease of use */
struct ad1848_mix_elem {
	const char *name;
	int index;
	int type;
	unsigned long private_value;
	const unsigned int *tlv;
};

#define AD1848_SINGLE(xname, xindex, reg, shift, mask, invert) \
{ .name = xname, \
  .index = xindex, \
  .type = AD1848_MIX_SINGLE, \
  .private_value = AD1848_MIXVAL_SINGLE(reg, shift, mask, invert) }

#define AD1848_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
{ .name = xname, \
  .index = xindex, \
  .type = AD1848_MIX_SINGLE, \
  .private_value = AD1848_MIXVAL_SINGLE(reg, shift, mask, invert), \
  .tlv = xtlv }

#define AD1848_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
{ .name = xname, \
  .index = xindex, \
  .type = AD1848_MIX_DOUBLE, \
  .private_value = AD1848_MIXVAL_DOUBLE(left_reg, right_reg, shift_left, shift_right, mask, invert) }

#define AD1848_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
{ .name = xname, \
  .index = xindex, \
  .type = AD1848_MIX_DOUBLE, \
  .private_value = AD1848_MIXVAL_DOUBLE(left_reg, right_reg, shift_left, shift_right, mask, invert), \
  .tlv = xtlv }

int snd_ad1848_add_ctl_elem(struct snd_wss *chip,
			    const struct ad1848_mix_elem *c);

#endif /* __SOUND_AD1848_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef __SOUND_AD1848_H
	2	#define __SOUND_AD1848_H
	3
	4	/*
c1017a4c	5	* Copyright (c) by Jaroslav Kysela <perex@perex.cz>
1da177e4 LT	6	* Definitions for AD1847/AD1848/CS4248 chips
	7	*
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	22	*
	23	*/
	24
	25	#include "pcm.h"
	26	#include <linux/interrupt.h>
	27
241b3ee7 KH	28	#include "wss.h" /* temporary till the driver is removed */
241b3ee7 KH	29
1da177e4 LT	30	/* IO ports */
1da177e4 LT	31
3304cd36	32	#define AD1848P( chip, x ) ( (chip) -> port + c_d_c_AD1848##x )
1da177e4 LT	33
	34	#define c_d_c_AD1848REGSEL 0
	35	#define c_d_c_AD1848REG 1
	36	#define c_d_c_AD1848STATUS 2
	37	#define c_d_c_AD1848PIO 3
	38
	39	/* codec registers */
	40
	41	#define AD1848_LEFT_INPUT 0x00 /* left input control */
	42	#define AD1848_RIGHT_INPUT 0x01 /* right input control */
	43	#define AD1848_AUX1_LEFT_INPUT 0x02 /* left AUX1 input control */
	44	#define AD1848_AUX1_RIGHT_INPUT 0x03 /* right AUX1 input control */
	45	#define AD1848_AUX2_LEFT_INPUT 0x04 /* left AUX2 input control */
	46	#define AD1848_AUX2_RIGHT_INPUT 0x05 /* right AUX2 input control */
	47	#define AD1848_LEFT_OUTPUT 0x06 /* left output control register */
	48	#define AD1848_RIGHT_OUTPUT 0x07 /* right output control register */
	49	#define AD1848_DATA_FORMAT 0x08 /* clock and data format - playback/capture - bits 7-0 MCE */
	50	#define AD1848_IFACE_CTRL 0x09 /* interface control - bits 7-2 MCE */
	51	#define AD1848_PIN_CTRL 0x0a /* pin control */
	52	#define AD1848_TEST_INIT 0x0b /* test and initialization */
b7d2a803	53	#define AD1848_MISC_INFO 0x0c /* miscellaneous information */
1da177e4 LT	54	#define AD1848_LOOPBACK 0x0d /* loopback control */
	55	#define AD1848_DATA_UPR_CNT 0x0e /* playback/capture upper base count */
	56	#define AD1848_DATA_LWR_CNT 0x0f /* playback/capture lower base count */
	57
	58	/* definitions for codec register select port - CODECP( REGSEL ) */
	59
	60	#define AD1848_INIT 0x80 /* CODEC is initializing */
	61	#define AD1848_MCE 0x40 /* mode change enable */
	62	#define AD1848_TRD 0x20 /* transfer request disable */
	63
	64	/* definitions for codec status register - CODECP( STATUS ) */
	65
	66	#define AD1848_GLOBALIRQ 0x01 /* IRQ is active */
	67
	68	/* definitions for AD1848_LEFT_INPUT and AD1848_RIGHT_INPUT registers */
	69
	70	#define AD1848_ENABLE_MIC_GAIN 0x20
	71
	72	#define AD1848_MIXS_LINE1 0x00
	73	#define AD1848_MIXS_AUX1 0x40
	74	#define AD1848_MIXS_LINE2 0x80
	75	#define AD1848_MIXS_ALL 0xc0
	76
	77	/* definitions for clock and data format register - AD1848_PLAYBK_FORMAT */
	78
	79	#define AD1848_LINEAR_8 0x00 /* 8-bit unsigned data */
	80	#define AD1848_ALAW_8 0x60 /* 8-bit A-law companded */
	81	#define AD1848_ULAW_8 0x20 /* 8-bit U-law companded */
	82	#define AD1848_LINEAR_16 0x40 /* 16-bit twos complement data - little endian */
	83	#define AD1848_STEREO 0x10 /* stereo mode */
	84	/* bits 3-1 define frequency divisor */
	85	#define AD1848_XTAL1 0x00 /* 24.576 crystal */
	86	#define AD1848_XTAL2 0x01 /* 16.9344 crystal */
	87
	88	/* definitions for interface control register - AD1848_IFACE_CTRL */
	89
	90	#define AD1848_CAPTURE_PIO 0x80 /* capture PIO enable */
	91	#define AD1848_PLAYBACK_PIO 0x40 /* playback PIO enable */
	92	#define AD1848_CALIB_MODE 0x18 /* calibration mode bits */
	93	#define AD1848_AUTOCALIB 0x08 /* auto calibrate */
	94	#define AD1848_SINGLE_DMA 0x04 /* use single DMA channel */
	95	#define AD1848_CAPTURE_ENABLE 0x02 /* capture enable */
	96	#define AD1848_PLAYBACK_ENABLE 0x01 /* playback enable */
	97
	98	/* definitions for pin control register - AD1848_PIN_CTRL */
	99
	100	#define AD1848_IRQ_ENABLE 0x02 /* enable IRQ */
	101	#define AD1848_XCTL1 0x40 /* external control #1 */
	102	#define AD1848_XCTL0 0x80 /* external control #0 */
	103
	104	/* definitions for test and init register - AD1848_TEST_INIT */
	105
	106	#define AD1848_CALIB_IN_PROGRESS 0x20 /* auto calibrate in progress */
	107	#define AD1848_DMA_REQUEST 0x10 /* DMA request in progress */
	108
	109	/* defines for codec.mode */
	110
	111	#define AD1848_MODE_NONE 0x0000
	112	#define AD1848_MODE_PLAY 0x0001
	113	#define AD1848_MODE_CAPTURE 0x0002
	114	#define AD1848_MODE_TIMER 0x0004
	115	#define AD1848_MODE_OPEN (AD1848_MODE_PLAY\|AD1848_MODE_CAPTURE\|AD1848_MODE_TIMER)
	116	#define AD1848_MODE_RUNNING 0x0010
	117
118	/* defines for codec.hardware */
119
120	#define AD1848_HW_DETECT 0x0000 /* let AD1848 driver detect chip */
121	#define AD1848_HW_AD1847 0x0001 /* AD1847 chip */
122	#define AD1848_HW_AD1848 0x0002 /* AD1848 chip */
123	#define AD1848_HW_CS4248 0x0003 /* CS4248 chip */
124	#define AD1848_HW_CMI8330 0x0004 /* CMI8330 chip */
125	#define AD1848_HW_THINKPAD 0x0005 /* Thinkpad 360/750/755 */
126
127	/* IBM Thinkpad specific stuff */
128	#define AD1848_THINKPAD_CTL_PORT1 0x15e8
129	#define AD1848_THINKPAD_CTL_PORT2 0x15e9
130	#define AD1848_THINKPAD_CS4248_ENABLE_BIT 0x02
131
1da177e4 LT	132	/* exported functions */
1da177e4 LT	133
241b3ee7 KH	134	void snd_ad1848_out(struct snd_wss *chip, unsigned char reg,
241b3ee7 KH	135	unsigned char value);
1da177e4	136
c8ff6647	137	int snd_ad1848_create(struct snd_card *card,
1da177e4 LT	138	unsigned long port,
	139	int irq, int dma,
	140	unsigned short hardware,
241b3ee7	141	struct snd_wss **chip);
1da177e4	142
241b3ee7	143	int snd_ad1848_pcm(struct snd_wss chip, int device, struct snd_pcm *rpcm);
c8ff6647	144	const struct snd_pcm_ops *snd_ad1848_get_pcm_ops(int direction);
241b3ee7	145	int snd_ad1848_mixer(struct snd_wss *chip);
1da177e4 LT	146
	147	/* exported mixer stuffs */
	148	enum { AD1848_MIX_SINGLE, AD1848_MIX_DOUBLE, AD1848_MIX_CAPTURE };
	149
	150	#define AD1848_MIXVAL_SINGLE(reg, shift, mask, invert) \
	151	((reg) \| ((shift) << 8) \| ((mask) << 16) \| ((invert) << 24))
	152	#define AD1848_MIXVAL_DOUBLE(left_reg, right_reg, shift_left, shift_right, mask, invert) \
	153	((left_reg) \| ((right_reg) << 8) \| ((shift_left) << 16) \| ((shift_right) << 19) \| ((mask) << 24) \| ((invert) << 22))
	154
1da177e4 LT	155	/* for ease of use */
	156	struct ad1848_mix_elem {
	157	const char *name;
	158	int index;
	159	int type;
	160	unsigned long private_value;
0cb29ea0	161	const unsigned int *tlv;
1da177e4 LT	162	};
	163
	164	#define AD1848_SINGLE(xname, xindex, reg, shift, mask, invert) \
	165	{ .name = xname, \
	166	.index = xindex, \
	167	.type = AD1848_MIX_SINGLE, \
	168	.private_value = AD1848_MIXVAL_SINGLE(reg, shift, mask, invert) }
	169
eac06a10 TI	170	#define AD1848_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
	171	{ .name = xname, \
	172	.index = xindex, \
	173	.type = AD1848_MIX_SINGLE, \
	174	.private_value = AD1848_MIXVAL_SINGLE(reg, shift, mask, invert), \
	175	.tlv = xtlv }
	176
1da177e4 LT	177	#define AD1848_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
	178	{ .name = xname, \
	179	.index = xindex, \
	180	.type = AD1848_MIX_DOUBLE, \
	181	.private_value = AD1848_MIXVAL_DOUBLE(left_reg, right_reg, shift_left, shift_right, mask, invert) }
	182
eac06a10 TI	183	#define AD1848_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
	184	{ .name = xname, \
	185	.index = xindex, \
	186	.type = AD1848_MIX_DOUBLE, \
	187	.private_value = AD1848_MIXVAL_DOUBLE(left_reg, right_reg, shift_left, shift_right, mask, invert), \
	188	.tlv = xtlv }
	189
241b3ee7 KH	190	int snd_ad1848_add_ctl_elem(struct snd_wss *chip,
241b3ee7 KH	191	const struct ad1848_mix_elem *c);
1da177e4 LT	192
1da177e4 LT	193	#endif /* __SOUND_AD1848_H */