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1da177e4
LT
1/*
2 * Advanced Linux Sound Architecture - ALSA - Driver
3 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@suse.cz>,
4 * Abramo Bagnara <abramo@alsa-project.org>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#ifndef __SOUND_ASOUND_H
24#define __SOUND_ASOUND_H
25
1da177e4 26#ifdef __KERNEL__
6560c349 27#include <linux/ioctl.h>
1da177e4
LT
28#include <linux/types.h>
29#include <linux/time.h>
30#include <asm/byteorder.h>
31
32#ifdef __LITTLE_ENDIAN
33#define SNDRV_LITTLE_ENDIAN
34#else
35#ifdef __BIG_ENDIAN
36#define SNDRV_BIG_ENDIAN
37#else
38#error "Unsupported endian..."
39#endif
40#endif
41
6560c349 42#endif /* __KERNEL__ **/
1da177e4
LT
43
44/*
45 * protocol version
46 */
47
48#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
49#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
50#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
51#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
52#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
53 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
54 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
55 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
56
57/****************************************************************************
58 * *
59 * Digital audio interface *
60 * *
61 ****************************************************************************/
62
512bbd6a 63struct snd_aes_iec958 {
1da177e4
LT
64 unsigned char status[24]; /* AES/IEC958 channel status bits */
65 unsigned char subcode[147]; /* AES/IEC958 subcode bits */
66 unsigned char pad; /* nothing */
67 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */
68};
69
70/****************************************************************************
71 * *
72 * Section for driver hardware dependent interface - /dev/snd/hw? *
73 * *
74 ****************************************************************************/
75
76#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
77
512bbd6a 78enum {
1da177e4
LT
79 SNDRV_HWDEP_IFACE_OPL2 = 0,
80 SNDRV_HWDEP_IFACE_OPL3,
81 SNDRV_HWDEP_IFACE_OPL4,
82 SNDRV_HWDEP_IFACE_SB16CSP, /* Creative Signal Processor */
83 SNDRV_HWDEP_IFACE_EMU10K1, /* FX8010 processor in EMU10K1 chip */
84 SNDRV_HWDEP_IFACE_YSS225, /* Yamaha FX processor */
85 SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */
86 SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */
87 SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */
88 SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */
89 SNDRV_HWDEP_IFACE_USX2Y, /* Tascam US122, US224 & US428 usb */
90 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */
91 SNDRV_HWDEP_IFACE_BLUETOOTH, /* Bluetooth audio */
92 SNDRV_HWDEP_IFACE_USX2Y_PCM, /* Tascam US122, US224 & US428 rawusb pcm */
93 SNDRV_HWDEP_IFACE_PCXHR, /* Digigram PCXHR */
b259b10c 94 SNDRV_HWDEP_IFACE_SB_RC, /* SB Extigy/Audigy2NX remote control */
1da177e4
LT
95
96 /* Don't forget to change the following: */
b259b10c 97 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_SB_RC
1da177e4
LT
98};
99
512bbd6a 100struct snd_hwdep_info {
1da177e4
LT
101 unsigned int device; /* WR: device number */
102 int card; /* R: card number */
103 unsigned char id[64]; /* ID (user selectable) */
104 unsigned char name[80]; /* hwdep name */
512bbd6a 105 int iface; /* hwdep interface */
1da177e4
LT
106 unsigned char reserved[64]; /* reserved for future */
107};
108
109/* generic DSP loader */
512bbd6a 110struct snd_hwdep_dsp_status {
1da177e4
LT
111 unsigned int version; /* R: driver-specific version */
112 unsigned char id[32]; /* R: driver-specific ID string */
113 unsigned int num_dsps; /* R: number of DSP images to transfer */
114 unsigned int dsp_loaded; /* R: bit flags indicating the loaded DSPs */
115 unsigned int chip_ready; /* R: 1 = initialization finished */
116 unsigned char reserved[16]; /* reserved for future use */
117};
118
512bbd6a 119struct snd_hwdep_dsp_image {
1da177e4
LT
120 unsigned int index; /* W: DSP index */
121 unsigned char name[64]; /* W: ID (e.g. file name) */
122 unsigned char __user *image; /* W: binary image */
123 size_t length; /* W: size of image in bytes */
124 unsigned long driver_data; /* W: driver-specific data */
125};
126
127enum {
128 SNDRV_HWDEP_IOCTL_PVERSION = _IOR ('H', 0x00, int),
512bbd6a
TI
129 SNDRV_HWDEP_IOCTL_INFO = _IOR ('H', 0x01, struct snd_hwdep_info),
130 SNDRV_HWDEP_IOCTL_DSP_STATUS = _IOR('H', 0x02, struct snd_hwdep_dsp_status),
131 SNDRV_HWDEP_IOCTL_DSP_LOAD = _IOW('H', 0x03, struct snd_hwdep_dsp_image)
1da177e4
LT
132};
133
134/*****************************************************************************
135 * *
136 * Digital Audio (PCM) interface - /dev/snd/pcm?? *
137 * *
138 *****************************************************************************/
139
0df63e44 140#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 8)
1da177e4 141
512bbd6a
TI
142typedef unsigned long snd_pcm_uframes_t;
143typedef signed long snd_pcm_sframes_t;
1da177e4 144
512bbd6a 145enum {
1da177e4
LT
146 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
147 SNDRV_PCM_CLASS_MULTI, /* multichannel device */
148 SNDRV_PCM_CLASS_MODEM, /* software modem class */
149 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */
150 /* Don't forget to change the following: */
151 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
152};
153
512bbd6a 154enum {
1da177e4
LT
155 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
156 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */
157 /* Don't forget to change the following: */
158 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
159};
160
512bbd6a 161enum {
1da177e4
LT
162 SNDRV_PCM_STREAM_PLAYBACK = 0,
163 SNDRV_PCM_STREAM_CAPTURE,
164 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
165};
166
512bbd6a
TI
167typedef int __bitwise snd_pcm_access_t;
168#define SNDRV_PCM_ACCESS_MMAP_INTERLEAVED ((__force snd_pcm_access_t) 0) /* interleaved mmap */
169#define SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED ((__force snd_pcm_access_t) 1) /* noninterleaved mmap */
170#define SNDRV_PCM_ACCESS_MMAP_COMPLEX ((__force snd_pcm_access_t) 2) /* complex mmap */
171#define SNDRV_PCM_ACCESS_RW_INTERLEAVED ((__force snd_pcm_access_t) 3) /* readi/writei */
172#define SNDRV_PCM_ACCESS_RW_NONINTERLEAVED ((__force snd_pcm_access_t) 4) /* readn/writen */
173#define SNDRV_PCM_ACCESS_LAST SNDRV_PCM_ACCESS_RW_NONINTERLEAVED
174
175typedef int __bitwise snd_pcm_format_t;
176#define SNDRV_PCM_FORMAT_S8 ((__force snd_pcm_format_t) 0)
177#define SNDRV_PCM_FORMAT_U8 ((__force snd_pcm_format_t) 1)
178#define SNDRV_PCM_FORMAT_S16_LE ((__force snd_pcm_format_t) 2)
179#define SNDRV_PCM_FORMAT_S16_BE ((__force snd_pcm_format_t) 3)
180#define SNDRV_PCM_FORMAT_U16_LE ((__force snd_pcm_format_t) 4)
181#define SNDRV_PCM_FORMAT_U16_BE ((__force snd_pcm_format_t) 5)
182#define SNDRV_PCM_FORMAT_S24_LE ((__force snd_pcm_format_t) 6) /* low three bytes */
183#define SNDRV_PCM_FORMAT_S24_BE ((__force snd_pcm_format_t) 7) /* low three bytes */
184#define SNDRV_PCM_FORMAT_U24_LE ((__force snd_pcm_format_t) 8) /* low three bytes */
185#define SNDRV_PCM_FORMAT_U24_BE ((__force snd_pcm_format_t) 9) /* low three bytes */
186#define SNDRV_PCM_FORMAT_S32_LE ((__force snd_pcm_format_t) 10)
187#define SNDRV_PCM_FORMAT_S32_BE ((__force snd_pcm_format_t) 11)
188#define SNDRV_PCM_FORMAT_U32_LE ((__force snd_pcm_format_t) 12)
189#define SNDRV_PCM_FORMAT_U32_BE ((__force snd_pcm_format_t) 13)
190#define SNDRV_PCM_FORMAT_FLOAT_LE ((__force snd_pcm_format_t) 14) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
191#define SNDRV_PCM_FORMAT_FLOAT_BE ((__force snd_pcm_format_t) 15) /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
192#define SNDRV_PCM_FORMAT_FLOAT64_LE ((__force snd_pcm_format_t) 16) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
193#define SNDRV_PCM_FORMAT_FLOAT64_BE ((__force snd_pcm_format_t) 17) /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
194#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE ((__force snd_pcm_format_t) 18) /* IEC-958 subframe, Little Endian */
195#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE ((__force snd_pcm_format_t) 19) /* IEC-958 subframe, Big Endian */
196#define SNDRV_PCM_FORMAT_MU_LAW ((__force snd_pcm_format_t) 20)
197#define SNDRV_PCM_FORMAT_A_LAW ((__force snd_pcm_format_t) 21)
198#define SNDRV_PCM_FORMAT_IMA_ADPCM ((__force snd_pcm_format_t) 22)
199#define SNDRV_PCM_FORMAT_MPEG ((__force snd_pcm_format_t) 23)
200#define SNDRV_PCM_FORMAT_GSM ((__force snd_pcm_format_t) 24)
201#define SNDRV_PCM_FORMAT_SPECIAL ((__force snd_pcm_format_t) 31)
202#define SNDRV_PCM_FORMAT_S24_3LE ((__force snd_pcm_format_t) 32) /* in three bytes */
203#define SNDRV_PCM_FORMAT_S24_3BE ((__force snd_pcm_format_t) 33) /* in three bytes */
204#define SNDRV_PCM_FORMAT_U24_3LE ((__force snd_pcm_format_t) 34) /* in three bytes */
205#define SNDRV_PCM_FORMAT_U24_3BE ((__force snd_pcm_format_t) 35) /* in three bytes */
206#define SNDRV_PCM_FORMAT_S20_3LE ((__force snd_pcm_format_t) 36) /* in three bytes */
207#define SNDRV_PCM_FORMAT_S20_3BE ((__force snd_pcm_format_t) 37) /* in three bytes */
208#define SNDRV_PCM_FORMAT_U20_3LE ((__force snd_pcm_format_t) 38) /* in three bytes */
209#define SNDRV_PCM_FORMAT_U20_3BE ((__force snd_pcm_format_t) 39) /* in three bytes */
210#define SNDRV_PCM_FORMAT_S18_3LE ((__force snd_pcm_format_t) 40) /* in three bytes */
211#define SNDRV_PCM_FORMAT_S18_3BE ((__force snd_pcm_format_t) 41) /* in three bytes */
212#define SNDRV_PCM_FORMAT_U18_3LE ((__force snd_pcm_format_t) 42) /* in three bytes */
213#define SNDRV_PCM_FORMAT_U18_3BE ((__force snd_pcm_format_t) 43) /* in three bytes */
214#define SNDRV_PCM_FORMAT_LAST SNDRV_PCM_FORMAT_U18_3BE
1da177e4
LT
215
216#ifdef SNDRV_LITTLE_ENDIAN
512bbd6a
TI
217#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_LE
218#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_LE
219#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_LE
220#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_LE
221#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_LE
222#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_LE
223#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_LE
224#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_LE
225#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE
1da177e4
LT
226#endif
227#ifdef SNDRV_BIG_ENDIAN
512bbd6a
TI
228#define SNDRV_PCM_FORMAT_S16 SNDRV_PCM_FORMAT_S16_BE
229#define SNDRV_PCM_FORMAT_U16 SNDRV_PCM_FORMAT_U16_BE
230#define SNDRV_PCM_FORMAT_S24 SNDRV_PCM_FORMAT_S24_BE
231#define SNDRV_PCM_FORMAT_U24 SNDRV_PCM_FORMAT_U24_BE
232#define SNDRV_PCM_FORMAT_S32 SNDRV_PCM_FORMAT_S32_BE
233#define SNDRV_PCM_FORMAT_U32 SNDRV_PCM_FORMAT_U32_BE
234#define SNDRV_PCM_FORMAT_FLOAT SNDRV_PCM_FORMAT_FLOAT_BE
235#define SNDRV_PCM_FORMAT_FLOAT64 SNDRV_PCM_FORMAT_FLOAT64_BE
236#define SNDRV_PCM_FORMAT_IEC958_SUBFRAME SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE
1da177e4 237#endif
1da177e4 238
512bbd6a
TI
239typedef int __bitwise snd_pcm_subformat_t;
240#define SNDRV_PCM_SUBFORMAT_STD ((__force snd_pcm_subformat_t) 0)
241#define SNDRV_PCM_SUBFORMAT_LAST SNDRV_PCM_SUBFORMAT_STD
1da177e4
LT
242
243#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
244#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
245#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
246#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
247#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
248#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
249#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
250#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
251#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */
252#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
253#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
254#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
255#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */
256#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
257
512bbd6a
TI
258typedef int __bitwise snd_pcm_state_t;
259#define SNDRV_PCM_STATE_OPEN ((__force snd_pcm_state_t) 0) /* stream is open */
260#define SNDRV_PCM_STATE_SETUP ((__force snd_pcm_state_t) 1) /* stream has a setup */
261#define SNDRV_PCM_STATE_PREPARED ((__force snd_pcm_state_t) 2) /* stream is ready to start */
262#define SNDRV_PCM_STATE_RUNNING ((__force snd_pcm_state_t) 3) /* stream is running */
263#define SNDRV_PCM_STATE_XRUN ((__force snd_pcm_state_t) 4) /* stream reached an xrun */
264#define SNDRV_PCM_STATE_DRAINING ((__force snd_pcm_state_t) 5) /* stream is draining */
265#define SNDRV_PCM_STATE_PAUSED ((__force snd_pcm_state_t) 6) /* stream is paused */
266#define SNDRV_PCM_STATE_SUSPENDED ((__force snd_pcm_state_t) 7) /* hardware is suspended */
267#define SNDRV_PCM_STATE_DISCONNECTED ((__force snd_pcm_state_t) 8) /* hardware is disconnected */
268#define SNDRV_PCM_STATE_LAST SNDRV_PCM_STATE_DISCONNECTED
1da177e4
LT
269
270enum {
271 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
272 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
273 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
274};
275
512bbd6a 276union snd_pcm_sync_id {
1da177e4
LT
277 unsigned char id[16];
278 unsigned short id16[8];
279 unsigned int id32[4];
280};
281
512bbd6a 282struct snd_pcm_info {
1da177e4
LT
283 unsigned int device; /* RO/WR (control): device number */
284 unsigned int subdevice; /* RO/WR (control): subdevice number */
512bbd6a 285 int stream; /* RO/WR (control): stream direction */
1da177e4
LT
286 int card; /* R: card number */
287 unsigned char id[64]; /* ID (user selectable) */
288 unsigned char name[80]; /* name of this device */
289 unsigned char subname[32]; /* subdevice name */
512bbd6a
TI
290 int dev_class; /* SNDRV_PCM_CLASS_* */
291 int dev_subclass; /* SNDRV_PCM_SUBCLASS_* */
1da177e4
LT
292 unsigned int subdevices_count;
293 unsigned int subdevices_avail;
512bbd6a 294 union snd_pcm_sync_id sync; /* hardware synchronization ID */
1da177e4
LT
295 unsigned char reserved[64]; /* reserved for future... */
296};
297
512bbd6a
TI
298typedef int __bitwise snd_pcm_hw_param_t;
299#define SNDRV_PCM_HW_PARAM_ACCESS ((__force snd_pcm_hw_param_t) 0) /* Access type */
300#define SNDRV_PCM_HW_PARAM_FORMAT ((__force snd_pcm_hw_param_t) 1) /* Format */
301#define SNDRV_PCM_HW_PARAM_SUBFORMAT ((__force snd_pcm_hw_param_t) 2) /* Subformat */
302#define SNDRV_PCM_HW_PARAM_FIRST_MASK SNDRV_PCM_HW_PARAM_ACCESS
303#define SNDRV_PCM_HW_PARAM_LAST_MASK SNDRV_PCM_HW_PARAM_SUBFORMAT
304
305#define SNDRV_PCM_HW_PARAM_SAMPLE_BITS ((__force snd_pcm_hw_param_t) 8) /* Bits per sample */
306#define SNDRV_PCM_HW_PARAM_FRAME_BITS ((__force snd_pcm_hw_param_t) 9) /* Bits per frame */
307#define SNDRV_PCM_HW_PARAM_CHANNELS ((__force snd_pcm_hw_param_t) 10) /* Channels */
308#define SNDRV_PCM_HW_PARAM_RATE ((__force snd_pcm_hw_param_t) 11) /* Approx rate */
309#define SNDRV_PCM_HW_PARAM_PERIOD_TIME ((__force snd_pcm_hw_param_t) 12) /* Approx distance between interrupts in us */
310#define SNDRV_PCM_HW_PARAM_PERIOD_SIZE ((__force snd_pcm_hw_param_t) 13) /* Approx frames between interrupts */
311#define SNDRV_PCM_HW_PARAM_PERIOD_BYTES ((__force snd_pcm_hw_param_t) 14) /* Approx bytes between interrupts */
312#define SNDRV_PCM_HW_PARAM_PERIODS ((__force snd_pcm_hw_param_t) 15) /* Approx interrupts per buffer */
313#define SNDRV_PCM_HW_PARAM_BUFFER_TIME ((__force snd_pcm_hw_param_t) 16) /* Approx duration of buffer in us */
314#define SNDRV_PCM_HW_PARAM_BUFFER_SIZE ((__force snd_pcm_hw_param_t) 17) /* Size of buffer in frames */
315#define SNDRV_PCM_HW_PARAM_BUFFER_BYTES ((__force snd_pcm_hw_param_t) 18) /* Size of buffer in bytes */
316#define SNDRV_PCM_HW_PARAM_TICK_TIME ((__force snd_pcm_hw_param_t) 19) /* Approx tick duration in us */
317#define SNDRV_PCM_HW_PARAM_FIRST_INTERVAL SNDRV_PCM_HW_PARAM_SAMPLE_BITS
318#define SNDRV_PCM_HW_PARAM_LAST_INTERVAL SNDRV_PCM_HW_PARAM_TICK_TIME
1da177e4 319
267cdf40 320#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0) /* avoid rate resampling */
1da177e4 321
512bbd6a 322struct snd_interval {
1da177e4
LT
323 unsigned int min, max;
324 unsigned int openmin:1,
325 openmax:1,
326 integer:1,
327 empty:1;
328};
329
330#define SNDRV_MASK_MAX 256
331
512bbd6a 332struct snd_mask {
1da177e4
LT
333 u_int32_t bits[(SNDRV_MASK_MAX+31)/32];
334};
335
512bbd6a 336struct snd_pcm_hw_params {
1da177e4 337 unsigned int flags;
512bbd6a 338 struct snd_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
1da177e4 339 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
512bbd6a
TI
340 struct snd_mask mres[5]; /* reserved masks */
341 struct snd_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
1da177e4 342 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
512bbd6a 343 struct snd_interval ires[9]; /* reserved intervals */
1da177e4
LT
344 unsigned int rmask; /* W: requested masks */
345 unsigned int cmask; /* R: changed masks */
346 unsigned int info; /* R: Info flags for returned setup */
347 unsigned int msbits; /* R: used most significant bits */
348 unsigned int rate_num; /* R: rate numerator */
349 unsigned int rate_den; /* R: rate denominator */
512bbd6a 350 snd_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */
1da177e4
LT
351 unsigned char reserved[64]; /* reserved for future */
352};
353
512bbd6a 354enum {
1da177e4
LT
355 SNDRV_PCM_TSTAMP_NONE = 0,
356 SNDRV_PCM_TSTAMP_MMAP,
357 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_MMAP,
358};
359
512bbd6a
TI
360struct snd_pcm_sw_params {
361 int tstamp_mode; /* timestamp mode */
1da177e4
LT
362 unsigned int period_step;
363 unsigned int sleep_min; /* min ticks to sleep */
512bbd6a
TI
364 snd_pcm_uframes_t avail_min; /* min avail frames for wakeup */
365 snd_pcm_uframes_t xfer_align; /* xfer size need to be a multiple */
366 snd_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */
367 snd_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */
368 snd_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */
369 snd_pcm_uframes_t silence_size; /* silence block size */
370 snd_pcm_uframes_t boundary; /* pointers wrap point */
1da177e4
LT
371 unsigned char reserved[64]; /* reserved for future */
372};
373
512bbd6a 374struct snd_pcm_channel_info {
1da177e4
LT
375 unsigned int channel;
376 off_t offset; /* mmap offset */
377 unsigned int first; /* offset to first sample in bits */
378 unsigned int step; /* samples distance in bits */
379};
380
512bbd6a
TI
381struct snd_pcm_status {
382 snd_pcm_state_t state; /* stream state */
1da177e4
LT
383 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */
384 struct timespec tstamp; /* reference timestamp */
512bbd6a
TI
385 snd_pcm_uframes_t appl_ptr; /* appl ptr */
386 snd_pcm_uframes_t hw_ptr; /* hw ptr */
387 snd_pcm_sframes_t delay; /* current delay in frames */
388 snd_pcm_uframes_t avail; /* number of frames available */
389 snd_pcm_uframes_t avail_max; /* max frames available on hw since last status */
390 snd_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */
391 snd_pcm_state_t suspended_state; /* suspended stream state */
1da177e4
LT
392 unsigned char reserved[60]; /* must be filled with zero */
393};
394
512bbd6a
TI
395struct snd_pcm_mmap_status {
396 snd_pcm_state_t state; /* RO: state - SNDRV_PCM_STATE_XXXX */
1da177e4 397 int pad1; /* Needed for 64 bit alignment */
512bbd6a 398 snd_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
1da177e4 399 struct timespec tstamp; /* Timestamp */
512bbd6a 400 snd_pcm_state_t suspended_state; /* RO: suspended stream state */
1da177e4
LT
401};
402
512bbd6a
TI
403struct snd_pcm_mmap_control {
404 snd_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
405 snd_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */
1da177e4
LT
406};
407
408#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */
409#define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */
410#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */
411
512bbd6a 412struct snd_pcm_sync_ptr {
1da177e4
LT
413 unsigned int flags;
414 union {
512bbd6a 415 struct snd_pcm_mmap_status status;
1da177e4
LT
416 unsigned char reserved[64];
417 } s;
418 union {
512bbd6a 419 struct snd_pcm_mmap_control control;
1da177e4
LT
420 unsigned char reserved[64];
421 } c;
422};
423
512bbd6a
TI
424struct snd_xferi {
425 snd_pcm_sframes_t result;
1da177e4 426 void __user *buf;
512bbd6a 427 snd_pcm_uframes_t frames;
1da177e4
LT
428};
429
512bbd6a
TI
430struct snd_xfern {
431 snd_pcm_sframes_t result;
1da177e4 432 void __user * __user *bufs;
512bbd6a 433 snd_pcm_uframes_t frames;
1da177e4
LT
434};
435
436enum {
437 SNDRV_PCM_IOCTL_PVERSION = _IOR('A', 0x00, int),
512bbd6a 438 SNDRV_PCM_IOCTL_INFO = _IOR('A', 0x01, struct snd_pcm_info),
1da177e4 439 SNDRV_PCM_IOCTL_TSTAMP = _IOW('A', 0x02, int),
512bbd6a
TI
440 SNDRV_PCM_IOCTL_HW_REFINE = _IOWR('A', 0x10, struct snd_pcm_hw_params),
441 SNDRV_PCM_IOCTL_HW_PARAMS = _IOWR('A', 0x11, struct snd_pcm_hw_params),
1da177e4 442 SNDRV_PCM_IOCTL_HW_FREE = _IO('A', 0x12),
512bbd6a
TI
443 SNDRV_PCM_IOCTL_SW_PARAMS = _IOWR('A', 0x13, struct snd_pcm_sw_params),
444 SNDRV_PCM_IOCTL_STATUS = _IOR('A', 0x20, struct snd_pcm_status),
445 SNDRV_PCM_IOCTL_DELAY = _IOR('A', 0x21, snd_pcm_sframes_t),
1da177e4 446 SNDRV_PCM_IOCTL_HWSYNC = _IO('A', 0x22),
512bbd6a
TI
447 SNDRV_PCM_IOCTL_SYNC_PTR = _IOWR('A', 0x23, struct snd_pcm_sync_ptr),
448 SNDRV_PCM_IOCTL_CHANNEL_INFO = _IOR('A', 0x32, struct snd_pcm_channel_info),
1da177e4
LT
449 SNDRV_PCM_IOCTL_PREPARE = _IO('A', 0x40),
450 SNDRV_PCM_IOCTL_RESET = _IO('A', 0x41),
451 SNDRV_PCM_IOCTL_START = _IO('A', 0x42),
452 SNDRV_PCM_IOCTL_DROP = _IO('A', 0x43),
453 SNDRV_PCM_IOCTL_DRAIN = _IO('A', 0x44),
454 SNDRV_PCM_IOCTL_PAUSE = _IOW('A', 0x45, int),
512bbd6a 455 SNDRV_PCM_IOCTL_REWIND = _IOW('A', 0x46, snd_pcm_uframes_t),
1da177e4
LT
456 SNDRV_PCM_IOCTL_RESUME = _IO('A', 0x47),
457 SNDRV_PCM_IOCTL_XRUN = _IO('A', 0x48),
512bbd6a
TI
458 SNDRV_PCM_IOCTL_FORWARD = _IOW('A', 0x49, snd_pcm_uframes_t),
459 SNDRV_PCM_IOCTL_WRITEI_FRAMES = _IOW('A', 0x50, struct snd_xferi),
460 SNDRV_PCM_IOCTL_READI_FRAMES = _IOR('A', 0x51, struct snd_xferi),
461 SNDRV_PCM_IOCTL_WRITEN_FRAMES = _IOW('A', 0x52, struct snd_xfern),
462 SNDRV_PCM_IOCTL_READN_FRAMES = _IOR('A', 0x53, struct snd_xfern),
1da177e4
LT
463 SNDRV_PCM_IOCTL_LINK = _IOW('A', 0x60, int),
464 SNDRV_PCM_IOCTL_UNLINK = _IO('A', 0x61),
465};
466
467/* Trick to make alsa-lib/acinclude.m4 happy */
468#define SNDRV_PCM_IOCTL_REWIND SNDRV_PCM_IOCTL_REWIND
469
470/*****************************************************************************
471 * *
472 * MIDI v1.0 interface *
473 * *
474 *****************************************************************************/
475
476/*
477 * Raw MIDI section - /dev/snd/midi??
478 */
479
480#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
481
512bbd6a 482enum {
1da177e4
LT
483 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
484 SNDRV_RAWMIDI_STREAM_INPUT,
485 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
486};
487
488#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
489#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
490#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
491
512bbd6a 492struct snd_rawmidi_info {
1da177e4
LT
493 unsigned int device; /* RO/WR (control): device number */
494 unsigned int subdevice; /* RO/WR (control): subdevice number */
512bbd6a 495 int stream; /* WR: stream */
1da177e4
LT
496 int card; /* R: card number */
497 unsigned int flags; /* SNDRV_RAWMIDI_INFO_XXXX */
498 unsigned char id[64]; /* ID (user selectable) */
499 unsigned char name[80]; /* name of device */
500 unsigned char subname[32]; /* name of active or selected subdevice */
501 unsigned int subdevices_count;
502 unsigned int subdevices_avail;
503 unsigned char reserved[64]; /* reserved for future use */
504};
505
512bbd6a
TI
506struct snd_rawmidi_params {
507 int stream;
1da177e4
LT
508 size_t buffer_size; /* queue size in bytes */
509 size_t avail_min; /* minimum avail bytes for wakeup */
510 unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
511 unsigned char reserved[16]; /* reserved for future use */
512};
513
512bbd6a
TI
514struct snd_rawmidi_status {
515 int stream;
1da177e4
LT
516 struct timespec tstamp; /* Timestamp */
517 size_t avail; /* available bytes */
518 size_t xruns; /* count of overruns since last status (in bytes) */
519 unsigned char reserved[16]; /* reserved for future use */
520};
521
522enum {
523 SNDRV_RAWMIDI_IOCTL_PVERSION = _IOR('W', 0x00, int),
512bbd6a
TI
524 SNDRV_RAWMIDI_IOCTL_INFO = _IOR('W', 0x01, struct snd_rawmidi_info),
525 SNDRV_RAWMIDI_IOCTL_PARAMS = _IOWR('W', 0x10, struct snd_rawmidi_params),
526 SNDRV_RAWMIDI_IOCTL_STATUS = _IOWR('W', 0x20, struct snd_rawmidi_status),
1da177e4
LT
527 SNDRV_RAWMIDI_IOCTL_DROP = _IOW('W', 0x30, int),
528 SNDRV_RAWMIDI_IOCTL_DRAIN = _IOW('W', 0x31, int),
529};
530
531/*
532 * Timer section - /dev/snd/timer
533 */
534
a501dfa3 535#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 5)
1da177e4 536
512bbd6a 537enum {
1da177e4
LT
538 SNDRV_TIMER_CLASS_NONE = -1,
539 SNDRV_TIMER_CLASS_SLAVE = 0,
540 SNDRV_TIMER_CLASS_GLOBAL,
541 SNDRV_TIMER_CLASS_CARD,
542 SNDRV_TIMER_CLASS_PCM,
543 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
544};
545
546/* slave timer classes */
512bbd6a 547enum {
1da177e4
LT
548 SNDRV_TIMER_SCLASS_NONE = 0,
549 SNDRV_TIMER_SCLASS_APPLICATION,
550 SNDRV_TIMER_SCLASS_SEQUENCER, /* alias */
551 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, /* alias */
552 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
553};
554
555/* global timers (device member) */
556#define SNDRV_TIMER_GLOBAL_SYSTEM 0
557#define SNDRV_TIMER_GLOBAL_RTC 1
558#define SNDRV_TIMER_GLOBAL_HPET 2
559
560/* info flags */
561#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
562
512bbd6a
TI
563struct snd_timer_id {
564 int dev_class;
565 int dev_sclass;
1da177e4
LT
566 int card;
567 int device;
568 int subdevice;
569};
570
512bbd6a
TI
571struct snd_timer_ginfo {
572 struct snd_timer_id tid; /* requested timer ID */
1da177e4
LT
573 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
574 int card; /* card number */
575 unsigned char id[64]; /* timer identification */
576 unsigned char name[80]; /* timer name */
577 unsigned long reserved0; /* reserved for future use */
578 unsigned long resolution; /* average period resolution in ns */
579 unsigned long resolution_min; /* minimal period resolution in ns */
580 unsigned long resolution_max; /* maximal period resolution in ns */
581 unsigned int clients; /* active timer clients */
582 unsigned char reserved[32];
583};
584
512bbd6a
TI
585struct snd_timer_gparams {
586 struct snd_timer_id tid; /* requested timer ID */
1da177e4
LT
587 unsigned long period_num; /* requested precise period duration (in seconds) - numerator */
588 unsigned long period_den; /* requested precise period duration (in seconds) - denominator */
589 unsigned char reserved[32];
590};
591
512bbd6a
TI
592struct snd_timer_gstatus {
593 struct snd_timer_id tid; /* requested timer ID */
1da177e4
LT
594 unsigned long resolution; /* current period resolution in ns */
595 unsigned long resolution_num; /* precise current period resolution (in seconds) - numerator */
596 unsigned long resolution_den; /* precise current period resolution (in seconds) - denominator */
597 unsigned char reserved[32];
598};
599
512bbd6a
TI
600struct snd_timer_select {
601 struct snd_timer_id id; /* bind to timer ID */
1da177e4
LT
602 unsigned char reserved[32]; /* reserved */
603};
604
512bbd6a 605struct snd_timer_info {
1da177e4
LT
606 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
607 int card; /* card number */
608 unsigned char id[64]; /* timer identificator */
609 unsigned char name[80]; /* timer name */
610 unsigned long reserved0; /* reserved for future use */
611 unsigned long resolution; /* average period resolution in ns */
612 unsigned char reserved[64]; /* reserved */
613};
614
615#define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */
616#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1) /* exclusive use, precise start/stop/pause/continue */
617#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2) /* write early event to the poll queue */
618
512bbd6a 619struct snd_timer_params {
1da177e4
LT
620 unsigned int flags; /* flags - SNDRV_MIXER_PSFLG_* */
621 unsigned int ticks; /* requested resolution in ticks */
622 unsigned int queue_size; /* total size of queue (32-1024) */
623 unsigned int reserved0; /* reserved, was: failure locations */
624 unsigned int filter; /* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
625 unsigned char reserved[60]; /* reserved */
626};
627
512bbd6a 628struct snd_timer_status {
1da177e4
LT
629 struct timespec tstamp; /* Timestamp - last update */
630 unsigned int resolution; /* current period resolution in ns */
631 unsigned int lost; /* counter of master tick lost */
632 unsigned int overrun; /* count of read queue overruns */
633 unsigned int queue; /* used queue size */
634 unsigned char reserved[64]; /* reserved */
635};
636
637enum {
638 SNDRV_TIMER_IOCTL_PVERSION = _IOR('T', 0x00, int),
512bbd6a 639 SNDRV_TIMER_IOCTL_NEXT_DEVICE = _IOWR('T', 0x01, struct snd_timer_id),
1da177e4 640 SNDRV_TIMER_IOCTL_TREAD = _IOW('T', 0x02, int),
512bbd6a
TI
641 SNDRV_TIMER_IOCTL_GINFO = _IOWR('T', 0x03, struct snd_timer_ginfo),
642 SNDRV_TIMER_IOCTL_GPARAMS = _IOW('T', 0x04, struct snd_timer_gparams),
643 SNDRV_TIMER_IOCTL_GSTATUS = _IOWR('T', 0x05, struct snd_timer_gstatus),
644 SNDRV_TIMER_IOCTL_SELECT = _IOW('T', 0x10, struct snd_timer_select),
645 SNDRV_TIMER_IOCTL_INFO = _IOR('T', 0x11, struct snd_timer_info),
646 SNDRV_TIMER_IOCTL_PARAMS = _IOW('T', 0x12, struct snd_timer_params),
647 SNDRV_TIMER_IOCTL_STATUS = _IOR('T', 0x14, struct snd_timer_status),
8c50b37c
TI
648 /* The following four ioctls are changed since 1.0.9 due to confliction */
649 SNDRV_TIMER_IOCTL_START = _IO('T', 0xa0),
650 SNDRV_TIMER_IOCTL_STOP = _IO('T', 0xa1),
651 SNDRV_TIMER_IOCTL_CONTINUE = _IO('T', 0xa2),
652 SNDRV_TIMER_IOCTL_PAUSE = _IO('T', 0xa3),
1da177e4
LT
653};
654
512bbd6a 655struct snd_timer_read {
1da177e4
LT
656 unsigned int resolution;
657 unsigned int ticks;
658};
659
512bbd6a 660enum {
1da177e4
LT
661 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */
662 SNDRV_TIMER_EVENT_TICK, /* val = ticks */
663 SNDRV_TIMER_EVENT_START, /* val = resolution in ns */
664 SNDRV_TIMER_EVENT_STOP, /* val = 0 */
665 SNDRV_TIMER_EVENT_CONTINUE, /* val = resolution in ns */
666 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */
667 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */
a501dfa3 668 SNDRV_TIMER_EVENT_SUSPEND, /* val = 0 */
5ca307b2 669 SNDRV_TIMER_EVENT_RESUME, /* val = resolution in ns */
1da177e4
LT
670 /* master timer events for slave timer instances */
671 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
672 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
673 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
674 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
a501dfa3
JK
675 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
676 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
1da177e4
LT
677};
678
512bbd6a
TI
679struct snd_timer_tread {
680 int event;
1da177e4
LT
681 struct timespec tstamp;
682 unsigned int val;
683};
684
685/****************************************************************************
686 * *
687 * Section for driver control interface - /dev/snd/control? *
688 * *
689 ****************************************************************************/
690
42750b04 691#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 4)
1da177e4 692
512bbd6a 693struct snd_ctl_card_info {
1da177e4
LT
694 int card; /* card number */
695 int pad; /* reserved for future (was type) */
696 unsigned char id[16]; /* ID of card (user selectable) */
697 unsigned char driver[16]; /* Driver name */
698 unsigned char name[32]; /* Short name of soundcard */
699 unsigned char longname[80]; /* name + info text about soundcard */
700 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */
701 unsigned char mixername[80]; /* visual mixer identification */
702 unsigned char components[80]; /* card components / fine identification, delimited with one space (AC97 etc..) */
703 unsigned char reserved[48]; /* reserved for future */
704};
705
512bbd6a
TI
706typedef int __bitwise snd_ctl_elem_type_t;
707#define SNDRV_CTL_ELEM_TYPE_NONE ((__force snd_ctl_elem_type_t) 0) /* invalid */
708#define SNDRV_CTL_ELEM_TYPE_BOOLEAN ((__force snd_ctl_elem_type_t) 1) /* boolean type */
709#define SNDRV_CTL_ELEM_TYPE_INTEGER ((__force snd_ctl_elem_type_t) 2) /* integer type */
710#define SNDRV_CTL_ELEM_TYPE_ENUMERATED ((__force snd_ctl_elem_type_t) 3) /* enumerated type */
711#define SNDRV_CTL_ELEM_TYPE_BYTES ((__force snd_ctl_elem_type_t) 4) /* byte array */
712#define SNDRV_CTL_ELEM_TYPE_IEC958 ((__force snd_ctl_elem_type_t) 5) /* IEC958 (S/PDIF) setup */
713#define SNDRV_CTL_ELEM_TYPE_INTEGER64 ((__force snd_ctl_elem_type_t) 6) /* 64-bit integer type */
714#define SNDRV_CTL_ELEM_TYPE_LAST SNDRV_CTL_ELEM_TYPE_INTEGER64
715
716typedef int __bitwise snd_ctl_elem_iface_t;
717#define SNDRV_CTL_ELEM_IFACE_CARD ((__force snd_ctl_elem_iface_t) 0) /* global control */
718#define SNDRV_CTL_ELEM_IFACE_HWDEP ((__force snd_ctl_elem_iface_t) 1) /* hardware dependent device */
719#define SNDRV_CTL_ELEM_IFACE_MIXER ((__force snd_ctl_elem_iface_t) 2) /* virtual mixer device */
720#define SNDRV_CTL_ELEM_IFACE_PCM ((__force snd_ctl_elem_iface_t) 3) /* PCM device */
721#define SNDRV_CTL_ELEM_IFACE_RAWMIDI ((__force snd_ctl_elem_iface_t) 4) /* RawMidi device */
722#define SNDRV_CTL_ELEM_IFACE_TIMER ((__force snd_ctl_elem_iface_t) 5) /* timer device */
723#define SNDRV_CTL_ELEM_IFACE_SEQUENCER ((__force snd_ctl_elem_iface_t) 6) /* sequencer client */
724#define SNDRV_CTL_ELEM_IFACE_LAST SNDRV_CTL_ELEM_IFACE_SEQUENCER
1da177e4
LT
725
726#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
727#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
728#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
729#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */
8aa9b586
JK
730#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<3) /* when was control changed */
731#define SNDRV_CTL_ELEM_ACCESS_TLV_READ (1<<4) /* TLV read is possible */
732#define SNDRV_CTL_ELEM_ACCESS_TLV_WRITE (1<<5) /* TLV write is possible */
733#define SNDRV_CTL_ELEM_ACCESS_TLV_READWRITE (SNDRV_CTL_ELEM_ACCESS_TLV_READ|SNDRV_CTL_ELEM_ACCESS_TLV_WRITE)
734#define SNDRV_CTL_ELEM_ACCESS_TLV_COMMAND (1<<6) /* TLV command is possible */
1da177e4
LT
735#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8) /* control does actually nothing, but may be updated */
736#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9) /* write lock */
737#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10) /* write lock owner */
8aa9b586 738#define SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK (1<<28) /* kernel use a TLV callback */
1da177e4
LT
739#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29) /* user space element */
740#define SNDRV_CTL_ELEM_ACCESS_DINDIRECT (1<<30) /* indirect access for matrix dimensions in the info structure */
741#define SNDRV_CTL_ELEM_ACCESS_INDIRECT (1<<31) /* indirect access for element value in the value structure */
742
743/* for further details see the ACPI and PCI power management specification */
744#define SNDRV_CTL_POWER_D0 0x0000 /* full On */
745#define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
746#define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
747#define SNDRV_CTL_POWER_D3 0x0300 /* Off */
748#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */
749#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */
750
512bbd6a 751struct snd_ctl_elem_id {
1da177e4 752 unsigned int numid; /* numeric identifier, zero = invalid */
512bbd6a 753 snd_ctl_elem_iface_t iface; /* interface identifier */
1da177e4
LT
754 unsigned int device; /* device/client number */
755 unsigned int subdevice; /* subdevice (substream) number */
756 unsigned char name[44]; /* ASCII name of item */
757 unsigned int index; /* index of item */
758};
759
512bbd6a 760struct snd_ctl_elem_list {
1da177e4
LT
761 unsigned int offset; /* W: first element ID to get */
762 unsigned int space; /* W: count of element IDs to get */
763 unsigned int used; /* R: count of element IDs set */
764 unsigned int count; /* R: count of all elements */
512bbd6a 765 struct snd_ctl_elem_id __user *pids; /* R: IDs */
1da177e4
LT
766 unsigned char reserved[50];
767};
768
512bbd6a
TI
769struct snd_ctl_elem_info {
770 struct snd_ctl_elem_id id; /* W: element ID */
771 snd_ctl_elem_type_t type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */
1da177e4
LT
772 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
773 unsigned int count; /* count of values */
774 pid_t owner; /* owner's PID of this control */
775 union {
776 struct {
777 long min; /* R: minimum value */
778 long max; /* R: maximum value */
779 long step; /* R: step (0 variable) */
780 } integer;
781 struct {
782 long long min; /* R: minimum value */
783 long long max; /* R: maximum value */
784 long long step; /* R: step (0 variable) */
785 } integer64;
786 struct {
787 unsigned int items; /* R: number of items */
788 unsigned int item; /* W: item number */
789 char name[64]; /* R: value name */
790 } enumerated;
791 unsigned char reserved[128];
792 } value;
793 union {
794 unsigned short d[4]; /* dimensions */
795 unsigned short *d_ptr; /* indirect */
796 } dimen;
797 unsigned char reserved[64-4*sizeof(unsigned short)];
798};
799
512bbd6a
TI
800struct snd_ctl_elem_value {
801 struct snd_ctl_elem_id id; /* W: element ID */
1da177e4
LT
802 unsigned int indirect: 1; /* W: use indirect pointer (xxx_ptr member) */
803 union {
804 union {
805 long value[128];
806 long *value_ptr;
807 } integer;
808 union {
809 long long value[64];
810 long long *value_ptr;
811 } integer64;
812 union {
813 unsigned int item[128];
814 unsigned int *item_ptr;
815 } enumerated;
816 union {
817 unsigned char data[512];
818 unsigned char *data_ptr;
819 } bytes;
512bbd6a 820 struct snd_aes_iec958 iec958;
1da177e4
LT
821 } value; /* RO */
822 struct timespec tstamp;
823 unsigned char reserved[128-sizeof(struct timespec)];
824};
825
42750b04
JK
826struct snd_ctl_tlv {
827 unsigned int numid; /* control element numeric identification */
828 unsigned int length; /* in bytes aligned to 4 */
829 unsigned int tlv[0]; /* first TLV */
830};
831
1da177e4
LT
832enum {
833 SNDRV_CTL_IOCTL_PVERSION = _IOR('U', 0x00, int),
512bbd6a
TI
834 SNDRV_CTL_IOCTL_CARD_INFO = _IOR('U', 0x01, struct snd_ctl_card_info),
835 SNDRV_CTL_IOCTL_ELEM_LIST = _IOWR('U', 0x10, struct snd_ctl_elem_list),
836 SNDRV_CTL_IOCTL_ELEM_INFO = _IOWR('U', 0x11, struct snd_ctl_elem_info),
837 SNDRV_CTL_IOCTL_ELEM_READ = _IOWR('U', 0x12, struct snd_ctl_elem_value),
838 SNDRV_CTL_IOCTL_ELEM_WRITE = _IOWR('U', 0x13, struct snd_ctl_elem_value),
839 SNDRV_CTL_IOCTL_ELEM_LOCK = _IOW('U', 0x14, struct snd_ctl_elem_id),
840 SNDRV_CTL_IOCTL_ELEM_UNLOCK = _IOW('U', 0x15, struct snd_ctl_elem_id),
1da177e4 841 SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS = _IOWR('U', 0x16, int),
512bbd6a
TI
842 SNDRV_CTL_IOCTL_ELEM_ADD = _IOWR('U', 0x17, struct snd_ctl_elem_info),
843 SNDRV_CTL_IOCTL_ELEM_REPLACE = _IOWR('U', 0x18, struct snd_ctl_elem_info),
844 SNDRV_CTL_IOCTL_ELEM_REMOVE = _IOWR('U', 0x19, struct snd_ctl_elem_id),
42750b04 845 SNDRV_CTL_IOCTL_TLV_READ = _IOWR('U', 0x1a, struct snd_ctl_tlv),
8aa9b586
JK
846 SNDRV_CTL_IOCTL_TLV_WRITE = _IOWR('U', 0x1b, struct snd_ctl_tlv),
847 SNDRV_CTL_IOCTL_TLV_COMMAND = _IOWR('U', 0x1c, struct snd_ctl_tlv),
1da177e4 848 SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE = _IOWR('U', 0x20, int),
512bbd6a 849 SNDRV_CTL_IOCTL_HWDEP_INFO = _IOR('U', 0x21, struct snd_hwdep_info),
1da177e4 850 SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE = _IOR('U', 0x30, int),
512bbd6a 851 SNDRV_CTL_IOCTL_PCM_INFO = _IOWR('U', 0x31, struct snd_pcm_info),
1da177e4
LT
852 SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE = _IOW('U', 0x32, int),
853 SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE = _IOWR('U', 0x40, int),
512bbd6a 854 SNDRV_CTL_IOCTL_RAWMIDI_INFO = _IOWR('U', 0x41, struct snd_rawmidi_info),
1da177e4
LT
855 SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE = _IOW('U', 0x42, int),
856 SNDRV_CTL_IOCTL_POWER = _IOWR('U', 0xd0, int),
857 SNDRV_CTL_IOCTL_POWER_STATE = _IOR('U', 0xd1, int),
858};
859
860/*
861 * Read interface.
862 */
863
864enum sndrv_ctl_event_type {
865 SNDRV_CTL_EVENT_ELEM = 0,
866 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
867};
868
869#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */
870#define SNDRV_CTL_EVENT_MASK_INFO (1<<1) /* element info was changed */
871#define SNDRV_CTL_EVENT_MASK_ADD (1<<2) /* element was added */
8aa9b586 872#define SNDRV_CTL_EVENT_MASK_TLV (1<<3) /* element TLV tree was changed */
1da177e4
LT
873#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */
874
512bbd6a
TI
875struct snd_ctl_event {
876 int type; /* event type - SNDRV_CTL_EVENT_* */
1da177e4
LT
877 union {
878 struct {
879 unsigned int mask;
512bbd6a 880 struct snd_ctl_elem_id id;
1da177e4
LT
881 } elem;
882 unsigned char data8[60];
883 } data;
884};
885
886/*
887 * Control names
888 */
889
890#define SNDRV_CTL_NAME_NONE ""
891#define SNDRV_CTL_NAME_PLAYBACK "Playback "
892#define SNDRV_CTL_NAME_CAPTURE "Capture "
893
894#define SNDRV_CTL_NAME_IEC958_NONE ""
895#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
896#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
897#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
898#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
899#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
900#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
901#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
902#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
903
904/*
905 *
906 */
907
512bbd6a 908struct snd_xferv {
1da177e4
LT
909 const struct iovec *vector;
910 unsigned long count;
911};
912
913enum {
512bbd6a
TI
914 SNDRV_IOCTL_READV = _IOW('K', 0x00, struct snd_xferv),
915 SNDRV_IOCTL_WRITEV = _IOW('K', 0x01, struct snd_xferv),
1da177e4
LT
916};
917
918#endif /* __SOUND_ASOUND_H */