]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - include/sound/asound.h
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[ALSA] nm256 - Code clean up
[mirror_ubuntu-artful-kernel.git] / include / sound / asound.h
CommitLineData
1da177e4
LT		 1/*
2 * Advanced Linux Sound Architecture - ALSA - Driver
3 * Copyright (c) 1994-2003 by Jaroslav Kysela <perex@suse.cz>,
4 * Abramo Bagnara <abramo@alsa-project.org>
5 *
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 *
21 */
22
23#ifndef __SOUND_ASOUND_H
24#define __SOUND_ASOUND_H
25
1da177e4 26#ifdef __KERNEL__
6560c349 27#include <linux/ioctl.h>
1da177e4
LT		 28#include <linux/types.h>
29#include <linux/time.h>
30#include <asm/byteorder.h>
31
32#ifdef __LITTLE_ENDIAN
33#define SNDRV_LITTLE_ENDIAN
34#else
35#ifdef __BIG_ENDIAN
36#define SNDRV_BIG_ENDIAN
37#else
38#error "Unsupported endian..."
39#endif
40#endif
41
6560c349 42#endif /* __KERNEL__ **/
1da177e4
LT		 43
44/*
45 * protocol version
46 */
47
48#define SNDRV_PROTOCOL_VERSION(major, minor, subminor) (((major)<<16)|((minor)<<8)|(subminor))
49#define SNDRV_PROTOCOL_MAJOR(version) (((version)>>16)&0xffff)
50#define SNDRV_PROTOCOL_MINOR(version) (((version)>>8)&0xff)
51#define SNDRV_PROTOCOL_MICRO(version) ((version)&0xff)
52#define SNDRV_PROTOCOL_INCOMPATIBLE(kversion, uversion) \
53 (SNDRV_PROTOCOL_MAJOR(kversion) != SNDRV_PROTOCOL_MAJOR(uversion) || \
54 (SNDRV_PROTOCOL_MAJOR(kversion) == SNDRV_PROTOCOL_MAJOR(uversion) && \
55 SNDRV_PROTOCOL_MINOR(kversion) != SNDRV_PROTOCOL_MINOR(uversion)))
56
57/****************************************************************************
58 * *
59 * Digital audio interface *
60 * *
61 ****************************************************************************/
62
63struct sndrv_aes_iec958 {
64 unsigned char status[24]; /* AES/IEC958 channel status bits */
65 unsigned char subcode[147]; /* AES/IEC958 subcode bits */
66 unsigned char pad; /* nothing */
67 unsigned char dig_subframe[4]; /* AES/IEC958 subframe bits */
68};
69
70/****************************************************************************
71 * *
72 * Section for driver hardware dependent interface - /dev/snd/hw? *
73 * *
74 ****************************************************************************/
75
76#define SNDRV_HWDEP_VERSION SNDRV_PROTOCOL_VERSION(1, 0, 1)
77
78enum sndrv_hwdep_iface {
79 SNDRV_HWDEP_IFACE_OPL2 = 0,
80 SNDRV_HWDEP_IFACE_OPL3,
81 SNDRV_HWDEP_IFACE_OPL4,
82 SNDRV_HWDEP_IFACE_SB16CSP, /* Creative Signal Processor */
83 SNDRV_HWDEP_IFACE_EMU10K1, /* FX8010 processor in EMU10K1 chip */
84 SNDRV_HWDEP_IFACE_YSS225, /* Yamaha FX processor */
85 SNDRV_HWDEP_IFACE_ICS2115, /* Wavetable synth */
86 SNDRV_HWDEP_IFACE_SSCAPE, /* Ensoniq SoundScape ISA card (MC68EC000) */
87 SNDRV_HWDEP_IFACE_VX, /* Digigram VX cards */
88 SNDRV_HWDEP_IFACE_MIXART, /* Digigram miXart cards */
89 SNDRV_HWDEP_IFACE_USX2Y, /* Tascam US122, US224 & US428 usb */
90 SNDRV_HWDEP_IFACE_EMUX_WAVETABLE, /* EmuX wavetable */
91 SNDRV_HWDEP_IFACE_BLUETOOTH, /* Bluetooth audio */
92 SNDRV_HWDEP_IFACE_USX2Y_PCM, /* Tascam US122, US224 & US428 rawusb pcm */
93 SNDRV_HWDEP_IFACE_PCXHR, /* Digigram PCXHR */
b259b10c 94 SNDRV_HWDEP_IFACE_SB_RC, /* SB Extigy/Audigy2NX remote control */
1da177e4
LT		 95
96 /* Don't forget to change the following: */
b259b10c 97 SNDRV_HWDEP_IFACE_LAST = SNDRV_HWDEP_IFACE_SB_RC
1da177e4
LT		 98};
99
100struct sndrv_hwdep_info {
101 unsigned int device; /* WR: device number */
102 int card; /* R: card number */
103 unsigned char id[64]; /* ID (user selectable) */
104 unsigned char name[80]; /* hwdep name */
105 enum sndrv_hwdep_iface iface; /* hwdep interface */
106 unsigned char reserved[64]; /* reserved for future */
107};
108
109/* generic DSP loader */
110struct sndrv_hwdep_dsp_status {
111 unsigned int version; /* R: driver-specific version */
112 unsigned char id[32]; /* R: driver-specific ID string */
113 unsigned int num_dsps; /* R: number of DSP images to transfer */
114 unsigned int dsp_loaded; /* R: bit flags indicating the loaded DSPs */
115 unsigned int chip_ready; /* R: 1 = initialization finished */
116 unsigned char reserved[16]; /* reserved for future use */
117};
118
119struct sndrv_hwdep_dsp_image {
120 unsigned int index; /* W: DSP index */
121 unsigned char name[64]; /* W: ID (e.g. file name) */
122 unsigned char __user *image; /* W: binary image */
123 size_t length; /* W: size of image in bytes */
124 unsigned long driver_data; /* W: driver-specific data */
125};
126
127enum {
128 SNDRV_HWDEP_IOCTL_PVERSION = _IOR ('H', 0x00, int),
129 SNDRV_HWDEP_IOCTL_INFO = _IOR ('H', 0x01, struct sndrv_hwdep_info),
130 SNDRV_HWDEP_IOCTL_DSP_STATUS = _IOR('H', 0x02, struct sndrv_hwdep_dsp_status),
131 SNDRV_HWDEP_IOCTL_DSP_LOAD = _IOW('H', 0x03, struct sndrv_hwdep_dsp_image)
132};
133
134/*****************************************************************************
135 * *
136 * Digital Audio (PCM) interface - /dev/snd/pcm?? *
137 * *
138 *****************************************************************************/
139
140#define SNDRV_PCM_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 7)
141
142typedef unsigned long sndrv_pcm_uframes_t;
143typedef long sndrv_pcm_sframes_t;
144
145enum sndrv_pcm_class {
146 SNDRV_PCM_CLASS_GENERIC = 0, /* standard mono or stereo device */
147 SNDRV_PCM_CLASS_MULTI, /* multichannel device */
148 SNDRV_PCM_CLASS_MODEM, /* software modem class */
149 SNDRV_PCM_CLASS_DIGITIZER, /* digitizer class */
150 /* Don't forget to change the following: */
151 SNDRV_PCM_CLASS_LAST = SNDRV_PCM_CLASS_DIGITIZER,
152};
153
154enum sndrv_pcm_subclass {
155 SNDRV_PCM_SUBCLASS_GENERIC_MIX = 0, /* mono or stereo subdevices are mixed together */
156 SNDRV_PCM_SUBCLASS_MULTI_MIX, /* multichannel subdevices are mixed together */
157 /* Don't forget to change the following: */
158 SNDRV_PCM_SUBCLASS_LAST = SNDRV_PCM_SUBCLASS_MULTI_MIX,
159};
160
161enum sndrv_pcm_stream {
162 SNDRV_PCM_STREAM_PLAYBACK = 0,
163 SNDRV_PCM_STREAM_CAPTURE,
164 SNDRV_PCM_STREAM_LAST = SNDRV_PCM_STREAM_CAPTURE,
165};
166
167enum sndrv_pcm_access {
168 SNDRV_PCM_ACCESS_MMAP_INTERLEAVED = 0, /* interleaved mmap */
169 SNDRV_PCM_ACCESS_MMAP_NONINTERLEAVED, /* noninterleaved mmap */
170 SNDRV_PCM_ACCESS_MMAP_COMPLEX, /* complex mmap */
171 SNDRV_PCM_ACCESS_RW_INTERLEAVED, /* readi/writei */
172 SNDRV_PCM_ACCESS_RW_NONINTERLEAVED, /* readn/writen */
173 SNDRV_PCM_ACCESS_LAST = SNDRV_PCM_ACCESS_RW_NONINTERLEAVED,
174};
175
176enum sndrv_pcm_format {
177 SNDRV_PCM_FORMAT_S8 = 0,
178 SNDRV_PCM_FORMAT_U8,
179 SNDRV_PCM_FORMAT_S16_LE,
180 SNDRV_PCM_FORMAT_S16_BE,
181 SNDRV_PCM_FORMAT_U16_LE,
182 SNDRV_PCM_FORMAT_U16_BE,
183 SNDRV_PCM_FORMAT_S24_LE, /* low three bytes */
184 SNDRV_PCM_FORMAT_S24_BE, /* low three bytes */
185 SNDRV_PCM_FORMAT_U24_LE, /* low three bytes */
186 SNDRV_PCM_FORMAT_U24_BE, /* low three bytes */
187 SNDRV_PCM_FORMAT_S32_LE,
188 SNDRV_PCM_FORMAT_S32_BE,
189 SNDRV_PCM_FORMAT_U32_LE,
190 SNDRV_PCM_FORMAT_U32_BE,
191 SNDRV_PCM_FORMAT_FLOAT_LE, /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
192 SNDRV_PCM_FORMAT_FLOAT_BE, /* 4-byte float, IEEE-754 32-bit, range -1.0 to 1.0 */
193 SNDRV_PCM_FORMAT_FLOAT64_LE, /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
194 SNDRV_PCM_FORMAT_FLOAT64_BE, /* 8-byte float, IEEE-754 64-bit, range -1.0 to 1.0 */
195 SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE, /* IEC-958 subframe, Little Endian */
196 SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE, /* IEC-958 subframe, Big Endian */
197 SNDRV_PCM_FORMAT_MU_LAW,
198 SNDRV_PCM_FORMAT_A_LAW,
199 SNDRV_PCM_FORMAT_IMA_ADPCM,
200 SNDRV_PCM_FORMAT_MPEG,
201 SNDRV_PCM_FORMAT_GSM,
202 SNDRV_PCM_FORMAT_SPECIAL = 31,
203 SNDRV_PCM_FORMAT_S24_3LE = 32, /* in three bytes */
204 SNDRV_PCM_FORMAT_S24_3BE, /* in three bytes */
205 SNDRV_PCM_FORMAT_U24_3LE, /* in three bytes */
206 SNDRV_PCM_FORMAT_U24_3BE, /* in three bytes */
207 SNDRV_PCM_FORMAT_S20_3LE, /* in three bytes */
208 SNDRV_PCM_FORMAT_S20_3BE, /* in three bytes */
209 SNDRV_PCM_FORMAT_U20_3LE, /* in three bytes */
210 SNDRV_PCM_FORMAT_U20_3BE, /* in three bytes */
211 SNDRV_PCM_FORMAT_S18_3LE, /* in three bytes */
212 SNDRV_PCM_FORMAT_S18_3BE, /* in three bytes */
213 SNDRV_PCM_FORMAT_U18_3LE, /* in three bytes */
214 SNDRV_PCM_FORMAT_U18_3BE, /* in three bytes */
215 SNDRV_PCM_FORMAT_LAST = SNDRV_PCM_FORMAT_U18_3BE,
216
217#ifdef SNDRV_LITTLE_ENDIAN
218 SNDRV_PCM_FORMAT_S16 = SNDRV_PCM_FORMAT_S16_LE,
219 SNDRV_PCM_FORMAT_U16 = SNDRV_PCM_FORMAT_U16_LE,
220 SNDRV_PCM_FORMAT_S24 = SNDRV_PCM_FORMAT_S24_LE,
221 SNDRV_PCM_FORMAT_U24 = SNDRV_PCM_FORMAT_U24_LE,
222 SNDRV_PCM_FORMAT_S32 = SNDRV_PCM_FORMAT_S32_LE,
223 SNDRV_PCM_FORMAT_U32 = SNDRV_PCM_FORMAT_U32_LE,
224 SNDRV_PCM_FORMAT_FLOAT = SNDRV_PCM_FORMAT_FLOAT_LE,
225 SNDRV_PCM_FORMAT_FLOAT64 = SNDRV_PCM_FORMAT_FLOAT64_LE,
226 SNDRV_PCM_FORMAT_IEC958_SUBFRAME = SNDRV_PCM_FORMAT_IEC958_SUBFRAME_LE,
227#endif
228#ifdef SNDRV_BIG_ENDIAN
229 SNDRV_PCM_FORMAT_S16 = SNDRV_PCM_FORMAT_S16_BE,
230 SNDRV_PCM_FORMAT_U16 = SNDRV_PCM_FORMAT_U16_BE,
231 SNDRV_PCM_FORMAT_S24 = SNDRV_PCM_FORMAT_S24_BE,
232 SNDRV_PCM_FORMAT_U24 = SNDRV_PCM_FORMAT_U24_BE,
233 SNDRV_PCM_FORMAT_S32 = SNDRV_PCM_FORMAT_S32_BE,
234 SNDRV_PCM_FORMAT_U32 = SNDRV_PCM_FORMAT_U32_BE,
235 SNDRV_PCM_FORMAT_FLOAT = SNDRV_PCM_FORMAT_FLOAT_BE,
236 SNDRV_PCM_FORMAT_FLOAT64 = SNDRV_PCM_FORMAT_FLOAT64_BE,
237 SNDRV_PCM_FORMAT_IEC958_SUBFRAME = SNDRV_PCM_FORMAT_IEC958_SUBFRAME_BE,
238#endif
239};
240
241enum sndrv_pcm_subformat {
242 SNDRV_PCM_SUBFORMAT_STD = 0,
243 SNDRV_PCM_SUBFORMAT_LAST = SNDRV_PCM_SUBFORMAT_STD,
244};
245
246#define SNDRV_PCM_INFO_MMAP 0x00000001 /* hardware supports mmap */
247#define SNDRV_PCM_INFO_MMAP_VALID 0x00000002 /* period data are valid during transfer */
248#define SNDRV_PCM_INFO_DOUBLE 0x00000004 /* Double buffering needed for PCM start/stop */
249#define SNDRV_PCM_INFO_BATCH 0x00000010 /* double buffering */
250#define SNDRV_PCM_INFO_INTERLEAVED 0x00000100 /* channels are interleaved */
251#define SNDRV_PCM_INFO_NONINTERLEAVED 0x00000200 /* channels are not interleaved */
252#define SNDRV_PCM_INFO_COMPLEX 0x00000400 /* complex frame organization (mmap only) */
253#define SNDRV_PCM_INFO_BLOCK_TRANSFER 0x00010000 /* hardware transfer block of samples */
254#define SNDRV_PCM_INFO_OVERRANGE 0x00020000 /* hardware supports ADC (capture) overrange detection */
255#define SNDRV_PCM_INFO_RESUME 0x00040000 /* hardware supports stream resume after suspend */
256#define SNDRV_PCM_INFO_PAUSE 0x00080000 /* pause ioctl is supported */
257#define SNDRV_PCM_INFO_HALF_DUPLEX 0x00100000 /* only half duplex */
258#define SNDRV_PCM_INFO_JOINT_DUPLEX 0x00200000 /* playback and capture stream are somewhat correlated */
259#define SNDRV_PCM_INFO_SYNC_START 0x00400000 /* pcm support some kind of sync go */
260
261enum sndrv_pcm_state {
262 SNDRV_PCM_STATE_OPEN = 0, /* stream is open */
263 SNDRV_PCM_STATE_SETUP, /* stream has a setup */
264 SNDRV_PCM_STATE_PREPARED, /* stream is ready to start */
265 SNDRV_PCM_STATE_RUNNING, /* stream is running */
266 SNDRV_PCM_STATE_XRUN, /* stream reached an xrun */
267 SNDRV_PCM_STATE_DRAINING, /* stream is draining */
268 SNDRV_PCM_STATE_PAUSED, /* stream is paused */
269 SNDRV_PCM_STATE_SUSPENDED, /* hardware is suspended */
270 SNDRV_PCM_STATE_DISCONNECTED, /* hardware is disconnected */
271 SNDRV_PCM_STATE_LAST = SNDRV_PCM_STATE_DISCONNECTED,
272};
273
274enum {
275 SNDRV_PCM_MMAP_OFFSET_DATA = 0x00000000,
276 SNDRV_PCM_MMAP_OFFSET_STATUS = 0x80000000,
277 SNDRV_PCM_MMAP_OFFSET_CONTROL = 0x81000000,
278};
279
280union sndrv_pcm_sync_id {
281 unsigned char id[16];
282 unsigned short id16[8];
283 unsigned int id32[4];
284};
285
286struct sndrv_pcm_info {
287 unsigned int device; /* RO/WR (control): device number */
288 unsigned int subdevice; /* RO/WR (control): subdevice number */
289 enum sndrv_pcm_stream stream; /* RO/WR (control): stream number */
290 int card; /* R: card number */
291 unsigned char id[64]; /* ID (user selectable) */
292 unsigned char name[80]; /* name of this device */
293 unsigned char subname[32]; /* subdevice name */
294 enum sndrv_pcm_class dev_class; /* SNDRV_PCM_CLASS_* */
295 enum sndrv_pcm_subclass dev_subclass; /* SNDRV_PCM_SUBCLASS_* */
296 unsigned int subdevices_count;
297 unsigned int subdevices_avail;
298 union sndrv_pcm_sync_id sync; /* hardware synchronization ID */
299 unsigned char reserved[64]; /* reserved for future... */
300};
301
302enum sndrv_pcm_hw_param {
303 SNDRV_PCM_HW_PARAM_ACCESS = 0, /* Access type */
304 SNDRV_PCM_HW_PARAM_FIRST_MASK = SNDRV_PCM_HW_PARAM_ACCESS,
305 SNDRV_PCM_HW_PARAM_FORMAT, /* Format */
306 SNDRV_PCM_HW_PARAM_SUBFORMAT, /* Subformat */
307 SNDRV_PCM_HW_PARAM_LAST_MASK = SNDRV_PCM_HW_PARAM_SUBFORMAT,
308
309 SNDRV_PCM_HW_PARAM_SAMPLE_BITS = 8, /* Bits per sample */
310 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL = SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
311 SNDRV_PCM_HW_PARAM_FRAME_BITS, /* Bits per frame */
312 SNDRV_PCM_HW_PARAM_CHANNELS, /* Channels */
313 SNDRV_PCM_HW_PARAM_RATE, /* Approx rate */
314 SNDRV_PCM_HW_PARAM_PERIOD_TIME, /* Approx distance between interrupts
315 in us */
316 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, /* Approx frames between interrupts */
317 SNDRV_PCM_HW_PARAM_PERIOD_BYTES, /* Approx bytes between interrupts */
318 SNDRV_PCM_HW_PARAM_PERIODS, /* Approx interrupts per buffer */
319 SNDRV_PCM_HW_PARAM_BUFFER_TIME, /* Approx duration of buffer in us */
320 SNDRV_PCM_HW_PARAM_BUFFER_SIZE, /* Size of buffer in frames */
321 SNDRV_PCM_HW_PARAM_BUFFER_BYTES, /* Size of buffer in bytes */
322 SNDRV_PCM_HW_PARAM_TICK_TIME, /* Approx tick duration in us */
323 SNDRV_PCM_HW_PARAM_LAST_INTERVAL = SNDRV_PCM_HW_PARAM_TICK_TIME
324};
325
267cdf40 326#define SNDRV_PCM_HW_PARAMS_NORESAMPLE (1<<0) /* avoid rate resampling */
1da177e4
LT		 327
328struct sndrv_interval {
329 unsigned int min, max;
330 unsigned int openmin:1,
331 openmax:1,
332 integer:1,
333 empty:1;
334};
335
336#define SNDRV_MASK_MAX 256
337
338struct sndrv_mask {
339 u_int32_t bits[(SNDRV_MASK_MAX+31)/32];
340};
341
342struct sndrv_pcm_hw_params {
343 unsigned int flags;
344 struct sndrv_mask masks[SNDRV_PCM_HW_PARAM_LAST_MASK -
345 SNDRV_PCM_HW_PARAM_FIRST_MASK + 1];
346 struct sndrv_mask mres[5]; /* reserved masks */
347 struct sndrv_interval intervals[SNDRV_PCM_HW_PARAM_LAST_INTERVAL -
348 SNDRV_PCM_HW_PARAM_FIRST_INTERVAL + 1];
349 struct sndrv_interval ires[9]; /* reserved intervals */
350 unsigned int rmask; /* W: requested masks */
351 unsigned int cmask; /* R: changed masks */
352 unsigned int info; /* R: Info flags for returned setup */
353 unsigned int msbits; /* R: used most significant bits */
354 unsigned int rate_num; /* R: rate numerator */
355 unsigned int rate_den; /* R: rate denominator */
356 sndrv_pcm_uframes_t fifo_size; /* R: chip FIFO size in frames */
357 unsigned char reserved[64]; /* reserved for future */
358};
359
360enum sndrv_pcm_tstamp {
361 SNDRV_PCM_TSTAMP_NONE = 0,
362 SNDRV_PCM_TSTAMP_MMAP,
363 SNDRV_PCM_TSTAMP_LAST = SNDRV_PCM_TSTAMP_MMAP,
364};
365
366struct sndrv_pcm_sw_params {
367 enum sndrv_pcm_tstamp tstamp_mode; /* timestamp mode */
368 unsigned int period_step;
369 unsigned int sleep_min; /* min ticks to sleep */
370 sndrv_pcm_uframes_t avail_min; /* min avail frames for wakeup */
371 sndrv_pcm_uframes_t xfer_align; /* xfer size need to be a multiple */
372 sndrv_pcm_uframes_t start_threshold; /* min hw_avail frames for automatic start */
373 sndrv_pcm_uframes_t stop_threshold; /* min avail frames for automatic stop */
374 sndrv_pcm_uframes_t silence_threshold; /* min distance from noise for silence filling */
375 sndrv_pcm_uframes_t silence_size; /* silence block size */
376 sndrv_pcm_uframes_t boundary; /* pointers wrap point */
377 unsigned char reserved[64]; /* reserved for future */
378};
379
380struct sndrv_pcm_channel_info {
381 unsigned int channel;
382 off_t offset; /* mmap offset */
383 unsigned int first; /* offset to first sample in bits */
384 unsigned int step; /* samples distance in bits */
385};
386
387struct sndrv_pcm_status {
388 enum sndrv_pcm_state state; /* stream state */
389 struct timespec trigger_tstamp; /* time when stream was started/stopped/paused */
390 struct timespec tstamp; /* reference timestamp */
391 sndrv_pcm_uframes_t appl_ptr; /* appl ptr */
392 sndrv_pcm_uframes_t hw_ptr; /* hw ptr */
393 sndrv_pcm_sframes_t delay; /* current delay in frames */
394 sndrv_pcm_uframes_t avail; /* number of frames available */
395 sndrv_pcm_uframes_t avail_max; /* max frames available on hw since last status */
396 sndrv_pcm_uframes_t overrange; /* count of ADC (capture) overrange detections from last status */
397 enum sndrv_pcm_state suspended_state; /* suspended stream state */
398 unsigned char reserved[60]; /* must be filled with zero */
399};
400
401struct sndrv_pcm_mmap_status {
402 enum sndrv_pcm_state state; /* RO: state - SNDRV_PCM_STATE_XXXX */
403 int pad1; /* Needed for 64 bit alignment */
404 sndrv_pcm_uframes_t hw_ptr; /* RO: hw ptr (0...boundary-1) */
405 struct timespec tstamp; /* Timestamp */
406 enum sndrv_pcm_state suspended_state; /* RO: suspended stream state */
407};
408
409struct sndrv_pcm_mmap_control {
410 sndrv_pcm_uframes_t appl_ptr; /* RW: appl ptr (0...boundary-1) */
411 sndrv_pcm_uframes_t avail_min; /* RW: min available frames for wakeup */
412};
413
414#define SNDRV_PCM_SYNC_PTR_HWSYNC (1<<0) /* execute hwsync */
415#define SNDRV_PCM_SYNC_PTR_APPL (1<<1) /* get appl_ptr from driver (r/w op) */
416#define SNDRV_PCM_SYNC_PTR_AVAIL_MIN (1<<2) /* get avail_min from driver */
417
418struct sndrv_pcm_sync_ptr {
419 unsigned int flags;
420 union {
421 struct sndrv_pcm_mmap_status status;
422 unsigned char reserved[64];
423 } s;
424 union {
425 struct sndrv_pcm_mmap_control control;
426 unsigned char reserved[64];
427 } c;
428};
429
430struct sndrv_xferi {
431 sndrv_pcm_sframes_t result;
432 void __user *buf;
433 sndrv_pcm_uframes_t frames;
434};
435
436struct sndrv_xfern {
437 sndrv_pcm_sframes_t result;
438 void __user * __user *bufs;
439 sndrv_pcm_uframes_t frames;
440};
441
442enum {
443 SNDRV_PCM_IOCTL_PVERSION = _IOR('A', 0x00, int),
444 SNDRV_PCM_IOCTL_INFO = _IOR('A', 0x01, struct sndrv_pcm_info),
445 SNDRV_PCM_IOCTL_TSTAMP = _IOW('A', 0x02, int),
446 SNDRV_PCM_IOCTL_HW_REFINE = _IOWR('A', 0x10, struct sndrv_pcm_hw_params),
447 SNDRV_PCM_IOCTL_HW_PARAMS = _IOWR('A', 0x11, struct sndrv_pcm_hw_params),
448 SNDRV_PCM_IOCTL_HW_FREE = _IO('A', 0x12),
449 SNDRV_PCM_IOCTL_SW_PARAMS = _IOWR('A', 0x13, struct sndrv_pcm_sw_params),
450 SNDRV_PCM_IOCTL_STATUS = _IOR('A', 0x20, struct sndrv_pcm_status),
451 SNDRV_PCM_IOCTL_DELAY = _IOR('A', 0x21, sndrv_pcm_sframes_t),
452 SNDRV_PCM_IOCTL_HWSYNC = _IO('A', 0x22),
453 SNDRV_PCM_IOCTL_SYNC_PTR = _IOWR('A', 0x23, struct sndrv_pcm_sync_ptr),
454 SNDRV_PCM_IOCTL_CHANNEL_INFO = _IOR('A', 0x32, struct sndrv_pcm_channel_info),
455 SNDRV_PCM_IOCTL_PREPARE = _IO('A', 0x40),
456 SNDRV_PCM_IOCTL_RESET = _IO('A', 0x41),
457 SNDRV_PCM_IOCTL_START = _IO('A', 0x42),
458 SNDRV_PCM_IOCTL_DROP = _IO('A', 0x43),
459 SNDRV_PCM_IOCTL_DRAIN = _IO('A', 0x44),
460 SNDRV_PCM_IOCTL_PAUSE = _IOW('A', 0x45, int),
461 SNDRV_PCM_IOCTL_REWIND = _IOW('A', 0x46, sndrv_pcm_uframes_t),
462 SNDRV_PCM_IOCTL_RESUME = _IO('A', 0x47),
463 SNDRV_PCM_IOCTL_XRUN = _IO('A', 0x48),
464 SNDRV_PCM_IOCTL_FORWARD = _IOW('A', 0x49, sndrv_pcm_uframes_t),
465 SNDRV_PCM_IOCTL_WRITEI_FRAMES = _IOW('A', 0x50, struct sndrv_xferi),
466 SNDRV_PCM_IOCTL_READI_FRAMES = _IOR('A', 0x51, struct sndrv_xferi),
467 SNDRV_PCM_IOCTL_WRITEN_FRAMES = _IOW('A', 0x52, struct sndrv_xfern),
468 SNDRV_PCM_IOCTL_READN_FRAMES = _IOR('A', 0x53, struct sndrv_xfern),
469 SNDRV_PCM_IOCTL_LINK = _IOW('A', 0x60, int),
470 SNDRV_PCM_IOCTL_UNLINK = _IO('A', 0x61),
471};
472
473/* Trick to make alsa-lib/acinclude.m4 happy */
474#define SNDRV_PCM_IOCTL_REWIND SNDRV_PCM_IOCTL_REWIND
475
476/*****************************************************************************
477 * *
478 * MIDI v1.0 interface *
479 * *
480 *****************************************************************************/
481
482/*
483 * Raw MIDI section - /dev/snd/midi??
484 */
485
486#define SNDRV_RAWMIDI_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 0)
487
488enum sndrv_rawmidi_stream {
489 SNDRV_RAWMIDI_STREAM_OUTPUT = 0,
490 SNDRV_RAWMIDI_STREAM_INPUT,
491 SNDRV_RAWMIDI_STREAM_LAST = SNDRV_RAWMIDI_STREAM_INPUT,
492};
493
494#define SNDRV_RAWMIDI_INFO_OUTPUT 0x00000001
495#define SNDRV_RAWMIDI_INFO_INPUT 0x00000002
496#define SNDRV_RAWMIDI_INFO_DUPLEX 0x00000004
497
498struct sndrv_rawmidi_info {
499 unsigned int device; /* RO/WR (control): device number */
500 unsigned int subdevice; /* RO/WR (control): subdevice number */
501 enum sndrv_rawmidi_stream stream; /* WR: stream */
502 int card; /* R: card number */
503 unsigned int flags; /* SNDRV_RAWMIDI_INFO_XXXX */
504 unsigned char id[64]; /* ID (user selectable) */
505 unsigned char name[80]; /* name of device */
506 unsigned char subname[32]; /* name of active or selected subdevice */
507 unsigned int subdevices_count;
508 unsigned int subdevices_avail;
509 unsigned char reserved[64]; /* reserved for future use */
510};
511
512struct sndrv_rawmidi_params {
513 enum sndrv_rawmidi_stream stream;
514 size_t buffer_size; /* queue size in bytes */
515 size_t avail_min; /* minimum avail bytes for wakeup */
516 unsigned int no_active_sensing: 1; /* do not send active sensing byte in close() */
517 unsigned char reserved[16]; /* reserved for future use */
518};
519
520struct sndrv_rawmidi_status {
521 enum sndrv_rawmidi_stream stream;
522 struct timespec tstamp; /* Timestamp */
523 size_t avail; /* available bytes */
524 size_t xruns; /* count of overruns since last status (in bytes) */
525 unsigned char reserved[16]; /* reserved for future use */
526};
527
528enum {
529 SNDRV_RAWMIDI_IOCTL_PVERSION = _IOR('W', 0x00, int),
530 SNDRV_RAWMIDI_IOCTL_INFO = _IOR('W', 0x01, struct sndrv_rawmidi_info),
531 SNDRV_RAWMIDI_IOCTL_PARAMS = _IOWR('W', 0x10, struct sndrv_rawmidi_params),
532 SNDRV_RAWMIDI_IOCTL_STATUS = _IOWR('W', 0x20, struct sndrv_rawmidi_status),
533 SNDRV_RAWMIDI_IOCTL_DROP = _IOW('W', 0x30, int),
534 SNDRV_RAWMIDI_IOCTL_DRAIN = _IOW('W', 0x31, int),
535};
536
537/*
538 * Timer section - /dev/snd/timer
539 */
540
a501dfa3 541#define SNDRV_TIMER_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 5)
1da177e4
LT		 542
543enum sndrv_timer_class {
544 SNDRV_TIMER_CLASS_NONE = -1,
545 SNDRV_TIMER_CLASS_SLAVE = 0,
546 SNDRV_TIMER_CLASS_GLOBAL,
547 SNDRV_TIMER_CLASS_CARD,
548 SNDRV_TIMER_CLASS_PCM,
549 SNDRV_TIMER_CLASS_LAST = SNDRV_TIMER_CLASS_PCM,
550};
551
552/* slave timer classes */
553enum sndrv_timer_slave_class {
554 SNDRV_TIMER_SCLASS_NONE = 0,
555 SNDRV_TIMER_SCLASS_APPLICATION,
556 SNDRV_TIMER_SCLASS_SEQUENCER, /* alias */
557 SNDRV_TIMER_SCLASS_OSS_SEQUENCER, /* alias */
558 SNDRV_TIMER_SCLASS_LAST = SNDRV_TIMER_SCLASS_OSS_SEQUENCER,
559};
560
561/* global timers (device member) */
562#define SNDRV_TIMER_GLOBAL_SYSTEM 0
563#define SNDRV_TIMER_GLOBAL_RTC 1
564#define SNDRV_TIMER_GLOBAL_HPET 2
565
566/* info flags */
567#define SNDRV_TIMER_FLG_SLAVE (1<<0) /* cannot be controlled */
568
569struct sndrv_timer_id {
570 enum sndrv_timer_class dev_class;
571 enum sndrv_timer_slave_class dev_sclass;
572 int card;
573 int device;
574 int subdevice;
575};
576
577struct sndrv_timer_ginfo {
578 struct sndrv_timer_id tid; /* requested timer ID */
579 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
580 int card; /* card number */
581 unsigned char id[64]; /* timer identification */
582 unsigned char name[80]; /* timer name */
583 unsigned long reserved0; /* reserved for future use */
584 unsigned long resolution; /* average period resolution in ns */
585 unsigned long resolution_min; /* minimal period resolution in ns */
586 unsigned long resolution_max; /* maximal period resolution in ns */
587 unsigned int clients; /* active timer clients */
588 unsigned char reserved[32];
589};
590
591struct sndrv_timer_gparams {
592 struct sndrv_timer_id tid; /* requested timer ID */
593 unsigned long period_num; /* requested precise period duration (in seconds) - numerator */
594 unsigned long period_den; /* requested precise period duration (in seconds) - denominator */
595 unsigned char reserved[32];
596};
597
598struct sndrv_timer_gstatus {
599 struct sndrv_timer_id tid; /* requested timer ID */
600 unsigned long resolution; /* current period resolution in ns */
601 unsigned long resolution_num; /* precise current period resolution (in seconds) - numerator */
602 unsigned long resolution_den; /* precise current period resolution (in seconds) - denominator */
603 unsigned char reserved[32];
604};
605
606struct sndrv_timer_select {
607 struct sndrv_timer_id id; /* bind to timer ID */
608 unsigned char reserved[32]; /* reserved */
609};
610
611struct sndrv_timer_info {
612 unsigned int flags; /* timer flags - SNDRV_TIMER_FLG_* */
613 int card; /* card number */
614 unsigned char id[64]; /* timer identificator */
615 unsigned char name[80]; /* timer name */
616 unsigned long reserved0; /* reserved for future use */
617 unsigned long resolution; /* average period resolution in ns */
618 unsigned char reserved[64]; /* reserved */
619};
620
621#define SNDRV_TIMER_PSFLG_AUTO (1<<0) /* auto start, otherwise one-shot */
622#define SNDRV_TIMER_PSFLG_EXCLUSIVE (1<<1) /* exclusive use, precise start/stop/pause/continue */
623#define SNDRV_TIMER_PSFLG_EARLY_EVENT (1<<2) /* write early event to the poll queue */
624
625struct sndrv_timer_params {
626 unsigned int flags; /* flags - SNDRV_MIXER_PSFLG_* */
627 unsigned int ticks; /* requested resolution in ticks */
628 unsigned int queue_size; /* total size of queue (32-1024) */
629 unsigned int reserved0; /* reserved, was: failure locations */
630 unsigned int filter; /* event filter (bitmask of SNDRV_TIMER_EVENT_*) */
631 unsigned char reserved[60]; /* reserved */
632};
633
634struct sndrv_timer_status {
635 struct timespec tstamp; /* Timestamp - last update */
636 unsigned int resolution; /* current period resolution in ns */
637 unsigned int lost; /* counter of master tick lost */
638 unsigned int overrun; /* count of read queue overruns */
639 unsigned int queue; /* used queue size */
640 unsigned char reserved[64]; /* reserved */
641};
642
643enum {
644 SNDRV_TIMER_IOCTL_PVERSION = _IOR('T', 0x00, int),
645 SNDRV_TIMER_IOCTL_NEXT_DEVICE = _IOWR('T', 0x01, struct sndrv_timer_id),
646 SNDRV_TIMER_IOCTL_TREAD = _IOW('T', 0x02, int),
647 SNDRV_TIMER_IOCTL_GINFO = _IOWR('T', 0x03, struct sndrv_timer_ginfo),
648 SNDRV_TIMER_IOCTL_GPARAMS = _IOW('T', 0x04, struct sndrv_timer_gparams),
649 SNDRV_TIMER_IOCTL_GSTATUS = _IOWR('T', 0x05, struct sndrv_timer_gstatus),
650 SNDRV_TIMER_IOCTL_SELECT = _IOW('T', 0x10, struct sndrv_timer_select),
651 SNDRV_TIMER_IOCTL_INFO = _IOR('T', 0x11, struct sndrv_timer_info),
652 SNDRV_TIMER_IOCTL_PARAMS = _IOW('T', 0x12, struct sndrv_timer_params),
653 SNDRV_TIMER_IOCTL_STATUS = _IOR('T', 0x14, struct sndrv_timer_status),
8c50b37c
TI		 654 /* The following four ioctls are changed since 1.0.9 due to confliction */
655 SNDRV_TIMER_IOCTL_START = _IO('T', 0xa0),
656 SNDRV_TIMER_IOCTL_STOP = _IO('T', 0xa1),
657 SNDRV_TIMER_IOCTL_CONTINUE = _IO('T', 0xa2),
658 SNDRV_TIMER_IOCTL_PAUSE = _IO('T', 0xa3),
1da177e4
LT		 659};
660
661struct sndrv_timer_read {
662 unsigned int resolution;
663 unsigned int ticks;
664};
665
666enum sndrv_timer_event {
667 SNDRV_TIMER_EVENT_RESOLUTION = 0, /* val = resolution in ns */
668 SNDRV_TIMER_EVENT_TICK, /* val = ticks */
669 SNDRV_TIMER_EVENT_START, /* val = resolution in ns */
670 SNDRV_TIMER_EVENT_STOP, /* val = 0 */
671 SNDRV_TIMER_EVENT_CONTINUE, /* val = resolution in ns */
672 SNDRV_TIMER_EVENT_PAUSE, /* val = 0 */
673 SNDRV_TIMER_EVENT_EARLY, /* val = 0, early event */
a501dfa3 674 SNDRV_TIMER_EVENT_SUSPEND, /* val = 0 */
5ca307b2 675 SNDRV_TIMER_EVENT_RESUME, /* val = resolution in ns */
1da177e4
LT		 676 /* master timer events for slave timer instances */
677 SNDRV_TIMER_EVENT_MSTART = SNDRV_TIMER_EVENT_START + 10,
678 SNDRV_TIMER_EVENT_MSTOP = SNDRV_TIMER_EVENT_STOP + 10,
679 SNDRV_TIMER_EVENT_MCONTINUE = SNDRV_TIMER_EVENT_CONTINUE + 10,
680 SNDRV_TIMER_EVENT_MPAUSE = SNDRV_TIMER_EVENT_PAUSE + 10,
a501dfa3
JK		 681 SNDRV_TIMER_EVENT_MSUSPEND = SNDRV_TIMER_EVENT_SUSPEND + 10,
682 SNDRV_TIMER_EVENT_MRESUME = SNDRV_TIMER_EVENT_RESUME + 10,
1da177e4
LT		 683};
684
685struct sndrv_timer_tread {
686 enum sndrv_timer_event event;
687 struct timespec tstamp;
688 unsigned int val;
689};
690
691/****************************************************************************
692 * *
693 * Section for driver control interface - /dev/snd/control? *
694 * *
695 ****************************************************************************/
696
697#define SNDRV_CTL_VERSION SNDRV_PROTOCOL_VERSION(2, 0, 3)
698
699struct sndrv_ctl_card_info {
700 int card; /* card number */
701 int pad; /* reserved for future (was type) */
702 unsigned char id[16]; /* ID of card (user selectable) */
703 unsigned char driver[16]; /* Driver name */
704 unsigned char name[32]; /* Short name of soundcard */
705 unsigned char longname[80]; /* name + info text about soundcard */
706 unsigned char reserved_[16]; /* reserved for future (was ID of mixer) */
707 unsigned char mixername[80]; /* visual mixer identification */
708 unsigned char components[80]; /* card components / fine identification, delimited with one space (AC97 etc..) */
709 unsigned char reserved[48]; /* reserved for future */
710};
711
712enum sndrv_ctl_elem_type {
713 SNDRV_CTL_ELEM_TYPE_NONE = 0, /* invalid */
714 SNDRV_CTL_ELEM_TYPE_BOOLEAN, /* boolean type */
715 SNDRV_CTL_ELEM_TYPE_INTEGER, /* integer type */
716 SNDRV_CTL_ELEM_TYPE_ENUMERATED, /* enumerated type */
717 SNDRV_CTL_ELEM_TYPE_BYTES, /* byte array */
718 SNDRV_CTL_ELEM_TYPE_IEC958, /* IEC958 (S/PDIF) setup */
719 SNDRV_CTL_ELEM_TYPE_INTEGER64, /* 64-bit integer type */
720 SNDRV_CTL_ELEM_TYPE_LAST = SNDRV_CTL_ELEM_TYPE_INTEGER64,
721};
722
723enum sndrv_ctl_elem_iface {
724 SNDRV_CTL_ELEM_IFACE_CARD = 0, /* global control */
725 SNDRV_CTL_ELEM_IFACE_HWDEP, /* hardware dependent device */
726 SNDRV_CTL_ELEM_IFACE_MIXER, /* virtual mixer device */
727 SNDRV_CTL_ELEM_IFACE_PCM, /* PCM device */
728 SNDRV_CTL_ELEM_IFACE_RAWMIDI, /* RawMidi device */
729 SNDRV_CTL_ELEM_IFACE_TIMER, /* timer device */
730 SNDRV_CTL_ELEM_IFACE_SEQUENCER, /* sequencer client */
731 SNDRV_CTL_ELEM_IFACE_LAST = SNDRV_CTL_ELEM_IFACE_SEQUENCER,
732};
733
734#define SNDRV_CTL_ELEM_ACCESS_READ (1<<0)
735#define SNDRV_CTL_ELEM_ACCESS_WRITE (1<<1)
736#define SNDRV_CTL_ELEM_ACCESS_READWRITE (SNDRV_CTL_ELEM_ACCESS_READ|SNDRV_CTL_ELEM_ACCESS_WRITE)
737#define SNDRV_CTL_ELEM_ACCESS_VOLATILE (1<<2) /* control value may be changed without a notification */
738#define SNDRV_CTL_ELEM_ACCESS_TIMESTAMP (1<<2) /* when was control changed */
739#define SNDRV_CTL_ELEM_ACCESS_INACTIVE (1<<8) /* control does actually nothing, but may be updated */
740#define SNDRV_CTL_ELEM_ACCESS_LOCK (1<<9) /* write lock */
741#define SNDRV_CTL_ELEM_ACCESS_OWNER (1<<10) /* write lock owner */
742#define SNDRV_CTL_ELEM_ACCESS_USER (1<<29) /* user space element */
743#define SNDRV_CTL_ELEM_ACCESS_DINDIRECT (1<<30) /* indirect access for matrix dimensions in the info structure */
744#define SNDRV_CTL_ELEM_ACCESS_INDIRECT (1<<31) /* indirect access for element value in the value structure */
745
746/* for further details see the ACPI and PCI power management specification */
747#define SNDRV_CTL_POWER_D0 0x0000 /* full On */
748#define SNDRV_CTL_POWER_D1 0x0100 /* partial On */
749#define SNDRV_CTL_POWER_D2 0x0200 /* partial On */
750#define SNDRV_CTL_POWER_D3 0x0300 /* Off */
751#define SNDRV_CTL_POWER_D3hot (SNDRV_CTL_POWER_D3|0x0000) /* Off, with power */
752#define SNDRV_CTL_POWER_D3cold (SNDRV_CTL_POWER_D3|0x0001) /* Off, without power */
753
754struct sndrv_ctl_elem_id {
755 unsigned int numid; /* numeric identifier, zero = invalid */
756 enum sndrv_ctl_elem_iface iface; /* interface identifier */
757 unsigned int device; /* device/client number */
758 unsigned int subdevice; /* subdevice (substream) number */
759 unsigned char name[44]; /* ASCII name of item */
760 unsigned int index; /* index of item */
761};
762
763struct sndrv_ctl_elem_list {
764 unsigned int offset; /* W: first element ID to get */
765 unsigned int space; /* W: count of element IDs to get */
766 unsigned int used; /* R: count of element IDs set */
767 unsigned int count; /* R: count of all elements */
768 struct sndrv_ctl_elem_id __user *pids; /* R: IDs */
769 unsigned char reserved[50];
770};
771
772struct sndrv_ctl_elem_info {
773 struct sndrv_ctl_elem_id id; /* W: element ID */
774 enum sndrv_ctl_elem_type type; /* R: value type - SNDRV_CTL_ELEM_TYPE_* */
775 unsigned int access; /* R: value access (bitmask) - SNDRV_CTL_ELEM_ACCESS_* */
776 unsigned int count; /* count of values */
777 pid_t owner; /* owner's PID of this control */
778 union {
779 struct {
780 long min; /* R: minimum value */
781 long max; /* R: maximum value */
782 long step; /* R: step (0 variable) */
783 } integer;
784 struct {
785 long long min; /* R: minimum value */
786 long long max; /* R: maximum value */
787 long long step; /* R: step (0 variable) */
788 } integer64;
789 struct {
790 unsigned int items; /* R: number of items */
791 unsigned int item; /* W: item number */
792 char name[64]; /* R: value name */
793 } enumerated;
794 unsigned char reserved[128];
795 } value;
796 union {
797 unsigned short d[4]; /* dimensions */
798 unsigned short *d_ptr; /* indirect */
799 } dimen;
800 unsigned char reserved[64-4*sizeof(unsigned short)];
801};
802
803struct sndrv_ctl_elem_value {
804 struct sndrv_ctl_elem_id id; /* W: element ID */
805 unsigned int indirect: 1; /* W: use indirect pointer (xxx_ptr member) */
806 union {
807 union {
808 long value[128];
809 long *value_ptr;
810 } integer;
811 union {
812 long long value[64];
813 long long *value_ptr;
814 } integer64;
815 union {
816 unsigned int item[128];
817 unsigned int *item_ptr;
818 } enumerated;
819 union {
820 unsigned char data[512];
821 unsigned char *data_ptr;
822 } bytes;
823 struct sndrv_aes_iec958 iec958;
824 } value; /* RO */
825 struct timespec tstamp;
826 unsigned char reserved[128-sizeof(struct timespec)];
827};
828
829enum {
830 SNDRV_CTL_IOCTL_PVERSION = _IOR('U', 0x00, int),
831 SNDRV_CTL_IOCTL_CARD_INFO = _IOR('U', 0x01, struct sndrv_ctl_card_info),
832 SNDRV_CTL_IOCTL_ELEM_LIST = _IOWR('U', 0x10, struct sndrv_ctl_elem_list),
833 SNDRV_CTL_IOCTL_ELEM_INFO = _IOWR('U', 0x11, struct sndrv_ctl_elem_info),
834 SNDRV_CTL_IOCTL_ELEM_READ = _IOWR('U', 0x12, struct sndrv_ctl_elem_value),
835 SNDRV_CTL_IOCTL_ELEM_WRITE = _IOWR('U', 0x13, struct sndrv_ctl_elem_value),
836 SNDRV_CTL_IOCTL_ELEM_LOCK = _IOW('U', 0x14, struct sndrv_ctl_elem_id),
837 SNDRV_CTL_IOCTL_ELEM_UNLOCK = _IOW('U', 0x15, struct sndrv_ctl_elem_id),
838 SNDRV_CTL_IOCTL_SUBSCRIBE_EVENTS = _IOWR('U', 0x16, int),
839 SNDRV_CTL_IOCTL_ELEM_ADD = _IOWR('U', 0x17, struct sndrv_ctl_elem_info),
840 SNDRV_CTL_IOCTL_ELEM_REPLACE = _IOWR('U', 0x18, struct sndrv_ctl_elem_info),
841 SNDRV_CTL_IOCTL_ELEM_REMOVE = _IOWR('U', 0x19, struct sndrv_ctl_elem_id),
842 SNDRV_CTL_IOCTL_HWDEP_NEXT_DEVICE = _IOWR('U', 0x20, int),
843 SNDRV_CTL_IOCTL_HWDEP_INFO = _IOR('U', 0x21, struct sndrv_hwdep_info),
844 SNDRV_CTL_IOCTL_PCM_NEXT_DEVICE = _IOR('U', 0x30, int),
845 SNDRV_CTL_IOCTL_PCM_INFO = _IOWR('U', 0x31, struct sndrv_pcm_info),
846 SNDRV_CTL_IOCTL_PCM_PREFER_SUBDEVICE = _IOW('U', 0x32, int),
847 SNDRV_CTL_IOCTL_RAWMIDI_NEXT_DEVICE = _IOWR('U', 0x40, int),
848 SNDRV_CTL_IOCTL_RAWMIDI_INFO = _IOWR('U', 0x41, struct sndrv_rawmidi_info),
849 SNDRV_CTL_IOCTL_RAWMIDI_PREFER_SUBDEVICE = _IOW('U', 0x42, int),
850 SNDRV_CTL_IOCTL_POWER = _IOWR('U', 0xd0, int),
851 SNDRV_CTL_IOCTL_POWER_STATE = _IOR('U', 0xd1, int),
852};
853
854/*
855 * Read interface.
856 */
857
858enum sndrv_ctl_event_type {
859 SNDRV_CTL_EVENT_ELEM = 0,
860 SNDRV_CTL_EVENT_LAST = SNDRV_CTL_EVENT_ELEM,
861};
862
863#define SNDRV_CTL_EVENT_MASK_VALUE (1<<0) /* element value was changed */
864#define SNDRV_CTL_EVENT_MASK_INFO (1<<1) /* element info was changed */
865#define SNDRV_CTL_EVENT_MASK_ADD (1<<2) /* element was added */
866#define SNDRV_CTL_EVENT_MASK_REMOVE (~0U) /* element was removed */
867
868struct sndrv_ctl_event {
869 enum sndrv_ctl_event_type type; /* event type - SNDRV_CTL_EVENT_* */
870 union {
871 struct {
872 unsigned int mask;
873 struct sndrv_ctl_elem_id id;
874 } elem;
875 unsigned char data8[60];
876 } data;
877};
878
879/*
880 * Control names
881 */
882
883#define SNDRV_CTL_NAME_NONE ""
884#define SNDRV_CTL_NAME_PLAYBACK "Playback "
885#define SNDRV_CTL_NAME_CAPTURE "Capture "
886
887#define SNDRV_CTL_NAME_IEC958_NONE ""
888#define SNDRV_CTL_NAME_IEC958_SWITCH "Switch"
889#define SNDRV_CTL_NAME_IEC958_VOLUME "Volume"
890#define SNDRV_CTL_NAME_IEC958_DEFAULT "Default"
891#define SNDRV_CTL_NAME_IEC958_MASK "Mask"
892#define SNDRV_CTL_NAME_IEC958_CON_MASK "Con Mask"
893#define SNDRV_CTL_NAME_IEC958_PRO_MASK "Pro Mask"
894#define SNDRV_CTL_NAME_IEC958_PCM_STREAM "PCM Stream"
895#define SNDRV_CTL_NAME_IEC958(expl,direction,what) "IEC958 " expl SNDRV_CTL_NAME_##direction SNDRV_CTL_NAME_IEC958_##what
896
897/*
898 *
899 */
900
901struct sndrv_xferv {
902 const struct iovec *vector;
903 unsigned long count;
904};
905
906enum {
907 SNDRV_IOCTL_READV = _IOW('K', 0x00, struct sndrv_xferv),
908 SNDRV_IOCTL_WRITEV = _IOW('K', 0x01, struct sndrv_xferv),
909};
910
911#endif /* __SOUND_ASOUND_H */
Ubuntu Artful kernel mirror