[mirror_ubuntu-bionic-kernel.git] / include / sound / hdaudio.h

/*
 * HD-audio core stuff
 */

#ifndef __SOUND_HDAUDIO_H
#define __SOUND_HDAUDIO_H

#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/timecounter.h>
#include <sound/core.h>
#include <sound/memalloc.h>
#include <sound/hda_verbs.h>

/* codec node id */
typedef u16 hda_nid_t;

struct hdac_bus;
struct hdac_stream;
struct hdac_device;
struct hdac_driver;
struct hdac_widget_tree;

/*
 * exported bus type
 */
extern struct bus_type snd_hda_bus_type;

/*
 * generic arrays
 */
struct snd_array {
	unsigned int used;
	unsigned int alloced;
	unsigned int elem_size;
	unsigned int alloc_align;
	void *list;
};

/*
 * HD-audio codec base device
 */
struct hdac_device {
	struct device dev;
	int type;
	struct hdac_bus *bus;
	unsigned int addr;		/* codec address */
	struct list_head list;		/* list point for bus codec_list */

	hda_nid_t afg;			/* AFG node id */
	hda_nid_t mfg;			/* MFG node id */

	/* ids */
	unsigned int vendor_id;
	unsigned int subsystem_id;
	unsigned int revision_id;
	unsigned int afg_function_id;
	unsigned int mfg_function_id;
	unsigned int afg_unsol:1;
	unsigned int mfg_unsol:1;

	unsigned int power_caps;	/* FG power caps */

	const char *vendor_name;	/* codec vendor name */
	const char *chip_name;		/* codec chip name */

	/* verb exec op override */
	int (*exec_verb)(struct hdac_device *dev, unsigned int cmd,
			 unsigned int flags, unsigned int *res);

	/* widgets */
	unsigned int num_nodes;
	hda_nid_t start_nid, end_nid;

	/* misc flags */
	atomic_t in_pm;		/* suspend/resume being performed */

	/* sysfs */
	struct hdac_widget_tree *widgets;

	/* regmap */
	struct regmap *regmap;
	struct snd_array vendor_verbs;
	bool lazy_cache:1;	/* don't wake up for writes */
	bool caps_overwriting:1; /* caps overwrite being in process */
	bool cache_coef:1;	/* cache COEF read/write too */
};

/* device/driver type used for matching */
enum {
	HDA_DEV_CORE,
	HDA_DEV_LEGACY,
};

/* direction */
enum {
	HDA_INPUT, HDA_OUTPUT
};

#define dev_to_hdac_dev(_dev)	container_of(_dev, struct hdac_device, dev)

int snd_hdac_device_init(struct hdac_device *dev, struct hdac_bus *bus,
			 const char *name, unsigned int addr);
void snd_hdac_device_exit(struct hdac_device *dev);
int snd_hdac_device_register(struct hdac_device *codec);
void snd_hdac_device_unregister(struct hdac_device *codec);

int snd_hdac_refresh_widgets(struct hdac_device *codec);

unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
			       unsigned int verb, unsigned int parm);
int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
		       unsigned int flags, unsigned int *res);
int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
		  unsigned int verb, unsigned int parm, unsigned int *res);
int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
			unsigned int *res);
int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
				int parm);
int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
			   unsigned int parm, unsigned int val);
int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
			     hda_nid_t *conn_list, int max_conns);
int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
			   hda_nid_t *start_id);

/**
 * snd_hdac_read_parm - read a codec parameter
 * @codec: the codec object
 * @nid: NID to read a parameter
 * @parm: parameter to read
 *
 * Returns -1 for error.  If you need to distinguish the error more
 * strictly, use _snd_hdac_read_parm() directly.
 */
static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
				     int parm)
{
	unsigned int val;

	return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
}

#ifdef CONFIG_PM
void snd_hdac_power_up(struct hdac_device *codec);
void snd_hdac_power_down(struct hdac_device *codec);
void snd_hdac_power_up_pm(struct hdac_device *codec);
void snd_hdac_power_down_pm(struct hdac_device *codec);
#else
static inline void snd_hdac_power_up(struct hdac_device *codec) {}
static inline void snd_hdac_power_down(struct hdac_device *codec) {}
static inline void snd_hdac_power_up_pm(struct hdac_device *codec) {}
static inline void snd_hdac_power_down_pm(struct hdac_device *codec) {}
#endif

/*
 * HD-audio codec base driver
 */
struct hdac_driver {
	struct device_driver driver;
	int type;
	int (*match)(struct hdac_device *dev, struct hdac_driver *drv);
	void (*unsol_event)(struct hdac_device *dev, unsigned int event);
};

#define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)

/*
 * Bus verb operators
 */
struct hdac_bus_ops {
	/* send a single command */
	int (*command)(struct hdac_bus *bus, unsigned int cmd);
	/* get a response from the last command */
	int (*get_response)(struct hdac_bus *bus, unsigned int addr,
			    unsigned int *res);
};

/*
 * Lowlevel I/O operators
 */
struct hdac_io_ops {
	/* mapped register accesses */
	void (*reg_writel)(u32 value, u32 __iomem *addr);
	u32 (*reg_readl)(u32 __iomem *addr);
	void (*reg_writew)(u16 value, u16 __iomem *addr);
	u16 (*reg_readw)(u16 __iomem *addr);
	void (*reg_writeb)(u8 value, u8 __iomem *addr);
	u8 (*reg_readb)(u8 __iomem *addr);
	/* Allocation ops */
	int (*dma_alloc_pages)(struct hdac_bus *bus, int type, size_t size,
			       struct snd_dma_buffer *buf);
	void (*dma_free_pages)(struct hdac_bus *bus,
			       struct snd_dma_buffer *buf);
};

#define HDA_UNSOL_QUEUE_SIZE	64
#define HDA_MAX_CODECS		8	/* limit by controller side */

/* HD Audio class code */
#define PCI_CLASS_MULTIMEDIA_HD_AUDIO	0x0403

/*
 * CORB/RIRB
 *
 * Each CORB entry is 4byte, RIRB is 8byte
 */
struct hdac_rb {
	__le32 *buf;		/* virtual address of CORB/RIRB buffer */
	dma_addr_t addr;	/* physical address of CORB/RIRB buffer */
	unsigned short rp, wp;	/* RIRB read/write pointers */
	int cmds[HDA_MAX_CODECS];	/* number of pending requests */
	u32 res[HDA_MAX_CODECS];	/* last read value */
};

/*
 * HD-audio bus base driver
 */
struct hdac_bus {
	struct device *dev;
	const struct hdac_bus_ops *ops;
	const struct hdac_io_ops *io_ops;

	/* h/w resources */
	unsigned long addr;
	void __iomem *remap_addr;
	int irq;

	/* codec linked list */
	struct list_head codec_list;
	unsigned int num_codecs;

	/* link caddr -> codec */
	struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];

	/* unsolicited event queue */
	u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
	unsigned int unsol_rp, unsol_wp;
	struct work_struct unsol_work;

	/* bit flags of detected codecs */
	unsigned long codec_mask;

	/* bit flags of powered codecs */
	unsigned long codec_powered;

	/* CORB/RIRB */
	struct hdac_rb corb;
	struct hdac_rb rirb;
	unsigned int last_cmd[HDA_MAX_CODECS];	/* last sent command */

	/* CORB/RIRB and position buffers */
	struct snd_dma_buffer rb;
	struct snd_dma_buffer posbuf;

	/* hdac_stream linked list */
	struct list_head stream_list;

	/* operation state */
	bool chip_init:1;		/* h/w initialized */

	/* behavior flags */
	bool sync_write:1;		/* sync after verb write */
	bool use_posbuf:1;		/* use position buffer */
	bool snoop:1;			/* enable snooping */
	bool align_bdle_4k:1;		/* BDLE align 4K boundary */
	bool reverse_assign:1;		/* assign devices in reverse order */
	bool corbrp_self_clear:1;	/* CORBRP clears itself after reset */

	int bdl_pos_adj;		/* BDL position adjustment */

	/* locks */
	spinlock_t reg_lock;
	struct mutex cmd_mutex;
};

int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev,
		      const struct hdac_bus_ops *ops,
		      const struct hdac_io_ops *io_ops);
void snd_hdac_bus_exit(struct hdac_bus *bus);
int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
			   unsigned int cmd, unsigned int *res);
int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
				    unsigned int cmd, unsigned int *res);
void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);

int snd_hdac_bus_add_device(struct hdac_bus *bus, struct hdac_device *codec);
void snd_hdac_bus_remove_device(struct hdac_bus *bus,
				struct hdac_device *codec);

static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
{
	set_bit(codec->addr, &codec->bus->codec_powered);
}

static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
{
	clear_bit(codec->addr, &codec->bus->codec_powered);
}

int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
			      unsigned int *res);

bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);

void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
void snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
				    void (*ack)(struct hdac_bus *,
						struct hdac_stream *));

int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);

/*
 * macros for easy use
 */
#define _snd_hdac_chip_write(type, chip, reg, value) \
	((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
#define _snd_hdac_chip_read(type, chip, reg) \
	((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))

/* read/write a register, pass without AZX_REG_ prefix */
#define snd_hdac_chip_writel(chip, reg, value) \
	_snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
#define snd_hdac_chip_writew(chip, reg, value) \
	_snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
#define snd_hdac_chip_writeb(chip, reg, value) \
	_snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
#define snd_hdac_chip_readl(chip, reg) \
	_snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
#define snd_hdac_chip_readw(chip, reg) \
	_snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
#define snd_hdac_chip_readb(chip, reg) \
	_snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)

/* update a register, pass without AZX_REG_ prefix */
#define snd_hdac_chip_updatel(chip, reg, mask, val) \
	snd_hdac_chip_writel(chip, reg, \
			     (snd_hdac_chip_readl(chip, reg) & ~(mask)) | (val))
#define snd_hdac_chip_updatew(chip, reg, mask, val) \
	snd_hdac_chip_writew(chip, reg, \
			     (snd_hdac_chip_readw(chip, reg) & ~(mask)) | (val))
#define snd_hdac_chip_updateb(chip, reg, mask, val) \
	snd_hdac_chip_writeb(chip, reg, \
			     (snd_hdac_chip_readb(chip, reg) & ~(mask)) | (val))

/*
 * HD-audio stream
 */
struct hdac_stream {
	struct hdac_bus *bus;
	struct snd_dma_buffer bdl; /* BDL buffer */
	__le32 *posbuf;		/* position buffer pointer */
	int direction;		/* playback / capture (SNDRV_PCM_STREAM_*) */

	unsigned int bufsize;	/* size of the play buffer in bytes */
	unsigned int period_bytes; /* size of the period in bytes */
	unsigned int frags;	/* number for period in the play buffer */
	unsigned int fifo_size;	/* FIFO size */

	void __iomem *sd_addr;	/* stream descriptor pointer */

	u32 sd_int_sta_mask;	/* stream int status mask */

	/* pcm support */
	struct snd_pcm_substream *substream;	/* assigned substream,
						 * set in PCM open
						 */
	unsigned int format_val;	/* format value to be set in the
					 * controller and the codec
					 */
	unsigned char stream_tag;	/* assigned stream */
	unsigned char index;		/* stream index */
	int assigned_key;		/* last device# key assigned to */

	bool opened:1;
	bool running:1;
	bool no_period_wakeup:1;
	bool locked:1;

	/* timestamp */
	unsigned long start_wallclk;	/* start + minimum wallclk */
	unsigned long period_wallclk;	/* wallclk for period */
	struct timecounter  tc;
	struct cyclecounter cc;
	int delay_negative_threshold;

	struct list_head list;
#ifdef CONFIG_SND_HDA_DSP_LOADER
	/* DSP access mutex */
	struct mutex dsp_mutex;
#endif
};

void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,
			  int idx, int direction, int tag);
struct hdac_stream *snd_hdac_stream_assign(struct hdac_bus *bus,
					   struct snd_pcm_substream *substream);
void snd_hdac_stream_release(struct hdac_stream *azx_dev);

int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
				  unsigned int streams, unsigned int reg);
void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
			  unsigned int streams);
void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
				      unsigned int streams);
/*
 * macros for easy use
 */
#define _snd_hdac_stream_write(type, dev, reg, value)			\
	((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
#define _snd_hdac_stream_read(type, dev, reg)				\
	((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))

/* read/write a register, pass without AZX_REG_ prefix */
#define snd_hdac_stream_writel(dev, reg, value) \
	_snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
#define snd_hdac_stream_writew(dev, reg, value) \
	_snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
#define snd_hdac_stream_writeb(dev, reg, value) \
	_snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
#define snd_hdac_stream_readl(dev, reg) \
	_snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
#define snd_hdac_stream_readw(dev, reg) \
	_snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
#define snd_hdac_stream_readb(dev, reg) \
	_snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)

/* update a register, pass without AZX_REG_ prefix */
#define snd_hdac_stream_updatel(dev, reg, mask, val) \
	snd_hdac_stream_writel(dev, reg, \
			       (snd_hdac_stream_readl(dev, reg) & \
				~(mask)) | (val))
#define snd_hdac_stream_updatew(dev, reg, mask, val) \
	snd_hdac_stream_writew(dev, reg, \
			       (snd_hdac_stream_readw(dev, reg) & \
				~(mask)) | (val))
#define snd_hdac_stream_updateb(dev, reg, mask, val) \
	snd_hdac_stream_writeb(dev, reg, \
			       (snd_hdac_stream_readb(dev, reg) & \
				~(mask)) | (val))

#ifdef CONFIG_SND_HDA_DSP_LOADER
/* DSP lock helpers */
#define snd_hdac_dsp_lock_init(dev)	mutex_init(&(dev)->dsp_mutex)
#define snd_hdac_dsp_lock(dev)		mutex_lock(&(dev)->dsp_mutex)
#define snd_hdac_dsp_unlock(dev)	mutex_unlock(&(dev)->dsp_mutex)
#define snd_hdac_stream_is_locked(dev)	((dev)->locked)
/* DSP loader helpers */
int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
			 unsigned int byte_size, struct snd_dma_buffer *bufp);
void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
			  struct snd_dma_buffer *dmab);
#else /* CONFIG_SND_HDA_DSP_LOADER */
#define snd_hdac_dsp_lock_init(dev)	do {} while (0)
#define snd_hdac_dsp_lock(dev)		do {} while (0)
#define snd_hdac_dsp_unlock(dev)	do {} while (0)
#define snd_hdac_stream_is_locked(dev)	0

static inline int
snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
		     unsigned int byte_size, struct snd_dma_buffer *bufp)
{
	return 0;
}

static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
{
}

static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
					struct snd_dma_buffer *dmab)
{
}
#endif /* CONFIG_SND_HDA_DSP_LOADER */


/*
 * generic array helpers
 */
void *snd_array_new(struct snd_array *array);
void snd_array_free(struct snd_array *array);
static inline void snd_array_init(struct snd_array *array, unsigned int size,
				  unsigned int align)
{
	array->elem_size = size;
	array->alloc_align = align;
}

static inline void *snd_array_elem(struct snd_array *array, unsigned int idx)
{
	return array->list + idx * array->elem_size;
}

static inline unsigned int snd_array_index(struct snd_array *array, void *ptr)
{
	return (unsigned long)(ptr - array->list) / array->elem_size;
}

#endif /* __SOUND_HDAUDIO_H */
Commit	Line	Data
e3d280fc TI	1	/*
	2	* HD-audio core stuff
	3	*/
	4
	5	#ifndef __SOUND_HDAUDIO_H
	6	#define __SOUND_HDAUDIO_H
	7
	8	#include <linux/device.h>
14752412 TI	9	#include <linux/interrupt.h>
	10	#include <linux/timecounter.h>
	11	#include <sound/core.h>
	12	#include <sound/memalloc.h>
d068ebc2 TI	13	#include <sound/hda_verbs.h>
d068ebc2 TI	14
7639a06c TI	15	/* codec node id */
	16	typedef u16 hda_nid_t;
	17
d068ebc2	18	struct hdac_bus;
14752412	19	struct hdac_stream;
d068ebc2 TI	20	struct hdac_device;
d068ebc2 TI	21	struct hdac_driver;
3256be65	22	struct hdac_widget_tree;
e3d280fc TI	23
	24	/*
	25	* exported bus type
	26	*/
	27	extern struct bus_type snd_hda_bus_type;
	28
71fc4c7e TI	29	/*
	30	* generic arrays
	31	*/
	32	struct snd_array {
	33	unsigned int used;
	34	unsigned int alloced;
	35	unsigned int elem_size;
	36	unsigned int alloc_align;
	37	void *list;
	38	};
	39
e3d280fc TI	40	/*
	41	* HD-audio codec base device
	42	*/
	43	struct hdac_device {
	44	struct device dev;
	45	int type;
d068ebc2 TI	46	struct hdac_bus *bus;
	47	unsigned int addr; /* codec address */
	48	struct list_head list; /* list point for bus codec_list */
7639a06c TI	49
	50	hda_nid_t afg; /* AFG node id */
	51	hda_nid_t mfg; /* MFG node id */
	52
	53	/* ids */
	54	unsigned int vendor_id;
	55	unsigned int subsystem_id;
	56	unsigned int revision_id;
	57	unsigned int afg_function_id;
	58	unsigned int mfg_function_id;
	59	unsigned int afg_unsol:1;
	60	unsigned int mfg_unsol:1;
	61
	62	unsigned int power_caps; /* FG power caps */
	63
	64	const char vendor_name; / codec vendor name */
	65	const char chip_name; / codec chip name */
	66
05852448 TI	67	/* verb exec op override */
	68	int (exec_verb)(struct hdac_device dev, unsigned int cmd,
	69	unsigned int flags, unsigned int *res);
	70
7639a06c TI	71	/* widgets */
	72	unsigned int num_nodes;
	73	hda_nid_t start_nid, end_nid;
	74
	75	/* misc flags */
	76	atomic_t in_pm; /* suspend/resume being performed */
3256be65 TI	77
	78	/* sysfs */
	79	struct hdac_widget_tree *widgets;
4d75faa0 TI	80
	81	/* regmap */
	82	struct regmap *regmap;
5e56bcea	83	struct snd_array vendor_verbs;
4d75faa0	84	bool lazy_cache:1; /* don't wake up for writes */
faa75f8a	85	bool caps_overwriting:1; /* caps overwrite being in process */
40ba66a7	86	bool cache_coef:1; /* cache COEF read/write too */
e3d280fc TI	87	};
	88
	89	/* device/driver type used for matching */
	90	enum {
	91	HDA_DEV_CORE,
	92	HDA_DEV_LEGACY,
	93	};
	94
7639a06c TI	95	/* direction */
	96	enum {
	97	HDA_INPUT, HDA_OUTPUT
	98	};
	99
e3d280fc TI	100	#define dev_to_hdac_dev(_dev) container_of(_dev, struct hdac_device, dev)
e3d280fc TI	101
7639a06c TI	102	int snd_hdac_device_init(struct hdac_device dev, struct hdac_bus bus,
	103	const char *name, unsigned int addr);
	104	void snd_hdac_device_exit(struct hdac_device *dev);
3256be65 TI	105	int snd_hdac_device_register(struct hdac_device *codec);
3256be65 TI	106	void snd_hdac_device_unregister(struct hdac_device *codec);
7639a06c TI	107
	108	int snd_hdac_refresh_widgets(struct hdac_device *codec);
	109
	110	unsigned int snd_hdac_make_cmd(struct hdac_device *codec, hda_nid_t nid,
	111	unsigned int verb, unsigned int parm);
05852448 TI	112	int snd_hdac_exec_verb(struct hdac_device *codec, unsigned int cmd,
05852448 TI	113	unsigned int flags, unsigned int *res);
7639a06c TI	114	int snd_hdac_read(struct hdac_device *codec, hda_nid_t nid,
7639a06c TI	115	unsigned int verb, unsigned int parm, unsigned int *res);
01ed3c06 TI	116	int _snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid, int parm,
01ed3c06 TI	117	unsigned int *res);
9ba17b4d TI	118	int snd_hdac_read_parm_uncached(struct hdac_device *codec, hda_nid_t nid,
9ba17b4d TI	119	int parm);
faa75f8a TI	120	int snd_hdac_override_parm(struct hdac_device *codec, hda_nid_t nid,
faa75f8a TI	121	unsigned int parm, unsigned int val);
7639a06c TI	122	int snd_hdac_get_connections(struct hdac_device *codec, hda_nid_t nid,
	123	hda_nid_t *conn_list, int max_conns);
	124	int snd_hdac_get_sub_nodes(struct hdac_device *codec, hda_nid_t nid,
	125	hda_nid_t *start_id);
	126
01ed3c06 TI	127	/**
	128	* snd_hdac_read_parm - read a codec parameter
	129	* @codec: the codec object
	130	* @nid: NID to read a parameter
	131	* @parm: parameter to read
	132	*
	133	* Returns -1 for error. If you need to distinguish the error more
	134	* strictly, use _snd_hdac_read_parm() directly.
	135	*/
	136	static inline int snd_hdac_read_parm(struct hdac_device *codec, hda_nid_t nid,
	137	int parm)
	138	{
	139	unsigned int val;
	140
	141	return _snd_hdac_read_parm(codec, nid, parm, &val) < 0 ? -1 : val;
	142	}
	143
7639a06c TI	144	#ifdef CONFIG_PM
	145	void snd_hdac_power_up(struct hdac_device *codec);
	146	void snd_hdac_power_down(struct hdac_device *codec);
c3aeda62 TI	147	void snd_hdac_power_up_pm(struct hdac_device *codec);
c3aeda62 TI	148	void snd_hdac_power_down_pm(struct hdac_device *codec);
7639a06c TI	149	#else
	150	static inline void snd_hdac_power_up(struct hdac_device *codec) {}
	151	static inline void snd_hdac_power_down(struct hdac_device *codec) {}
c3aeda62 TI	152	static inline void snd_hdac_power_up_pm(struct hdac_device *codec) {}
c3aeda62 TI	153	static inline void snd_hdac_power_down_pm(struct hdac_device *codec) {}
7639a06c TI	154	#endif
7639a06c TI	155
e3d280fc TI	156	/*
	157	* HD-audio codec base driver
	158	*/
	159	struct hdac_driver {
	160	struct device_driver driver;
	161	int type;
	162	int (match)(struct hdac_device dev, struct hdac_driver *drv);
d068ebc2	163	void (unsol_event)(struct hdac_device dev, unsigned int event);
e3d280fc TI	164	};
	165
	166	#define drv_to_hdac_driver(_drv) container_of(_drv, struct hdac_driver, driver)
	167
d068ebc2	168	/*
14752412	169	* Bus verb operators
d068ebc2 TI	170	*/
	171	struct hdac_bus_ops {
	172	/* send a single command */
	173	int (command)(struct hdac_bus bus, unsigned int cmd);
	174	/* get a response from the last command */
	175	int (get_response)(struct hdac_bus bus, unsigned int addr,
	176	unsigned int *res);
	177	};
	178
14752412 TI	179	/*
	180	* Lowlevel I/O operators
	181	*/
	182	struct hdac_io_ops {
	183	/* mapped register accesses */
	184	void (reg_writel)(u32 value, u32 __iomem addr);
	185	u32 (reg_readl)(u32 __iomem addr);
	186	void (reg_writew)(u16 value, u16 __iomem addr);
	187	u16 (reg_readw)(u16 __iomem addr);
	188	void (reg_writeb)(u8 value, u8 __iomem addr);
	189	u8 (reg_readb)(u8 __iomem addr);
8f3f600b TI	190	/* Allocation ops */
	191	int (dma_alloc_pages)(struct hdac_bus bus, int type, size_t size,
	192	struct snd_dma_buffer *buf);
	193	void (dma_free_pages)(struct hdac_bus bus,
	194	struct snd_dma_buffer *buf);
14752412 TI	195	};
14752412 TI	196
d068ebc2	197	#define HDA_UNSOL_QUEUE_SIZE 64
14752412 TI	198	#define HDA_MAX_CODECS 8 /* limit by controller side */
	199
	200	/* HD Audio class code */
	201	#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
	202
	203	/*
	204	* CORB/RIRB
	205	*
	206	* Each CORB entry is 4byte, RIRB is 8byte
	207	*/
	208	struct hdac_rb {
	209	__le32 buf; / virtual address of CORB/RIRB buffer */
	210	dma_addr_t addr; /* physical address of CORB/RIRB buffer */
	211	unsigned short rp, wp; /* RIRB read/write pointers */
	212	int cmds[HDA_MAX_CODECS]; /* number of pending requests */
	213	u32 res[HDA_MAX_CODECS]; /* last read value */
	214	};
d068ebc2	215
14752412 TI	216	/*
	217	* HD-audio bus base driver
	218	*/
d068ebc2 TI	219	struct hdac_bus {
	220	struct device *dev;
	221	const struct hdac_bus_ops *ops;
14752412 TI	222	const struct hdac_io_ops *io_ops;
	223
	224	/* h/w resources */
	225	unsigned long addr;
	226	void __iomem *remap_addr;
	227	int irq;
d068ebc2 TI	228
	229	/* codec linked list */
	230	struct list_head codec_list;
	231	unsigned int num_codecs;
	232
	233	/* link caddr -> codec */
	234	struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
	235
	236	/* unsolicited event queue */
	237	u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
	238	unsigned int unsol_rp, unsol_wp;
	239	struct work_struct unsol_work;
	240
14752412 TI	241	/* bit flags of detected codecs */
	242	unsigned long codec_mask;
	243
d068ebc2 TI	244	/* bit flags of powered codecs */
	245	unsigned long codec_powered;
	246
14752412 TI	247	/* CORB/RIRB */
	248	struct hdac_rb corb;
	249	struct hdac_rb rirb;
	250	unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */
	251
	252	/* CORB/RIRB and position buffers */
	253	struct snd_dma_buffer rb;
	254	struct snd_dma_buffer posbuf;
	255
	256	/* hdac_stream linked list */
	257	struct list_head stream_list;
	258
	259	/* operation state */
	260	bool chip_init:1; /* h/w initialized */
	261
	262	/* behavior flags */
d068ebc2	263	bool sync_write:1; /* sync after verb write */
14752412 TI	264	bool use_posbuf:1; /* use position buffer */
	265	bool snoop:1; /* enable snooping */
	266	bool align_bdle_4k:1; /* BDLE align 4K boundary */
	267	bool reverse_assign:1; /* assign devices in reverse order */
	268	bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
	269
	270	int bdl_pos_adj; /* BDL position adjustment */
d068ebc2 TI	271
d068ebc2 TI	272	/* locks */
14752412	273	spinlock_t reg_lock;
d068ebc2 TI	274	struct mutex cmd_mutex;
	275	};
	276
	277	int snd_hdac_bus_init(struct hdac_bus bus, struct device dev,
14752412 TI	278	const struct hdac_bus_ops *ops,
14752412 TI	279	const struct hdac_io_ops *io_ops);
d068ebc2 TI	280	void snd_hdac_bus_exit(struct hdac_bus *bus);
	281	int snd_hdac_bus_exec_verb(struct hdac_bus *bus, unsigned int addr,
	282	unsigned int cmd, unsigned int *res);
	283	int snd_hdac_bus_exec_verb_unlocked(struct hdac_bus *bus, unsigned int addr,
	284	unsigned int cmd, unsigned int *res);
	285	void snd_hdac_bus_queue_event(struct hdac_bus *bus, u32 res, u32 res_ex);
	286
	287	int snd_hdac_bus_add_device(struct hdac_bus bus, struct hdac_device codec);
	288	void snd_hdac_bus_remove_device(struct hdac_bus *bus,
	289	struct hdac_device *codec);
	290
7639a06c TI	291	static inline void snd_hdac_codec_link_up(struct hdac_device *codec)
	292	{
	293	set_bit(codec->addr, &codec->bus->codec_powered);
	294	}
	295
	296	static inline void snd_hdac_codec_link_down(struct hdac_device *codec)
	297	{
	298	clear_bit(codec->addr, &codec->bus->codec_powered);
	299	}
	300
14752412 TI	301	int snd_hdac_bus_send_cmd(struct hdac_bus *bus, unsigned int val);
	302	int snd_hdac_bus_get_response(struct hdac_bus *bus, unsigned int addr,
	303	unsigned int *res);
	304
	305	bool snd_hdac_bus_init_chip(struct hdac_bus *bus, bool full_reset);
	306	void snd_hdac_bus_stop_chip(struct hdac_bus *bus);
	307	void snd_hdac_bus_init_cmd_io(struct hdac_bus *bus);
	308	void snd_hdac_bus_stop_cmd_io(struct hdac_bus *bus);
	309	void snd_hdac_bus_enter_link_reset(struct hdac_bus *bus);
	310	void snd_hdac_bus_exit_link_reset(struct hdac_bus *bus);
	311
	312	void snd_hdac_bus_update_rirb(struct hdac_bus *bus);
	313	void snd_hdac_bus_handle_stream_irq(struct hdac_bus *bus, unsigned int status,
	314	void (ack)(struct hdac_bus ,
	315	struct hdac_stream *));
	316
304dad30 JK	317	int snd_hdac_bus_alloc_stream_pages(struct hdac_bus *bus);
	318	void snd_hdac_bus_free_stream_pages(struct hdac_bus *bus);
	319
14752412 TI	320	/*
	321	* macros for easy use
	322	*/
	323	#define _snd_hdac_chip_write(type, chip, reg, value) \
	324	((chip)->io_ops->reg_write ## type(value, (chip)->remap_addr + (reg)))
	325	#define _snd_hdac_chip_read(type, chip, reg) \
	326	((chip)->io_ops->reg_read ## type((chip)->remap_addr + (reg)))
	327
	328	/* read/write a register, pass without AZX_REG_ prefix */
	329	#define snd_hdac_chip_writel(chip, reg, value) \
	330	_snd_hdac_chip_write(l, chip, AZX_REG_ ## reg, value)
	331	#define snd_hdac_chip_writew(chip, reg, value) \
	332	_snd_hdac_chip_write(w, chip, AZX_REG_ ## reg, value)
	333	#define snd_hdac_chip_writeb(chip, reg, value) \
	334	_snd_hdac_chip_write(b, chip, AZX_REG_ ## reg, value)
	335	#define snd_hdac_chip_readl(chip, reg) \
	336	_snd_hdac_chip_read(l, chip, AZX_REG_ ## reg)
	337	#define snd_hdac_chip_readw(chip, reg) \
	338	_snd_hdac_chip_read(w, chip, AZX_REG_ ## reg)
	339	#define snd_hdac_chip_readb(chip, reg) \
	340	_snd_hdac_chip_read(b, chip, AZX_REG_ ## reg)
	341
	342	/* update a register, pass without AZX_REG_ prefix */
	343	#define snd_hdac_chip_updatel(chip, reg, mask, val) \
	344	snd_hdac_chip_writel(chip, reg, \
	345	(snd_hdac_chip_readl(chip, reg) & ~(mask)) \| (val))
	346	#define snd_hdac_chip_updatew(chip, reg, mask, val) \
	347	snd_hdac_chip_writew(chip, reg, \
	348	(snd_hdac_chip_readw(chip, reg) & ~(mask)) \| (val))
	349	#define snd_hdac_chip_updateb(chip, reg, mask, val) \
	350	snd_hdac_chip_writeb(chip, reg, \
	351	(snd_hdac_chip_readb(chip, reg) & ~(mask)) \| (val))
	352
	353	/*
	354	* HD-audio stream
	355	*/
	356	struct hdac_stream {
	357	struct hdac_bus *bus;
	358	struct snd_dma_buffer bdl; /* BDL buffer */
	359	__le32 posbuf; / position buffer pointer */
	360	int direction; /* playback / capture (SNDRV_PCM_STREAM_) /
	361
	362	unsigned int bufsize; /* size of the play buffer in bytes */
	363	unsigned int period_bytes; /* size of the period in bytes */
	364	unsigned int frags; /* number for period in the play buffer */
	365	unsigned int fifo_size; /* FIFO size */
	366
	367	void __iomem sd_addr; / stream descriptor pointer */
	368
	369	u32 sd_int_sta_mask; /* stream int status mask */
	370
	371	/* pcm support */
	372	struct snd_pcm_substream substream; / assigned substream,
	373	* set in PCM open
	374	*/
	375	unsigned int format_val; /* format value to be set in the
	376	* controller and the codec
	377	*/
	378	unsigned char stream_tag; /* assigned stream */
	379	unsigned char index; /* stream index */
	380	int assigned_key; /* last device# key assigned to */
	381
	382	bool opened:1;
	383	bool running:1;
384	bool no_period_wakeup:1;
8f3f600b	385	bool locked:1;
14752412 TI	386
	387	/* timestamp */
	388	unsigned long start_wallclk; /* start + minimum wallclk */
	389	unsigned long period_wallclk; /* wallclk for period */
	390	struct timecounter tc;
	391	struct cyclecounter cc;
	392	int delay_negative_threshold;
	393
	394	struct list_head list;
8f3f600b TI	395	#ifdef CONFIG_SND_HDA_DSP_LOADER
	396	/* DSP access mutex */
	397	struct mutex dsp_mutex;
	398	#endif
14752412 TI	399	};
	400
	401	void snd_hdac_stream_init(struct hdac_bus bus, struct hdac_stream azx_dev,
	402	int idx, int direction, int tag);
	403	struct hdac_stream snd_hdac_stream_assign(struct hdac_bus bus,
	404	struct snd_pcm_substream *substream);
	405	void snd_hdac_stream_release(struct hdac_stream *azx_dev);
	406
	407	int snd_hdac_stream_setup(struct hdac_stream *azx_dev);
	408	void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev);
	409	int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev);
	410	void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start);
	411	void snd_hdac_stream_clear(struct hdac_stream *azx_dev);
	412	void snd_hdac_stream_stop(struct hdac_stream *azx_dev);
	413	void snd_hdac_stream_reset(struct hdac_stream *azx_dev);
	414	void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,
	415	unsigned int streams, unsigned int reg);
	416	void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,
	417	unsigned int streams);
	418	void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,
	419	unsigned int streams);
	420	/*
	421	* macros for easy use
	422	*/
	423	#define _snd_hdac_stream_write(type, dev, reg, value) \
	424	((dev)->bus->io_ops->reg_write ## type(value, (dev)->sd_addr + (reg)))
	425	#define _snd_hdac_stream_read(type, dev, reg) \
	426	((dev)->bus->io_ops->reg_read ## type((dev)->sd_addr + (reg)))
	427
	428	/* read/write a register, pass without AZX_REG_ prefix */
	429	#define snd_hdac_stream_writel(dev, reg, value) \
	430	_snd_hdac_stream_write(l, dev, AZX_REG_ ## reg, value)
	431	#define snd_hdac_stream_writew(dev, reg, value) \
	432	_snd_hdac_stream_write(w, dev, AZX_REG_ ## reg, value)
	433	#define snd_hdac_stream_writeb(dev, reg, value) \
	434	_snd_hdac_stream_write(b, dev, AZX_REG_ ## reg, value)
	435	#define snd_hdac_stream_readl(dev, reg) \
	436	_snd_hdac_stream_read(l, dev, AZX_REG_ ## reg)
	437	#define snd_hdac_stream_readw(dev, reg) \
	438	_snd_hdac_stream_read(w, dev, AZX_REG_ ## reg)
	439	#define snd_hdac_stream_readb(dev, reg) \
	440	_snd_hdac_stream_read(b, dev, AZX_REG_ ## reg)
	441
	442	/* update a register, pass without AZX_REG_ prefix */
	443	#define snd_hdac_stream_updatel(dev, reg, mask, val) \
	444	snd_hdac_stream_writel(dev, reg, \
	445	(snd_hdac_stream_readl(dev, reg) & \
	446	~(mask)) \| (val))
	447	#define snd_hdac_stream_updatew(dev, reg, mask, val) \
	448	snd_hdac_stream_writew(dev, reg, \
	449	(snd_hdac_stream_readw(dev, reg) & \
	450	~(mask)) \| (val))
	451	#define snd_hdac_stream_updateb(dev, reg, mask, val) \
	452	snd_hdac_stream_writeb(dev, reg, \
	453	(snd_hdac_stream_readb(dev, reg) & \
	454	~(mask)) \| (val))
	455
8f3f600b TI	456	#ifdef CONFIG_SND_HDA_DSP_LOADER
	457	/* DSP lock helpers */
	458	#define snd_hdac_dsp_lock_init(dev) mutex_init(&(dev)->dsp_mutex)
	459	#define snd_hdac_dsp_lock(dev) mutex_lock(&(dev)->dsp_mutex)
	460	#define snd_hdac_dsp_unlock(dev) mutex_unlock(&(dev)->dsp_mutex)
	461	#define snd_hdac_stream_is_locked(dev) ((dev)->locked)
	462	/* DSP loader helpers */
	463	int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
	464	unsigned int byte_size, struct snd_dma_buffer *bufp);
	465	void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start);
	466	void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
	467	struct snd_dma_buffer *dmab);
	468	#else /* CONFIG_SND_HDA_DSP_LOADER */
	469	#define snd_hdac_dsp_lock_init(dev) do {} while (0)
	470	#define snd_hdac_dsp_lock(dev) do {} while (0)
	471	#define snd_hdac_dsp_unlock(dev) do {} while (0)
	472	#define snd_hdac_stream_is_locked(dev) 0
	473
	474	static inline int
	475	snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,
	476	unsigned int byte_size, struct snd_dma_buffer *bufp)
	477	{
	478	return 0;
	479	}
	480
	481	static inline void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)
	482	{
	483	}
	484
	485	static inline void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,
	486	struct snd_dma_buffer *dmab)
	487	{
	488	}
	489	#endif /* CONFIG_SND_HDA_DSP_LOADER */
	490
	491
71fc4c7e TI	492	/*
	493	* generic array helpers
	494	*/
	495	void snd_array_new(struct snd_array array);
	496	void snd_array_free(struct snd_array *array);
	497	static inline void snd_array_init(struct snd_array *array, unsigned int size,
	498	unsigned int align)
	499	{
	500	array->elem_size = size;
	501	array->alloc_align = align;
	502	}
	503
	504	static inline void snd_array_elem(struct snd_array array, unsigned int idx)
	505	{
	506	return array->list + idx * array->elem_size;
	507	}
	508
	509	static inline unsigned int snd_array_index(struct snd_array array, void ptr)
	510	{
	511	return (unsigned long)(ptr - array->list) / array->elem_size;
	512	}
	513
e3d280fc	514	#endif /* __SOUND_HDAUDIO_H */