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Commit | Line | Data |
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808db4a4 RP |
1 | /* |
2 | * linux/sound/soc.h -- ALSA SoC Layer | |
3 | * | |
4 | * Author: Liam Girdwood | |
5 | * Created: Aug 11th 2005 | |
6 | * Copyright: Wolfson Microelectronics. PLC. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #ifndef __LINUX_SND_SOC_H | |
14 | #define __LINUX_SND_SOC_H | |
15 | ||
16 | #include <linux/platform_device.h> | |
17 | #include <linux/types.h> | |
d5021ec9 | 18 | #include <linux/notifier.h> |
4484bb2e | 19 | #include <linux/workqueue.h> |
ec67624d LCM |
20 | #include <linux/interrupt.h> |
21 | #include <linux/kernel.h> | |
be3ea3b9 | 22 | #include <linux/regmap.h> |
808db4a4 RP |
23 | #include <sound/core.h> |
24 | #include <sound/pcm.h> | |
25 | #include <sound/control.h> | |
26 | #include <sound/ac97_codec.h> | |
27 | ||
808db4a4 RP |
28 | /* |
29 | * Convenience kcontrol builders | |
30 | */ | |
460acbec | 31 | #define SOC_DOUBLE_VALUE(xreg, shift_left, shift_right, xmax, xinvert) \ |
4eaa9819 | 32 | ((unsigned long)&(struct soc_mixer_control) \ |
460acbec PU |
33 | {.reg = xreg, .shift = shift_left, .rshift = shift_right, \ |
34 | .max = xmax, .platform_max = xmax, .invert = xinvert}) | |
35 | #define SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) \ | |
36 | SOC_DOUBLE_VALUE(xreg, xshift, xshift, xmax, xinvert) | |
4eaa9819 JS |
37 | #define SOC_SINGLE_VALUE_EXT(xreg, xmax, xinvert) \ |
38 | ((unsigned long)&(struct soc_mixer_control) \ | |
d11bb4a9 | 39 | {.reg = xreg, .max = xmax, .platform_max = xmax, .invert = xinvert}) |
cdffa775 PU |
40 | #define SOC_DOUBLE_R_VALUE(xlreg, xrreg, xshift, xmax, xinvert) \ |
41 | ((unsigned long)&(struct soc_mixer_control) \ | |
42 | {.reg = xlreg, .rreg = xrreg, .shift = xshift, .rshift = xshift, \ | |
43 | .max = xmax, .platform_max = xmax, .invert = xinvert}) | |
a7a4ac86 | 44 | #define SOC_SINGLE(xname, reg, shift, max, invert) \ |
808db4a4 RP |
45 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ |
46 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\ | |
47 | .put = snd_soc_put_volsw, \ | |
a7a4ac86 PZ |
48 | .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } |
49 | #define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \ | |
50 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
51 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
52 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
53 | .tlv.p = (tlv_array), \ | |
54 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\ | |
55 | .put = snd_soc_put_volsw, \ | |
56 | .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } | |
460acbec | 57 | #define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \ |
808db4a4 RP |
58 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ |
59 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \ | |
60 | .put = snd_soc_put_volsw, \ | |
460acbec PU |
61 | .private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \ |
62 | max, invert) } | |
4eaa9819 | 63 | #define SOC_DOUBLE_R(xname, reg_left, reg_right, xshift, xmax, xinvert) \ |
808db4a4 RP |
64 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ |
65 | .info = snd_soc_info_volsw_2r, \ | |
66 | .get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \ | |
cdffa775 PU |
67 | .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \ |
68 | xmax, xinvert) } | |
460acbec | 69 | #define SOC_DOUBLE_TLV(xname, reg, shift_left, shift_right, max, invert, tlv_array) \ |
a7a4ac86 PZ |
70 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ |
71 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
72 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
73 | .tlv.p = (tlv_array), \ | |
74 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \ | |
75 | .put = snd_soc_put_volsw, \ | |
460acbec PU |
76 | .private_value = SOC_DOUBLE_VALUE(reg, shift_left, shift_right, \ |
77 | max, invert) } | |
4eaa9819 | 78 | #define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert, tlv_array) \ |
a7a4ac86 PZ |
79 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ |
80 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
81 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
82 | .tlv.p = (tlv_array), \ | |
83 | .info = snd_soc_info_volsw_2r, \ | |
84 | .get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \ | |
cdffa775 PU |
85 | .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \ |
86 | xmax, xinvert) } | |
4eaa9819 | 87 | #define SOC_DOUBLE_S8_TLV(xname, xreg, xmin, xmax, tlv_array) \ |
e13ac2e9 MB |
88 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ |
89 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ | |
90 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ | |
91 | .tlv.p = (tlv_array), \ | |
92 | .info = snd_soc_info_volsw_s8, .get = snd_soc_get_volsw_s8, \ | |
93 | .put = snd_soc_put_volsw_s8, \ | |
4eaa9819 | 94 | .private_value = (unsigned long)&(struct soc_mixer_control) \ |
d11bb4a9 PU |
95 | {.reg = xreg, .min = xmin, .max = xmax, \ |
96 | .platform_max = xmax} } | |
f8ba0b7b | 97 | #define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmax, xtexts) \ |
808db4a4 | 98 | { .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \ |
f8ba0b7b JS |
99 | .max = xmax, .texts = xtexts } |
100 | #define SOC_ENUM_SINGLE(xreg, xshift, xmax, xtexts) \ | |
101 | SOC_ENUM_DOUBLE(xreg, xshift, xshift, xmax, xtexts) | |
102 | #define SOC_ENUM_SINGLE_EXT(xmax, xtexts) \ | |
103 | { .max = xmax, .texts = xtexts } | |
2e72f8e3 PU |
104 | #define SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xmax, xtexts, xvalues) \ |
105 | { .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \ | |
106 | .mask = xmask, .max = xmax, .texts = xtexts, .values = xvalues} | |
107 | #define SOC_VALUE_ENUM_SINGLE(xreg, xshift, xmask, xmax, xtexts, xvalues) \ | |
108 | SOC_VALUE_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xmax, xtexts, xvalues) | |
808db4a4 RP |
109 | #define SOC_ENUM(xname, xenum) \ |
110 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\ | |
111 | .info = snd_soc_info_enum_double, \ | |
112 | .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \ | |
113 | .private_value = (unsigned long)&xenum } | |
2e72f8e3 PU |
114 | #define SOC_VALUE_ENUM(xname, xenum) \ |
115 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\ | |
74155556 | 116 | .info = snd_soc_info_enum_double, \ |
2e72f8e3 PU |
117 | .get = snd_soc_get_value_enum_double, \ |
118 | .put = snd_soc_put_value_enum_double, \ | |
119 | .private_value = (unsigned long)&xenum } | |
f8ba0b7b | 120 | #define SOC_SINGLE_EXT(xname, xreg, xshift, xmax, xinvert,\ |
808db4a4 RP |
121 | xhandler_get, xhandler_put) \ |
122 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
1c433fbd | 123 | .info = snd_soc_info_volsw, \ |
808db4a4 | 124 | .get = xhandler_get, .put = xhandler_put, \ |
f8ba0b7b | 125 | .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) } |
460acbec | 126 | #define SOC_DOUBLE_EXT(xname, reg, shift_left, shift_right, max, invert,\ |
7629ad24 DM |
127 | xhandler_get, xhandler_put) \ |
128 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ | |
129 | .info = snd_soc_info_volsw, \ | |
130 | .get = xhandler_get, .put = xhandler_put, \ | |
460acbec PU |
131 | .private_value = \ |
132 | SOC_DOUBLE_VALUE(reg, shift_left, shift_right, max, invert) } | |
f8ba0b7b | 133 | #define SOC_SINGLE_EXT_TLV(xname, xreg, xshift, xmax, xinvert,\ |
10144c09 MM |
134 | xhandler_get, xhandler_put, tlv_array) \ |
135 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
136 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
137 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
138 | .tlv.p = (tlv_array), \ | |
139 | .info = snd_soc_info_volsw, \ | |
140 | .get = xhandler_get, .put = xhandler_put, \ | |
f8ba0b7b | 141 | .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) } |
d0af93db JS |
142 | #define SOC_DOUBLE_EXT_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert,\ |
143 | xhandler_get, xhandler_put, tlv_array) \ | |
144 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ | |
145 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ | |
146 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ | |
147 | .tlv.p = (tlv_array), \ | |
148 | .info = snd_soc_info_volsw, \ | |
149 | .get = xhandler_get, .put = xhandler_put, \ | |
460acbec PU |
150 | .private_value = SOC_DOUBLE_VALUE(xreg, shift_left, shift_right, \ |
151 | xmax, xinvert) } | |
3ce91d5a JS |
152 | #define SOC_DOUBLE_R_EXT_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert,\ |
153 | xhandler_get, xhandler_put, tlv_array) \ | |
154 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ | |
155 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ | |
156 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ | |
157 | .tlv.p = (tlv_array), \ | |
158 | .info = snd_soc_info_volsw_2r, \ | |
159 | .get = xhandler_get, .put = xhandler_put, \ | |
cdffa775 PU |
160 | .private_value = SOC_DOUBLE_R_VALUE(reg_left, reg_right, xshift, \ |
161 | xmax, xinvert) } | |
808db4a4 RP |
162 | #define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \ |
163 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
164 | .info = snd_soc_info_bool_ext, \ | |
165 | .get = xhandler_get, .put = xhandler_put, \ | |
166 | .private_value = xdata } | |
167 | #define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \ | |
168 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
169 | .info = snd_soc_info_enum_ext, \ | |
170 | .get = xhandler_get, .put = xhandler_put, \ | |
171 | .private_value = (unsigned long)&xenum } | |
172 | ||
b6f4bb38 | 173 | #define SOC_DOUBLE_R_SX_TLV(xname, xreg_left, xreg_right, xshift,\ |
174 | xmin, xmax, tlv_array) \ | |
175 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ | |
176 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ | |
177 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ | |
178 | .tlv.p = (tlv_array), \ | |
179 | .info = snd_soc_info_volsw_2r_sx, \ | |
180 | .get = snd_soc_get_volsw_2r_sx, \ | |
181 | .put = snd_soc_put_volsw_2r_sx, \ | |
182 | .private_value = (unsigned long)&(struct soc_mixer_control) \ | |
183 | {.reg = xreg_left, \ | |
184 | .rreg = xreg_right, .shift = xshift, \ | |
185 | .min = xmin, .max = xmax} } | |
186 | ||
187 | ||
6c2fb6a8 GL |
188 | /* |
189 | * Simplified versions of above macros, declaring a struct and calculating | |
190 | * ARRAY_SIZE internally | |
191 | */ | |
192 | #define SOC_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xtexts) \ | |
193 | struct soc_enum name = SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, \ | |
194 | ARRAY_SIZE(xtexts), xtexts) | |
195 | #define SOC_ENUM_SINGLE_DECL(name, xreg, xshift, xtexts) \ | |
196 | SOC_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xtexts) | |
197 | #define SOC_ENUM_SINGLE_EXT_DECL(name, xtexts) \ | |
198 | struct soc_enum name = SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(xtexts), xtexts) | |
199 | #define SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xmask, xtexts, xvalues) \ | |
200 | struct soc_enum name = SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, \ | |
201 | ARRAY_SIZE(xtexts), xtexts, xvalues) | |
202 | #define SOC_VALUE_ENUM_SINGLE_DECL(name, xreg, xshift, xmask, xtexts, xvalues) \ | |
203 | SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xmask, xtexts, xvalues) | |
204 | ||
0168bf0d LG |
205 | /* |
206 | * Component probe and remove ordering levels for components with runtime | |
207 | * dependencies. | |
208 | */ | |
209 | #define SND_SOC_COMP_ORDER_FIRST -2 | |
210 | #define SND_SOC_COMP_ORDER_EARLY -1 | |
211 | #define SND_SOC_COMP_ORDER_NORMAL 0 | |
212 | #define SND_SOC_COMP_ORDER_LATE 1 | |
213 | #define SND_SOC_COMP_ORDER_LAST 2 | |
214 | ||
0be9898a MB |
215 | /* |
216 | * Bias levels | |
217 | * | |
218 | * @ON: Bias is fully on for audio playback and capture operations. | |
219 | * @PREPARE: Prepare for audio operations. Called before DAPM switching for | |
220 | * stream start and stop operations. | |
221 | * @STANDBY: Low power standby state when no playback/capture operations are | |
222 | * in progress. NOTE: The transition time between STANDBY and ON | |
223 | * should be as fast as possible and no longer than 10ms. | |
224 | * @OFF: Power Off. No restrictions on transition times. | |
225 | */ | |
226 | enum snd_soc_bias_level { | |
56fba41f MB |
227 | SND_SOC_BIAS_OFF = 0, |
228 | SND_SOC_BIAS_STANDBY = 1, | |
229 | SND_SOC_BIAS_PREPARE = 2, | |
230 | SND_SOC_BIAS_ON = 3, | |
0be9898a MB |
231 | }; |
232 | ||
8a2cd618 MB |
233 | struct snd_jack; |
234 | struct snd_soc_card; | |
808db4a4 RP |
235 | struct snd_soc_pcm_stream; |
236 | struct snd_soc_ops; | |
808db4a4 | 237 | struct snd_soc_pcm_runtime; |
3c4b266f | 238 | struct snd_soc_dai; |
f0fba2ad | 239 | struct snd_soc_dai_driver; |
12a48a8c | 240 | struct snd_soc_platform; |
d273ebe7 | 241 | struct snd_soc_dai_link; |
f0fba2ad | 242 | struct snd_soc_platform_driver; |
808db4a4 | 243 | struct snd_soc_codec; |
f0fba2ad | 244 | struct snd_soc_codec_driver; |
808db4a4 | 245 | struct soc_enum; |
8a2cd618 | 246 | struct snd_soc_jack; |
fa9879ed | 247 | struct snd_soc_jack_zone; |
8a2cd618 | 248 | struct snd_soc_jack_pin; |
7a30a3db | 249 | struct snd_soc_cache_ops; |
ce6120cc | 250 | #include <sound/soc-dapm.h> |
f0fba2ad | 251 | |
ec67624d LCM |
252 | #ifdef CONFIG_GPIOLIB |
253 | struct snd_soc_jack_gpio; | |
254 | #endif | |
808db4a4 RP |
255 | |
256 | typedef int (*hw_write_t)(void *,const char* ,int); | |
808db4a4 RP |
257 | |
258 | extern struct snd_ac97_bus_ops soc_ac97_ops; | |
259 | ||
7084a42b | 260 | enum snd_soc_control_type { |
e9c03905 | 261 | SND_SOC_I2C = 1, |
7084a42b | 262 | SND_SOC_SPI, |
0671da18 | 263 | SND_SOC_REGMAP, |
7084a42b MB |
264 | }; |
265 | ||
7a30a3db | 266 | enum snd_soc_compress_type { |
119bd789 | 267 | SND_SOC_FLAT_COMPRESSION = 1, |
a7f387d5 DP |
268 | SND_SOC_LZO_COMPRESSION, |
269 | SND_SOC_RBTREE_COMPRESSION | |
7a30a3db DP |
270 | }; |
271 | ||
b8c0dab9 LG |
272 | enum snd_soc_pcm_subclass { |
273 | SND_SOC_PCM_CLASS_PCM = 0, | |
274 | SND_SOC_PCM_CLASS_BE = 1, | |
275 | }; | |
276 | ||
ec4ee52a | 277 | int snd_soc_codec_set_sysclk(struct snd_soc_codec *codec, int clk_id, |
da1c6ea6 | 278 | int source, unsigned int freq, int dir); |
ec4ee52a MB |
279 | int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source, |
280 | unsigned int freq_in, unsigned int freq_out); | |
281 | ||
70a7ca34 VK |
282 | int snd_soc_register_card(struct snd_soc_card *card); |
283 | int snd_soc_unregister_card(struct snd_soc_card *card); | |
6f8ab4ac MB |
284 | int snd_soc_suspend(struct device *dev); |
285 | int snd_soc_resume(struct device *dev); | |
286 | int snd_soc_poweroff(struct device *dev); | |
f0fba2ad LG |
287 | int snd_soc_register_platform(struct device *dev, |
288 | struct snd_soc_platform_driver *platform_drv); | |
289 | void snd_soc_unregister_platform(struct device *dev); | |
290 | int snd_soc_register_codec(struct device *dev, | |
001ae4c0 | 291 | const struct snd_soc_codec_driver *codec_drv, |
f0fba2ad LG |
292 | struct snd_soc_dai_driver *dai_drv, int num_dai); |
293 | void snd_soc_unregister_codec(struct device *dev); | |
181e055e MB |
294 | int snd_soc_codec_volatile_register(struct snd_soc_codec *codec, |
295 | unsigned int reg); | |
239c9706 DP |
296 | int snd_soc_codec_readable_register(struct snd_soc_codec *codec, |
297 | unsigned int reg); | |
298 | int snd_soc_codec_writable_register(struct snd_soc_codec *codec, | |
299 | unsigned int reg); | |
17a52fd6 | 300 | int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec, |
7084a42b MB |
301 | int addr_bits, int data_bits, |
302 | enum snd_soc_control_type control); | |
7a30a3db DP |
303 | int snd_soc_cache_sync(struct snd_soc_codec *codec); |
304 | int snd_soc_cache_init(struct snd_soc_codec *codec); | |
305 | int snd_soc_cache_exit(struct snd_soc_codec *codec); | |
306 | int snd_soc_cache_write(struct snd_soc_codec *codec, | |
307 | unsigned int reg, unsigned int value); | |
308 | int snd_soc_cache_read(struct snd_soc_codec *codec, | |
309 | unsigned int reg, unsigned int *value); | |
066d16c3 DP |
310 | int snd_soc_default_volatile_register(struct snd_soc_codec *codec, |
311 | unsigned int reg); | |
312 | int snd_soc_default_readable_register(struct snd_soc_codec *codec, | |
313 | unsigned int reg); | |
8020454c DP |
314 | int snd_soc_default_writable_register(struct snd_soc_codec *codec, |
315 | unsigned int reg); | |
f1442bc1 LG |
316 | int snd_soc_platform_read(struct snd_soc_platform *platform, |
317 | unsigned int reg); | |
318 | int snd_soc_platform_write(struct snd_soc_platform *platform, | |
319 | unsigned int reg, unsigned int val); | |
12a48a8c | 320 | |
7aae816d MB |
321 | /* Utility functions to get clock rates from various things */ |
322 | int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots); | |
323 | int snd_soc_params_to_frame_size(struct snd_pcm_hw_params *params); | |
c0fa59df | 324 | int snd_soc_calc_bclk(int fs, int sample_size, int channels, int tdm_slots); |
7aae816d MB |
325 | int snd_soc_params_to_bclk(struct snd_pcm_hw_params *parms); |
326 | ||
808db4a4 RP |
327 | /* set runtime hw params */ |
328 | int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream, | |
329 | const struct snd_pcm_hardware *hw); | |
808db4a4 | 330 | |
8a2cd618 | 331 | /* Jack reporting */ |
f0fba2ad | 332 | int snd_soc_jack_new(struct snd_soc_codec *codec, const char *id, int type, |
8a2cd618 MB |
333 | struct snd_soc_jack *jack); |
334 | void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask); | |
335 | int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count, | |
336 | struct snd_soc_jack_pin *pins); | |
d5021ec9 MB |
337 | void snd_soc_jack_notifier_register(struct snd_soc_jack *jack, |
338 | struct notifier_block *nb); | |
339 | void snd_soc_jack_notifier_unregister(struct snd_soc_jack *jack, | |
340 | struct notifier_block *nb); | |
fa9879ed VK |
341 | int snd_soc_jack_add_zones(struct snd_soc_jack *jack, int count, |
342 | struct snd_soc_jack_zone *zones); | |
343 | int snd_soc_jack_get_type(struct snd_soc_jack *jack, int micbias_voltage); | |
ec67624d LCM |
344 | #ifdef CONFIG_GPIOLIB |
345 | int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count, | |
346 | struct snd_soc_jack_gpio *gpios); | |
347 | void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count, | |
348 | struct snd_soc_jack_gpio *gpios); | |
349 | #endif | |
8a2cd618 | 350 | |
808db4a4 RP |
351 | /* codec register bit access */ |
352 | int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg, | |
46f5822f | 353 | unsigned int mask, unsigned int value); |
dd1b3d53 MB |
354 | int snd_soc_update_bits_locked(struct snd_soc_codec *codec, |
355 | unsigned short reg, unsigned int mask, | |
356 | unsigned int value); | |
808db4a4 | 357 | int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg, |
46f5822f | 358 | unsigned int mask, unsigned int value); |
808db4a4 RP |
359 | |
360 | int snd_soc_new_ac97_codec(struct snd_soc_codec *codec, | |
361 | struct snd_ac97_bus_ops *ops, int num); | |
362 | void snd_soc_free_ac97_codec(struct snd_soc_codec *codec); | |
363 | ||
364 | /* | |
365 | *Controls | |
366 | */ | |
367 | struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template, | |
efb7ac3f MB |
368 | void *data, char *long_name, |
369 | const char *prefix); | |
3e8e1952 IM |
370 | int snd_soc_add_controls(struct snd_soc_codec *codec, |
371 | const struct snd_kcontrol_new *controls, int num_controls); | |
a491a5c8 LG |
372 | int snd_soc_add_platform_controls(struct snd_soc_platform *platform, |
373 | const struct snd_kcontrol_new *controls, int num_controls); | |
808db4a4 RP |
374 | int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol, |
375 | struct snd_ctl_elem_info *uinfo); | |
376 | int snd_soc_info_enum_ext(struct snd_kcontrol *kcontrol, | |
377 | struct snd_ctl_elem_info *uinfo); | |
378 | int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol, | |
379 | struct snd_ctl_elem_value *ucontrol); | |
380 | int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol, | |
381 | struct snd_ctl_elem_value *ucontrol); | |
2e72f8e3 PU |
382 | int snd_soc_get_value_enum_double(struct snd_kcontrol *kcontrol, |
383 | struct snd_ctl_elem_value *ucontrol); | |
384 | int snd_soc_put_value_enum_double(struct snd_kcontrol *kcontrol, | |
385 | struct snd_ctl_elem_value *ucontrol); | |
808db4a4 RP |
386 | int snd_soc_info_volsw(struct snd_kcontrol *kcontrol, |
387 | struct snd_ctl_elem_info *uinfo); | |
388 | int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol, | |
389 | struct snd_ctl_elem_info *uinfo); | |
392abe9c | 390 | #define snd_soc_info_bool_ext snd_ctl_boolean_mono_info |
808db4a4 RP |
391 | int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, |
392 | struct snd_ctl_elem_value *ucontrol); | |
393 | int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, | |
394 | struct snd_ctl_elem_value *ucontrol); | |
395 | int snd_soc_info_volsw_2r(struct snd_kcontrol *kcontrol, | |
396 | struct snd_ctl_elem_info *uinfo); | |
397 | int snd_soc_get_volsw_2r(struct snd_kcontrol *kcontrol, | |
398 | struct snd_ctl_elem_value *ucontrol); | |
399 | int snd_soc_put_volsw_2r(struct snd_kcontrol *kcontrol, | |
400 | struct snd_ctl_elem_value *ucontrol); | |
e13ac2e9 MB |
401 | int snd_soc_info_volsw_s8(struct snd_kcontrol *kcontrol, |
402 | struct snd_ctl_elem_info *uinfo); | |
403 | int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol, | |
404 | struct snd_ctl_elem_value *ucontrol); | |
405 | int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol, | |
406 | struct snd_ctl_elem_value *ucontrol); | |
637d3847 PU |
407 | int snd_soc_limit_volume(struct snd_soc_codec *codec, |
408 | const char *name, int max); | |
b6f4bb38 | 409 | int snd_soc_info_volsw_2r_sx(struct snd_kcontrol *kcontrol, |
410 | struct snd_ctl_elem_info *uinfo); | |
411 | int snd_soc_get_volsw_2r_sx(struct snd_kcontrol *kcontrol, | |
412 | struct snd_ctl_elem_value *ucontrol); | |
413 | int snd_soc_put_volsw_2r_sx(struct snd_kcontrol *kcontrol, | |
414 | struct snd_ctl_elem_value *ucontrol); | |
808db4a4 | 415 | |
066d16c3 DP |
416 | /** |
417 | * struct snd_soc_reg_access - Describes whether a given register is | |
418 | * readable, writable or volatile. | |
419 | * | |
420 | * @reg: the register number | |
421 | * @read: whether this register is readable | |
422 | * @write: whether this register is writable | |
423 | * @vol: whether this register is volatile | |
424 | */ | |
425 | struct snd_soc_reg_access { | |
426 | u16 reg; | |
427 | u16 read; | |
428 | u16 write; | |
429 | u16 vol; | |
430 | }; | |
431 | ||
8a2cd618 MB |
432 | /** |
433 | * struct snd_soc_jack_pin - Describes a pin to update based on jack detection | |
434 | * | |
435 | * @pin: name of the pin to update | |
436 | * @mask: bits to check for in reported jack status | |
437 | * @invert: if non-zero then pin is enabled when status is not reported | |
438 | */ | |
439 | struct snd_soc_jack_pin { | |
440 | struct list_head list; | |
441 | const char *pin; | |
442 | int mask; | |
443 | bool invert; | |
444 | }; | |
445 | ||
fa9879ed VK |
446 | /** |
447 | * struct snd_soc_jack_zone - Describes voltage zones of jack detection | |
448 | * | |
449 | * @min_mv: start voltage in mv | |
450 | * @max_mv: end voltage in mv | |
451 | * @jack_type: type of jack that is expected for this voltage | |
452 | * @debounce_time: debounce_time for jack, codec driver should wait for this | |
453 | * duration before reading the adc for voltages | |
454 | * @:list: list container | |
455 | */ | |
456 | struct snd_soc_jack_zone { | |
457 | unsigned int min_mv; | |
458 | unsigned int max_mv; | |
459 | unsigned int jack_type; | |
460 | unsigned int debounce_time; | |
461 | struct list_head list; | |
462 | }; | |
463 | ||
ec67624d LCM |
464 | /** |
465 | * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection | |
466 | * | |
467 | * @gpio: gpio number | |
468 | * @name: gpio name | |
469 | * @report: value to report when jack detected | |
470 | * @invert: report presence in low state | |
471 | * @debouce_time: debouce time in ms | |
7887ab3a | 472 | * @wake: enable as wake source |
fadddc87 MB |
473 | * @jack_status_check: callback function which overrides the detection |
474 | * to provide more complex checks (eg, reading an | |
475 | * ADC). | |
ec67624d LCM |
476 | */ |
477 | #ifdef CONFIG_GPIOLIB | |
478 | struct snd_soc_jack_gpio { | |
479 | unsigned int gpio; | |
480 | const char *name; | |
481 | int report; | |
482 | int invert; | |
483 | int debounce_time; | |
7887ab3a MB |
484 | bool wake; |
485 | ||
ec67624d | 486 | struct snd_soc_jack *jack; |
4c14d78e | 487 | struct delayed_work work; |
c871a053 JS |
488 | |
489 | int (*jack_status_check)(void); | |
ec67624d LCM |
490 | }; |
491 | #endif | |
492 | ||
8a2cd618 MB |
493 | struct snd_soc_jack { |
494 | struct snd_jack *jack; | |
f0fba2ad | 495 | struct snd_soc_codec *codec; |
8a2cd618 MB |
496 | struct list_head pins; |
497 | int status; | |
d5021ec9 | 498 | struct blocking_notifier_head notifier; |
fa9879ed | 499 | struct list_head jack_zones; |
8a2cd618 MB |
500 | }; |
501 | ||
808db4a4 RP |
502 | /* SoC PCM stream information */ |
503 | struct snd_soc_pcm_stream { | |
f0fba2ad | 504 | const char *stream_name; |
1c433fbd GG |
505 | u64 formats; /* SNDRV_PCM_FMTBIT_* */ |
506 | unsigned int rates; /* SNDRV_PCM_RATE_* */ | |
808db4a4 RP |
507 | unsigned int rate_min; /* min rate */ |
508 | unsigned int rate_max; /* max rate */ | |
509 | unsigned int channels_min; /* min channels */ | |
510 | unsigned int channels_max; /* max channels */ | |
808db4a4 RP |
511 | }; |
512 | ||
513 | /* SoC audio ops */ | |
514 | struct snd_soc_ops { | |
515 | int (*startup)(struct snd_pcm_substream *); | |
516 | void (*shutdown)(struct snd_pcm_substream *); | |
517 | int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *); | |
518 | int (*hw_free)(struct snd_pcm_substream *); | |
519 | int (*prepare)(struct snd_pcm_substream *); | |
520 | int (*trigger)(struct snd_pcm_substream *, int); | |
521 | }; | |
522 | ||
7a30a3db DP |
523 | /* SoC cache ops */ |
524 | struct snd_soc_cache_ops { | |
0d735eaa | 525 | const char *name; |
7a30a3db DP |
526 | enum snd_soc_compress_type id; |
527 | int (*init)(struct snd_soc_codec *codec); | |
528 | int (*exit)(struct snd_soc_codec *codec); | |
529 | int (*read)(struct snd_soc_codec *codec, unsigned int reg, | |
530 | unsigned int *value); | |
531 | int (*write)(struct snd_soc_codec *codec, unsigned int reg, | |
532 | unsigned int value); | |
533 | int (*sync)(struct snd_soc_codec *codec); | |
534 | }; | |
535 | ||
f0fba2ad | 536 | /* SoC Audio Codec device */ |
808db4a4 | 537 | struct snd_soc_codec { |
f0fba2ad | 538 | const char *name; |
ead9b919 | 539 | const char *name_prefix; |
f0fba2ad | 540 | int id; |
0d0cf00a | 541 | struct device *dev; |
001ae4c0 | 542 | const struct snd_soc_codec_driver *driver; |
0d0cf00a | 543 | |
f0fba2ad LG |
544 | struct mutex mutex; |
545 | struct snd_soc_card *card; | |
0d0cf00a | 546 | struct list_head list; |
f0fba2ad LG |
547 | struct list_head card_list; |
548 | int num_dai; | |
23bbce34 | 549 | enum snd_soc_compress_type compress_type; |
aea170a0 | 550 | size_t reg_size; /* reg_cache_size * reg_word_size */ |
1500b7b5 DP |
551 | int (*volatile_register)(struct snd_soc_codec *, unsigned int); |
552 | int (*readable_register)(struct snd_soc_codec *, unsigned int); | |
8020454c | 553 | int (*writable_register)(struct snd_soc_codec *, unsigned int); |
808db4a4 RP |
554 | |
555 | /* runtime */ | |
808db4a4 RP |
556 | struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */ |
557 | unsigned int active; | |
dad8e7ae | 558 | unsigned int cache_bypass:1; /* Suppress access to the cache */ |
f0fba2ad LG |
559 | unsigned int suspended:1; /* Codec is in suspend PM state */ |
560 | unsigned int probed:1; /* Codec has been probed */ | |
561 | unsigned int ac97_registered:1; /* Codec has been AC97 registered */ | |
0562f788 | 562 | unsigned int ac97_created:1; /* Codec has been created by SoC */ |
f0fba2ad | 563 | unsigned int sysfs_registered:1; /* codec has been sysfs registered */ |
fdf0f54d | 564 | unsigned int cache_init:1; /* codec cache has been initialized */ |
aaee8ef1 MB |
565 | u32 cache_only; /* Suppress writes to hardware */ |
566 | u32 cache_sync; /* Cache needs to be synced to hardware */ | |
808db4a4 RP |
567 | |
568 | /* codec IO */ | |
569 | void *control_data; /* codec control (i2c/3wire) data */ | |
67850a89 | 570 | enum snd_soc_control_type control_type; |
808db4a4 | 571 | hw_write_t hw_write; |
afa2f106 | 572 | unsigned int (*hw_read)(struct snd_soc_codec *, unsigned int); |
c3acec26 MB |
573 | unsigned int (*read)(struct snd_soc_codec *, unsigned int); |
574 | int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); | |
5fb609d4 | 575 | int (*bulk_write_raw)(struct snd_soc_codec *, unsigned int, const void *, size_t); |
808db4a4 | 576 | void *reg_cache; |
3335ddca | 577 | const void *reg_def_copy; |
7a30a3db DP |
578 | const struct snd_soc_cache_ops *cache_ops; |
579 | struct mutex cache_rw_mutex; | |
be3ea3b9 | 580 | int val_bytes; |
a96ca338 | 581 | |
808db4a4 | 582 | /* dapm */ |
ce6120cc | 583 | struct snd_soc_dapm_context dapm; |
808db4a4 | 584 | |
384c89e2 | 585 | #ifdef CONFIG_DEBUG_FS |
88439ac7 | 586 | struct dentry *debugfs_codec_root; |
384c89e2 | 587 | struct dentry *debugfs_reg; |
79fb9387 | 588 | struct dentry *debugfs_dapm; |
384c89e2 | 589 | #endif |
808db4a4 RP |
590 | }; |
591 | ||
f0fba2ad LG |
592 | /* codec driver */ |
593 | struct snd_soc_codec_driver { | |
594 | ||
595 | /* driver ops */ | |
596 | int (*probe)(struct snd_soc_codec *); | |
597 | int (*remove)(struct snd_soc_codec *); | |
598 | int (*suspend)(struct snd_soc_codec *, | |
599 | pm_message_t state); | |
600 | int (*resume)(struct snd_soc_codec *); | |
601 | ||
b7af1daf MB |
602 | /* Default control and setup, added after probe() is run */ |
603 | const struct snd_kcontrol_new *controls; | |
604 | int num_controls; | |
89b95ac0 MB |
605 | const struct snd_soc_dapm_widget *dapm_widgets; |
606 | int num_dapm_widgets; | |
607 | const struct snd_soc_dapm_route *dapm_routes; | |
608 | int num_dapm_routes; | |
609 | ||
ec4ee52a MB |
610 | /* codec wide operations */ |
611 | int (*set_sysclk)(struct snd_soc_codec *codec, | |
da1c6ea6 | 612 | int clk_id, int source, unsigned int freq, int dir); |
ec4ee52a MB |
613 | int (*set_pll)(struct snd_soc_codec *codec, int pll_id, int source, |
614 | unsigned int freq_in, unsigned int freq_out); | |
615 | ||
f0fba2ad LG |
616 | /* codec IO */ |
617 | unsigned int (*read)(struct snd_soc_codec *, unsigned int); | |
618 | int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); | |
619 | int (*display_register)(struct snd_soc_codec *, char *, | |
620 | size_t, unsigned int); | |
d4754ec9 DP |
621 | int (*volatile_register)(struct snd_soc_codec *, unsigned int); |
622 | int (*readable_register)(struct snd_soc_codec *, unsigned int); | |
8020454c | 623 | int (*writable_register)(struct snd_soc_codec *, unsigned int); |
4a8923ba | 624 | unsigned int reg_cache_size; |
f0fba2ad LG |
625 | short reg_cache_step; |
626 | short reg_word_size; | |
627 | const void *reg_cache_default; | |
066d16c3 DP |
628 | short reg_access_size; |
629 | const struct snd_soc_reg_access *reg_access_default; | |
7a30a3db | 630 | enum snd_soc_compress_type compress_type; |
f0fba2ad LG |
631 | |
632 | /* codec bias level */ | |
633 | int (*set_bias_level)(struct snd_soc_codec *, | |
634 | enum snd_soc_bias_level level); | |
33c5f969 | 635 | bool idle_bias_off; |
474b62d6 MB |
636 | |
637 | void (*seq_notifier)(struct snd_soc_dapm_context *, | |
f85a9e0d | 638 | enum snd_soc_dapm_type, int); |
0168bf0d | 639 | |
64a648c2 LG |
640 | /* codec stream completion event */ |
641 | int (*stream_event)(struct snd_soc_dapm_context *dapm, int event); | |
642 | ||
0168bf0d LG |
643 | /* probe ordering - for components with runtime dependencies */ |
644 | int probe_order; | |
645 | int remove_order; | |
808db4a4 RP |
646 | }; |
647 | ||
648 | /* SoC platform interface */ | |
f0fba2ad | 649 | struct snd_soc_platform_driver { |
808db4a4 | 650 | |
f0fba2ad LG |
651 | int (*probe)(struct snd_soc_platform *); |
652 | int (*remove)(struct snd_soc_platform *); | |
653 | int (*suspend)(struct snd_soc_dai *dai); | |
654 | int (*resume)(struct snd_soc_dai *dai); | |
808db4a4 RP |
655 | |
656 | /* pcm creation and destruction */ | |
552d1ef6 | 657 | int (*pcm_new)(struct snd_soc_pcm_runtime *); |
808db4a4 RP |
658 | void (*pcm_free)(struct snd_pcm *); |
659 | ||
cb2cf612 LG |
660 | /* Default control and setup, added after probe() is run */ |
661 | const struct snd_kcontrol_new *controls; | |
662 | int num_controls; | |
663 | const struct snd_soc_dapm_widget *dapm_widgets; | |
664 | int num_dapm_widgets; | |
665 | const struct snd_soc_dapm_route *dapm_routes; | |
666 | int num_dapm_routes; | |
667 | ||
258020d0 PU |
668 | /* |
669 | * For platform caused delay reporting. | |
670 | * Optional. | |
671 | */ | |
672 | snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *, | |
673 | struct snd_soc_dai *); | |
674 | ||
808db4a4 | 675 | /* platform stream ops */ |
f0fba2ad | 676 | struct snd_pcm_ops *ops; |
0168bf0d | 677 | |
64a648c2 LG |
678 | /* platform stream completion event */ |
679 | int (*stream_event)(struct snd_soc_dapm_context *dapm, int event); | |
680 | ||
0168bf0d LG |
681 | /* probe ordering - for components with runtime dependencies */ |
682 | int probe_order; | |
683 | int remove_order; | |
f1442bc1 LG |
684 | |
685 | /* platform IO - used for platform DAPM */ | |
686 | unsigned int (*read)(struct snd_soc_platform *, unsigned int); | |
687 | int (*write)(struct snd_soc_platform *, unsigned int, unsigned int); | |
808db4a4 RP |
688 | }; |
689 | ||
f0fba2ad LG |
690 | struct snd_soc_platform { |
691 | const char *name; | |
692 | int id; | |
693 | struct device *dev; | |
694 | struct snd_soc_platform_driver *driver; | |
808db4a4 | 695 | |
f0fba2ad LG |
696 | unsigned int suspended:1; /* platform is suspended */ |
697 | unsigned int probed:1; | |
1c433fbd | 698 | |
f0fba2ad LG |
699 | struct snd_soc_card *card; |
700 | struct list_head list; | |
701 | struct list_head card_list; | |
b7950641 LG |
702 | |
703 | struct snd_soc_dapm_context dapm; | |
f0fba2ad | 704 | }; |
808db4a4 | 705 | |
f0fba2ad LG |
706 | struct snd_soc_dai_link { |
707 | /* config - must be set by machine driver */ | |
708 | const char *name; /* Codec name */ | |
709 | const char *stream_name; /* Stream name */ | |
710 | const char *codec_name; /* for multi-codec */ | |
711 | const char *platform_name; /* for multi-platform */ | |
712 | const char *cpu_dai_name; | |
713 | const char *codec_dai_name; | |
4ccab3e7 | 714 | |
75d9ac46 MB |
715 | unsigned int dai_fmt; /* format to set on init */ |
716 | ||
3efab7dc MB |
717 | /* Keep DAI active over suspend */ |
718 | unsigned int ignore_suspend:1; | |
719 | ||
06f409d7 MB |
720 | /* Symmetry requirements */ |
721 | unsigned int symmetric_rates:1; | |
722 | ||
f0fba2ad LG |
723 | /* codec/machine specific init - e.g. add machine controls */ |
724 | int (*init)(struct snd_soc_pcm_runtime *rtd); | |
06f409d7 | 725 | |
f0fba2ad LG |
726 | /* machine stream operations */ |
727 | struct snd_soc_ops *ops; | |
808db4a4 RP |
728 | }; |
729 | ||
ff819b83 | 730 | struct snd_soc_codec_conf { |
ead9b919 | 731 | const char *dev_name; |
ff819b83 DP |
732 | |
733 | /* | |
734 | * optional map of kcontrol, widget and path name prefixes that are | |
735 | * associated per device | |
736 | */ | |
ead9b919 | 737 | const char *name_prefix; |
ff819b83 DP |
738 | |
739 | /* | |
740 | * set this to the desired compression type if you want to | |
741 | * override the one supplied in codec->driver->compress_type | |
742 | */ | |
743 | enum snd_soc_compress_type compress_type; | |
ead9b919 JN |
744 | }; |
745 | ||
2eea392d JN |
746 | struct snd_soc_aux_dev { |
747 | const char *name; /* Codec name */ | |
748 | const char *codec_name; /* for multi-codec */ | |
749 | ||
750 | /* codec/machine specific init - e.g. add machine controls */ | |
751 | int (*init)(struct snd_soc_dapm_context *dapm); | |
752 | }; | |
753 | ||
87506549 MB |
754 | /* SoC card */ |
755 | struct snd_soc_card { | |
f0fba2ad | 756 | const char *name; |
22de71ba LG |
757 | const char *long_name; |
758 | const char *driver_name; | |
c5af3a2e | 759 | struct device *dev; |
f0fba2ad LG |
760 | struct snd_card *snd_card; |
761 | struct module *owner; | |
c5af3a2e MB |
762 | |
763 | struct list_head list; | |
f0fba2ad | 764 | struct mutex mutex; |
c5af3a2e | 765 | |
f0fba2ad | 766 | bool instantiated; |
808db4a4 | 767 | |
e7361ec4 | 768 | int (*probe)(struct snd_soc_card *card); |
28e9ad92 | 769 | int (*late_probe)(struct snd_soc_card *card); |
e7361ec4 | 770 | int (*remove)(struct snd_soc_card *card); |
808db4a4 RP |
771 | |
772 | /* the pre and post PM functions are used to do any PM work before and | |
773 | * after the codec and DAI's do any PM work. */ | |
70b2ac12 MB |
774 | int (*suspend_pre)(struct snd_soc_card *card); |
775 | int (*suspend_post)(struct snd_soc_card *card); | |
776 | int (*resume_pre)(struct snd_soc_card *card); | |
777 | int (*resume_post)(struct snd_soc_card *card); | |
808db4a4 | 778 | |
0b4d221b | 779 | /* callbacks */ |
87506549 | 780 | int (*set_bias_level)(struct snd_soc_card *, |
d4c6005f | 781 | struct snd_soc_dapm_context *dapm, |
0be9898a | 782 | enum snd_soc_bias_level level); |
1badabd9 | 783 | int (*set_bias_level_post)(struct snd_soc_card *, |
d4c6005f | 784 | struct snd_soc_dapm_context *dapm, |
1badabd9 | 785 | enum snd_soc_bias_level level); |
0b4d221b | 786 | |
6c5f1fed | 787 | long pmdown_time; |
96dd3622 | 788 | |
808db4a4 RP |
789 | /* CPU <--> Codec DAI links */ |
790 | struct snd_soc_dai_link *dai_link; | |
791 | int num_links; | |
f0fba2ad LG |
792 | struct snd_soc_pcm_runtime *rtd; |
793 | int num_rtd; | |
6308419a | 794 | |
ff819b83 DP |
795 | /* optional codec specific configuration */ |
796 | struct snd_soc_codec_conf *codec_conf; | |
797 | int num_configs; | |
ead9b919 | 798 | |
2eea392d JN |
799 | /* |
800 | * optional auxiliary devices such as amplifiers or codecs with DAI | |
801 | * link unused | |
802 | */ | |
803 | struct snd_soc_aux_dev *aux_dev; | |
804 | int num_aux_devs; | |
805 | struct snd_soc_pcm_runtime *rtd_aux; | |
806 | int num_aux_rtd; | |
807 | ||
b7af1daf MB |
808 | const struct snd_kcontrol_new *controls; |
809 | int num_controls; | |
810 | ||
b8ad29de MB |
811 | /* |
812 | * Card-specific routes and widgets. | |
813 | */ | |
d06e48db | 814 | const struct snd_soc_dapm_widget *dapm_widgets; |
b8ad29de | 815 | int num_dapm_widgets; |
d06e48db | 816 | const struct snd_soc_dapm_route *dapm_routes; |
b8ad29de MB |
817 | int num_dapm_routes; |
818 | ||
6308419a | 819 | struct work_struct deferred_resume_work; |
f0fba2ad LG |
820 | |
821 | /* lists of probed devices belonging to this card */ | |
822 | struct list_head codec_dev_list; | |
823 | struct list_head platform_dev_list; | |
824 | struct list_head dai_dev_list; | |
a6052154 | 825 | |
97c866de | 826 | struct list_head widgets; |
8ddab3f5 | 827 | struct list_head paths; |
7be31be8 | 828 | struct list_head dapm_list; |
db432b41 | 829 | struct list_head dapm_dirty; |
8ddab3f5 | 830 | |
e37a4970 MB |
831 | /* Generic DAPM context for the card */ |
832 | struct snd_soc_dapm_context dapm; | |
de02d078 | 833 | struct snd_soc_dapm_stats dapm_stats; |
e37a4970 | 834 | |
a6052154 JN |
835 | #ifdef CONFIG_DEBUG_FS |
836 | struct dentry *debugfs_card_root; | |
3a45b867 | 837 | struct dentry *debugfs_pop_time; |
a6052154 | 838 | #endif |
3a45b867 | 839 | u32 pop_time; |
dddf3e4c MB |
840 | |
841 | void *drvdata; | |
808db4a4 RP |
842 | }; |
843 | ||
f0fba2ad LG |
844 | /* SoC machine DAI configuration, glues a codec and cpu DAI together */ |
845 | struct snd_soc_pcm_runtime { | |
846 | struct device dev; | |
87506549 | 847 | struct snd_soc_card *card; |
f0fba2ad | 848 | struct snd_soc_dai_link *dai_link; |
b8c0dab9 LG |
849 | struct mutex pcm_mutex; |
850 | enum snd_soc_pcm_subclass pcm_subclass; | |
851 | struct snd_pcm_ops ops; | |
f0fba2ad LG |
852 | |
853 | unsigned int complete:1; | |
854 | unsigned int dev_registered:1; | |
808db4a4 | 855 | |
f0fba2ad LG |
856 | long pmdown_time; |
857 | ||
858 | /* runtime devices */ | |
859 | struct snd_pcm *pcm; | |
860 | struct snd_soc_codec *codec; | |
861 | struct snd_soc_platform *platform; | |
862 | struct snd_soc_dai *codec_dai; | |
863 | struct snd_soc_dai *cpu_dai; | |
864 | ||
865 | struct delayed_work delayed_work; | |
808db4a4 RP |
866 | }; |
867 | ||
4eaa9819 JS |
868 | /* mixer control */ |
869 | struct soc_mixer_control { | |
d11bb4a9 | 870 | int min, max, platform_max; |
815ecf8d | 871 | unsigned int reg, rreg, shift, rshift, invert; |
4eaa9819 JS |
872 | }; |
873 | ||
808db4a4 RP |
874 | /* enumerated kcontrol */ |
875 | struct soc_enum { | |
2e72f8e3 PU |
876 | unsigned short reg; |
877 | unsigned short reg2; | |
878 | unsigned char shift_l; | |
879 | unsigned char shift_r; | |
880 | unsigned int max; | |
881 | unsigned int mask; | |
87023ff7 | 882 | const char * const *texts; |
2e72f8e3 PU |
883 | const unsigned int *values; |
884 | void *dapm; | |
885 | }; | |
886 | ||
5c82f567 | 887 | /* codec IO */ |
c3753707 MB |
888 | unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg); |
889 | unsigned int snd_soc_write(struct snd_soc_codec *codec, | |
890 | unsigned int reg, unsigned int val); | |
5fb609d4 DP |
891 | unsigned int snd_soc_bulk_write_raw(struct snd_soc_codec *codec, |
892 | unsigned int reg, const void *data, size_t len); | |
5c82f567 | 893 | |
f0fba2ad LG |
894 | /* device driver data */ |
895 | ||
dddf3e4c MB |
896 | static inline void snd_soc_card_set_drvdata(struct snd_soc_card *card, |
897 | void *data) | |
898 | { | |
899 | card->drvdata = data; | |
900 | } | |
901 | ||
902 | static inline void *snd_soc_card_get_drvdata(struct snd_soc_card *card) | |
903 | { | |
904 | return card->drvdata; | |
905 | } | |
906 | ||
b2c812e2 | 907 | static inline void snd_soc_codec_set_drvdata(struct snd_soc_codec *codec, |
f0fba2ad | 908 | void *data) |
b2c812e2 | 909 | { |
f0fba2ad | 910 | dev_set_drvdata(codec->dev, data); |
b2c812e2 MB |
911 | } |
912 | ||
913 | static inline void *snd_soc_codec_get_drvdata(struct snd_soc_codec *codec) | |
914 | { | |
f0fba2ad LG |
915 | return dev_get_drvdata(codec->dev); |
916 | } | |
917 | ||
918 | static inline void snd_soc_platform_set_drvdata(struct snd_soc_platform *platform, | |
919 | void *data) | |
920 | { | |
921 | dev_set_drvdata(platform->dev, data); | |
922 | } | |
923 | ||
924 | static inline void *snd_soc_platform_get_drvdata(struct snd_soc_platform *platform) | |
925 | { | |
926 | return dev_get_drvdata(platform->dev); | |
927 | } | |
928 | ||
929 | static inline void snd_soc_pcm_set_drvdata(struct snd_soc_pcm_runtime *rtd, | |
930 | void *data) | |
931 | { | |
932 | dev_set_drvdata(&rtd->dev, data); | |
933 | } | |
934 | ||
935 | static inline void *snd_soc_pcm_get_drvdata(struct snd_soc_pcm_runtime *rtd) | |
936 | { | |
937 | return dev_get_drvdata(&rtd->dev); | |
b2c812e2 MB |
938 | } |
939 | ||
4e10bda0 VK |
940 | static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card) |
941 | { | |
942 | INIT_LIST_HEAD(&card->dai_dev_list); | |
943 | INIT_LIST_HEAD(&card->codec_dev_list); | |
944 | INIT_LIST_HEAD(&card->platform_dev_list); | |
945 | INIT_LIST_HEAD(&card->widgets); | |
946 | INIT_LIST_HEAD(&card->paths); | |
947 | INIT_LIST_HEAD(&card->dapm_list); | |
948 | } | |
949 | ||
fb257897 MB |
950 | int snd_soc_util_init(void); |
951 | void snd_soc_util_exit(void); | |
952 | ||
a47cbe72 MB |
953 | #include <sound/soc-dai.h> |
954 | ||
faff4bb0 | 955 | #ifdef CONFIG_DEBUG_FS |
8a9dab1a | 956 | extern struct dentry *snd_soc_debugfs_root; |
faff4bb0 SW |
957 | #endif |
958 | ||
6f8ab4ac MB |
959 | extern const struct dev_pm_ops snd_soc_pm_ops; |
960 | ||
808db4a4 | 961 | #endif |