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808db4a4 RP |
1 | /* |
2 | * linux/sound/soc.h -- ALSA SoC Layer | |
3 | * | |
4 | * Author: Liam Girdwood | |
5 | * Created: Aug 11th 2005 | |
6 | * Copyright: Wolfson Microelectronics. PLC. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #ifndef __LINUX_SND_SOC_H | |
14 | #define __LINUX_SND_SOC_H | |
15 | ||
16 | #include <linux/platform_device.h> | |
17 | #include <linux/types.h> | |
4484bb2e | 18 | #include <linux/workqueue.h> |
808db4a4 RP |
19 | #include <sound/core.h> |
20 | #include <sound/pcm.h> | |
21 | #include <sound/control.h> | |
22 | #include <sound/ac97_codec.h> | |
23 | ||
808db4a4 RP |
24 | /* |
25 | * Convenience kcontrol builders | |
26 | */ | |
4eaa9819 JS |
27 | #define SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) \ |
28 | ((unsigned long)&(struct soc_mixer_control) \ | |
762b8df7 MB |
29 | {.reg = xreg, .shift = xshift, .rshift = xshift, .max = xmax, \ |
30 | .invert = xinvert}) | |
4eaa9819 JS |
31 | #define SOC_SINGLE_VALUE_EXT(xreg, xmax, xinvert) \ |
32 | ((unsigned long)&(struct soc_mixer_control) \ | |
33 | {.reg = xreg, .max = xmax, .invert = xinvert}) | |
a7a4ac86 | 34 | #define SOC_SINGLE(xname, reg, shift, max, invert) \ |
808db4a4 RP |
35 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ |
36 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\ | |
37 | .put = snd_soc_put_volsw, \ | |
a7a4ac86 PZ |
38 | .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } |
39 | #define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \ | |
40 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
41 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
42 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
43 | .tlv.p = (tlv_array), \ | |
44 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\ | |
45 | .put = snd_soc_put_volsw, \ | |
46 | .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } | |
4eaa9819 | 47 | #define SOC_DOUBLE(xname, xreg, shift_left, shift_right, xmax, xinvert) \ |
808db4a4 RP |
48 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ |
49 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \ | |
50 | .put = snd_soc_put_volsw, \ | |
4eaa9819 JS |
51 | .private_value = (unsigned long)&(struct soc_mixer_control) \ |
52 | {.reg = xreg, .shift = shift_left, .rshift = shift_right, \ | |
53 | .max = xmax, .invert = xinvert} } | |
54 | #define SOC_DOUBLE_R(xname, reg_left, reg_right, xshift, xmax, xinvert) \ | |
808db4a4 RP |
55 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ |
56 | .info = snd_soc_info_volsw_2r, \ | |
57 | .get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \ | |
4eaa9819 JS |
58 | .private_value = (unsigned long)&(struct soc_mixer_control) \ |
59 | {.reg = reg_left, .rreg = reg_right, .shift = xshift, \ | |
60 | .max = xmax, .invert = xinvert} } | |
61 | #define SOC_DOUBLE_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert, tlv_array) \ | |
a7a4ac86 PZ |
62 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ |
63 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
64 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
65 | .tlv.p = (tlv_array), \ | |
66 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \ | |
67 | .put = snd_soc_put_volsw, \ | |
4eaa9819 JS |
68 | .private_value = (unsigned long)&(struct soc_mixer_control) \ |
69 | {.reg = xreg, .shift = shift_left, .rshift = shift_right,\ | |
70 | .max = xmax, .invert = xinvert} } | |
71 | #define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert, tlv_array) \ | |
a7a4ac86 PZ |
72 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ |
73 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
74 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
75 | .tlv.p = (tlv_array), \ | |
76 | .info = snd_soc_info_volsw_2r, \ | |
77 | .get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \ | |
4eaa9819 JS |
78 | .private_value = (unsigned long)&(struct soc_mixer_control) \ |
79 | {.reg = reg_left, .rreg = reg_right, .shift = xshift, \ | |
80 | .max = xmax, .invert = xinvert} } | |
81 | #define SOC_DOUBLE_S8_TLV(xname, xreg, xmin, xmax, tlv_array) \ | |
e13ac2e9 MB |
82 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ |
83 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ | |
84 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ | |
85 | .tlv.p = (tlv_array), \ | |
86 | .info = snd_soc_info_volsw_s8, .get = snd_soc_get_volsw_s8, \ | |
87 | .put = snd_soc_put_volsw_s8, \ | |
4eaa9819 JS |
88 | .private_value = (unsigned long)&(struct soc_mixer_control) \ |
89 | {.reg = xreg, .min = xmin, .max = xmax} } | |
f8ba0b7b | 90 | #define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmax, xtexts) \ |
808db4a4 | 91 | { .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \ |
f8ba0b7b JS |
92 | .max = xmax, .texts = xtexts } |
93 | #define SOC_ENUM_SINGLE(xreg, xshift, xmax, xtexts) \ | |
94 | SOC_ENUM_DOUBLE(xreg, xshift, xshift, xmax, xtexts) | |
95 | #define SOC_ENUM_SINGLE_EXT(xmax, xtexts) \ | |
96 | { .max = xmax, .texts = xtexts } | |
808db4a4 RP |
97 | #define SOC_ENUM(xname, xenum) \ |
98 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\ | |
99 | .info = snd_soc_info_enum_double, \ | |
100 | .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \ | |
101 | .private_value = (unsigned long)&xenum } | |
f8ba0b7b | 102 | #define SOC_SINGLE_EXT(xname, xreg, xshift, xmax, xinvert,\ |
808db4a4 RP |
103 | xhandler_get, xhandler_put) \ |
104 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
1c433fbd | 105 | .info = snd_soc_info_volsw, \ |
808db4a4 | 106 | .get = xhandler_get, .put = xhandler_put, \ |
f8ba0b7b JS |
107 | .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) } |
108 | #define SOC_SINGLE_EXT_TLV(xname, xreg, xshift, xmax, xinvert,\ | |
10144c09 MM |
109 | xhandler_get, xhandler_put, tlv_array) \ |
110 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
111 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
112 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
113 | .tlv.p = (tlv_array), \ | |
114 | .info = snd_soc_info_volsw, \ | |
115 | .get = xhandler_get, .put = xhandler_put, \ | |
f8ba0b7b | 116 | .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) } |
808db4a4 RP |
117 | #define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \ |
118 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
119 | .info = snd_soc_info_bool_ext, \ | |
120 | .get = xhandler_get, .put = xhandler_put, \ | |
121 | .private_value = xdata } | |
122 | #define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \ | |
123 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
124 | .info = snd_soc_info_enum_ext, \ | |
125 | .get = xhandler_get, .put = xhandler_put, \ | |
126 | .private_value = (unsigned long)&xenum } | |
127 | ||
0be9898a MB |
128 | /* |
129 | * Bias levels | |
130 | * | |
131 | * @ON: Bias is fully on for audio playback and capture operations. | |
132 | * @PREPARE: Prepare for audio operations. Called before DAPM switching for | |
133 | * stream start and stop operations. | |
134 | * @STANDBY: Low power standby state when no playback/capture operations are | |
135 | * in progress. NOTE: The transition time between STANDBY and ON | |
136 | * should be as fast as possible and no longer than 10ms. | |
137 | * @OFF: Power Off. No restrictions on transition times. | |
138 | */ | |
139 | enum snd_soc_bias_level { | |
140 | SND_SOC_BIAS_ON, | |
141 | SND_SOC_BIAS_PREPARE, | |
142 | SND_SOC_BIAS_STANDBY, | |
143 | SND_SOC_BIAS_OFF, | |
144 | }; | |
145 | ||
808db4a4 RP |
146 | /* |
147 | * Digital Audio Interface (DAI) types | |
148 | */ | |
149 | #define SND_SOC_DAI_AC97 0x1 | |
150 | #define SND_SOC_DAI_I2S 0x2 | |
151 | #define SND_SOC_DAI_PCM 0x4 | |
a68660e0 | 152 | #define SND_SOC_DAI_AC97_BUS 0x8 /* for custom i.e. non ac97_codec.c */ |
808db4a4 RP |
153 | |
154 | /* | |
155 | * DAI hardware audio formats | |
156 | */ | |
1c433fbd GG |
157 | #define SND_SOC_DAIFMT_I2S 0 /* I2S mode */ |
158 | #define SND_SOC_DAIFMT_RIGHT_J 1 /* Right justified mode */ | |
159 | #define SND_SOC_DAIFMT_LEFT_J 2 /* Left Justified mode */ | |
160 | #define SND_SOC_DAIFMT_DSP_A 3 /* L data msb after FRM or LRC */ | |
161 | #define SND_SOC_DAIFMT_DSP_B 4 /* L data msb during FRM or LRC */ | |
162 | #define SND_SOC_DAIFMT_AC97 5 /* AC97 */ | |
163 | ||
164 | #define SND_SOC_DAIFMT_MSB SND_SOC_DAIFMT_LEFT_J | |
165 | #define SND_SOC_DAIFMT_LSB SND_SOC_DAIFMT_RIGHT_J | |
166 | ||
167 | /* | |
168 | * DAI Gating | |
169 | */ | |
170 | #define SND_SOC_DAIFMT_CONT (0 << 4) /* continuous clock */ | |
171 | #define SND_SOC_DAIFMT_GATED (1 << 4) /* clock is gated when not Tx/Rx */ | |
808db4a4 | 172 | |
a7a4ac86 PZ |
173 | /* |
174 | * DAI Sync | |
175 | * Synchronous LR (Left Right) clocks and Frame signals. | |
176 | */ | |
177 | #define SND_SOC_DAIFMT_SYNC (0 << 5) /* Tx FRM = Rx FRM */ | |
178 | #define SND_SOC_DAIFMT_ASYNC (1 << 5) /* Tx FRM ~ Rx FRM */ | |
179 | ||
180 | /* | |
181 | * TDM | |
182 | */ | |
183 | #define SND_SOC_DAIFMT_TDM (1 << 6) | |
184 | ||
808db4a4 RP |
185 | /* |
186 | * DAI hardware signal inversions | |
187 | */ | |
a7a4ac86 | 188 | #define SND_SOC_DAIFMT_NB_NF (0 << 8) /* normal bclk + frm */ |
1c433fbd GG |
189 | #define SND_SOC_DAIFMT_NB_IF (1 << 8) /* normal bclk + inv frm */ |
190 | #define SND_SOC_DAIFMT_IB_NF (2 << 8) /* invert bclk + nor frm */ | |
191 | #define SND_SOC_DAIFMT_IB_IF (3 << 8) /* invert bclk + frm */ | |
808db4a4 RP |
192 | |
193 | /* | |
194 | * DAI hardware clock masters | |
195 | * This is wrt the codec, the inverse is true for the interface | |
196 | * i.e. if the codec is clk and frm master then the interface is | |
197 | * clk and frame slave. | |
198 | */ | |
1c433fbd GG |
199 | #define SND_SOC_DAIFMT_CBM_CFM (0 << 12) /* codec clk & frm master */ |
200 | #define SND_SOC_DAIFMT_CBS_CFM (1 << 12) /* codec clk slave & frm master */ | |
201 | #define SND_SOC_DAIFMT_CBM_CFS (2 << 12) /* codec clk master & frame slave */ | |
202 | #define SND_SOC_DAIFMT_CBS_CFS (3 << 12) /* codec clk & frm slave */ | |
808db4a4 | 203 | |
1c433fbd GG |
204 | #define SND_SOC_DAIFMT_FORMAT_MASK 0x000f |
205 | #define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0 | |
808db4a4 | 206 | #define SND_SOC_DAIFMT_INV_MASK 0x0f00 |
1c433fbd | 207 | #define SND_SOC_DAIFMT_MASTER_MASK 0xf000 |
808db4a4 | 208 | |
808db4a4 RP |
209 | |
210 | /* | |
1c433fbd | 211 | * Master Clock Directions |
808db4a4 | 212 | */ |
1c433fbd GG |
213 | #define SND_SOC_CLOCK_IN 0 |
214 | #define SND_SOC_CLOCK_OUT 1 | |
808db4a4 RP |
215 | |
216 | /* | |
217 | * AC97 codec ID's bitmask | |
218 | */ | |
219 | #define SND_SOC_DAI_AC97_ID0 (1 << 0) | |
220 | #define SND_SOC_DAI_AC97_ID1 (1 << 1) | |
221 | #define SND_SOC_DAI_AC97_ID2 (1 << 2) | |
222 | #define SND_SOC_DAI_AC97_ID3 (1 << 3) | |
223 | ||
224 | struct snd_soc_device; | |
225 | struct snd_soc_pcm_stream; | |
226 | struct snd_soc_ops; | |
227 | struct snd_soc_dai_mode; | |
228 | struct snd_soc_pcm_runtime; | |
3c4b266f | 229 | struct snd_soc_dai; |
808db4a4 | 230 | struct snd_soc_codec; |
808db4a4 RP |
231 | struct soc_enum; |
232 | struct snd_soc_ac97_ops; | |
233 | struct snd_soc_clock_info; | |
234 | ||
235 | typedef int (*hw_write_t)(void *,const char* ,int); | |
236 | typedef int (*hw_read_t)(void *,char* ,int); | |
237 | ||
238 | extern struct snd_ac97_bus_ops soc_ac97_ops; | |
239 | ||
240 | /* pcm <-> DAI connect */ | |
241 | void snd_soc_free_pcms(struct snd_soc_device *socdev); | |
242 | int snd_soc_new_pcms(struct snd_soc_device *socdev, int idx, const char *xid); | |
243 | int snd_soc_register_card(struct snd_soc_device *socdev); | |
244 | ||
245 | /* set runtime hw params */ | |
246 | int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream, | |
247 | const struct snd_pcm_hardware *hw); | |
808db4a4 RP |
248 | |
249 | /* codec IO */ | |
250 | #define snd_soc_read(codec, reg) codec->read(codec, reg) | |
251 | #define snd_soc_write(codec, reg, value) codec->write(codec, reg, value) | |
252 | ||
253 | /* codec register bit access */ | |
254 | int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg, | |
255 | unsigned short mask, unsigned short value); | |
256 | int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg, | |
257 | unsigned short mask, unsigned short value); | |
258 | ||
259 | int snd_soc_new_ac97_codec(struct snd_soc_codec *codec, | |
260 | struct snd_ac97_bus_ops *ops, int num); | |
261 | void snd_soc_free_ac97_codec(struct snd_soc_codec *codec); | |
262 | ||
8c6529db LG |
263 | /* Digital Audio Interface clocking API.*/ |
264 | int snd_soc_dai_set_sysclk(struct snd_soc_dai *dai, int clk_id, | |
265 | unsigned int freq, int dir); | |
266 | ||
267 | int snd_soc_dai_set_clkdiv(struct snd_soc_dai *dai, | |
268 | int div_id, int div); | |
269 | ||
270 | int snd_soc_dai_set_pll(struct snd_soc_dai *dai, | |
271 | int pll_id, unsigned int freq_in, unsigned int freq_out); | |
272 | ||
273 | /* Digital Audio interface formatting */ | |
274 | int snd_soc_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt); | |
275 | ||
276 | int snd_soc_dai_set_tdm_slot(struct snd_soc_dai *dai, | |
277 | unsigned int mask, int slots); | |
278 | ||
279 | int snd_soc_dai_set_tristate(struct snd_soc_dai *dai, int tristate); | |
280 | ||
281 | /* Digital Audio Interface mute */ | |
282 | int snd_soc_dai_digital_mute(struct snd_soc_dai *dai, int mute); | |
283 | ||
808db4a4 RP |
284 | /* |
285 | *Controls | |
286 | */ | |
287 | struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template, | |
288 | void *data, char *long_name); | |
289 | int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol, | |
290 | struct snd_ctl_elem_info *uinfo); | |
291 | int snd_soc_info_enum_ext(struct snd_kcontrol *kcontrol, | |
292 | struct snd_ctl_elem_info *uinfo); | |
293 | int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol, | |
294 | struct snd_ctl_elem_value *ucontrol); | |
295 | int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol, | |
296 | struct snd_ctl_elem_value *ucontrol); | |
297 | int snd_soc_info_volsw(struct snd_kcontrol *kcontrol, | |
298 | struct snd_ctl_elem_info *uinfo); | |
299 | int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol, | |
300 | struct snd_ctl_elem_info *uinfo); | |
392abe9c | 301 | #define snd_soc_info_bool_ext snd_ctl_boolean_mono_info |
808db4a4 RP |
302 | int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, |
303 | struct snd_ctl_elem_value *ucontrol); | |
304 | int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, | |
305 | struct snd_ctl_elem_value *ucontrol); | |
306 | int snd_soc_info_volsw_2r(struct snd_kcontrol *kcontrol, | |
307 | struct snd_ctl_elem_info *uinfo); | |
308 | int snd_soc_get_volsw_2r(struct snd_kcontrol *kcontrol, | |
309 | struct snd_ctl_elem_value *ucontrol); | |
310 | int snd_soc_put_volsw_2r(struct snd_kcontrol *kcontrol, | |
311 | struct snd_ctl_elem_value *ucontrol); | |
e13ac2e9 MB |
312 | int snd_soc_info_volsw_s8(struct snd_kcontrol *kcontrol, |
313 | struct snd_ctl_elem_info *uinfo); | |
314 | int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol, | |
315 | struct snd_ctl_elem_value *ucontrol); | |
316 | int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol, | |
317 | struct snd_ctl_elem_value *ucontrol); | |
808db4a4 RP |
318 | |
319 | /* SoC PCM stream information */ | |
320 | struct snd_soc_pcm_stream { | |
321 | char *stream_name; | |
1c433fbd GG |
322 | u64 formats; /* SNDRV_PCM_FMTBIT_* */ |
323 | unsigned int rates; /* SNDRV_PCM_RATE_* */ | |
808db4a4 RP |
324 | unsigned int rate_min; /* min rate */ |
325 | unsigned int rate_max; /* max rate */ | |
326 | unsigned int channels_min; /* min channels */ | |
327 | unsigned int channels_max; /* max channels */ | |
328 | unsigned int active:1; /* stream is in use */ | |
329 | }; | |
330 | ||
331 | /* SoC audio ops */ | |
332 | struct snd_soc_ops { | |
333 | int (*startup)(struct snd_pcm_substream *); | |
334 | void (*shutdown)(struct snd_pcm_substream *); | |
335 | int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *); | |
336 | int (*hw_free)(struct snd_pcm_substream *); | |
337 | int (*prepare)(struct snd_pcm_substream *); | |
338 | int (*trigger)(struct snd_pcm_substream *, int); | |
339 | }; | |
340 | ||
1ef6ab75 MB |
341 | /* ASoC DAI ops */ |
342 | struct snd_soc_dai_ops { | |
343 | /* DAI clocking configuration */ | |
3c4b266f | 344 | int (*set_sysclk)(struct snd_soc_dai *dai, |
1c433fbd | 345 | int clk_id, unsigned int freq, int dir); |
3c4b266f | 346 | int (*set_pll)(struct snd_soc_dai *dai, |
1c433fbd | 347 | int pll_id, unsigned int freq_in, unsigned int freq_out); |
3c4b266f | 348 | int (*set_clkdiv)(struct snd_soc_dai *dai, int div_id, int div); |
1c433fbd | 349 | |
1ef6ab75 | 350 | /* DAI format configuration */ |
3c4b266f LG |
351 | int (*set_fmt)(struct snd_soc_dai *dai, unsigned int fmt); |
352 | int (*set_tdm_slot)(struct snd_soc_dai *dai, | |
1c433fbd | 353 | unsigned int mask, int slots); |
3c4b266f | 354 | int (*set_tristate)(struct snd_soc_dai *dai, int tristate); |
1c433fbd GG |
355 | |
356 | /* digital mute */ | |
3c4b266f | 357 | int (*digital_mute)(struct snd_soc_dai *dai, int mute); |
808db4a4 RP |
358 | }; |
359 | ||
3c4b266f LG |
360 | /* SoC DAI (Digital Audio Interface) */ |
361 | struct snd_soc_dai { | |
808db4a4 RP |
362 | /* DAI description */ |
363 | char *name; | |
364 | unsigned int id; | |
365 | unsigned char type; | |
366 | ||
367 | /* DAI callbacks */ | |
bdb92876 | 368 | int (*probe)(struct platform_device *pdev, |
3c4b266f | 369 | struct snd_soc_dai *dai); |
bdb92876 | 370 | void (*remove)(struct platform_device *pdev, |
3c4b266f | 371 | struct snd_soc_dai *dai); |
808db4a4 | 372 | int (*suspend)(struct platform_device *pdev, |
3c4b266f | 373 | struct snd_soc_dai *dai); |
808db4a4 | 374 | int (*resume)(struct platform_device *pdev, |
3c4b266f | 375 | struct snd_soc_dai *dai); |
1c433fbd GG |
376 | |
377 | /* ops */ | |
378 | struct snd_soc_ops ops; | |
1ef6ab75 | 379 | struct snd_soc_dai_ops dai_ops; |
808db4a4 RP |
380 | |
381 | /* DAI capabilities */ | |
382 | struct snd_soc_pcm_stream capture; | |
383 | struct snd_soc_pcm_stream playback; | |
808db4a4 RP |
384 | |
385 | /* DAI runtime info */ | |
808db4a4 | 386 | struct snd_pcm_runtime *runtime; |
3c4b266f LG |
387 | struct snd_soc_codec *codec; |
388 | unsigned int active; | |
389 | unsigned char pop_wait:1; | |
808db4a4 RP |
390 | void *dma_data; |
391 | ||
392 | /* DAI private data */ | |
393 | void *private_data; | |
394 | }; | |
395 | ||
396 | /* SoC Audio Codec */ | |
397 | struct snd_soc_codec { | |
398 | char *name; | |
399 | struct module *owner; | |
400 | struct mutex mutex; | |
401 | ||
402 | /* callbacks */ | |
0be9898a MB |
403 | int (*set_bias_level)(struct snd_soc_codec *, |
404 | enum snd_soc_bias_level level); | |
808db4a4 RP |
405 | |
406 | /* runtime */ | |
407 | struct snd_card *card; | |
408 | struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */ | |
409 | unsigned int active; | |
410 | unsigned int pcm_devs; | |
411 | void *private_data; | |
412 | ||
413 | /* codec IO */ | |
414 | void *control_data; /* codec control (i2c/3wire) data */ | |
415 | unsigned int (*read)(struct snd_soc_codec *, unsigned int); | |
416 | int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); | |
58cd33c0 MB |
417 | int (*display_register)(struct snd_soc_codec *, char *, |
418 | size_t, unsigned int); | |
808db4a4 RP |
419 | hw_write_t hw_write; |
420 | hw_read_t hw_read; | |
421 | void *reg_cache; | |
422 | short reg_cache_size; | |
423 | short reg_cache_step; | |
424 | ||
425 | /* dapm */ | |
12ef193d | 426 | u32 pop_time; |
808db4a4 RP |
427 | struct list_head dapm_widgets; |
428 | struct list_head dapm_paths; | |
0be9898a MB |
429 | enum snd_soc_bias_level bias_level; |
430 | enum snd_soc_bias_level suspend_bias_level; | |
1321b160 | 431 | struct delayed_work delayed_work; |
808db4a4 RP |
432 | |
433 | /* codec DAI's */ | |
3c4b266f | 434 | struct snd_soc_dai *dai; |
808db4a4 RP |
435 | unsigned int num_dai; |
436 | }; | |
437 | ||
438 | /* codec device */ | |
439 | struct snd_soc_codec_device { | |
440 | int (*probe)(struct platform_device *pdev); | |
441 | int (*remove)(struct platform_device *pdev); | |
442 | int (*suspend)(struct platform_device *pdev, pm_message_t state); | |
443 | int (*resume)(struct platform_device *pdev); | |
444 | }; | |
445 | ||
446 | /* SoC platform interface */ | |
447 | struct snd_soc_platform { | |
448 | char *name; | |
449 | ||
450 | int (*probe)(struct platform_device *pdev); | |
451 | int (*remove)(struct platform_device *pdev); | |
452 | int (*suspend)(struct platform_device *pdev, | |
3c4b266f | 453 | struct snd_soc_dai *dai); |
808db4a4 | 454 | int (*resume)(struct platform_device *pdev, |
3c4b266f | 455 | struct snd_soc_dai *dai); |
808db4a4 RP |
456 | |
457 | /* pcm creation and destruction */ | |
3c4b266f | 458 | int (*pcm_new)(struct snd_card *, struct snd_soc_dai *, |
808db4a4 RP |
459 | struct snd_pcm *); |
460 | void (*pcm_free)(struct snd_pcm *); | |
461 | ||
462 | /* platform stream ops */ | |
463 | struct snd_pcm_ops *pcm_ops; | |
464 | }; | |
465 | ||
466 | /* SoC machine DAI configuration, glues a codec and cpu DAI together */ | |
467 | struct snd_soc_dai_link { | |
468 | char *name; /* Codec name */ | |
469 | char *stream_name; /* Stream name */ | |
470 | ||
471 | /* DAI */ | |
3c4b266f LG |
472 | struct snd_soc_dai *codec_dai; |
473 | struct snd_soc_dai *cpu_dai; | |
1c433fbd GG |
474 | |
475 | /* machine stream operations */ | |
476 | struct snd_soc_ops *ops; | |
808db4a4 RP |
477 | |
478 | /* codec/machine specific init - e.g. add machine controls */ | |
479 | int (*init)(struct snd_soc_codec *codec); | |
4ccab3e7 LG |
480 | |
481 | /* DAI pcm */ | |
482 | struct snd_pcm *pcm; | |
808db4a4 RP |
483 | }; |
484 | ||
485 | /* SoC machine */ | |
486 | struct snd_soc_machine { | |
487 | char *name; | |
488 | ||
489 | int (*probe)(struct platform_device *pdev); | |
490 | int (*remove)(struct platform_device *pdev); | |
491 | ||
492 | /* the pre and post PM functions are used to do any PM work before and | |
493 | * after the codec and DAI's do any PM work. */ | |
494 | int (*suspend_pre)(struct platform_device *pdev, pm_message_t state); | |
495 | int (*suspend_post)(struct platform_device *pdev, pm_message_t state); | |
496 | int (*resume_pre)(struct platform_device *pdev); | |
497 | int (*resume_post)(struct platform_device *pdev); | |
498 | ||
0b4d221b | 499 | /* callbacks */ |
0be9898a MB |
500 | int (*set_bias_level)(struct snd_soc_machine *, |
501 | enum snd_soc_bias_level level); | |
0b4d221b | 502 | |
808db4a4 RP |
503 | /* CPU <--> Codec DAI links */ |
504 | struct snd_soc_dai_link *dai_link; | |
505 | int num_links; | |
506 | }; | |
507 | ||
508 | /* SoC Device - the audio subsystem */ | |
509 | struct snd_soc_device { | |
510 | struct device *dev; | |
511 | struct snd_soc_machine *machine; | |
512 | struct snd_soc_platform *platform; | |
513 | struct snd_soc_codec *codec; | |
514 | struct snd_soc_codec_device *codec_dev; | |
4484bb2e | 515 | struct delayed_work delayed_work; |
6ed25978 | 516 | struct work_struct deferred_resume_work; |
808db4a4 | 517 | void *codec_data; |
12ef193d TK |
518 | #ifdef CONFIG_DEBUG_FS |
519 | struct dentry *debugfs_root; | |
520 | #endif | |
808db4a4 RP |
521 | }; |
522 | ||
523 | /* runtime channel data */ | |
524 | struct snd_soc_pcm_runtime { | |
1c433fbd | 525 | struct snd_soc_dai_link *dai; |
808db4a4 RP |
526 | struct snd_soc_device *socdev; |
527 | }; | |
528 | ||
4eaa9819 JS |
529 | /* mixer control */ |
530 | struct soc_mixer_control { | |
531 | int min, max; | |
815ecf8d | 532 | unsigned int reg, rreg, shift, rshift, invert; |
4eaa9819 JS |
533 | }; |
534 | ||
808db4a4 RP |
535 | /* enumerated kcontrol */ |
536 | struct soc_enum { | |
537 | unsigned short reg; | |
538 | unsigned short reg2; | |
539 | unsigned char shift_l; | |
540 | unsigned char shift_r; | |
f8ba0b7b | 541 | unsigned int max; |
808db4a4 RP |
542 | const char **texts; |
543 | void *dapm; | |
544 | }; | |
545 | ||
808db4a4 | 546 | #endif |