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808db4a4 RP |
1 | /* |
2 | * linux/sound/soc.h -- ALSA SoC Layer | |
3 | * | |
4 | * Author: Liam Girdwood | |
5 | * Created: Aug 11th 2005 | |
6 | * Copyright: Wolfson Microelectronics. PLC. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #ifndef __LINUX_SND_SOC_H | |
14 | #define __LINUX_SND_SOC_H | |
15 | ||
16 | #include <linux/platform_device.h> | |
17 | #include <linux/types.h> | |
4484bb2e | 18 | #include <linux/workqueue.h> |
808db4a4 RP |
19 | #include <sound/core.h> |
20 | #include <sound/pcm.h> | |
21 | #include <sound/control.h> | |
22 | #include <sound/ac97_codec.h> | |
23 | ||
0a22b87d | 24 | #define SND_SOC_VERSION "0.13.2" |
808db4a4 RP |
25 | |
26 | /* | |
27 | * Convenience kcontrol builders | |
28 | */ | |
a7a4ac86 PZ |
29 | #define SOC_SINGLE_VALUE(reg, shift, max, invert) ((reg) | ((shift) << 8) |\ |
30 | ((shift) << 12) | ((max) << 16) | ((invert) << 24)) | |
31 | #define SOC_SINGLE_VALUE_EXT(reg, max, invert) ((reg) | ((max) << 16) |\ | |
808db4a4 | 32 | ((invert) << 31)) |
a7a4ac86 | 33 | #define SOC_SINGLE(xname, reg, shift, max, invert) \ |
808db4a4 RP |
34 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ |
35 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\ | |
36 | .put = snd_soc_put_volsw, \ | |
a7a4ac86 PZ |
37 | .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } |
38 | #define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \ | |
39 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
40 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
41 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
42 | .tlv.p = (tlv_array), \ | |
43 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\ | |
44 | .put = snd_soc_put_volsw, \ | |
45 | .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) } | |
46 | #define SOC_DOUBLE(xname, reg, shift_left, shift_right, max, invert) \ | |
808db4a4 RP |
47 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ |
48 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \ | |
49 | .put = snd_soc_put_volsw, \ | |
50 | .private_value = (reg) | ((shift_left) << 8) | \ | |
a7a4ac86 PZ |
51 | ((shift_right) << 12) | ((max) << 16) | ((invert) << 24) } |
52 | #define SOC_DOUBLE_R(xname, reg_left, reg_right, shift, max, invert) \ | |
808db4a4 RP |
53 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ |
54 | .info = snd_soc_info_volsw_2r, \ | |
55 | .get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \ | |
56 | .private_value = (reg_left) | ((shift) << 8) | \ | |
a7a4ac86 PZ |
57 | ((max) << 12) | ((invert) << 20) | ((reg_right) << 24) } |
58 | #define SOC_DOUBLE_TLV(xname, reg, shift_left, shift_right, max, invert, tlv_array) \ | |
59 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ | |
60 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
61 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
62 | .tlv.p = (tlv_array), \ | |
63 | .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \ | |
64 | .put = snd_soc_put_volsw, \ | |
65 | .private_value = (reg) | ((shift_left) << 8) | \ | |
66 | ((shift_right) << 12) | ((max) << 16) | ((invert) << 24) } | |
67 | #define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, shift, max, invert, tlv_array) \ | |
68 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\ | |
69 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\ | |
70 | SNDRV_CTL_ELEM_ACCESS_READWRITE,\ | |
71 | .tlv.p = (tlv_array), \ | |
72 | .info = snd_soc_info_volsw_2r, \ | |
73 | .get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \ | |
74 | .private_value = (reg_left) | ((shift) << 8) | \ | |
75 | ((max) << 12) | ((invert) << 20) | ((reg_right) << 24) } | |
e13ac2e9 MB |
76 | #define SOC_DOUBLE_S8_TLV(xname, reg, min, max, tlv_array) \ |
77 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \ | |
78 | .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ | |
79 | SNDRV_CTL_ELEM_ACCESS_READWRITE, \ | |
80 | .tlv.p = (tlv_array), \ | |
81 | .info = snd_soc_info_volsw_s8, .get = snd_soc_get_volsw_s8, \ | |
82 | .put = snd_soc_put_volsw_s8, \ | |
83 | .private_value = (reg) | (((signed char)max) << 16) | \ | |
84 | (((signed char)min) << 24) } | |
808db4a4 RP |
85 | #define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xtexts) \ |
86 | { .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \ | |
87 | .mask = xmask, .texts = xtexts } | |
88 | #define SOC_ENUM_SINGLE(xreg, xshift, xmask, xtexts) \ | |
89 | SOC_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xtexts) | |
90 | #define SOC_ENUM_SINGLE_EXT(xmask, xtexts) \ | |
91 | { .mask = xmask, .texts = xtexts } | |
92 | #define SOC_ENUM(xname, xenum) \ | |
93 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\ | |
94 | .info = snd_soc_info_enum_double, \ | |
95 | .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \ | |
96 | .private_value = (unsigned long)&xenum } | |
1c433fbd | 97 | #define SOC_SINGLE_EXT(xname, xreg, xshift, xmask, xinvert,\ |
808db4a4 RP |
98 | xhandler_get, xhandler_put) \ |
99 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
1c433fbd | 100 | .info = snd_soc_info_volsw, \ |
808db4a4 | 101 | .get = xhandler_get, .put = xhandler_put, \ |
1c433fbd | 102 | .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmask, xinvert) } |
808db4a4 RP |
103 | #define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \ |
104 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
105 | .info = snd_soc_info_bool_ext, \ | |
106 | .get = xhandler_get, .put = xhandler_put, \ | |
107 | .private_value = xdata } | |
108 | #define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \ | |
109 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
110 | .info = snd_soc_info_enum_ext, \ | |
111 | .get = xhandler_get, .put = xhandler_put, \ | |
112 | .private_value = (unsigned long)&xenum } | |
113 | ||
0be9898a MB |
114 | /* |
115 | * Bias levels | |
116 | * | |
117 | * @ON: Bias is fully on for audio playback and capture operations. | |
118 | * @PREPARE: Prepare for audio operations. Called before DAPM switching for | |
119 | * stream start and stop operations. | |
120 | * @STANDBY: Low power standby state when no playback/capture operations are | |
121 | * in progress. NOTE: The transition time between STANDBY and ON | |
122 | * should be as fast as possible and no longer than 10ms. | |
123 | * @OFF: Power Off. No restrictions on transition times. | |
124 | */ | |
125 | enum snd_soc_bias_level { | |
126 | SND_SOC_BIAS_ON, | |
127 | SND_SOC_BIAS_PREPARE, | |
128 | SND_SOC_BIAS_STANDBY, | |
129 | SND_SOC_BIAS_OFF, | |
130 | }; | |
131 | ||
808db4a4 RP |
132 | /* |
133 | * Digital Audio Interface (DAI) types | |
134 | */ | |
135 | #define SND_SOC_DAI_AC97 0x1 | |
136 | #define SND_SOC_DAI_I2S 0x2 | |
137 | #define SND_SOC_DAI_PCM 0x4 | |
a68660e0 | 138 | #define SND_SOC_DAI_AC97_BUS 0x8 /* for custom i.e. non ac97_codec.c */ |
808db4a4 RP |
139 | |
140 | /* | |
141 | * DAI hardware audio formats | |
142 | */ | |
1c433fbd GG |
143 | #define SND_SOC_DAIFMT_I2S 0 /* I2S mode */ |
144 | #define SND_SOC_DAIFMT_RIGHT_J 1 /* Right justified mode */ | |
145 | #define SND_SOC_DAIFMT_LEFT_J 2 /* Left Justified mode */ | |
146 | #define SND_SOC_DAIFMT_DSP_A 3 /* L data msb after FRM or LRC */ | |
147 | #define SND_SOC_DAIFMT_DSP_B 4 /* L data msb during FRM or LRC */ | |
148 | #define SND_SOC_DAIFMT_AC97 5 /* AC97 */ | |
149 | ||
150 | #define SND_SOC_DAIFMT_MSB SND_SOC_DAIFMT_LEFT_J | |
151 | #define SND_SOC_DAIFMT_LSB SND_SOC_DAIFMT_RIGHT_J | |
152 | ||
153 | /* | |
154 | * DAI Gating | |
155 | */ | |
156 | #define SND_SOC_DAIFMT_CONT (0 << 4) /* continuous clock */ | |
157 | #define SND_SOC_DAIFMT_GATED (1 << 4) /* clock is gated when not Tx/Rx */ | |
808db4a4 | 158 | |
a7a4ac86 PZ |
159 | /* |
160 | * DAI Sync | |
161 | * Synchronous LR (Left Right) clocks and Frame signals. | |
162 | */ | |
163 | #define SND_SOC_DAIFMT_SYNC (0 << 5) /* Tx FRM = Rx FRM */ | |
164 | #define SND_SOC_DAIFMT_ASYNC (1 << 5) /* Tx FRM ~ Rx FRM */ | |
165 | ||
166 | /* | |
167 | * TDM | |
168 | */ | |
169 | #define SND_SOC_DAIFMT_TDM (1 << 6) | |
170 | ||
808db4a4 RP |
171 | /* |
172 | * DAI hardware signal inversions | |
173 | */ | |
a7a4ac86 | 174 | #define SND_SOC_DAIFMT_NB_NF (0 << 8) /* normal bclk + frm */ |
1c433fbd GG |
175 | #define SND_SOC_DAIFMT_NB_IF (1 << 8) /* normal bclk + inv frm */ |
176 | #define SND_SOC_DAIFMT_IB_NF (2 << 8) /* invert bclk + nor frm */ | |
177 | #define SND_SOC_DAIFMT_IB_IF (3 << 8) /* invert bclk + frm */ | |
808db4a4 RP |
178 | |
179 | /* | |
180 | * DAI hardware clock masters | |
181 | * This is wrt the codec, the inverse is true for the interface | |
182 | * i.e. if the codec is clk and frm master then the interface is | |
183 | * clk and frame slave. | |
184 | */ | |
1c433fbd GG |
185 | #define SND_SOC_DAIFMT_CBM_CFM (0 << 12) /* codec clk & frm master */ |
186 | #define SND_SOC_DAIFMT_CBS_CFM (1 << 12) /* codec clk slave & frm master */ | |
187 | #define SND_SOC_DAIFMT_CBM_CFS (2 << 12) /* codec clk master & frame slave */ | |
188 | #define SND_SOC_DAIFMT_CBS_CFS (3 << 12) /* codec clk & frm slave */ | |
808db4a4 | 189 | |
1c433fbd GG |
190 | #define SND_SOC_DAIFMT_FORMAT_MASK 0x000f |
191 | #define SND_SOC_DAIFMT_CLOCK_MASK 0x00f0 | |
808db4a4 | 192 | #define SND_SOC_DAIFMT_INV_MASK 0x0f00 |
1c433fbd | 193 | #define SND_SOC_DAIFMT_MASTER_MASK 0xf000 |
808db4a4 | 194 | |
808db4a4 RP |
195 | |
196 | /* | |
1c433fbd | 197 | * Master Clock Directions |
808db4a4 | 198 | */ |
1c433fbd GG |
199 | #define SND_SOC_CLOCK_IN 0 |
200 | #define SND_SOC_CLOCK_OUT 1 | |
808db4a4 RP |
201 | |
202 | /* | |
203 | * AC97 codec ID's bitmask | |
204 | */ | |
205 | #define SND_SOC_DAI_AC97_ID0 (1 << 0) | |
206 | #define SND_SOC_DAI_AC97_ID1 (1 << 1) | |
207 | #define SND_SOC_DAI_AC97_ID2 (1 << 2) | |
208 | #define SND_SOC_DAI_AC97_ID3 (1 << 3) | |
209 | ||
210 | struct snd_soc_device; | |
211 | struct snd_soc_pcm_stream; | |
212 | struct snd_soc_ops; | |
213 | struct snd_soc_dai_mode; | |
214 | struct snd_soc_pcm_runtime; | |
215 | struct snd_soc_codec_dai; | |
216 | struct snd_soc_cpu_dai; | |
217 | struct snd_soc_codec; | |
218 | struct snd_soc_machine_config; | |
219 | struct soc_enum; | |
220 | struct snd_soc_ac97_ops; | |
221 | struct snd_soc_clock_info; | |
222 | ||
223 | typedef int (*hw_write_t)(void *,const char* ,int); | |
224 | typedef int (*hw_read_t)(void *,char* ,int); | |
225 | ||
226 | extern struct snd_ac97_bus_ops soc_ac97_ops; | |
227 | ||
228 | /* pcm <-> DAI connect */ | |
229 | void snd_soc_free_pcms(struct snd_soc_device *socdev); | |
230 | int snd_soc_new_pcms(struct snd_soc_device *socdev, int idx, const char *xid); | |
231 | int snd_soc_register_card(struct snd_soc_device *socdev); | |
232 | ||
233 | /* set runtime hw params */ | |
234 | int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream, | |
235 | const struct snd_pcm_hardware *hw); | |
808db4a4 RP |
236 | |
237 | /* codec IO */ | |
238 | #define snd_soc_read(codec, reg) codec->read(codec, reg) | |
239 | #define snd_soc_write(codec, reg, value) codec->write(codec, reg, value) | |
240 | ||
241 | /* codec register bit access */ | |
242 | int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg, | |
243 | unsigned short mask, unsigned short value); | |
244 | int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg, | |
245 | unsigned short mask, unsigned short value); | |
246 | ||
247 | int snd_soc_new_ac97_codec(struct snd_soc_codec *codec, | |
248 | struct snd_ac97_bus_ops *ops, int num); | |
249 | void snd_soc_free_ac97_codec(struct snd_soc_codec *codec); | |
250 | ||
251 | /* | |
252 | *Controls | |
253 | */ | |
254 | struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template, | |
255 | void *data, char *long_name); | |
256 | int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol, | |
257 | struct snd_ctl_elem_info *uinfo); | |
258 | int snd_soc_info_enum_ext(struct snd_kcontrol *kcontrol, | |
259 | struct snd_ctl_elem_info *uinfo); | |
260 | int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol, | |
261 | struct snd_ctl_elem_value *ucontrol); | |
262 | int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol, | |
263 | struct snd_ctl_elem_value *ucontrol); | |
264 | int snd_soc_info_volsw(struct snd_kcontrol *kcontrol, | |
265 | struct snd_ctl_elem_info *uinfo); | |
266 | int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol, | |
267 | struct snd_ctl_elem_info *uinfo); | |
392abe9c | 268 | #define snd_soc_info_bool_ext snd_ctl_boolean_mono_info |
808db4a4 RP |
269 | int snd_soc_get_volsw(struct snd_kcontrol *kcontrol, |
270 | struct snd_ctl_elem_value *ucontrol); | |
271 | int snd_soc_put_volsw(struct snd_kcontrol *kcontrol, | |
272 | struct snd_ctl_elem_value *ucontrol); | |
273 | int snd_soc_info_volsw_2r(struct snd_kcontrol *kcontrol, | |
274 | struct snd_ctl_elem_info *uinfo); | |
275 | int snd_soc_get_volsw_2r(struct snd_kcontrol *kcontrol, | |
276 | struct snd_ctl_elem_value *ucontrol); | |
277 | int snd_soc_put_volsw_2r(struct snd_kcontrol *kcontrol, | |
278 | struct snd_ctl_elem_value *ucontrol); | |
e13ac2e9 MB |
279 | int snd_soc_info_volsw_s8(struct snd_kcontrol *kcontrol, |
280 | struct snd_ctl_elem_info *uinfo); | |
281 | int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol, | |
282 | struct snd_ctl_elem_value *ucontrol); | |
283 | int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol, | |
284 | struct snd_ctl_elem_value *ucontrol); | |
808db4a4 RP |
285 | |
286 | /* SoC PCM stream information */ | |
287 | struct snd_soc_pcm_stream { | |
288 | char *stream_name; | |
1c433fbd GG |
289 | u64 formats; /* SNDRV_PCM_FMTBIT_* */ |
290 | unsigned int rates; /* SNDRV_PCM_RATE_* */ | |
808db4a4 RP |
291 | unsigned int rate_min; /* min rate */ |
292 | unsigned int rate_max; /* max rate */ | |
293 | unsigned int channels_min; /* min channels */ | |
294 | unsigned int channels_max; /* max channels */ | |
295 | unsigned int active:1; /* stream is in use */ | |
296 | }; | |
297 | ||
298 | /* SoC audio ops */ | |
299 | struct snd_soc_ops { | |
300 | int (*startup)(struct snd_pcm_substream *); | |
301 | void (*shutdown)(struct snd_pcm_substream *); | |
302 | int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *); | |
303 | int (*hw_free)(struct snd_pcm_substream *); | |
304 | int (*prepare)(struct snd_pcm_substream *); | |
305 | int (*trigger)(struct snd_pcm_substream *, int); | |
306 | }; | |
307 | ||
1ef6ab75 MB |
308 | /* ASoC DAI ops */ |
309 | struct snd_soc_dai_ops { | |
310 | /* DAI clocking configuration */ | |
1c433fbd GG |
311 | int (*set_sysclk)(struct snd_soc_codec_dai *codec_dai, |
312 | int clk_id, unsigned int freq, int dir); | |
313 | int (*set_pll)(struct snd_soc_codec_dai *codec_dai, | |
314 | int pll_id, unsigned int freq_in, unsigned int freq_out); | |
315 | int (*set_clkdiv)(struct snd_soc_codec_dai *codec_dai, | |
316 | int div_id, int div); | |
317 | ||
1ef6ab75 | 318 | /* DAI format configuration */ |
1c433fbd GG |
319 | int (*set_fmt)(struct snd_soc_codec_dai *codec_dai, |
320 | unsigned int fmt); | |
321 | int (*set_tdm_slot)(struct snd_soc_codec_dai *codec_dai, | |
322 | unsigned int mask, int slots); | |
323 | int (*set_tristate)(struct snd_soc_codec_dai *, int tristate); | |
324 | ||
325 | /* digital mute */ | |
326 | int (*digital_mute)(struct snd_soc_codec_dai *, int mute); | |
808db4a4 RP |
327 | }; |
328 | ||
808db4a4 RP |
329 | /* SoC Codec DAI */ |
330 | struct snd_soc_codec_dai { | |
331 | char *name; | |
332 | int id; | |
a68660e0 | 333 | unsigned char type; |
808db4a4 RP |
334 | |
335 | /* DAI capabilities */ | |
336 | struct snd_soc_pcm_stream playback; | |
337 | struct snd_soc_pcm_stream capture; | |
808db4a4 RP |
338 | |
339 | /* DAI runtime info */ | |
1c433fbd | 340 | struct snd_soc_codec *codec; |
808db4a4 RP |
341 | unsigned int active; |
342 | unsigned char pop_wait:1; | |
343 | ||
1c433fbd GG |
344 | /* ops */ |
345 | struct snd_soc_ops ops; | |
1ef6ab75 | 346 | struct snd_soc_dai_ops dai_ops; |
1c433fbd | 347 | |
808db4a4 RP |
348 | /* DAI private data */ |
349 | void *private_data; | |
350 | }; | |
351 | ||
352 | /* SoC CPU DAI */ | |
353 | struct snd_soc_cpu_dai { | |
354 | ||
355 | /* DAI description */ | |
356 | char *name; | |
357 | unsigned int id; | |
358 | unsigned char type; | |
359 | ||
360 | /* DAI callbacks */ | |
361 | int (*probe)(struct platform_device *pdev); | |
362 | void (*remove)(struct platform_device *pdev); | |
363 | int (*suspend)(struct platform_device *pdev, | |
364 | struct snd_soc_cpu_dai *cpu_dai); | |
365 | int (*resume)(struct platform_device *pdev, | |
366 | struct snd_soc_cpu_dai *cpu_dai); | |
1c433fbd GG |
367 | |
368 | /* ops */ | |
369 | struct snd_soc_ops ops; | |
1ef6ab75 | 370 | struct snd_soc_dai_ops dai_ops; |
808db4a4 RP |
371 | |
372 | /* DAI capabilities */ | |
373 | struct snd_soc_pcm_stream capture; | |
374 | struct snd_soc_pcm_stream playback; | |
808db4a4 RP |
375 | |
376 | /* DAI runtime info */ | |
808db4a4 RP |
377 | struct snd_pcm_runtime *runtime; |
378 | unsigned char active:1; | |
808db4a4 RP |
379 | void *dma_data; |
380 | ||
381 | /* DAI private data */ | |
382 | void *private_data; | |
383 | }; | |
384 | ||
385 | /* SoC Audio Codec */ | |
386 | struct snd_soc_codec { | |
387 | char *name; | |
388 | struct module *owner; | |
389 | struct mutex mutex; | |
390 | ||
391 | /* callbacks */ | |
0be9898a MB |
392 | int (*set_bias_level)(struct snd_soc_codec *, |
393 | enum snd_soc_bias_level level); | |
808db4a4 RP |
394 | |
395 | /* runtime */ | |
396 | struct snd_card *card; | |
397 | struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */ | |
398 | unsigned int active; | |
399 | unsigned int pcm_devs; | |
400 | void *private_data; | |
401 | ||
402 | /* codec IO */ | |
403 | void *control_data; /* codec control (i2c/3wire) data */ | |
404 | unsigned int (*read)(struct snd_soc_codec *, unsigned int); | |
405 | int (*write)(struct snd_soc_codec *, unsigned int, unsigned int); | |
406 | hw_write_t hw_write; | |
407 | hw_read_t hw_read; | |
408 | void *reg_cache; | |
409 | short reg_cache_size; | |
410 | short reg_cache_step; | |
411 | ||
412 | /* dapm */ | |
413 | struct list_head dapm_widgets; | |
414 | struct list_head dapm_paths; | |
0be9898a MB |
415 | enum snd_soc_bias_level bias_level; |
416 | enum snd_soc_bias_level suspend_bias_level; | |
1321b160 | 417 | struct delayed_work delayed_work; |
808db4a4 RP |
418 | |
419 | /* codec DAI's */ | |
420 | struct snd_soc_codec_dai *dai; | |
421 | unsigned int num_dai; | |
422 | }; | |
423 | ||
424 | /* codec device */ | |
425 | struct snd_soc_codec_device { | |
426 | int (*probe)(struct platform_device *pdev); | |
427 | int (*remove)(struct platform_device *pdev); | |
428 | int (*suspend)(struct platform_device *pdev, pm_message_t state); | |
429 | int (*resume)(struct platform_device *pdev); | |
430 | }; | |
431 | ||
432 | /* SoC platform interface */ | |
433 | struct snd_soc_platform { | |
434 | char *name; | |
435 | ||
436 | int (*probe)(struct platform_device *pdev); | |
437 | int (*remove)(struct platform_device *pdev); | |
438 | int (*suspend)(struct platform_device *pdev, | |
439 | struct snd_soc_cpu_dai *cpu_dai); | |
440 | int (*resume)(struct platform_device *pdev, | |
441 | struct snd_soc_cpu_dai *cpu_dai); | |
442 | ||
443 | /* pcm creation and destruction */ | |
444 | int (*pcm_new)(struct snd_card *, struct snd_soc_codec_dai *, | |
445 | struct snd_pcm *); | |
446 | void (*pcm_free)(struct snd_pcm *); | |
447 | ||
448 | /* platform stream ops */ | |
449 | struct snd_pcm_ops *pcm_ops; | |
450 | }; | |
451 | ||
452 | /* SoC machine DAI configuration, glues a codec and cpu DAI together */ | |
453 | struct snd_soc_dai_link { | |
454 | char *name; /* Codec name */ | |
455 | char *stream_name; /* Stream name */ | |
456 | ||
457 | /* DAI */ | |
458 | struct snd_soc_codec_dai *codec_dai; | |
459 | struct snd_soc_cpu_dai *cpu_dai; | |
1c433fbd GG |
460 | |
461 | /* machine stream operations */ | |
462 | struct snd_soc_ops *ops; | |
808db4a4 RP |
463 | |
464 | /* codec/machine specific init - e.g. add machine controls */ | |
465 | int (*init)(struct snd_soc_codec *codec); | |
4ccab3e7 LG |
466 | |
467 | /* DAI pcm */ | |
468 | struct snd_pcm *pcm; | |
808db4a4 RP |
469 | }; |
470 | ||
471 | /* SoC machine */ | |
472 | struct snd_soc_machine { | |
473 | char *name; | |
474 | ||
475 | int (*probe)(struct platform_device *pdev); | |
476 | int (*remove)(struct platform_device *pdev); | |
477 | ||
478 | /* the pre and post PM functions are used to do any PM work before and | |
479 | * after the codec and DAI's do any PM work. */ | |
480 | int (*suspend_pre)(struct platform_device *pdev, pm_message_t state); | |
481 | int (*suspend_post)(struct platform_device *pdev, pm_message_t state); | |
482 | int (*resume_pre)(struct platform_device *pdev); | |
483 | int (*resume_post)(struct platform_device *pdev); | |
484 | ||
0b4d221b | 485 | /* callbacks */ |
0be9898a MB |
486 | int (*set_bias_level)(struct snd_soc_machine *, |
487 | enum snd_soc_bias_level level); | |
0b4d221b | 488 | |
808db4a4 RP |
489 | /* CPU <--> Codec DAI links */ |
490 | struct snd_soc_dai_link *dai_link; | |
491 | int num_links; | |
492 | }; | |
493 | ||
494 | /* SoC Device - the audio subsystem */ | |
495 | struct snd_soc_device { | |
496 | struct device *dev; | |
497 | struct snd_soc_machine *machine; | |
498 | struct snd_soc_platform *platform; | |
499 | struct snd_soc_codec *codec; | |
500 | struct snd_soc_codec_device *codec_dev; | |
4484bb2e | 501 | struct delayed_work delayed_work; |
808db4a4 RP |
502 | void *codec_data; |
503 | }; | |
504 | ||
505 | /* runtime channel data */ | |
506 | struct snd_soc_pcm_runtime { | |
1c433fbd | 507 | struct snd_soc_dai_link *dai; |
808db4a4 RP |
508 | struct snd_soc_device *socdev; |
509 | }; | |
510 | ||
511 | /* enumerated kcontrol */ | |
512 | struct soc_enum { | |
513 | unsigned short reg; | |
514 | unsigned short reg2; | |
515 | unsigned char shift_l; | |
516 | unsigned char shift_r; | |
517 | unsigned int mask; | |
518 | const char **texts; | |
519 | void *dapm; | |
520 | }; | |
521 | ||
808db4a4 | 522 | #endif |