]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - include/sound/soc.h
ASoC: core - Add platform read and write.
[mirror_ubuntu-artful-kernel.git] / include / sound / soc.h
CommitLineData
808db4a4
RP
1/*
2 * linux/sound/soc.h -- ALSA SoC Layer
3 *
4 * Author: Liam Girdwood
5 * Created: Aug 11th 2005
6 * Copyright: Wolfson Microelectronics. PLC.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __LINUX_SND_SOC_H
14#define __LINUX_SND_SOC_H
15
16#include <linux/platform_device.h>
17#include <linux/types.h>
d5021ec9 18#include <linux/notifier.h>
4484bb2e 19#include <linux/workqueue.h>
ec67624d
LCM
20#include <linux/interrupt.h>
21#include <linux/kernel.h>
808db4a4
RP
22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/control.h>
25#include <sound/ac97_codec.h>
26
808db4a4
RP
27/*
28 * Convenience kcontrol builders
29 */
4eaa9819
JS
30#define SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) \
31 ((unsigned long)&(struct soc_mixer_control) \
762b8df7 32 {.reg = xreg, .shift = xshift, .rshift = xshift, .max = xmax, \
d11bb4a9 33 .platform_max = xmax, .invert = xinvert})
4eaa9819
JS
34#define SOC_SINGLE_VALUE_EXT(xreg, xmax, xinvert) \
35 ((unsigned long)&(struct soc_mixer_control) \
d11bb4a9 36 {.reg = xreg, .max = xmax, .platform_max = xmax, .invert = xinvert})
a7a4ac86 37#define SOC_SINGLE(xname, reg, shift, max, invert) \
808db4a4
RP
38{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
39 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
40 .put = snd_soc_put_volsw, \
a7a4ac86
PZ
41 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
42#define SOC_SINGLE_TLV(xname, reg, shift, max, invert, tlv_array) \
43{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
44 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
45 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
46 .tlv.p = (tlv_array), \
47 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
48 .put = snd_soc_put_volsw, \
49 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
4eaa9819 50#define SOC_DOUBLE(xname, xreg, shift_left, shift_right, xmax, xinvert) \
808db4a4
RP
51{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
52 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
53 .put = snd_soc_put_volsw, \
4eaa9819
JS
54 .private_value = (unsigned long)&(struct soc_mixer_control) \
55 {.reg = xreg, .shift = shift_left, .rshift = shift_right, \
d11bb4a9 56 .max = xmax, .platform_max = xmax, .invert = xinvert} }
4eaa9819 57#define SOC_DOUBLE_R(xname, reg_left, reg_right, xshift, xmax, xinvert) \
808db4a4
RP
58{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
59 .info = snd_soc_info_volsw_2r, \
60 .get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \
4eaa9819
JS
61 .private_value = (unsigned long)&(struct soc_mixer_control) \
62 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
d11bb4a9 63 .max = xmax, .platform_max = xmax, .invert = xinvert} }
4eaa9819 64#define SOC_DOUBLE_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert, tlv_array) \
a7a4ac86
PZ
65{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
66 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
67 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
68 .tlv.p = (tlv_array), \
69 .info = snd_soc_info_volsw, .get = snd_soc_get_volsw, \
70 .put = snd_soc_put_volsw, \
4eaa9819
JS
71 .private_value = (unsigned long)&(struct soc_mixer_control) \
72 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
d11bb4a9 73 .max = xmax, .platform_max = xmax, .invert = xinvert} }
4eaa9819 74#define SOC_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert, tlv_array) \
a7a4ac86
PZ
75{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
76 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
77 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
78 .tlv.p = (tlv_array), \
79 .info = snd_soc_info_volsw_2r, \
80 .get = snd_soc_get_volsw_2r, .put = snd_soc_put_volsw_2r, \
4eaa9819
JS
81 .private_value = (unsigned long)&(struct soc_mixer_control) \
82 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
d11bb4a9 83 .max = xmax, .platform_max = xmax, .invert = xinvert} }
4eaa9819 84#define SOC_DOUBLE_S8_TLV(xname, xreg, xmin, xmax, tlv_array) \
e13ac2e9
MB
85{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
86 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
87 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
88 .tlv.p = (tlv_array), \
89 .info = snd_soc_info_volsw_s8, .get = snd_soc_get_volsw_s8, \
90 .put = snd_soc_put_volsw_s8, \
4eaa9819 91 .private_value = (unsigned long)&(struct soc_mixer_control) \
d11bb4a9
PU
92 {.reg = xreg, .min = xmin, .max = xmax, \
93 .platform_max = xmax} }
f8ba0b7b 94#define SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmax, xtexts) \
808db4a4 95{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
f8ba0b7b
JS
96 .max = xmax, .texts = xtexts }
97#define SOC_ENUM_SINGLE(xreg, xshift, xmax, xtexts) \
98 SOC_ENUM_DOUBLE(xreg, xshift, xshift, xmax, xtexts)
99#define SOC_ENUM_SINGLE_EXT(xmax, xtexts) \
100{ .max = xmax, .texts = xtexts }
2e72f8e3
PU
101#define SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, xmax, xtexts, xvalues) \
102{ .reg = xreg, .shift_l = xshift_l, .shift_r = xshift_r, \
103 .mask = xmask, .max = xmax, .texts = xtexts, .values = xvalues}
104#define SOC_VALUE_ENUM_SINGLE(xreg, xshift, xmask, xmax, xtexts, xvalues) \
105 SOC_VALUE_ENUM_DOUBLE(xreg, xshift, xshift, xmask, xmax, xtexts, xvalues)
808db4a4
RP
106#define SOC_ENUM(xname, xenum) \
107{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
108 .info = snd_soc_info_enum_double, \
109 .get = snd_soc_get_enum_double, .put = snd_soc_put_enum_double, \
110 .private_value = (unsigned long)&xenum }
2e72f8e3
PU
111#define SOC_VALUE_ENUM(xname, xenum) \
112{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname,\
74155556 113 .info = snd_soc_info_enum_double, \
2e72f8e3
PU
114 .get = snd_soc_get_value_enum_double, \
115 .put = snd_soc_put_value_enum_double, \
116 .private_value = (unsigned long)&xenum }
f8ba0b7b 117#define SOC_SINGLE_EXT(xname, xreg, xshift, xmax, xinvert,\
808db4a4
RP
118 xhandler_get, xhandler_put) \
119{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
1c433fbd 120 .info = snd_soc_info_volsw, \
808db4a4 121 .get = xhandler_get, .put = xhandler_put, \
f8ba0b7b 122 .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) }
7629ad24
DM
123#define SOC_DOUBLE_EXT(xname, xreg, shift_left, shift_right, xmax, xinvert,\
124 xhandler_get, xhandler_put) \
125{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
126 .info = snd_soc_info_volsw, \
127 .get = xhandler_get, .put = xhandler_put, \
128 .private_value = (unsigned long)&(struct soc_mixer_control) \
129 {.reg = xreg, .shift = shift_left, .rshift = shift_right, \
d11bb4a9 130 .max = xmax, .platform_max = xmax, .invert = xinvert} }
f8ba0b7b 131#define SOC_SINGLE_EXT_TLV(xname, xreg, xshift, xmax, xinvert,\
10144c09
MM
132 xhandler_get, xhandler_put, tlv_array) \
133{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
134 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
135 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
136 .tlv.p = (tlv_array), \
137 .info = snd_soc_info_volsw, \
138 .get = xhandler_get, .put = xhandler_put, \
f8ba0b7b 139 .private_value = SOC_SINGLE_VALUE(xreg, xshift, xmax, xinvert) }
d0af93db
JS
140#define SOC_DOUBLE_EXT_TLV(xname, xreg, shift_left, shift_right, xmax, xinvert,\
141 xhandler_get, xhandler_put, tlv_array) \
142{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
143 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
144 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
145 .tlv.p = (tlv_array), \
146 .info = snd_soc_info_volsw, \
147 .get = xhandler_get, .put = xhandler_put, \
148 .private_value = (unsigned long)&(struct soc_mixer_control) \
149 {.reg = xreg, .shift = shift_left, .rshift = shift_right, \
d11bb4a9 150 .max = xmax, .platform_max = xmax, .invert = xinvert} }
3ce91d5a
JS
151#define SOC_DOUBLE_R_EXT_TLV(xname, reg_left, reg_right, xshift, xmax, xinvert,\
152 xhandler_get, xhandler_put, tlv_array) \
153{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
154 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
155 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
156 .tlv.p = (tlv_array), \
157 .info = snd_soc_info_volsw_2r, \
158 .get = xhandler_get, .put = xhandler_put, \
159 .private_value = (unsigned long)&(struct soc_mixer_control) \
160 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
d11bb4a9 161 .max = xmax, .platform_max = xmax, .invert = xinvert} }
808db4a4
RP
162#define SOC_SINGLE_BOOL_EXT(xname, xdata, xhandler_get, xhandler_put) \
163{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
164 .info = snd_soc_info_bool_ext, \
165 .get = xhandler_get, .put = xhandler_put, \
166 .private_value = xdata }
167#define SOC_ENUM_EXT(xname, xenum, xhandler_get, xhandler_put) \
168{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
169 .info = snd_soc_info_enum_ext, \
170 .get = xhandler_get, .put = xhandler_put, \
171 .private_value = (unsigned long)&xenum }
172
b6f4bb38 173#define SOC_DOUBLE_R_SX_TLV(xname, xreg_left, xreg_right, xshift,\
174 xmin, xmax, tlv_array) \
175{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
176 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
177 SNDRV_CTL_ELEM_ACCESS_READWRITE, \
178 .tlv.p = (tlv_array), \
179 .info = snd_soc_info_volsw_2r_sx, \
180 .get = snd_soc_get_volsw_2r_sx, \
181 .put = snd_soc_put_volsw_2r_sx, \
182 .private_value = (unsigned long)&(struct soc_mixer_control) \
183 {.reg = xreg_left, \
184 .rreg = xreg_right, .shift = xshift, \
185 .min = xmin, .max = xmax} }
186
187
6c2fb6a8
GL
188/*
189 * Simplified versions of above macros, declaring a struct and calculating
190 * ARRAY_SIZE internally
191 */
192#define SOC_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xtexts) \
193 struct soc_enum name = SOC_ENUM_DOUBLE(xreg, xshift_l, xshift_r, \
194 ARRAY_SIZE(xtexts), xtexts)
195#define SOC_ENUM_SINGLE_DECL(name, xreg, xshift, xtexts) \
196 SOC_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xtexts)
197#define SOC_ENUM_SINGLE_EXT_DECL(name, xtexts) \
198 struct soc_enum name = SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(xtexts), xtexts)
199#define SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift_l, xshift_r, xmask, xtexts, xvalues) \
200 struct soc_enum name = SOC_VALUE_ENUM_DOUBLE(xreg, xshift_l, xshift_r, xmask, \
201 ARRAY_SIZE(xtexts), xtexts, xvalues)
202#define SOC_VALUE_ENUM_SINGLE_DECL(name, xreg, xshift, xmask, xtexts, xvalues) \
203 SOC_VALUE_ENUM_DOUBLE_DECL(name, xreg, xshift, xshift, xmask, xtexts, xvalues)
204
0168bf0d
LG
205/*
206 * Component probe and remove ordering levels for components with runtime
207 * dependencies.
208 */
209#define SND_SOC_COMP_ORDER_FIRST -2
210#define SND_SOC_COMP_ORDER_EARLY -1
211#define SND_SOC_COMP_ORDER_NORMAL 0
212#define SND_SOC_COMP_ORDER_LATE 1
213#define SND_SOC_COMP_ORDER_LAST 2
214
0be9898a
MB
215/*
216 * Bias levels
217 *
218 * @ON: Bias is fully on for audio playback and capture operations.
219 * @PREPARE: Prepare for audio operations. Called before DAPM switching for
220 * stream start and stop operations.
221 * @STANDBY: Low power standby state when no playback/capture operations are
222 * in progress. NOTE: The transition time between STANDBY and ON
223 * should be as fast as possible and no longer than 10ms.
224 * @OFF: Power Off. No restrictions on transition times.
225 */
226enum snd_soc_bias_level {
56fba41f
MB
227 SND_SOC_BIAS_OFF = 0,
228 SND_SOC_BIAS_STANDBY = 1,
229 SND_SOC_BIAS_PREPARE = 2,
230 SND_SOC_BIAS_ON = 3,
0be9898a
MB
231};
232
8a2cd618
MB
233struct snd_jack;
234struct snd_soc_card;
808db4a4
RP
235struct snd_soc_pcm_stream;
236struct snd_soc_ops;
808db4a4 237struct snd_soc_pcm_runtime;
3c4b266f 238struct snd_soc_dai;
f0fba2ad 239struct snd_soc_dai_driver;
12a48a8c 240struct snd_soc_platform;
d273ebe7 241struct snd_soc_dai_link;
f0fba2ad 242struct snd_soc_platform_driver;
808db4a4 243struct snd_soc_codec;
f0fba2ad 244struct snd_soc_codec_driver;
808db4a4 245struct soc_enum;
8a2cd618 246struct snd_soc_jack;
fa9879ed 247struct snd_soc_jack_zone;
8a2cd618 248struct snd_soc_jack_pin;
7a30a3db 249struct snd_soc_cache_ops;
ce6120cc 250#include <sound/soc-dapm.h>
f0fba2ad 251
ec67624d
LCM
252#ifdef CONFIG_GPIOLIB
253struct snd_soc_jack_gpio;
254#endif
808db4a4
RP
255
256typedef int (*hw_write_t)(void *,const char* ,int);
808db4a4
RP
257
258extern struct snd_ac97_bus_ops soc_ac97_ops;
259
7084a42b 260enum snd_soc_control_type {
e9c03905 261 SND_SOC_I2C = 1,
7084a42b
MB
262 SND_SOC_SPI,
263};
264
7a30a3db 265enum snd_soc_compress_type {
119bd789 266 SND_SOC_FLAT_COMPRESSION = 1,
a7f387d5
DP
267 SND_SOC_LZO_COMPRESSION,
268 SND_SOC_RBTREE_COMPRESSION
7a30a3db
DP
269};
270
b8c0dab9
LG
271enum snd_soc_pcm_subclass {
272 SND_SOC_PCM_CLASS_PCM = 0,
273 SND_SOC_PCM_CLASS_BE = 1,
274};
275
ec4ee52a
MB
276int snd_soc_codec_set_sysclk(struct snd_soc_codec *codec, int clk_id,
277 unsigned int freq, int dir);
278int snd_soc_codec_set_pll(struct snd_soc_codec *codec, int pll_id, int source,
279 unsigned int freq_in, unsigned int freq_out);
280
70a7ca34
VK
281int snd_soc_register_card(struct snd_soc_card *card);
282int snd_soc_unregister_card(struct snd_soc_card *card);
6f8ab4ac
MB
283int snd_soc_suspend(struct device *dev);
284int snd_soc_resume(struct device *dev);
285int snd_soc_poweroff(struct device *dev);
f0fba2ad
LG
286int snd_soc_register_platform(struct device *dev,
287 struct snd_soc_platform_driver *platform_drv);
288void snd_soc_unregister_platform(struct device *dev);
289int snd_soc_register_codec(struct device *dev,
001ae4c0 290 const struct snd_soc_codec_driver *codec_drv,
f0fba2ad
LG
291 struct snd_soc_dai_driver *dai_drv, int num_dai);
292void snd_soc_unregister_codec(struct device *dev);
181e055e
MB
293int snd_soc_codec_volatile_register(struct snd_soc_codec *codec,
294 unsigned int reg);
239c9706
DP
295int snd_soc_codec_readable_register(struct snd_soc_codec *codec,
296 unsigned int reg);
297int snd_soc_codec_writable_register(struct snd_soc_codec *codec,
298 unsigned int reg);
17a52fd6 299int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
7084a42b
MB
300 int addr_bits, int data_bits,
301 enum snd_soc_control_type control);
7a30a3db
DP
302int snd_soc_cache_sync(struct snd_soc_codec *codec);
303int snd_soc_cache_init(struct snd_soc_codec *codec);
304int snd_soc_cache_exit(struct snd_soc_codec *codec);
305int snd_soc_cache_write(struct snd_soc_codec *codec,
306 unsigned int reg, unsigned int value);
307int snd_soc_cache_read(struct snd_soc_codec *codec,
308 unsigned int reg, unsigned int *value);
066d16c3
DP
309int snd_soc_default_volatile_register(struct snd_soc_codec *codec,
310 unsigned int reg);
311int snd_soc_default_readable_register(struct snd_soc_codec *codec,
312 unsigned int reg);
8020454c
DP
313int snd_soc_default_writable_register(struct snd_soc_codec *codec,
314 unsigned int reg);
f1442bc1
LG
315int snd_soc_platform_read(struct snd_soc_platform *platform,
316 unsigned int reg);
317int snd_soc_platform_write(struct snd_soc_platform *platform,
318 unsigned int reg, unsigned int val);
12a48a8c 319
7aae816d
MB
320/* Utility functions to get clock rates from various things */
321int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots);
322int snd_soc_params_to_frame_size(struct snd_pcm_hw_params *params);
c0fa59df 323int snd_soc_calc_bclk(int fs, int sample_size, int channels, int tdm_slots);
7aae816d
MB
324int snd_soc_params_to_bclk(struct snd_pcm_hw_params *parms);
325
808db4a4
RP
326/* set runtime hw params */
327int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream,
328 const struct snd_pcm_hardware *hw);
808db4a4 329
8a2cd618 330/* Jack reporting */
f0fba2ad 331int snd_soc_jack_new(struct snd_soc_codec *codec, const char *id, int type,
8a2cd618
MB
332 struct snd_soc_jack *jack);
333void snd_soc_jack_report(struct snd_soc_jack *jack, int status, int mask);
334int snd_soc_jack_add_pins(struct snd_soc_jack *jack, int count,
335 struct snd_soc_jack_pin *pins);
d5021ec9
MB
336void snd_soc_jack_notifier_register(struct snd_soc_jack *jack,
337 struct notifier_block *nb);
338void snd_soc_jack_notifier_unregister(struct snd_soc_jack *jack,
339 struct notifier_block *nb);
fa9879ed
VK
340int snd_soc_jack_add_zones(struct snd_soc_jack *jack, int count,
341 struct snd_soc_jack_zone *zones);
342int snd_soc_jack_get_type(struct snd_soc_jack *jack, int micbias_voltage);
ec67624d
LCM
343#ifdef CONFIG_GPIOLIB
344int snd_soc_jack_add_gpios(struct snd_soc_jack *jack, int count,
345 struct snd_soc_jack_gpio *gpios);
346void snd_soc_jack_free_gpios(struct snd_soc_jack *jack, int count,
347 struct snd_soc_jack_gpio *gpios);
348#endif
8a2cd618 349
808db4a4
RP
350/* codec register bit access */
351int snd_soc_update_bits(struct snd_soc_codec *codec, unsigned short reg,
46f5822f 352 unsigned int mask, unsigned int value);
dd1b3d53
MB
353int snd_soc_update_bits_locked(struct snd_soc_codec *codec,
354 unsigned short reg, unsigned int mask,
355 unsigned int value);
808db4a4 356int snd_soc_test_bits(struct snd_soc_codec *codec, unsigned short reg,
46f5822f 357 unsigned int mask, unsigned int value);
808db4a4
RP
358
359int snd_soc_new_ac97_codec(struct snd_soc_codec *codec,
360 struct snd_ac97_bus_ops *ops, int num);
361void snd_soc_free_ac97_codec(struct snd_soc_codec *codec);
362
363/*
364 *Controls
365 */
366struct snd_kcontrol *snd_soc_cnew(const struct snd_kcontrol_new *_template,
efb7ac3f
MB
367 void *data, char *long_name,
368 const char *prefix);
3e8e1952
IM
369int snd_soc_add_controls(struct snd_soc_codec *codec,
370 const struct snd_kcontrol_new *controls, int num_controls);
808db4a4
RP
371int snd_soc_info_enum_double(struct snd_kcontrol *kcontrol,
372 struct snd_ctl_elem_info *uinfo);
373int snd_soc_info_enum_ext(struct snd_kcontrol *kcontrol,
374 struct snd_ctl_elem_info *uinfo);
375int snd_soc_get_enum_double(struct snd_kcontrol *kcontrol,
376 struct snd_ctl_elem_value *ucontrol);
377int snd_soc_put_enum_double(struct snd_kcontrol *kcontrol,
378 struct snd_ctl_elem_value *ucontrol);
2e72f8e3
PU
379int snd_soc_get_value_enum_double(struct snd_kcontrol *kcontrol,
380 struct snd_ctl_elem_value *ucontrol);
381int snd_soc_put_value_enum_double(struct snd_kcontrol *kcontrol,
382 struct snd_ctl_elem_value *ucontrol);
808db4a4
RP
383int snd_soc_info_volsw(struct snd_kcontrol *kcontrol,
384 struct snd_ctl_elem_info *uinfo);
385int snd_soc_info_volsw_ext(struct snd_kcontrol *kcontrol,
386 struct snd_ctl_elem_info *uinfo);
392abe9c 387#define snd_soc_info_bool_ext snd_ctl_boolean_mono_info
808db4a4
RP
388int snd_soc_get_volsw(struct snd_kcontrol *kcontrol,
389 struct snd_ctl_elem_value *ucontrol);
390int snd_soc_put_volsw(struct snd_kcontrol *kcontrol,
391 struct snd_ctl_elem_value *ucontrol);
392int snd_soc_info_volsw_2r(struct snd_kcontrol *kcontrol,
393 struct snd_ctl_elem_info *uinfo);
394int snd_soc_get_volsw_2r(struct snd_kcontrol *kcontrol,
395 struct snd_ctl_elem_value *ucontrol);
396int snd_soc_put_volsw_2r(struct snd_kcontrol *kcontrol,
397 struct snd_ctl_elem_value *ucontrol);
e13ac2e9
MB
398int snd_soc_info_volsw_s8(struct snd_kcontrol *kcontrol,
399 struct snd_ctl_elem_info *uinfo);
400int snd_soc_get_volsw_s8(struct snd_kcontrol *kcontrol,
401 struct snd_ctl_elem_value *ucontrol);
402int snd_soc_put_volsw_s8(struct snd_kcontrol *kcontrol,
403 struct snd_ctl_elem_value *ucontrol);
637d3847
PU
404int snd_soc_limit_volume(struct snd_soc_codec *codec,
405 const char *name, int max);
b6f4bb38 406int snd_soc_info_volsw_2r_sx(struct snd_kcontrol *kcontrol,
407 struct snd_ctl_elem_info *uinfo);
408int snd_soc_get_volsw_2r_sx(struct snd_kcontrol *kcontrol,
409 struct snd_ctl_elem_value *ucontrol);
410int snd_soc_put_volsw_2r_sx(struct snd_kcontrol *kcontrol,
411 struct snd_ctl_elem_value *ucontrol);
808db4a4 412
066d16c3
DP
413/**
414 * struct snd_soc_reg_access - Describes whether a given register is
415 * readable, writable or volatile.
416 *
417 * @reg: the register number
418 * @read: whether this register is readable
419 * @write: whether this register is writable
420 * @vol: whether this register is volatile
421 */
422struct snd_soc_reg_access {
423 u16 reg;
424 u16 read;
425 u16 write;
426 u16 vol;
427};
428
8a2cd618
MB
429/**
430 * struct snd_soc_jack_pin - Describes a pin to update based on jack detection
431 *
432 * @pin: name of the pin to update
433 * @mask: bits to check for in reported jack status
434 * @invert: if non-zero then pin is enabled when status is not reported
435 */
436struct snd_soc_jack_pin {
437 struct list_head list;
438 const char *pin;
439 int mask;
440 bool invert;
441};
442
fa9879ed
VK
443/**
444 * struct snd_soc_jack_zone - Describes voltage zones of jack detection
445 *
446 * @min_mv: start voltage in mv
447 * @max_mv: end voltage in mv
448 * @jack_type: type of jack that is expected for this voltage
449 * @debounce_time: debounce_time for jack, codec driver should wait for this
450 * duration before reading the adc for voltages
451 * @:list: list container
452 */
453struct snd_soc_jack_zone {
454 unsigned int min_mv;
455 unsigned int max_mv;
456 unsigned int jack_type;
457 unsigned int debounce_time;
458 struct list_head list;
459};
460
ec67624d
LCM
461/**
462 * struct snd_soc_jack_gpio - Describes a gpio pin for jack detection
463 *
464 * @gpio: gpio number
465 * @name: gpio name
466 * @report: value to report when jack detected
467 * @invert: report presence in low state
468 * @debouce_time: debouce time in ms
7887ab3a 469 * @wake: enable as wake source
fadddc87
MB
470 * @jack_status_check: callback function which overrides the detection
471 * to provide more complex checks (eg, reading an
472 * ADC).
ec67624d
LCM
473 */
474#ifdef CONFIG_GPIOLIB
475struct snd_soc_jack_gpio {
476 unsigned int gpio;
477 const char *name;
478 int report;
479 int invert;
480 int debounce_time;
7887ab3a
MB
481 bool wake;
482
ec67624d 483 struct snd_soc_jack *jack;
4c14d78e 484 struct delayed_work work;
c871a053
JS
485
486 int (*jack_status_check)(void);
ec67624d
LCM
487};
488#endif
489
8a2cd618
MB
490struct snd_soc_jack {
491 struct snd_jack *jack;
f0fba2ad 492 struct snd_soc_codec *codec;
8a2cd618
MB
493 struct list_head pins;
494 int status;
d5021ec9 495 struct blocking_notifier_head notifier;
fa9879ed 496 struct list_head jack_zones;
8a2cd618
MB
497};
498
808db4a4
RP
499/* SoC PCM stream information */
500struct snd_soc_pcm_stream {
f0fba2ad 501 const char *stream_name;
1c433fbd
GG
502 u64 formats; /* SNDRV_PCM_FMTBIT_* */
503 unsigned int rates; /* SNDRV_PCM_RATE_* */
808db4a4
RP
504 unsigned int rate_min; /* min rate */
505 unsigned int rate_max; /* max rate */
506 unsigned int channels_min; /* min channels */
507 unsigned int channels_max; /* max channels */
808db4a4
RP
508};
509
510/* SoC audio ops */
511struct snd_soc_ops {
512 int (*startup)(struct snd_pcm_substream *);
513 void (*shutdown)(struct snd_pcm_substream *);
514 int (*hw_params)(struct snd_pcm_substream *, struct snd_pcm_hw_params *);
515 int (*hw_free)(struct snd_pcm_substream *);
516 int (*prepare)(struct snd_pcm_substream *);
517 int (*trigger)(struct snd_pcm_substream *, int);
518};
519
7a30a3db
DP
520/* SoC cache ops */
521struct snd_soc_cache_ops {
0d735eaa 522 const char *name;
7a30a3db
DP
523 enum snd_soc_compress_type id;
524 int (*init)(struct snd_soc_codec *codec);
525 int (*exit)(struct snd_soc_codec *codec);
526 int (*read)(struct snd_soc_codec *codec, unsigned int reg,
527 unsigned int *value);
528 int (*write)(struct snd_soc_codec *codec, unsigned int reg,
529 unsigned int value);
530 int (*sync)(struct snd_soc_codec *codec);
531};
532
f0fba2ad 533/* SoC Audio Codec device */
808db4a4 534struct snd_soc_codec {
f0fba2ad 535 const char *name;
ead9b919 536 const char *name_prefix;
f0fba2ad 537 int id;
0d0cf00a 538 struct device *dev;
001ae4c0 539 const struct snd_soc_codec_driver *driver;
0d0cf00a 540
f0fba2ad
LG
541 struct mutex mutex;
542 struct snd_soc_card *card;
0d0cf00a 543 struct list_head list;
f0fba2ad
LG
544 struct list_head card_list;
545 int num_dai;
23bbce34 546 enum snd_soc_compress_type compress_type;
aea170a0 547 size_t reg_size; /* reg_cache_size * reg_word_size */
1500b7b5
DP
548 int (*volatile_register)(struct snd_soc_codec *, unsigned int);
549 int (*readable_register)(struct snd_soc_codec *, unsigned int);
8020454c 550 int (*writable_register)(struct snd_soc_codec *, unsigned int);
808db4a4
RP
551
552 /* runtime */
808db4a4
RP
553 struct snd_ac97 *ac97; /* for ad-hoc ac97 devices */
554 unsigned int active;
dad8e7ae 555 unsigned int cache_bypass:1; /* Suppress access to the cache */
f0fba2ad
LG
556 unsigned int suspended:1; /* Codec is in suspend PM state */
557 unsigned int probed:1; /* Codec has been probed */
558 unsigned int ac97_registered:1; /* Codec has been AC97 registered */
0562f788 559 unsigned int ac97_created:1; /* Codec has been created by SoC */
f0fba2ad 560 unsigned int sysfs_registered:1; /* codec has been sysfs registered */
fdf0f54d 561 unsigned int cache_init:1; /* codec cache has been initialized */
aaee8ef1
MB
562 u32 cache_only; /* Suppress writes to hardware */
563 u32 cache_sync; /* Cache needs to be synced to hardware */
808db4a4
RP
564
565 /* codec IO */
566 void *control_data; /* codec control (i2c/3wire) data */
67850a89 567 enum snd_soc_control_type control_type;
808db4a4 568 hw_write_t hw_write;
afa2f106 569 unsigned int (*hw_read)(struct snd_soc_codec *, unsigned int);
c3acec26
MB
570 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
571 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
5fb609d4 572 int (*bulk_write_raw)(struct snd_soc_codec *, unsigned int, const void *, size_t);
808db4a4 573 void *reg_cache;
3335ddca 574 const void *reg_def_copy;
7a30a3db
DP
575 const struct snd_soc_cache_ops *cache_ops;
576 struct mutex cache_rw_mutex;
a96ca338 577
808db4a4 578 /* dapm */
ce6120cc 579 struct snd_soc_dapm_context dapm;
808db4a4 580
384c89e2 581#ifdef CONFIG_DEBUG_FS
88439ac7 582 struct dentry *debugfs_codec_root;
384c89e2 583 struct dentry *debugfs_reg;
79fb9387 584 struct dentry *debugfs_dapm;
384c89e2 585#endif
808db4a4
RP
586};
587
f0fba2ad
LG
588/* codec driver */
589struct snd_soc_codec_driver {
590
591 /* driver ops */
592 int (*probe)(struct snd_soc_codec *);
593 int (*remove)(struct snd_soc_codec *);
594 int (*suspend)(struct snd_soc_codec *,
595 pm_message_t state);
596 int (*resume)(struct snd_soc_codec *);
597
b7af1daf
MB
598 /* Default control and setup, added after probe() is run */
599 const struct snd_kcontrol_new *controls;
600 int num_controls;
89b95ac0
MB
601 const struct snd_soc_dapm_widget *dapm_widgets;
602 int num_dapm_widgets;
603 const struct snd_soc_dapm_route *dapm_routes;
604 int num_dapm_routes;
605
ec4ee52a
MB
606 /* codec wide operations */
607 int (*set_sysclk)(struct snd_soc_codec *codec,
608 int clk_id, unsigned int freq, int dir);
609 int (*set_pll)(struct snd_soc_codec *codec, int pll_id, int source,
610 unsigned int freq_in, unsigned int freq_out);
611
f0fba2ad
LG
612 /* codec IO */
613 unsigned int (*read)(struct snd_soc_codec *, unsigned int);
614 int (*write)(struct snd_soc_codec *, unsigned int, unsigned int);
615 int (*display_register)(struct snd_soc_codec *, char *,
616 size_t, unsigned int);
d4754ec9
DP
617 int (*volatile_register)(struct snd_soc_codec *, unsigned int);
618 int (*readable_register)(struct snd_soc_codec *, unsigned int);
8020454c 619 int (*writable_register)(struct snd_soc_codec *, unsigned int);
f0fba2ad
LG
620 short reg_cache_size;
621 short reg_cache_step;
622 short reg_word_size;
623 const void *reg_cache_default;
066d16c3
DP
624 short reg_access_size;
625 const struct snd_soc_reg_access *reg_access_default;
7a30a3db 626 enum snd_soc_compress_type compress_type;
f0fba2ad
LG
627
628 /* codec bias level */
629 int (*set_bias_level)(struct snd_soc_codec *,
630 enum snd_soc_bias_level level);
474b62d6
MB
631
632 void (*seq_notifier)(struct snd_soc_dapm_context *,
f85a9e0d 633 enum snd_soc_dapm_type, int);
0168bf0d
LG
634
635 /* probe ordering - for components with runtime dependencies */
636 int probe_order;
637 int remove_order;
808db4a4
RP
638};
639
640/* SoC platform interface */
f0fba2ad 641struct snd_soc_platform_driver {
808db4a4 642
f0fba2ad
LG
643 int (*probe)(struct snd_soc_platform *);
644 int (*remove)(struct snd_soc_platform *);
645 int (*suspend)(struct snd_soc_dai *dai);
646 int (*resume)(struct snd_soc_dai *dai);
808db4a4
RP
647
648 /* pcm creation and destruction */
552d1ef6 649 int (*pcm_new)(struct snd_soc_pcm_runtime *);
808db4a4
RP
650 void (*pcm_free)(struct snd_pcm *);
651
258020d0
PU
652 /*
653 * For platform caused delay reporting.
654 * Optional.
655 */
656 snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *,
657 struct snd_soc_dai *);
658
808db4a4 659 /* platform stream ops */
f0fba2ad 660 struct snd_pcm_ops *ops;
0168bf0d
LG
661
662 /* probe ordering - for components with runtime dependencies */
663 int probe_order;
664 int remove_order;
f1442bc1
LG
665
666 /* platform IO - used for platform DAPM */
667 unsigned int (*read)(struct snd_soc_platform *, unsigned int);
668 int (*write)(struct snd_soc_platform *, unsigned int, unsigned int);
808db4a4
RP
669};
670
f0fba2ad
LG
671struct snd_soc_platform {
672 const char *name;
673 int id;
674 struct device *dev;
675 struct snd_soc_platform_driver *driver;
808db4a4 676
f0fba2ad
LG
677 unsigned int suspended:1; /* platform is suspended */
678 unsigned int probed:1;
1c433fbd 679
f0fba2ad
LG
680 struct snd_soc_card *card;
681 struct list_head list;
682 struct list_head card_list;
683};
808db4a4 684
f0fba2ad
LG
685struct snd_soc_dai_link {
686 /* config - must be set by machine driver */
687 const char *name; /* Codec name */
688 const char *stream_name; /* Stream name */
689 const char *codec_name; /* for multi-codec */
690 const char *platform_name; /* for multi-platform */
691 const char *cpu_dai_name;
692 const char *codec_dai_name;
4ccab3e7 693
3efab7dc
MB
694 /* Keep DAI active over suspend */
695 unsigned int ignore_suspend:1;
696
06f409d7
MB
697 /* Symmetry requirements */
698 unsigned int symmetric_rates:1;
699
f0fba2ad
LG
700 /* codec/machine specific init - e.g. add machine controls */
701 int (*init)(struct snd_soc_pcm_runtime *rtd);
06f409d7 702
f0fba2ad
LG
703 /* machine stream operations */
704 struct snd_soc_ops *ops;
808db4a4
RP
705};
706
ff819b83 707struct snd_soc_codec_conf {
ead9b919 708 const char *dev_name;
ff819b83
DP
709
710 /*
711 * optional map of kcontrol, widget and path name prefixes that are
712 * associated per device
713 */
ead9b919 714 const char *name_prefix;
ff819b83
DP
715
716 /*
717 * set this to the desired compression type if you want to
718 * override the one supplied in codec->driver->compress_type
719 */
720 enum snd_soc_compress_type compress_type;
ead9b919
JN
721};
722
2eea392d
JN
723struct snd_soc_aux_dev {
724 const char *name; /* Codec name */
725 const char *codec_name; /* for multi-codec */
726
727 /* codec/machine specific init - e.g. add machine controls */
728 int (*init)(struct snd_soc_dapm_context *dapm);
729};
730
87506549
MB
731/* SoC card */
732struct snd_soc_card {
f0fba2ad 733 const char *name;
22de71ba
LG
734 const char *long_name;
735 const char *driver_name;
c5af3a2e 736 struct device *dev;
f0fba2ad
LG
737 struct snd_card *snd_card;
738 struct module *owner;
c5af3a2e
MB
739
740 struct list_head list;
f0fba2ad 741 struct mutex mutex;
c5af3a2e 742
f0fba2ad 743 bool instantiated;
808db4a4 744
e7361ec4 745 int (*probe)(struct snd_soc_card *card);
28e9ad92 746 int (*late_probe)(struct snd_soc_card *card);
e7361ec4 747 int (*remove)(struct snd_soc_card *card);
808db4a4
RP
748
749 /* the pre and post PM functions are used to do any PM work before and
750 * after the codec and DAI's do any PM work. */
70b2ac12
MB
751 int (*suspend_pre)(struct snd_soc_card *card);
752 int (*suspend_post)(struct snd_soc_card *card);
753 int (*resume_pre)(struct snd_soc_card *card);
754 int (*resume_post)(struct snd_soc_card *card);
808db4a4 755
0b4d221b 756 /* callbacks */
87506549 757 int (*set_bias_level)(struct snd_soc_card *,
d4c6005f 758 struct snd_soc_dapm_context *dapm,
0be9898a 759 enum snd_soc_bias_level level);
1badabd9 760 int (*set_bias_level_post)(struct snd_soc_card *,
d4c6005f 761 struct snd_soc_dapm_context *dapm,
1badabd9 762 enum snd_soc_bias_level level);
0b4d221b 763
6c5f1fed 764 long pmdown_time;
96dd3622 765
808db4a4
RP
766 /* CPU <--> Codec DAI links */
767 struct snd_soc_dai_link *dai_link;
768 int num_links;
f0fba2ad
LG
769 struct snd_soc_pcm_runtime *rtd;
770 int num_rtd;
6308419a 771
ff819b83
DP
772 /* optional codec specific configuration */
773 struct snd_soc_codec_conf *codec_conf;
774 int num_configs;
ead9b919 775
2eea392d
JN
776 /*
777 * optional auxiliary devices such as amplifiers or codecs with DAI
778 * link unused
779 */
780 struct snd_soc_aux_dev *aux_dev;
781 int num_aux_devs;
782 struct snd_soc_pcm_runtime *rtd_aux;
783 int num_aux_rtd;
784
b7af1daf
MB
785 const struct snd_kcontrol_new *controls;
786 int num_controls;
787
b8ad29de
MB
788 /*
789 * Card-specific routes and widgets.
790 */
d06e48db 791 const struct snd_soc_dapm_widget *dapm_widgets;
b8ad29de 792 int num_dapm_widgets;
d06e48db 793 const struct snd_soc_dapm_route *dapm_routes;
b8ad29de
MB
794 int num_dapm_routes;
795
6308419a 796 struct work_struct deferred_resume_work;
f0fba2ad
LG
797
798 /* lists of probed devices belonging to this card */
799 struct list_head codec_dev_list;
800 struct list_head platform_dev_list;
801 struct list_head dai_dev_list;
a6052154 802
97c866de 803 struct list_head widgets;
8ddab3f5 804 struct list_head paths;
7be31be8 805 struct list_head dapm_list;
8ddab3f5 806
e37a4970
MB
807 /* Generic DAPM context for the card */
808 struct snd_soc_dapm_context dapm;
809
a6052154
JN
810#ifdef CONFIG_DEBUG_FS
811 struct dentry *debugfs_card_root;
3a45b867 812 struct dentry *debugfs_pop_time;
a6052154 813#endif
3a45b867 814 u32 pop_time;
dddf3e4c
MB
815
816 void *drvdata;
808db4a4
RP
817};
818
f0fba2ad
LG
819/* SoC machine DAI configuration, glues a codec and cpu DAI together */
820struct snd_soc_pcm_runtime {
821 struct device dev;
87506549 822 struct snd_soc_card *card;
f0fba2ad 823 struct snd_soc_dai_link *dai_link;
b8c0dab9
LG
824 struct mutex pcm_mutex;
825 enum snd_soc_pcm_subclass pcm_subclass;
826 struct snd_pcm_ops ops;
f0fba2ad
LG
827
828 unsigned int complete:1;
829 unsigned int dev_registered:1;
808db4a4 830
f0fba2ad
LG
831 /* Symmetry data - only valid if symmetry is being enforced */
832 unsigned int rate;
833 long pmdown_time;
834
835 /* runtime devices */
836 struct snd_pcm *pcm;
837 struct snd_soc_codec *codec;
838 struct snd_soc_platform *platform;
839 struct snd_soc_dai *codec_dai;
840 struct snd_soc_dai *cpu_dai;
841
842 struct delayed_work delayed_work;
808db4a4
RP
843};
844
4eaa9819
JS
845/* mixer control */
846struct soc_mixer_control {
d11bb4a9 847 int min, max, platform_max;
815ecf8d 848 unsigned int reg, rreg, shift, rshift, invert;
4eaa9819
JS
849};
850
808db4a4
RP
851/* enumerated kcontrol */
852struct soc_enum {
2e72f8e3
PU
853 unsigned short reg;
854 unsigned short reg2;
855 unsigned char shift_l;
856 unsigned char shift_r;
857 unsigned int max;
858 unsigned int mask;
87023ff7 859 const char * const *texts;
2e72f8e3
PU
860 const unsigned int *values;
861 void *dapm;
862};
863
5c82f567 864/* codec IO */
c3753707
MB
865unsigned int snd_soc_read(struct snd_soc_codec *codec, unsigned int reg);
866unsigned int snd_soc_write(struct snd_soc_codec *codec,
867 unsigned int reg, unsigned int val);
5fb609d4
DP
868unsigned int snd_soc_bulk_write_raw(struct snd_soc_codec *codec,
869 unsigned int reg, const void *data, size_t len);
5c82f567 870
f0fba2ad
LG
871/* device driver data */
872
dddf3e4c
MB
873static inline void snd_soc_card_set_drvdata(struct snd_soc_card *card,
874 void *data)
875{
876 card->drvdata = data;
877}
878
879static inline void *snd_soc_card_get_drvdata(struct snd_soc_card *card)
880{
881 return card->drvdata;
882}
883
b2c812e2 884static inline void snd_soc_codec_set_drvdata(struct snd_soc_codec *codec,
f0fba2ad 885 void *data)
b2c812e2 886{
f0fba2ad 887 dev_set_drvdata(codec->dev, data);
b2c812e2
MB
888}
889
890static inline void *snd_soc_codec_get_drvdata(struct snd_soc_codec *codec)
891{
f0fba2ad
LG
892 return dev_get_drvdata(codec->dev);
893}
894
895static inline void snd_soc_platform_set_drvdata(struct snd_soc_platform *platform,
896 void *data)
897{
898 dev_set_drvdata(platform->dev, data);
899}
900
901static inline void *snd_soc_platform_get_drvdata(struct snd_soc_platform *platform)
902{
903 return dev_get_drvdata(platform->dev);
904}
905
906static inline void snd_soc_pcm_set_drvdata(struct snd_soc_pcm_runtime *rtd,
907 void *data)
908{
909 dev_set_drvdata(&rtd->dev, data);
910}
911
912static inline void *snd_soc_pcm_get_drvdata(struct snd_soc_pcm_runtime *rtd)
913{
914 return dev_get_drvdata(&rtd->dev);
b2c812e2
MB
915}
916
4e10bda0
VK
917static inline void snd_soc_initialize_card_lists(struct snd_soc_card *card)
918{
919 INIT_LIST_HEAD(&card->dai_dev_list);
920 INIT_LIST_HEAD(&card->codec_dev_list);
921 INIT_LIST_HEAD(&card->platform_dev_list);
922 INIT_LIST_HEAD(&card->widgets);
923 INIT_LIST_HEAD(&card->paths);
924 INIT_LIST_HEAD(&card->dapm_list);
925}
926
fb257897
MB
927int snd_soc_util_init(void);
928void snd_soc_util_exit(void);
929
a47cbe72
MB
930#include <sound/soc-dai.h>
931
faff4bb0 932#ifdef CONFIG_DEBUG_FS
8a9dab1a 933extern struct dentry *snd_soc_debugfs_root;
faff4bb0
SW
934#endif
935
6f8ab4ac
MB
936extern const struct dev_pm_ops snd_soc_pm_ops;
937
808db4a4 938#endif