[mirror_ubuntu-jammy-kernel.git] / include / sound / vx_core.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * Driver for Digigram VX soundcards
 *
 * Hardware core part
 *
 * Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
 */

#ifndef __SOUND_VX_COMMON_H
#define __SOUND_VX_COMMON_H

#include <sound/pcm.h>
#include <sound/hwdep.h>
#include <linux/interrupt.h>

struct firmware;
struct device;

#define VX_DRIVER_VERSION	0x010000	/* 1.0.0 */

/*
 */
#define SIZE_MAX_CMD    0x10
#define SIZE_MAX_STATUS 0x10

struct vx_rmh {
	u16	LgCmd;		/* length of the command to send (WORDs) */
	u16	LgStat;		/* length of the status received (WORDs) */
	u32	Cmd[SIZE_MAX_CMD];
	u32	Stat[SIZE_MAX_STATUS];
	u16	DspStat;	/* status type, RMP_SSIZE_XXX */
};
	
typedef u64 pcx_time_t;

#define VX_MAX_PIPES	16
#define VX_MAX_PERIODS	32
#define VX_MAX_CODECS	2

struct vx_ibl_info {
	int size;	/* the current IBL size (0 = query) in bytes */
	int max_size;	/* max. IBL size in bytes */
	int min_size;	/* min. IBL size in bytes */
	int granularity;	/* granularity */
};

struct vx_pipe {
	int number;
	unsigned int is_capture: 1;
	unsigned int data_mode: 1;
	unsigned int running: 1;
	unsigned int prepared: 1;
	int channels;
	unsigned int differed_type;
	pcx_time_t pcx_time;
	struct snd_pcm_substream *substream;

	int hbuf_size;		/* H-buffer size in bytes */
	int buffer_bytes;	/* the ALSA pcm buffer size in bytes */
	int period_bytes;	/* the ALSA pcm period size in bytes */
	int hw_ptr;		/* the current hardware pointer in bytes */
	int position;		/* the current position in frames (playback only) */
	int transferred;	/* the transferred size (per period) in frames */
	int align;		/* size of alignment */
	u64 cur_count;		/* current sample position (for playback) */

	unsigned int references;     /* an output pipe may be used for monitoring and/or playback */
	struct vx_pipe *monitoring_pipe;  /* pointer to the monitoring pipe (capture pipe only)*/
};

struct vx_core;

struct snd_vx_ops {
	/* low-level i/o */
	unsigned char (*in8)(struct vx_core *chip, int reg);
	unsigned int (*in32)(struct vx_core *chip, int reg);
	void (*out8)(struct vx_core *chip, int reg, unsigned char val);
	void (*out32)(struct vx_core *chip, int reg, unsigned int val);
	/* irq */
	int (*test_and_ack)(struct vx_core *chip);
	void (*validate_irq)(struct vx_core *chip, int enable);
	/* codec */
	void (*write_codec)(struct vx_core *chip, int codec, unsigned int data);
	void (*akm_write)(struct vx_core *chip, int reg, unsigned int data);
	void (*reset_codec)(struct vx_core *chip);
	void (*change_audio_source)(struct vx_core *chip, int src);
	void (*set_clock_source)(struct vx_core *chp, int src);
	/* chip init */
	int (*load_dsp)(struct vx_core *chip, int idx, const struct firmware *fw);
	void (*reset_dsp)(struct vx_core *chip);
	void (*reset_board)(struct vx_core *chip, int cold_reset);
	int (*add_controls)(struct vx_core *chip);
	/* pcm */
	void (*dma_write)(struct vx_core *chip, struct snd_pcm_runtime *runtime,
			  struct vx_pipe *pipe, int count);
	void (*dma_read)(struct vx_core *chip, struct snd_pcm_runtime *runtime,
			  struct vx_pipe *pipe, int count);
};

struct snd_vx_hardware {
	const char *name;
	int type;	/* VX_TYPE_XXX */

	/* hardware specs */
	unsigned int num_codecs;
	unsigned int num_ins;
	unsigned int num_outs;
	unsigned int output_level_max;
	const unsigned int *output_level_db_scale;
};

/* hwdep id string */
#define SND_VX_HWDEP_ID		"VX Loader"

/* hardware type */
enum {
	/* VX222 PCI */
	VX_TYPE_BOARD,		/* old VX222 PCI */
	VX_TYPE_V2,		/* VX222 V2 PCI */
	VX_TYPE_MIC,		/* VX222 Mic PCI */
	/* VX-pocket */
	VX_TYPE_VXPOCKET,	/* VXpocket V2 */
	VX_TYPE_VXP440,		/* VXpocket 440 */
	VX_TYPE_NUMS
};

/* chip status */
enum {
	VX_STAT_XILINX_LOADED	= (1 << 0),	/* devices are registered */
	VX_STAT_DEVICE_INIT	= (1 << 1),	/* devices are registered */
	VX_STAT_CHIP_INIT	= (1 << 2),	/* all operational */
	VX_STAT_IN_SUSPEND	= (1 << 10),	/* in suspend phase */
	VX_STAT_IS_STALE	= (1 << 15)	/* device is stale */
};

/* min/max values for analog output for old codecs */
#define VX_ANALOG_OUT_LEVEL_MAX		0xe3

struct vx_core {
	/* ALSA stuff */
	struct snd_card *card;
	struct snd_pcm *pcm[VX_MAX_CODECS];
	int type;	/* VX_TYPE_XXX */

	int irq;
	/* ports are defined externally */

	/* low-level functions */
	struct snd_vx_hardware *hw;
	struct snd_vx_ops *ops;

	struct mutex lock;

	unsigned int chip_status;
	unsigned int pcm_running;

	struct device *dev;
	struct snd_hwdep *hwdep;

	struct vx_rmh irq_rmh;	/* RMH used in interrupts */

	unsigned int audio_info; /* see VX_AUDIO_INFO */
	unsigned int audio_ins;
	unsigned int audio_outs;
	struct vx_pipe **playback_pipes;
	struct vx_pipe **capture_pipes;

	/* clock and audio sources */
	unsigned int audio_source;	/* current audio input source */
	unsigned int audio_source_target;
	unsigned int clock_mode;	/* clock mode (VX_CLOCK_MODE_XXX) */
	unsigned int clock_source;	/* current clock source (INTERNAL_QUARTZ or UER_SYNC) */
	unsigned int freq;		/* current frequency */
	unsigned int freq_detected;	/* detected frequency from digital in */
	unsigned int uer_detected;	/* VX_UER_MODE_XXX */
	unsigned int uer_bits;	/* IEC958 status bits */
	struct vx_ibl_info ibl;	/* IBL information */

	/* mixer setting */
	int output_level[VX_MAX_CODECS][2];	/* analog output level */
	int audio_gain[2][4];			/* digital audio level (playback/capture) */
	unsigned char audio_active[4];		/* mute/unmute on digital playback */
	int audio_monitor[4];			/* playback hw-monitor level */
	unsigned char audio_monitor_active[4];	/* playback hw-monitor mute/unmute */

	struct mutex mixer_mutex;

	const struct firmware *firmware[4]; /* loaded firmware data */
};


/*
 * constructor
 */
struct vx_core *snd_vx_create(struct snd_card *card, struct snd_vx_hardware *hw,
			      struct snd_vx_ops *ops, int extra_size);
int snd_vx_setup_firmware(struct vx_core *chip);
int snd_vx_load_boot_image(struct vx_core *chip, const struct firmware *dsp);
int snd_vx_dsp_boot(struct vx_core *chip, const struct firmware *dsp);
int snd_vx_dsp_load(struct vx_core *chip, const struct firmware *dsp);

void snd_vx_free_firmware(struct vx_core *chip);

/*
 * interrupt handler; exported for pcmcia
 */
irqreturn_t snd_vx_irq_handler(int irq, void *dev);
irqreturn_t snd_vx_threaded_irq_handler(int irq, void *dev);

/*
 * lowlevel functions
 */
static inline int vx_test_and_ack(struct vx_core *chip)
{
	return chip->ops->test_and_ack(chip);
}

static inline void vx_validate_irq(struct vx_core *chip, int enable)
{
	chip->ops->validate_irq(chip, enable);
}

static inline unsigned char snd_vx_inb(struct vx_core *chip, int reg)
{
	return chip->ops->in8(chip, reg);
}

static inline unsigned int snd_vx_inl(struct vx_core *chip, int reg)
{
	return chip->ops->in32(chip, reg);
}

static inline void snd_vx_outb(struct vx_core *chip, int reg, unsigned char val)
{
	chip->ops->out8(chip, reg, val);
}

static inline void snd_vx_outl(struct vx_core *chip, int reg, unsigned int val)
{
	chip->ops->out32(chip, reg, val);
}

#define vx_inb(chip,reg)	snd_vx_inb(chip, VX_##reg)
#define vx_outb(chip,reg,val)	snd_vx_outb(chip, VX_##reg,val)
#define vx_inl(chip,reg)	snd_vx_inl(chip, VX_##reg)
#define vx_outl(chip,reg,val)	snd_vx_outl(chip, VX_##reg,val)

static inline void vx_reset_dsp(struct vx_core *chip)
{
	chip->ops->reset_dsp(chip);
}

int vx_send_msg(struct vx_core *chip, struct vx_rmh *rmh);
int vx_send_msg_nolock(struct vx_core *chip, struct vx_rmh *rmh);
int vx_send_rih(struct vx_core *chip, int cmd);
int vx_send_rih_nolock(struct vx_core *chip, int cmd);

void vx_reset_codec(struct vx_core *chip, int cold_reset);

/*
 * check the bit on the specified register
 * returns zero if a bit matches, or a negative error code.
 * exported for vxpocket driver
 */
int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time);
#define vx_check_isr(chip,mask,bit,time) snd_vx_check_reg_bit(chip, VX_ISR, mask, bit, time)
#define vx_wait_isr_bit(chip,bit) vx_check_isr(chip, bit, bit, 200)
#define vx_wait_for_rx_full(chip) vx_wait_isr_bit(chip, ISR_RX_FULL)


/*
 * pseudo-DMA transfer
 */
static inline void vx_pseudo_dma_write(struct vx_core *chip, struct snd_pcm_runtime *runtime,
				       struct vx_pipe *pipe, int count)
{
	chip->ops->dma_write(chip, runtime, pipe, count);
}

static inline void vx_pseudo_dma_read(struct vx_core *chip, struct snd_pcm_runtime *runtime,
				      struct vx_pipe *pipe, int count)
{
	chip->ops->dma_read(chip, runtime, pipe, count);
}


/* error with hardware code,
 * the return value is -(VX_ERR_MASK | actual-hw-error-code)
 */
#define VX_ERR_MASK	0x1000000
#define vx_get_error(err)	(-(err) & ~VX_ERR_MASK)


/*
 * pcm stuff
 */
int snd_vx_pcm_new(struct vx_core *chip);
void vx_pcm_update_intr(struct vx_core *chip, unsigned int events);

/*
 * mixer stuff
 */
int snd_vx_mixer_new(struct vx_core *chip);
void vx_toggle_dac_mute(struct vx_core *chip, int mute);
int vx_sync_audio_source(struct vx_core *chip);
int vx_set_monitor_level(struct vx_core *chip, int audio, int level, int active);

/*
 * IEC958 & clock stuff
 */
void vx_set_iec958_status(struct vx_core *chip, unsigned int bits);
int vx_set_clock(struct vx_core *chip, unsigned int freq);
void vx_set_internal_clock(struct vx_core *chip, unsigned int freq);
int vx_change_frequency(struct vx_core *chip);


/*
 * PM
 */
int snd_vx_suspend(struct vx_core *card);
int snd_vx_resume(struct vx_core *card);

/*
 * hardware constants
 */

#define vx_has_new_dsp(chip)	((chip)->type != VX_TYPE_BOARD)
#define vx_is_pcmcia(chip)	((chip)->type >= VX_TYPE_VXPOCKET)

/* audio input source */
enum {
	VX_AUDIO_SRC_DIGITAL,
	VX_AUDIO_SRC_LINE,
	VX_AUDIO_SRC_MIC
};

/* clock source */
enum {
	INTERNAL_QUARTZ,
	UER_SYNC
};

/* clock mode */
enum {
	VX_CLOCK_MODE_AUTO,	/* depending on the current audio source */
	VX_CLOCK_MODE_INTERNAL,	/* fixed to internal quartz */
	VX_CLOCK_MODE_EXTERNAL	/* fixed to UER sync */
};

/* SPDIF/UER type */
enum {
	VX_UER_MODE_CONSUMER,
	VX_UER_MODE_PROFESSIONAL,
	VX_UER_MODE_NOT_PRESENT,
};

/* register indices */
enum {
	VX_ICR,
	VX_CVR,
	VX_ISR,
	VX_IVR,
	VX_RXH,
	VX_TXH = VX_RXH,
	VX_RXM,
	VX_TXM = VX_RXM,
	VX_RXL,
	VX_TXL = VX_RXL,
	VX_DMA,
	VX_CDSP,
	VX_RFREQ,
	VX_RUER_V2,
	VX_GAIN,
	VX_DATA = VX_GAIN,
	VX_MEMIRQ,
	VX_ACQ,
	VX_BIT0,
	VX_BIT1,
	VX_MIC0,
	VX_MIC1,
	VX_MIC2,
	VX_MIC3,
	VX_PLX0,
	VX_PLX1,
	VX_PLX2,

	VX_LOFREQ,  // V2: ACQ, VP: RFREQ
	VX_HIFREQ,  // V2: BIT0, VP: RUER_V2
	VX_CSUER,   // V2: BIT1, VP: BIT0
	VX_RUER,    // V2: RUER_V2, VP: BIT1

	VX_REG_MAX,

	/* aliases for VX board */
	VX_RESET_DMA = VX_ISR,
	VX_CFG = VX_RFREQ,
	VX_STATUS = VX_MEMIRQ,
	VX_SELMIC = VX_MIC0,
	VX_COMPOT = VX_MIC1,
	VX_SCOMPR = VX_MIC2,
	VX_GLIMIT = VX_MIC3,
	VX_INTCSR = VX_PLX0,
	VX_CNTRL = VX_PLX1,
	VX_GPIOC = VX_PLX2,

	/* aliases for VXPOCKET board */
	VX_MICRO = VX_MEMIRQ,
	VX_CODEC2 = VX_MEMIRQ,
	VX_DIALOG = VX_ACQ,

};

/* RMH status type */
enum {
	RMH_SSIZE_FIXED = 0,	/* status size given by the driver (in LgStat) */
	RMH_SSIZE_ARG = 1,	/* status size given in the LSB byte */
	RMH_SSIZE_MASK = 2,	/* status size given in bitmask */
};


/* bits for ICR register */
#define ICR_HF1		0x10
#define ICR_HF0		0x08
#define ICR_TREQ	0x02	/* Interrupt mode + HREQ set on for transfer (->DSP) request */
#define ICR_RREQ	0x01	/* Interrupt mode + RREQ set on for transfer (->PC) request */

/* bits for CVR register */
#define CVR_HC		0x80

/* bits for ISR register */
#define ISR_HF3		0x10
#define ISR_HF2		0x08
#define ISR_CHK		0x10
#define ISR_ERR		0x08
#define ISR_TX_READY	0x04
#define ISR_TX_EMPTY	0x02
#define ISR_RX_FULL	0x01

/* Constants used to access the DATA register */
#define VX_DATA_CODEC_MASK	0x80
#define VX_DATA_XICOR_MASK	0x80

/* Constants used to access the CSUER register (both for VX2 and VXP) */
#define VX_SUER_FREQ_MASK		0x0c
#define VX_SUER_FREQ_32KHz_MASK		0x0c
#define VX_SUER_FREQ_44KHz_MASK		0x00
#define VX_SUER_FREQ_48KHz_MASK		0x04
#define VX_SUER_DATA_PRESENT_MASK	0x02
#define VX_SUER_CLOCK_PRESENT_MASK	0x01

#define VX_CUER_HH_BITC_SEL_MASK	0x08
#define VX_CUER_MH_BITC_SEL_MASK	0x04
#define VX_CUER_ML_BITC_SEL_MASK	0x02
#define VX_CUER_LL_BITC_SEL_MASK	0x01

#define XX_UER_CBITS_OFFSET_MASK	0x1f


/* bits for audio_info */
#define VX_AUDIO_INFO_REAL_TIME	(1<<0)	/* real-time processing available */
#define VX_AUDIO_INFO_OFFLINE	(1<<1)	/* offline processing available */
#define VX_AUDIO_INFO_MPEG1	(1<<5)
#define VX_AUDIO_INFO_MPEG2	(1<<6)
#define VX_AUDIO_INFO_LINEAR_8	(1<<7)
#define VX_AUDIO_INFO_LINEAR_16	(1<<8)
#define VX_AUDIO_INFO_LINEAR_24	(1<<9)

/* DSP Interrupt Request values */
#define VXP_IRQ_OFFSET		0x40 /* add 0x40 offset for vxpocket and vx222/v2 */
/* call with vx_send_irq_dsp() */
#define IRQ_MESS_WRITE_END          0x30
#define IRQ_MESS_WRITE_NEXT         0x32
#define IRQ_MESS_READ_NEXT          0x34
#define IRQ_MESS_READ_END           0x36
#define IRQ_MESSAGE                 0x38
#define IRQ_RESET_CHK               0x3A
#define IRQ_CONNECT_STREAM_NEXT     0x26
#define IRQ_CONNECT_STREAM_END      0x28
#define IRQ_PAUSE_START_CONNECT     0x2A
#define IRQ_END_CONNECTION          0x2C

/* Is there async. events pending ( IT Source Test ) */
#define ASYNC_EVENTS_PENDING            0x008000
#define HBUFFER_EVENTS_PENDING          0x004000   // Not always accurate
#define NOTIF_EVENTS_PENDING            0x002000
#define TIME_CODE_EVENT_PENDING         0x001000
#define FREQUENCY_CHANGE_EVENT_PENDING  0x000800
#define END_OF_BUFFER_EVENTS_PENDING    0x000400
#define FATAL_DSP_ERROR                 0xff0000

/* Stream Format Header Defines */ 
#define HEADER_FMT_BASE			0xFED00000
#define HEADER_FMT_MONO			0x000000C0
#define HEADER_FMT_INTEL		0x00008000
#define HEADER_FMT_16BITS		0x00002000
#define HEADER_FMT_24BITS		0x00004000
#define HEADER_FMT_UPTO11		0x00000200	/* frequency is less or equ. to 11k.*/
#define HEADER_FMT_UPTO32		0x00000100	/* frequency is over 11k and less then 32k.*/

/* Constants used to access the Codec */
#define XX_CODEC_SELECTOR               0x20
/* codec commands */
#define XX_CODEC_ADC_CONTROL_REGISTER   0x01
#define XX_CODEC_DAC_CONTROL_REGISTER   0x02
#define XX_CODEC_LEVEL_LEFT_REGISTER    0x03
#define XX_CODEC_LEVEL_RIGHT_REGISTER   0x04
#define XX_CODEC_PORT_MODE_REGISTER     0x05
#define XX_CODEC_STATUS_REPORT_REGISTER 0x06
#define XX_CODEC_CLOCK_CONTROL_REGISTER 0x07

/*
 * Audio-level control values
 */
#define CVAL_M110DB		0x000	/* -110dB */
#define CVAL_M99DB		0x02C
#define CVAL_M21DB		0x163
#define CVAL_M18DB		0x16F
#define CVAL_M10DB		0x18F
#define CVAL_0DB		0x1B7
#define CVAL_18DB		0x1FF	/* +18dB */
#define CVAL_MAX		0x1FF

#define AUDIO_IO_HAS_MUTE_LEVEL			0x400000
#define AUDIO_IO_HAS_MUTE_MONITORING_1		0x200000
#define AUDIO_IO_HAS_MUTE_MONITORING_2		0x100000
#define VALID_AUDIO_IO_DIGITAL_LEVEL		0x01
#define VALID_AUDIO_IO_MONITORING_LEVEL		0x02
#define VALID_AUDIO_IO_MUTE_LEVEL		0x04
#define VALID_AUDIO_IO_MUTE_MONITORING_1	0x08
#define VALID_AUDIO_IO_MUTE_MONITORING_2	0x10


#endif /* __SOUND_VX_COMMON_H */
Commit	Line	Data
1a59d1b8	1	/* SPDX-License-Identifier: GPL-2.0-or-later */
1da177e4 LT	2	/*
	3	* Driver for Digigram VX soundcards
	4	*
	5	* Hardware core part
	6	*
	7	* Copyright (c) 2002 by Takashi Iwai <tiwai@suse.de>
1da177e4 LT	8	*/
	9
	10	#ifndef __SOUND_VX_COMMON_H
	11	#define __SOUND_VX_COMMON_H
	12
	13	#include <sound/pcm.h>
	14	#include <sound/hwdep.h>
	15	#include <linux/interrupt.h>
	16
1da177e4 LT	17	struct firmware;
	18	struct device;
	19
1da177e4 LT	20	#define VX_DRIVER_VERSION 0x010000 /* 1.0.0 */
	21
	22	/*
	23	*/
	24	#define SIZE_MAX_CMD 0x10
	25	#define SIZE_MAX_STATUS 0x10
	26
	27	struct vx_rmh {
	28	u16 LgCmd; /* length of the command to send (WORDs) */
	29	u16 LgStat; /* length of the status received (WORDs) */
	30	u32 Cmd[SIZE_MAX_CMD];
	31	u32 Stat[SIZE_MAX_STATUS];
	32	u16 DspStat; /* status type, RMP_SSIZE_XXX */
	33	};
	34
	35	typedef u64 pcx_time_t;
	36
	37	#define VX_MAX_PIPES 16
	38	#define VX_MAX_PERIODS 32
	39	#define VX_MAX_CODECS 2
	40
	41	struct vx_ibl_info {
	42	int size; /* the current IBL size (0 = query) in bytes */
	43	int max_size; /* max. IBL size in bytes */
	44	int min_size; /* min. IBL size in bytes */
	45	int granularity; /* granularity */
	46	};
	47
	48	struct vx_pipe {
	49	int number;
	50	unsigned int is_capture: 1;
	51	unsigned int data_mode: 1;
	52	unsigned int running: 1;
	53	unsigned int prepared: 1;
	54	int channels;
	55	unsigned int differed_type;
	56	pcx_time_t pcx_time;
af26367f	57	struct snd_pcm_substream *substream;
1da177e4 LT	58
	59	int hbuf_size; /* H-buffer size in bytes */
	60	int buffer_bytes; /* the ALSA pcm buffer size in bytes */
	61	int period_bytes; /* the ALSA pcm period size in bytes */
	62	int hw_ptr; /* the current hardware pointer in bytes */
	63	int position; /* the current position in frames (playback only) */
	64	int transferred; /* the transferred size (per period) in frames */
	65	int align; /* size of alignment */
	66	u64 cur_count; /* current sample position (for playback) */
	67
	68	unsigned int references; /* an output pipe may be used for monitoring and/or playback */
af26367f	69	struct vx_pipe monitoring_pipe; / pointer to the monitoring pipe (capture pipe only)*/
1da177e4 LT	70	};
1da177e4 LT	71
af26367f TI	72	struct vx_core;
af26367f TI	73
1da177e4 LT	74	struct snd_vx_ops {
1da177e4 LT	75	/* low-level i/o */
af26367f TI	76	unsigned char (in8)(struct vx_core chip, int reg);
	77	unsigned int (in32)(struct vx_core chip, int reg);
	78	void (out8)(struct vx_core chip, int reg, unsigned char val);
	79	void (out32)(struct vx_core chip, int reg, unsigned int val);
1da177e4	80	/* irq */
af26367f TI	81	int (test_and_ack)(struct vx_core chip);
af26367f TI	82	void (validate_irq)(struct vx_core chip, int enable);
1da177e4	83	/* codec */
af26367f TI	84	void (write_codec)(struct vx_core chip, int codec, unsigned int data);
	85	void (akm_write)(struct vx_core chip, int reg, unsigned int data);
	86	void (reset_codec)(struct vx_core chip);
	87	void (change_audio_source)(struct vx_core chip, int src);
	88	void (set_clock_source)(struct vx_core chp, int src);
1da177e4	89	/* chip init */
af26367f TI	90	int (load_dsp)(struct vx_core chip, int idx, const struct firmware *fw);
	91	void (reset_dsp)(struct vx_core chip);
	92	void (reset_board)(struct vx_core chip, int cold_reset);
	93	int (add_controls)(struct vx_core chip);
1da177e4	94	/* pcm */
af26367f TI	95	void (dma_write)(struct vx_core chip, struct snd_pcm_runtime *runtime,
	96	struct vx_pipe *pipe, int count);
	97	void (dma_read)(struct vx_core chip, struct snd_pcm_runtime *runtime,
	98	struct vx_pipe *pipe, int count);
1da177e4 LT	99	};
	100
	101	struct snd_vx_hardware {
	102	const char *name;
	103	int type; /* VX_TYPE_XXX */
	104
	105	/* hardware specs */
	106	unsigned int num_codecs;
	107	unsigned int num_ins;
	108	unsigned int num_outs;
	109	unsigned int output_level_max;
0cb29ea0	110	const unsigned int *output_level_db_scale;
1da177e4 LT	111	};
	112
	113	/* hwdep id string */
	114	#define SND_VX_HWDEP_ID "VX Loader"
	115
	116	/* hardware type */
	117	enum {
	118	/* VX222 PCI */
	119	VX_TYPE_BOARD, /* old VX222 PCI */
	120	VX_TYPE_V2, /* VX222 V2 PCI */
	121	VX_TYPE_MIC, /* VX222 Mic PCI */
	122	/* VX-pocket */
	123	VX_TYPE_VXPOCKET, /* VXpocket V2 */
	124	VX_TYPE_VXP440, /* VXpocket 440 */
	125	VX_TYPE_NUMS
	126	};
	127
	128	/* chip status */
	129	enum {
	130	VX_STAT_XILINX_LOADED = (1 << 0), /* devices are registered */
	131	VX_STAT_DEVICE_INIT = (1 << 1), /* devices are registered */
	132	VX_STAT_CHIP_INIT = (1 << 2), /* all operational */
	133	VX_STAT_IN_SUSPEND = (1 << 10), /* in suspend phase */
	134	VX_STAT_IS_STALE = (1 << 15) /* device is stale */
	135	};
	136
	137	/* min/max values for analog output for old codecs */
	138	#define VX_ANALOG_OUT_LEVEL_MAX 0xe3
	139
af26367f	140	struct vx_core {
1da177e4	141	/* ALSA stuff */
af26367f TI	142	struct snd_card *card;
af26367f TI	143	struct snd_pcm *pcm[VX_MAX_CODECS];
1da177e4 LT	144	int type; /* VX_TYPE_XXX */
	145
	146	int irq;
	147	/* ports are defined externally */
	148
	149	/* low-level functions */
	150	struct snd_vx_hardware *hw;
	151	struct snd_vx_ops *ops;
	152
db0a5214	153	struct mutex lock;
1da177e4 LT	154
	155	unsigned int chip_status;
	156	unsigned int pcm_running;
	157
	158	struct device *dev;
af26367f	159	struct snd_hwdep *hwdep;
1da177e4 LT	160
	161	struct vx_rmh irq_rmh; /* RMH used in interrupts */
	162
	163	unsigned int audio_info; /* see VX_AUDIO_INFO */
	164	unsigned int audio_ins;
	165	unsigned int audio_outs;
	166	struct vx_pipe **playback_pipes;
	167	struct vx_pipe **capture_pipes;
	168
	169	/* clock and audio sources */
	170	unsigned int audio_source; /* current audio input source */
	171	unsigned int audio_source_target;
	172	unsigned int clock_mode; /* clock mode (VX_CLOCK_MODE_XXX) */
	173	unsigned int clock_source; /* current clock source (INTERNAL_QUARTZ or UER_SYNC) */
	174	unsigned int freq; /* current frequency */
	175	unsigned int freq_detected; /* detected frequency from digital in */
	176	unsigned int uer_detected; /* VX_UER_MODE_XXX */
	177	unsigned int uer_bits; /* IEC958 status bits */
	178	struct vx_ibl_info ibl; /* IBL information */
	179
	180	/* mixer setting */
	181	int output_level[VX_MAX_CODECS][2]; /* analog output level */
	182	int audio_gain[2][4]; /* digital audio level (playback/capture) */
	183	unsigned char audio_active[4]; /* mute/unmute on digital playback */
	184	int audio_monitor[4]; /* playback hw-monitor level */
	185	unsigned char audio_monitor_active[4]; /* playback hw-monitor mute/unmute */
	186
ef9f0a42	187	struct mutex mixer_mutex;
1da177e4 LT	188
	189	const struct firmware firmware[4]; / loaded firmware data */
	190	};
	191
	192
	193	/*
	194	* constructor
	195	*/
af26367f TI	196	struct vx_core snd_vx_create(struct snd_card card, struct snd_vx_hardware *hw,
	197	struct snd_vx_ops *ops, int extra_size);
	198	int snd_vx_setup_firmware(struct vx_core *chip);
	199	int snd_vx_load_boot_image(struct vx_core chip, const struct firmware dsp);
	200	int snd_vx_dsp_boot(struct vx_core chip, const struct firmware dsp);
	201	int snd_vx_dsp_load(struct vx_core chip, const struct firmware dsp);
1da177e4	202
af26367f	203	void snd_vx_free_firmware(struct vx_core *chip);
1da177e4 LT	204
	205	/*
	206	* interrupt handler; exported for pcmcia
	207	*/
7d12e780	208	irqreturn_t snd_vx_irq_handler(int irq, void *dev);
db0a5214	209	irqreturn_t snd_vx_threaded_irq_handler(int irq, void *dev);
1da177e4 LT	210
	211	/*
	212	* lowlevel functions
	213	*/
af26367f	214	static inline int vx_test_and_ack(struct vx_core *chip)
1da177e4	215	{
1da177e4 LT	216	return chip->ops->test_and_ack(chip);
	217	}
	218
af26367f	219	static inline void vx_validate_irq(struct vx_core *chip, int enable)
1da177e4	220	{
1da177e4 LT	221	chip->ops->validate_irq(chip, enable);
	222	}
	223
af26367f	224	static inline unsigned char snd_vx_inb(struct vx_core *chip, int reg)
1da177e4	225	{
1da177e4 LT	226	return chip->ops->in8(chip, reg);
	227	}
	228
af26367f	229	static inline unsigned int snd_vx_inl(struct vx_core *chip, int reg)
1da177e4	230	{
1da177e4 LT	231	return chip->ops->in32(chip, reg);
	232	}
	233
af26367f	234	static inline void snd_vx_outb(struct vx_core *chip, int reg, unsigned char val)
1da177e4	235	{
1da177e4 LT	236	chip->ops->out8(chip, reg, val);
	237	}
	238
af26367f	239	static inline void snd_vx_outl(struct vx_core *chip, int reg, unsigned int val)
1da177e4	240	{
1da177e4 LT	241	chip->ops->out32(chip, reg, val);
	242	}
	243
	244	#define vx_inb(chip,reg) snd_vx_inb(chip, VX_##reg)
	245	#define vx_outb(chip,reg,val) snd_vx_outb(chip, VX_##reg,val)
	246	#define vx_inl(chip,reg) snd_vx_inl(chip, VX_##reg)
	247	#define vx_outl(chip,reg,val) snd_vx_outl(chip, VX_##reg,val)
	248
af26367f	249	static inline void vx_reset_dsp(struct vx_core *chip)
1da177e4	250	{
1da177e4 LT	251	chip->ops->reset_dsp(chip);
	252	}
	253
af26367f TI	254	int vx_send_msg(struct vx_core chip, struct vx_rmh rmh);
	255	int vx_send_msg_nolock(struct vx_core chip, struct vx_rmh rmh);
	256	int vx_send_rih(struct vx_core *chip, int cmd);
	257	int vx_send_rih_nolock(struct vx_core *chip, int cmd);
1da177e4	258
af26367f	259	void vx_reset_codec(struct vx_core *chip, int cold_reset);
1da177e4 LT	260
	261	/*
	262	* check the bit on the specified register
	263	* returns zero if a bit matches, or a negative error code.
	264	* exported for vxpocket driver
	265	*/
af26367f	266	int snd_vx_check_reg_bit(struct vx_core *chip, int reg, int mask, int bit, int time);
1da177e4 LT	267	#define vx_check_isr(chip,mask,bit,time) snd_vx_check_reg_bit(chip, VX_ISR, mask, bit, time)
	268	#define vx_wait_isr_bit(chip,bit) vx_check_isr(chip, bit, bit, 200)
	269	#define vx_wait_for_rx_full(chip) vx_wait_isr_bit(chip, ISR_RX_FULL)
	270
	271
	272	/*
	273	* pseudo-DMA transfer
	274	*/
af26367f TI	275	static inline void vx_pseudo_dma_write(struct vx_core chip, struct snd_pcm_runtime runtime,
af26367f TI	276	struct vx_pipe *pipe, int count)
1da177e4	277	{
1da177e4 LT	278	chip->ops->dma_write(chip, runtime, pipe, count);
	279	}
	280
af26367f TI	281	static inline void vx_pseudo_dma_read(struct vx_core chip, struct snd_pcm_runtime runtime,
af26367f TI	282	struct vx_pipe *pipe, int count)
1da177e4	283	{
1da177e4 LT	284	chip->ops->dma_read(chip, runtime, pipe, count);
	285	}
	286
	287
	288
	289	/* error with hardware code,
	290	* the return value is -(VX_ERR_MASK \| actual-hw-error-code)
	291	*/
	292	#define VX_ERR_MASK 0x1000000
	293	#define vx_get_error(err) (-(err) & ~VX_ERR_MASK)
	294
	295
	296	/*
	297	* pcm stuff
	298	*/
af26367f TI	299	int snd_vx_pcm_new(struct vx_core *chip);
af26367f TI	300	void vx_pcm_update_intr(struct vx_core *chip, unsigned int events);
1da177e4 LT	301
	302	/*
	303	* mixer stuff
	304	*/
af26367f TI	305	int snd_vx_mixer_new(struct vx_core *chip);
	306	void vx_toggle_dac_mute(struct vx_core *chip, int mute);
	307	int vx_sync_audio_source(struct vx_core *chip);
	308	int vx_set_monitor_level(struct vx_core *chip, int audio, int level, int active);
1da177e4 LT	309
	310	/*
	311	* IEC958 & clock stuff
	312	*/
af26367f TI	313	void vx_set_iec958_status(struct vx_core *chip, unsigned int bits);
	314	int vx_set_clock(struct vx_core *chip, unsigned int freq);
	315	void vx_set_internal_clock(struct vx_core *chip, unsigned int freq);
	316	int vx_change_frequency(struct vx_core *chip);
1da177e4 LT	317
1da177e4 LT	318
0ed1cad1 TI	319	/*
	320	* PM
	321	*/
68cb2b55	322	int snd_vx_suspend(struct vx_core *card);
0ed1cad1 TI	323	int snd_vx_resume(struct vx_core *card);
0ed1cad1 TI	324
1da177e4 LT	325	/*
	326	* hardware constants
	327	*/
	328
	329	#define vx_has_new_dsp(chip) ((chip)->type != VX_TYPE_BOARD)
	330	#define vx_is_pcmcia(chip) ((chip)->type >= VX_TYPE_VXPOCKET)
	331
	332	/* audio input source */
	333	enum {
	334	VX_AUDIO_SRC_DIGITAL,
	335	VX_AUDIO_SRC_LINE,
	336	VX_AUDIO_SRC_MIC
	337	};
	338
	339	/* clock source */
	340	enum {
	341	INTERNAL_QUARTZ,
	342	UER_SYNC
	343	};
	344
	345	/* clock mode */
	346	enum {
	347	VX_CLOCK_MODE_AUTO, /* depending on the current audio source */
	348	VX_CLOCK_MODE_INTERNAL, /* fixed to internal quartz */
	349	VX_CLOCK_MODE_EXTERNAL /* fixed to UER sync */
	350	};
	351
	352	/* SPDIF/UER type */
	353	enum {
	354	VX_UER_MODE_CONSUMER,
	355	VX_UER_MODE_PROFESSIONAL,
	356	VX_UER_MODE_NOT_PRESENT,
	357	};
	358
	359	/* register indices */
	360	enum {
	361	VX_ICR,
	362	VX_CVR,
	363	VX_ISR,
	364	VX_IVR,
	365	VX_RXH,
	366	VX_TXH = VX_RXH,
	367	VX_RXM,
	368	VX_TXM = VX_RXM,
	369	VX_RXL,
	370	VX_TXL = VX_RXL,
	371	VX_DMA,
	372	VX_CDSP,
	373	VX_RFREQ,
	374	VX_RUER_V2,
	375	VX_GAIN,
	376	VX_DATA = VX_GAIN,
	377	VX_MEMIRQ,
	378	VX_ACQ,
	379	VX_BIT0,
	380	VX_BIT1,
	381	VX_MIC0,
	382	VX_MIC1,
	383	VX_MIC2,
	384	VX_MIC3,
	385	VX_PLX0,
	386	VX_PLX1,
	387	VX_PLX2,
	388
389	VX_LOFREQ, // V2: ACQ, VP: RFREQ
390	VX_HIFREQ, // V2: BIT0, VP: RUER_V2
391	VX_CSUER, // V2: BIT1, VP: BIT0
392	VX_RUER, // V2: RUER_V2, VP: BIT1
393
394	VX_REG_MAX,
395
396	/* aliases for VX board */
397	VX_RESET_DMA = VX_ISR,
398	VX_CFG = VX_RFREQ,
399	VX_STATUS = VX_MEMIRQ,
400	VX_SELMIC = VX_MIC0,
401	VX_COMPOT = VX_MIC1,
402	VX_SCOMPR = VX_MIC2,
403	VX_GLIMIT = VX_MIC3,
404	VX_INTCSR = VX_PLX0,
405	VX_CNTRL = VX_PLX1,
406	VX_GPIOC = VX_PLX2,
407
408	/* aliases for VXPOCKET board */
409	VX_MICRO = VX_MEMIRQ,
410	VX_CODEC2 = VX_MEMIRQ,
411	VX_DIALOG = VX_ACQ,
412
413	};
414
415	/* RMH status type */
416	enum {
417	RMH_SSIZE_FIXED = 0, /* status size given by the driver (in LgStat) */
418	RMH_SSIZE_ARG = 1, /* status size given in the LSB byte */
419	RMH_SSIZE_MASK = 2, /* status size given in bitmask */
420	};
421
422
423	/* bits for ICR register */
424	#define ICR_HF1 0x10
425	#define ICR_HF0 0x08
426	#define ICR_TREQ 0x02 /* Interrupt mode + HREQ set on for transfer (->DSP) request */
427	#define ICR_RREQ 0x01 /* Interrupt mode + RREQ set on for transfer (->PC) request */
428
429	/* bits for CVR register */
430	#define CVR_HC 0x80
431
432	/* bits for ISR register */
433	#define ISR_HF3 0x10
434	#define ISR_HF2 0x08
435	#define ISR_CHK 0x10
436	#define ISR_ERR 0x08
437	#define ISR_TX_READY 0x04
438	#define ISR_TX_EMPTY 0x02
439	#define ISR_RX_FULL 0x01
440
441	/* Constants used to access the DATA register */
442	#define VX_DATA_CODEC_MASK 0x80
443	#define VX_DATA_XICOR_MASK 0x80
444
445	/* Constants used to access the CSUER register (both for VX2 and VXP) */
446	#define VX_SUER_FREQ_MASK 0x0c
447	#define VX_SUER_FREQ_32KHz_MASK 0x0c
448	#define VX_SUER_FREQ_44KHz_MASK 0x00
449	#define VX_SUER_FREQ_48KHz_MASK 0x04
450	#define VX_SUER_DATA_PRESENT_MASK 0x02
451	#define VX_SUER_CLOCK_PRESENT_MASK 0x01
452
453	#define VX_CUER_HH_BITC_SEL_MASK 0x08
454	#define VX_CUER_MH_BITC_SEL_MASK 0x04
455	#define VX_CUER_ML_BITC_SEL_MASK 0x02
456	#define VX_CUER_LL_BITC_SEL_MASK 0x01
457
458	#define XX_UER_CBITS_OFFSET_MASK 0x1f
459
460
461	/* bits for audio_info */
462	#define VX_AUDIO_INFO_REAL_TIME (1<<0) /* real-time processing available */
463	#define VX_AUDIO_INFO_OFFLINE (1<<1) /* offline processing available */
464	#define VX_AUDIO_INFO_MPEG1 (1<<5)
465	#define VX_AUDIO_INFO_MPEG2 (1<<6)
466	#define VX_AUDIO_INFO_LINEAR_8 (1<<7)
467	#define VX_AUDIO_INFO_LINEAR_16 (1<<8)
468	#define VX_AUDIO_INFO_LINEAR_24 (1<<9)
469
470	/* DSP Interrupt Request values */
471	#define VXP_IRQ_OFFSET 0x40 /* add 0x40 offset for vxpocket and vx222/v2 */
472	/* call with vx_send_irq_dsp() */
473	#define IRQ_MESS_WRITE_END 0x30
474	#define IRQ_MESS_WRITE_NEXT 0x32
475	#define IRQ_MESS_READ_NEXT 0x34
476	#define IRQ_MESS_READ_END 0x36
477	#define IRQ_MESSAGE 0x38
478	#define IRQ_RESET_CHK 0x3A
479	#define IRQ_CONNECT_STREAM_NEXT 0x26
480	#define IRQ_CONNECT_STREAM_END 0x28
481	#define IRQ_PAUSE_START_CONNECT 0x2A
482	#define IRQ_END_CONNECTION 0x2C
483
484	/* Is there async. events pending ( IT Source Test ) */
485	#define ASYNC_EVENTS_PENDING 0x008000
486	#define HBUFFER_EVENTS_PENDING 0x004000 // Not always accurate
487	#define NOTIF_EVENTS_PENDING 0x002000
488	#define TIME_CODE_EVENT_PENDING 0x001000
489	#define FREQUENCY_CHANGE_EVENT_PENDING 0x000800
490	#define END_OF_BUFFER_EVENTS_PENDING 0x000400
491	#define FATAL_DSP_ERROR 0xff0000
492
493	/* Stream Format Header Defines */
494	#define HEADER_FMT_BASE 0xFED00000
495	#define HEADER_FMT_MONO 0x000000C0
496	#define HEADER_FMT_INTEL 0x00008000
497	#define HEADER_FMT_16BITS 0x00002000
498	#define HEADER_FMT_24BITS 0x00004000
499	#define HEADER_FMT_UPTO11 0x00000200 /* frequency is less or equ. to 11k.*/
500	#define HEADER_FMT_UPTO32 0x00000100 /* frequency is over 11k and less then 32k.*/
501
502	/* Constants used to access the Codec */
503	#define XX_CODEC_SELECTOR 0x20
504	/* codec commands */
505	#define XX_CODEC_ADC_CONTROL_REGISTER 0x01
506	#define XX_CODEC_DAC_CONTROL_REGISTER 0x02
507	#define XX_CODEC_LEVEL_LEFT_REGISTER 0x03
508	#define XX_CODEC_LEVEL_RIGHT_REGISTER 0x04
509	#define XX_CODEC_PORT_MODE_REGISTER 0x05
510	#define XX_CODEC_STATUS_REPORT_REGISTER 0x06
511	#define XX_CODEC_CLOCK_CONTROL_REGISTER 0x07
512
513	/*
514	* Audio-level control values
515	*/
516	#define CVAL_M110DB 0x000 /* -110dB */
517	#define CVAL_M99DB 0x02C
518	#define CVAL_M21DB 0x163
519	#define CVAL_M18DB 0x16F
520	#define CVAL_M10DB 0x18F
521	#define CVAL_0DB 0x1B7
522	#define CVAL_18DB 0x1FF /* +18dB */
523	#define CVAL_MAX 0x1FF
524
525	#define AUDIO_IO_HAS_MUTE_LEVEL 0x400000
526	#define AUDIO_IO_HAS_MUTE_MONITORING_1 0x200000
527	#define AUDIO_IO_HAS_MUTE_MONITORING_2 0x100000
528	#define VALID_AUDIO_IO_DIGITAL_LEVEL 0x01
529	#define VALID_AUDIO_IO_MONITORING_LEVEL 0x02
530	#define VALID_AUDIO_IO_MUTE_LEVEL 0x04
531	#define VALID_AUDIO_IO_MUTE_MONITORING_1 0x08
532	#define VALID_AUDIO_IO_MUTE_MONITORING_2 0x10
533
534
535	#endif /* __SOUND_VX_COMMON_H */