]>
Commit | Line | Data |
---|---|---|
05330448 AL |
1 | /* |
2 | * QEMU KVM support | |
3 | * | |
4 | * Copyright IBM, Corp. 2008 | |
5 | * | |
6 | * Authors: | |
7 | * Anthony Liguori <aliguori@us.ibm.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | * | |
12 | */ | |
13 | ||
14 | #ifndef QEMU_KVM_H | |
15 | #define QEMU_KVM_H | |
16 | ||
1de7afc9 | 17 | #include "qemu/queue.h" |
504134d2 | 18 | #include "qom/cpu.h" |
4c663752 | 19 | #include "exec/memattrs.h" |
197e3524 | 20 | #include "hw/irq.h" |
05330448 | 21 | |
cbca3722 TH |
22 | #ifdef NEED_CPU_H |
23 | # ifdef CONFIG_KVM | |
24 | # include <linux/kvm.h> | |
25 | # include <linux/kvm_para.h> | |
26 | # define CONFIG_KVM_IS_POSSIBLE | |
27 | # endif | |
28 | #else | |
29 | # define CONFIG_KVM_IS_POSSIBLE | |
ca821806 | 30 | #endif |
05330448 | 31 | |
cbca3722 TH |
32 | #ifdef CONFIG_KVM_IS_POSSIBLE |
33 | ||
d5286af5 | 34 | extern bool kvm_allowed; |
3d4b2649 | 35 | extern bool kvm_kernel_irqchip; |
32c18a2d | 36 | extern bool kvm_split_irqchip; |
7ae26bd4 | 37 | extern bool kvm_async_interrupts_allowed; |
215e79c0 | 38 | extern bool kvm_halt_in_kernel_allowed; |
69e03ae6 | 39 | extern bool kvm_eventfds_allowed; |
cc7e0ddf | 40 | extern bool kvm_irqfds_allowed; |
f41389ae | 41 | extern bool kvm_resamplefds_allowed; |
614e41bc | 42 | extern bool kvm_msi_via_irqfd_allowed; |
f3e1bed8 | 43 | extern bool kvm_gsi_routing_allowed; |
76fe21de | 44 | extern bool kvm_gsi_direct_mapping; |
df9c8b75 | 45 | extern bool kvm_readonly_mem_allowed; |
50bf31b9 | 46 | extern bool kvm_direct_msi_allowed; |
35108223 | 47 | extern bool kvm_ioeventfd_any_length_allowed; |
767a554a | 48 | extern bool kvm_msi_use_devid; |
98c8573e | 49 | |
3d4b2649 | 50 | #define kvm_enabled() (kvm_allowed) |
96fda35a PM |
51 | /** |
52 | * kvm_irqchip_in_kernel: | |
53 | * | |
54 | * Returns: true if the user asked us to create an in-kernel | |
55 | * irqchip via the "kernel_irqchip=on" machine option. | |
56 | * What this actually means is architecture and machine model | |
57 | * specific: on PC, for instance, it means that the LAPIC, | |
58 | * IOAPIC and PIT are all in kernel. This function should never | |
59 | * be used from generic target-independent code: use one of the | |
60 | * following functions or some other specific check instead. | |
61 | */ | |
3d4b2649 | 62 | #define kvm_irqchip_in_kernel() (kvm_kernel_irqchip) |
7ae26bd4 | 63 | |
32c18a2d MG |
64 | /** |
65 | * kvm_irqchip_is_split: | |
66 | * | |
67 | * Returns: true if the user asked us to split the irqchip | |
68 | * implementation between user and kernel space. The details are | |
69 | * architecture and machine specific. On PC, it means that the PIC, | |
70 | * IOAPIC, and PIT are in user space while the LAPIC is in the kernel. | |
71 | */ | |
72 | #define kvm_irqchip_is_split() (kvm_split_irqchip) | |
73 | ||
7ae26bd4 PM |
74 | /** |
75 | * kvm_async_interrupts_enabled: | |
76 | * | |
77 | * Returns: true if we can deliver interrupts to KVM | |
78 | * asynchronously (ie by ioctl from any thread at any time) | |
79 | * rather than having to do interrupt delivery synchronously | |
80 | * (where the vcpu must be stopped at a suitable point first). | |
81 | */ | |
82 | #define kvm_async_interrupts_enabled() (kvm_async_interrupts_allowed) | |
83 | ||
215e79c0 AG |
84 | /** |
85 | * kvm_halt_in_kernel | |
86 | * | |
87 | * Returns: true if halted cpus should still get a KVM_RUN ioctl to run | |
88 | * inside of kernel space. This only works if MP state is implemented. | |
89 | */ | |
90 | #define kvm_halt_in_kernel() (kvm_halt_in_kernel_allowed) | |
91 | ||
69e03ae6 NN |
92 | /** |
93 | * kvm_eventfds_enabled: | |
94 | * | |
95 | * Returns: true if we can use eventfds to receive notifications | |
96 | * from a KVM CPU (ie the kernel supports eventds and we are running | |
97 | * with a configuration where it is meaningful to use them). | |
98 | */ | |
99 | #define kvm_eventfds_enabled() (kvm_eventfds_allowed) | |
100 | ||
cc7e0ddf PM |
101 | /** |
102 | * kvm_irqfds_enabled: | |
103 | * | |
104 | * Returns: true if we can use irqfds to inject interrupts into | |
105 | * a KVM CPU (ie the kernel supports irqfds and we are running | |
106 | * with a configuration where it is meaningful to use them). | |
107 | */ | |
108 | #define kvm_irqfds_enabled() (kvm_irqfds_allowed) | |
109 | ||
f41389ae EA |
110 | /** |
111 | * kvm_resamplefds_enabled: | |
112 | * | |
113 | * Returns: true if we can use resamplefds to inject interrupts into | |
114 | * a KVM CPU (ie the kernel supports resamplefds and we are running | |
115 | * with a configuration where it is meaningful to use them). | |
116 | */ | |
117 | #define kvm_resamplefds_enabled() (kvm_resamplefds_allowed) | |
118 | ||
614e41bc PM |
119 | /** |
120 | * kvm_msi_via_irqfd_enabled: | |
121 | * | |
122 | * Returns: true if we can route a PCI MSI (Message Signaled Interrupt) | |
123 | * to a KVM CPU via an irqfd. This requires that the kernel supports | |
124 | * this and that we're running in a configuration that permits it. | |
125 | */ | |
126 | #define kvm_msi_via_irqfd_enabled() (kvm_msi_via_irqfd_allowed) | |
127 | ||
f3e1bed8 PM |
128 | /** |
129 | * kvm_gsi_routing_enabled: | |
130 | * | |
131 | * Returns: true if GSI routing is enabled (ie the kernel supports | |
132 | * it and we're running in a configuration that permits it). | |
133 | */ | |
134 | #define kvm_gsi_routing_enabled() (kvm_gsi_routing_allowed) | |
135 | ||
76fe21de AK |
136 | /** |
137 | * kvm_gsi_direct_mapping: | |
138 | * | |
139 | * Returns: true if GSI direct mapping is enabled. | |
140 | */ | |
141 | #define kvm_gsi_direct_mapping() (kvm_gsi_direct_mapping) | |
142 | ||
df9c8b75 JJ |
143 | /** |
144 | * kvm_readonly_mem_enabled: | |
145 | * | |
146 | * Returns: true if KVM readonly memory is enabled (ie the kernel | |
147 | * supports it and we're running in a configuration that permits it). | |
148 | */ | |
149 | #define kvm_readonly_mem_enabled() (kvm_readonly_mem_allowed) | |
150 | ||
50bf31b9 PF |
151 | /** |
152 | * kvm_direct_msi_enabled: | |
153 | * | |
154 | * Returns: true if KVM allows direct MSI injection. | |
155 | */ | |
156 | #define kvm_direct_msi_enabled() (kvm_direct_msi_allowed) | |
157 | ||
35108223 JW |
158 | /** |
159 | * kvm_ioeventfd_any_length_enabled: | |
160 | * Returns: true if KVM allows any length io eventfd. | |
161 | */ | |
162 | #define kvm_ioeventfd_any_length_enabled() (kvm_ioeventfd_any_length_allowed) | |
163 | ||
767a554a PF |
164 | /** |
165 | * kvm_msi_devid_required: | |
166 | * Returns: true if KVM requires a device id to be provided while | |
167 | * defining an MSI routing entry. | |
168 | */ | |
169 | #define kvm_msi_devid_required() (kvm_msi_use_devid) | |
170 | ||
05330448 | 171 | #else |
cbca3722 | 172 | |
3d4b2649 JK |
173 | #define kvm_enabled() (0) |
174 | #define kvm_irqchip_in_kernel() (false) | |
15eafc2e | 175 | #define kvm_irqchip_is_split() (false) |
7ae26bd4 | 176 | #define kvm_async_interrupts_enabled() (false) |
215e79c0 | 177 | #define kvm_halt_in_kernel() (false) |
69e03ae6 | 178 | #define kvm_eventfds_enabled() (false) |
cc7e0ddf | 179 | #define kvm_irqfds_enabled() (false) |
879904e8 | 180 | #define kvm_resamplefds_enabled() (false) |
614e41bc | 181 | #define kvm_msi_via_irqfd_enabled() (false) |
f3e1bed8 | 182 | #define kvm_gsi_routing_allowed() (false) |
76fe21de | 183 | #define kvm_gsi_direct_mapping() (false) |
df9c8b75 | 184 | #define kvm_readonly_mem_enabled() (false) |
50bf31b9 | 185 | #define kvm_direct_msi_enabled() (false) |
35108223 | 186 | #define kvm_ioeventfd_any_length_enabled() (false) |
767a554a | 187 | #define kvm_msi_devid_required() (false) |
cbca3722 TH |
188 | |
189 | #endif /* CONFIG_KVM_IS_POSSIBLE */ | |
05330448 AL |
190 | |
191 | struct kvm_run; | |
680c1c6f | 192 | struct kvm_lapic_state; |
9e03a040 | 193 | struct kvm_irq_routing_entry; |
05330448 | 194 | |
94a8d39a JK |
195 | typedef struct KVMCapabilityInfo { |
196 | const char *name; | |
197 | int value; | |
198 | } KVMCapabilityInfo; | |
199 | ||
200 | #define KVM_CAP_INFO(CAP) { "KVM_CAP_" stringify(CAP), KVM_CAP_##CAP } | |
201 | #define KVM_CAP_LAST_INFO { NULL, 0 } | |
202 | ||
92b4e489 JK |
203 | struct KVMState; |
204 | typedef struct KVMState KVMState; | |
205 | extern KVMState *kvm_state; | |
206 | ||
05330448 AL |
207 | /* external API */ |
208 | ||
b8865591 | 209 | bool kvm_has_free_slot(MachineState *ms); |
00a1555e PB |
210 | int kvm_has_sync_mmu(void); |
211 | int kvm_has_vcpu_events(void); | |
212 | int kvm_has_robust_singlestep(void); | |
ff44f1a3 | 213 | int kvm_has_debugregs(void); |
8a7c7393 | 214 | int kvm_has_pit_state2(void); |
d2f2b8a7 | 215 | int kvm_has_many_ioeventfds(void); |
84b058d7 | 216 | int kvm_has_gsi_routing(void); |
3ab73842 | 217 | int kvm_has_intx_set_mask(void); |
00a1555e | 218 | |
504134d2 | 219 | int kvm_init_vcpu(CPUState *cpu); |
1458c363 | 220 | int kvm_cpu_exec(CPUState *cpu); |
4c055ab5 | 221 | int kvm_destroy_vcpu(CPUState *cpu); |
05330448 | 222 | |
5d721b78 AG |
223 | /** |
224 | * kvm_arm_supports_user_irq | |
225 | * | |
226 | * Not all KVM implementations support notifications for kernel generated | |
227 | * interrupt events to user space. This function indicates whether the current | |
228 | * KVM implementation does support them. | |
229 | * | |
230 | * Returns: true if KVM supports using kernel generated IRQs from user space | |
231 | */ | |
232 | bool kvm_arm_supports_user_irq(void); | |
233 | ||
504134d2 | 234 | #ifdef NEED_CPU_H |
33c11879 | 235 | #include "cpu.h" |
05330448 | 236 | |
62a2744c | 237 | void kvm_flush_coalesced_mmio_buffer(void); |
f65ed4c1 | 238 | |
62278814 | 239 | int kvm_insert_breakpoint(CPUState *cpu, target_ulong addr, |
e22a25c9 | 240 | target_ulong len, int type); |
62278814 | 241 | int kvm_remove_breakpoint(CPUState *cpu, target_ulong addr, |
e22a25c9 | 242 | target_ulong len, int type); |
1d5791f4 | 243 | void kvm_remove_all_breakpoints(CPUState *cpu); |
38e478ec | 244 | int kvm_update_guest_debug(CPUState *cpu, unsigned long reinject_trap); |
e22a25c9 | 245 | |
290adf38 | 246 | int kvm_on_sigbus_vcpu(CPUState *cpu, int code, void *addr); |
a1b87fe0 JK |
247 | int kvm_on_sigbus(int code, void *addr); |
248 | ||
88401cbc PB |
249 | /* interface with exec.c */ |
250 | ||
251 | void phys_mem_set_alloc(void *(*alloc)(size_t, uint64_t *align)); | |
252 | ||
05330448 AL |
253 | /* internal API */ |
254 | ||
984b5181 | 255 | int kvm_ioctl(KVMState *s, int type, ...); |
05330448 | 256 | |
984b5181 | 257 | int kvm_vm_ioctl(KVMState *s, int type, ...); |
05330448 | 258 | |
1bc22652 | 259 | int kvm_vcpu_ioctl(CPUState *cpu, int type, ...); |
05330448 | 260 | |
0a6a7cca CD |
261 | /** |
262 | * kvm_device_ioctl - call an ioctl on a kvm device | |
263 | * @fd: The KVM device file descriptor as returned from KVM_CREATE_DEVICE | |
264 | * @type: The device-ctrl ioctl number | |
265 | * | |
266 | * Returns: -errno on error, nonnegative on success | |
267 | */ | |
268 | int kvm_device_ioctl(int fd, int type, ...); | |
269 | ||
d0a073a1 DD |
270 | /** |
271 | * kvm_vm_check_attr - check for existence of a specific vm attribute | |
272 | * @s: The KVMState pointer | |
273 | * @group: the group | |
274 | * @attr: the attribute of that group to query for | |
275 | * | |
276 | * Returns: 1 if the attribute exists | |
277 | * 0 if the attribute either does not exist or if the vm device | |
278 | * interface is unavailable | |
279 | */ | |
280 | int kvm_vm_check_attr(KVMState *s, uint32_t group, uint64_t attr); | |
281 | ||
4b3cfe72 PF |
282 | /** |
283 | * kvm_device_check_attr - check for existence of a specific device attribute | |
284 | * @fd: The device file descriptor | |
285 | * @group: the group | |
286 | * @attr: the attribute of that group to query for | |
287 | * | |
288 | * Returns: 1 if the attribute exists | |
289 | * 0 if the attribute either does not exist or if the vm device | |
290 | * interface is unavailable | |
291 | */ | |
292 | int kvm_device_check_attr(int fd, uint32_t group, uint64_t attr); | |
293 | ||
294 | /** | |
295 | * kvm_device_access - set or get value of a specific vm attribute | |
296 | * @fd: The device file descriptor | |
297 | * @group: the group | |
298 | * @attr: the attribute of that group to set or get | |
299 | * @val: pointer to a storage area for the value | |
300 | * @write: true for set and false for get operation | |
556969e9 | 301 | * @errp: error object handle |
4b3cfe72 | 302 | * |
556969e9 EA |
303 | * Returns: 0 on success |
304 | * < 0 on error | |
305 | * Use kvm_device_check_attr() in order to check for the availability | |
306 | * of optional attributes. | |
4b3cfe72 | 307 | */ |
556969e9 EA |
308 | int kvm_device_access(int fd, int group, uint64_t attr, |
309 | void *val, bool write, Error **errp); | |
4b3cfe72 | 310 | |
0a6a7cca CD |
311 | /** |
312 | * kvm_create_device - create a KVM device for the device control API | |
313 | * @KVMState: The KVMState pointer | |
314 | * @type: The KVM device type (see Documentation/virtual/kvm/devices in the | |
315 | * kernel source) | |
316 | * @test: If true, only test if device can be created, but don't actually | |
317 | * create the device. | |
318 | * | |
319 | * Returns: -errno on error, nonnegative on success: @test ? 0 : device fd; | |
320 | */ | |
321 | int kvm_create_device(KVMState *s, uint64_t type, bool test); | |
322 | ||
29039acf PX |
323 | /** |
324 | * kvm_device_supported - probe whether KVM supports specific device | |
325 | * | |
326 | * @vmfd: The fd handler for VM | |
327 | * @type: type of device | |
328 | * | |
329 | * @return: true if supported, otherwise false. | |
330 | */ | |
331 | bool kvm_device_supported(int vmfd, uint64_t type); | |
0a6a7cca | 332 | |
05330448 AL |
333 | /* Arch specific hooks */ |
334 | ||
94a8d39a JK |
335 | extern const KVMCapabilityInfo kvm_arch_required_capabilities[]; |
336 | ||
20d695a9 | 337 | void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run); |
4c663752 | 338 | MemTxAttrs kvm_arch_post_run(CPUState *cpu, struct kvm_run *run); |
05330448 | 339 | |
20d695a9 | 340 | int kvm_arch_handle_exit(CPUState *cpu, struct kvm_run *run); |
05330448 | 341 | |
20d695a9 | 342 | int kvm_arch_process_async_events(CPUState *cpu); |
0af691d7 | 343 | |
20d695a9 | 344 | int kvm_arch_get_registers(CPUState *cpu); |
05330448 | 345 | |
ea375f9a JK |
346 | /* state subset only touched by the VCPU itself during runtime */ |
347 | #define KVM_PUT_RUNTIME_STATE 1 | |
348 | /* state subset modified during VCPU reset */ | |
349 | #define KVM_PUT_RESET_STATE 2 | |
350 | /* full state set, modified during initialization or on vmload */ | |
351 | #define KVM_PUT_FULL_STATE 3 | |
352 | ||
20d695a9 | 353 | int kvm_arch_put_registers(CPUState *cpu, int level); |
05330448 | 354 | |
b16565b3 | 355 | int kvm_arch_init(MachineState *ms, KVMState *s); |
05330448 | 356 | |
20d695a9 | 357 | int kvm_arch_init_vcpu(CPUState *cpu); |
05330448 | 358 | |
41264b38 GK |
359 | bool kvm_vcpu_id_is_valid(int vcpu_id); |
360 | ||
b164e48e EH |
361 | /* Returns VCPU ID to be used on KVM_CREATE_VCPU ioctl() */ |
362 | unsigned long kvm_arch_vcpu_id(CPUState *cpu); | |
363 | ||
2ae41db2 PB |
364 | #ifdef TARGET_I386 |
365 | #define KVM_HAVE_MCE_INJECTION 1 | |
366 | void kvm_arch_on_sigbus_vcpu(CPUState *cpu, int code, void *addr); | |
367 | #endif | |
c0532a76 | 368 | |
84b058d7 JK |
369 | void kvm_arch_init_irq_routing(KVMState *s); |
370 | ||
9e03a040 | 371 | int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route, |
dc9f06ca | 372 | uint64_t address, uint32_t data, PCIDevice *dev); |
9e03a040 | 373 | |
38d87493 PX |
374 | /* Notify arch about newly added MSI routes */ |
375 | int kvm_arch_add_msi_route_post(struct kvm_irq_routing_entry *route, | |
376 | int vector, PCIDevice *dev); | |
377 | /* Notify arch about released MSI routes */ | |
378 | int kvm_arch_release_virq_post(int virq); | |
379 | ||
1850b6b7 EA |
380 | int kvm_arch_msi_data_to_gsi(uint32_t data); |
381 | ||
3889c3fa | 382 | int kvm_set_irq(KVMState *s, int irq, int level); |
04fa27f5 | 383 | int kvm_irqchip_send_msi(KVMState *s, MSIMessage msg); |
84b058d7 | 384 | |
1df186df | 385 | void kvm_irqchip_add_irq_route(KVMState *s, int gsi, int irqchip, int pin); |
84b058d7 | 386 | |
680c1c6f JK |
387 | void kvm_get_apic_state(DeviceState *d, struct kvm_lapic_state *kapic); |
388 | ||
e22a25c9 AL |
389 | struct kvm_guest_debug; |
390 | struct kvm_debug_exit_arch; | |
391 | ||
392 | struct kvm_sw_breakpoint { | |
393 | target_ulong pc; | |
394 | target_ulong saved_insn; | |
395 | int use_count; | |
72cf2d4f | 396 | QTAILQ_ENTRY(kvm_sw_breakpoint) entry; |
e22a25c9 AL |
397 | }; |
398 | ||
72cf2d4f | 399 | QTAILQ_HEAD(kvm_sw_breakpoint_head, kvm_sw_breakpoint); |
e22a25c9 | 400 | |
a60f24b5 | 401 | struct kvm_sw_breakpoint *kvm_find_sw_breakpoint(CPUState *cpu, |
e22a25c9 AL |
402 | target_ulong pc); |
403 | ||
a60f24b5 | 404 | int kvm_sw_breakpoints_active(CPUState *cpu); |
e22a25c9 | 405 | |
80b7cd73 | 406 | int kvm_arch_insert_sw_breakpoint(CPUState *cpu, |
e22a25c9 | 407 | struct kvm_sw_breakpoint *bp); |
80b7cd73 | 408 | int kvm_arch_remove_sw_breakpoint(CPUState *cpu, |
e22a25c9 AL |
409 | struct kvm_sw_breakpoint *bp); |
410 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, | |
411 | target_ulong len, int type); | |
412 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, | |
413 | target_ulong len, int type); | |
414 | void kvm_arch_remove_all_hw_breakpoints(void); | |
415 | ||
20d695a9 | 416 | void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg); |
e22a25c9 | 417 | |
20d695a9 | 418 | bool kvm_arch_stop_on_emulation_error(CPUState *cpu); |
4513d923 | 419 | |
ad7b8b33 AL |
420 | int kvm_check_extension(KVMState *s, unsigned int extension); |
421 | ||
7d0a07fa AG |
422 | int kvm_vm_check_extension(KVMState *s, unsigned int extension); |
423 | ||
40f1ee27 CH |
424 | #define kvm_vm_enable_cap(s, capability, cap_flags, ...) \ |
425 | ({ \ | |
426 | struct kvm_enable_cap cap = { \ | |
427 | .cap = capability, \ | |
428 | .flags = cap_flags, \ | |
429 | }; \ | |
430 | uint64_t args_tmp[] = { __VA_ARGS__ }; \ | |
1b7ac7ca GK |
431 | size_t n = MIN(ARRAY_SIZE(args_tmp), ARRAY_SIZE(cap.args)); \ |
432 | memcpy(cap.args, args_tmp, n * sizeof(cap.args[0])); \ | |
40f1ee27 CH |
433 | kvm_vm_ioctl(s, KVM_ENABLE_CAP, &cap); \ |
434 | }) | |
435 | ||
436 | #define kvm_vcpu_enable_cap(cpu, capability, cap_flags, ...) \ | |
437 | ({ \ | |
438 | struct kvm_enable_cap cap = { \ | |
439 | .cap = capability, \ | |
440 | .flags = cap_flags, \ | |
441 | }; \ | |
442 | uint64_t args_tmp[] = { __VA_ARGS__ }; \ | |
1b7ac7ca GK |
443 | size_t n = MIN(ARRAY_SIZE(args_tmp), ARRAY_SIZE(cap.args)); \ |
444 | memcpy(cap.args, args_tmp, n * sizeof(cap.args[0])); \ | |
40f1ee27 CH |
445 | kvm_vcpu_ioctl(cpu, KVM_ENABLE_CAP, &cap); \ |
446 | }) | |
447 | ||
ba9bc59e | 448 | uint32_t kvm_arch_get_supported_cpuid(KVMState *env, uint32_t function, |
c958a8bd | 449 | uint32_t index, int reg); |
e22a25c9 | 450 | |
aed6efb9 JH |
451 | void kvm_set_sigmask_len(KVMState *s, unsigned int sigmask_len); |
452 | ||
13eed94e IM |
453 | #if !defined(CONFIG_USER_ONLY) |
454 | int kvm_physical_memory_addr_from_host(KVMState *s, void *ram_addr, | |
455 | hwaddr *phys_addr); | |
456 | #endif | |
457 | ||
458 | #endif /* NEED_CPU_H */ | |
459 | ||
97577fd4 | 460 | void kvm_cpu_synchronize_state(CPUState *cpu); |
13eed94e IM |
461 | void kvm_cpu_synchronize_post_reset(CPUState *cpu); |
462 | void kvm_cpu_synchronize_post_init(CPUState *cpu); | |
75e972da | 463 | void kvm_cpu_synchronize_pre_loadvm(CPUState *cpu); |
13eed94e | 464 | |
18268b60 PB |
465 | void kvm_init_cpu_signals(CPUState *cpu); |
466 | ||
d1f6af6a PX |
467 | /** |
468 | * kvm_irqchip_add_msi_route - Add MSI route for specific vector | |
469 | * @s: KVM state | |
470 | * @vector: which vector to add. This can be either MSI/MSIX | |
471 | * vector. The function will automatically detect whether | |
472 | * MSI/MSIX is enabled, and fetch corresponding MSI | |
473 | * message. | |
474 | * @dev: Owner PCI device to add the route. If @dev is specified | |
475 | * as @NULL, an empty MSI message will be inited. | |
476 | * @return: virq (>=0) when success, errno (<0) when failed. | |
477 | */ | |
478 | int kvm_irqchip_add_msi_route(KVMState *s, int vector, PCIDevice *dev); | |
dc9f06ca PF |
479 | int kvm_irqchip_update_msi_route(KVMState *s, int virq, MSIMessage msg, |
480 | PCIDevice *dev); | |
3f1fea0f | 481 | void kvm_irqchip_commit_routes(KVMState *s); |
1e2aa8be | 482 | void kvm_irqchip_release_virq(KVMState *s, int virq); |
39853bbc | 483 | |
d426d9fb | 484 | int kvm_irqchip_add_adapter_route(KVMState *s, AdapterInfo *adapter); |
977a8d9c | 485 | int kvm_irqchip_add_hv_sint_route(KVMState *s, uint32_t vcpu, uint32_t sint); |
d426d9fb | 486 | |
1c9b71a7 EA |
487 | int kvm_irqchip_add_irqfd_notifier_gsi(KVMState *s, EventNotifier *n, |
488 | EventNotifier *rn, int virq); | |
489 | int kvm_irqchip_remove_irqfd_notifier_gsi(KVMState *s, EventNotifier *n, | |
490 | int virq); | |
197e3524 EA |
491 | int kvm_irqchip_add_irqfd_notifier(KVMState *s, EventNotifier *n, |
492 | EventNotifier *rn, qemu_irq irq); | |
493 | int kvm_irqchip_remove_irqfd_notifier(KVMState *s, EventNotifier *n, | |
494 | qemu_irq irq); | |
495 | void kvm_irqchip_set_qemuirq_gsi(KVMState *s, qemu_irq irq, int gsi); | |
d8ee0384 JB |
496 | void kvm_pc_gsi_handler(void *opaque, int n, int level); |
497 | void kvm_pc_setup_irq_routing(bool pci_enabled); | |
7b774593 | 498 | void kvm_init_irq_routing(KVMState *s); |
d6032e06 CD |
499 | |
500 | /** | |
501 | * kvm_arch_irqchip_create: | |
502 | * @KVMState: The KVMState pointer | |
15eafc2e | 503 | * @MachineState: The MachineState pointer |
d6032e06 CD |
504 | * |
505 | * Allow architectures to create an in-kernel irq chip themselves. | |
506 | * | |
507 | * Returns: < 0: error | |
508 | * 0: irq chip was not created | |
509 | * > 0: irq chip was created | |
510 | */ | |
15eafc2e | 511 | int kvm_arch_irqchip_create(MachineState *ms, KVMState *s); |
ada4135f CH |
512 | |
513 | /** | |
514 | * kvm_set_one_reg - set a register value in KVM via KVM_SET_ONE_REG ioctl | |
515 | * @id: The register ID | |
516 | * @source: The pointer to the value to be set. It must point to a variable | |
517 | * of the correct type/size for the register being accessed. | |
518 | * | |
519 | * Returns: 0 on success, or a negative errno on failure. | |
520 | */ | |
521 | int kvm_set_one_reg(CPUState *cs, uint64_t id, void *source); | |
522 | ||
523 | /** | |
524 | * kvm_get_one_reg - get a register value from KVM via KVM_GET_ONE_REG ioctl | |
525 | * @id: The register ID | |
526 | * @target: The pointer where the value is to be stored. It must point to a | |
527 | * variable of the correct type/size for the register being accessed. | |
528 | * | |
529 | * Returns: 0 on success, or a negative errno on failure. | |
530 | */ | |
531 | int kvm_get_one_reg(CPUState *cs, uint64_t id, void *target); | |
c64abd1f | 532 | struct ppc_radix_page_info *kvm_get_radix_page_info(void); |
44f2e6c1 | 533 | int kvm_get_max_memslots(void); |
05330448 | 534 | #endif |