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[mirror_qemu.git] / include / tcg / tcg-op-common.h
CommitLineData
ad3d0e4d
RH
1/* SPDX-License-Identifier: MIT */
2/*
3 * Target independent opcode generation functions.
4 *
5 * Copyright (c) 2008 Fabrice Bellard
6 */
7
8#ifndef TCG_TCG_OP_COMMON_H
9#define TCG_TCG_OP_COMMON_H
10
11#include "tcg/tcg.h"
c213ee2d 12#include "exec/helper-proto-common.h"
e4eff8e4 13#include "exec/helper-gen-common.h"
ad3d0e4d 14
16edaee7
RH
15TCGv_i32 tcg_constant_i32(int32_t val);
16TCGv_i64 tcg_constant_i64(int64_t val);
17TCGv_vec tcg_constant_vec(TCGType type, unsigned vece, int64_t val);
18TCGv_vec tcg_constant_vec_matching(TCGv_vec match, unsigned vece, int64_t val);
19
4643f3e0
RH
20TCGv_i32 tcg_temp_new_i32(void);
21TCGv_i64 tcg_temp_new_i64(void);
22TCGv_ptr tcg_temp_new_ptr(void);
23TCGv_i128 tcg_temp_new_i128(void);
24TCGv_vec tcg_temp_new_vec(TCGType type);
25TCGv_vec tcg_temp_new_vec_matching(TCGv_vec match);
26
27TCGv_i32 tcg_global_mem_new_i32(TCGv_ptr reg, intptr_t off, const char *name);
28TCGv_i64 tcg_global_mem_new_i64(TCGv_ptr reg, intptr_t off, const char *name);
29TCGv_ptr tcg_global_mem_new_ptr(TCGv_ptr reg, intptr_t off, const char *name);
30
ad3d0e4d
RH
31/* Generic ops. */
32
01bbb6e3 33void gen_set_label(TCGLabel *l);
ad3d0e4d
RH
34void tcg_gen_br(TCGLabel *l);
35void tcg_gen_mb(TCGBar);
36
37/**
38 * tcg_gen_exit_tb() - output exit_tb TCG operation
39 * @tb: The TranslationBlock from which we are exiting
40 * @idx: Direct jump slot index, or exit request
41 *
42 * See tcg/README for more info about this TCG operation.
43 * See also tcg.h and the block comment above TB_EXIT_MASK.
44 *
45 * For a normal exit from the TB, back to the main loop, @tb should
46 * be NULL and @idx should be 0. Otherwise, @tb should be valid and
47 * @idx should be one of the TB_EXIT_ values.
48 */
49void tcg_gen_exit_tb(const TranslationBlock *tb, unsigned idx);
50
51/**
52 * tcg_gen_goto_tb() - output goto_tb TCG operation
53 * @idx: Direct jump slot index (0 or 1)
54 *
55 * See tcg/README for more info about this TCG operation.
56 *
7893e42d 57 * NOTE: In system emulation, direct jumps with goto_tb are only safe within
ad3d0e4d
RH
58 * the pages this TB resides in because we don't take care of direct jumps when
59 * address mapping changes, e.g. in tlb_flush(). In user mode, there's only a
60 * static address translation, so the destination address is always valid, TBs
61 * are always invalidated properly, and direct jumps are reset when mapping
62 * changes.
63 */
64void tcg_gen_goto_tb(unsigned idx);
65
66/**
67 * tcg_gen_lookup_and_goto_ptr() - look up the current TB, jump to it if valid
68 * @addr: Guest address of the target TB
69 *
70 * If the TB is not valid, jump to the epilogue.
71 *
72 * This operation is optional. If the TCG backend does not implement goto_ptr,
73 * this op is equivalent to calling tcg_gen_exit_tb() with 0 as the argument.
74 */
75void tcg_gen_lookup_and_goto_ptr(void);
76
a0948bb7 77void tcg_gen_plugin_cb(unsigned from);
8a2927f2 78void tcg_gen_plugin_mem_cb(TCGv_i64 addr, unsigned meminfo);
ad3d0e4d
RH
79
80/* 32 bit ops */
81
82void tcg_gen_movi_i32(TCGv_i32 ret, int32_t arg);
83void tcg_gen_addi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
84void tcg_gen_subfi_i32(TCGv_i32 ret, int32_t arg1, TCGv_i32 arg2);
85void tcg_gen_subi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
86void tcg_gen_andi_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
87void tcg_gen_ori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
88void tcg_gen_xori_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
89void tcg_gen_shli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
90void tcg_gen_shri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
91void tcg_gen_sari_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
92void tcg_gen_muli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
93void tcg_gen_div_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
94void tcg_gen_rem_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
95void tcg_gen_divu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
96void tcg_gen_remu_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
97void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
98void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
99void tcg_gen_nand_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
100void tcg_gen_nor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
101void tcg_gen_orc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
102void tcg_gen_clz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
103void tcg_gen_ctz_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
104void tcg_gen_clzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
105void tcg_gen_ctzi_i32(TCGv_i32 ret, TCGv_i32 arg1, uint32_t arg2);
106void tcg_gen_clrsb_i32(TCGv_i32 ret, TCGv_i32 arg);
107void tcg_gen_ctpop_i32(TCGv_i32 a1, TCGv_i32 a2);
108void tcg_gen_rotl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
109void tcg_gen_rotli_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
110void tcg_gen_rotr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
111void tcg_gen_rotri_i32(TCGv_i32 ret, TCGv_i32 arg1, int32_t arg2);
112void tcg_gen_deposit_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2,
113 unsigned int ofs, unsigned int len);
114void tcg_gen_deposit_z_i32(TCGv_i32 ret, TCGv_i32 arg,
115 unsigned int ofs, unsigned int len);
116void tcg_gen_extract_i32(TCGv_i32 ret, TCGv_i32 arg,
117 unsigned int ofs, unsigned int len);
118void tcg_gen_sextract_i32(TCGv_i32 ret, TCGv_i32 arg,
119 unsigned int ofs, unsigned int len);
120void tcg_gen_extract2_i32(TCGv_i32 ret, TCGv_i32 al, TCGv_i32 ah,
121 unsigned int ofs);
122void tcg_gen_brcond_i32(TCGCond cond, TCGv_i32 arg1, TCGv_i32 arg2, TCGLabel *);
123void tcg_gen_brcondi_i32(TCGCond cond, TCGv_i32 arg1, int32_t arg2, TCGLabel *);
124void tcg_gen_setcond_i32(TCGCond cond, TCGv_i32 ret,
125 TCGv_i32 arg1, TCGv_i32 arg2);
126void tcg_gen_setcondi_i32(TCGCond cond, TCGv_i32 ret,
127 TCGv_i32 arg1, int32_t arg2);
3635502d
RH
128void tcg_gen_negsetcond_i32(TCGCond cond, TCGv_i32 ret,
129 TCGv_i32 arg1, TCGv_i32 arg2);
93c86ecd
PB
130void tcg_gen_negsetcondi_i32(TCGCond cond, TCGv_i32 ret,
131 TCGv_i32 arg1, int32_t arg2);
ad3d0e4d
RH
132void tcg_gen_movcond_i32(TCGCond cond, TCGv_i32 ret, TCGv_i32 c1,
133 TCGv_i32 c2, TCGv_i32 v1, TCGv_i32 v2);
134void tcg_gen_add2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
135 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
136void tcg_gen_sub2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 al,
137 TCGv_i32 ah, TCGv_i32 bl, TCGv_i32 bh);
138void tcg_gen_mulu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
139void tcg_gen_muls2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
140void tcg_gen_mulsu2_i32(TCGv_i32 rl, TCGv_i32 rh, TCGv_i32 arg1, TCGv_i32 arg2);
141void tcg_gen_ext8s_i32(TCGv_i32 ret, TCGv_i32 arg);
142void tcg_gen_ext16s_i32(TCGv_i32 ret, TCGv_i32 arg);
143void tcg_gen_ext8u_i32(TCGv_i32 ret, TCGv_i32 arg);
144void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg);
f1c29532 145void tcg_gen_ext_i32(TCGv_i32 ret, TCGv_i32 val, MemOp opc);
ad3d0e4d
RH
146void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg, int flags);
147void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg);
148void tcg_gen_hswap_i32(TCGv_i32 ret, TCGv_i32 arg);
149void tcg_gen_smin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
150void tcg_gen_smax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
151void tcg_gen_umin_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
152void tcg_gen_umax_i32(TCGv_i32, TCGv_i32 arg1, TCGv_i32 arg2);
153void tcg_gen_abs_i32(TCGv_i32, TCGv_i32);
154
155/* Replicate a value of size @vece from @in to all the lanes in @out */
156void tcg_gen_dup_i32(unsigned vece, TCGv_i32 out, TCGv_i32 in);
157
09607d35
RH
158void tcg_gen_discard_i32(TCGv_i32 arg);
159void tcg_gen_mov_i32(TCGv_i32 ret, TCGv_i32 arg);
160
161void tcg_gen_ld8u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset);
162void tcg_gen_ld8s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset);
163void tcg_gen_ld16u_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset);
164void tcg_gen_ld16s_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset);
165void tcg_gen_ld_i32(TCGv_i32 ret, TCGv_ptr arg2, tcg_target_long offset);
166
167void tcg_gen_st8_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset);
168void tcg_gen_st16_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset);
169void tcg_gen_st_i32(TCGv_i32 arg1, TCGv_ptr arg2, tcg_target_long offset);
170
171void tcg_gen_add_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
172void tcg_gen_sub_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
173void tcg_gen_and_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
174void tcg_gen_or_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
175void tcg_gen_xor_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
176void tcg_gen_shl_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
177void tcg_gen_shr_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
178void tcg_gen_sar_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
179void tcg_gen_mul_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2);
180void tcg_gen_neg_i32(TCGv_i32 ret, TCGv_i32 arg);
181void tcg_gen_not_i32(TCGv_i32 ret, TCGv_i32 arg);
ad3d0e4d
RH
182
183/* 64 bit ops */
184
185void tcg_gen_movi_i64(TCGv_i64 ret, int64_t arg);
186void tcg_gen_addi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
187void tcg_gen_subfi_i64(TCGv_i64 ret, int64_t arg1, TCGv_i64 arg2);
188void tcg_gen_subi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
189void tcg_gen_andi_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
190void tcg_gen_ori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
191void tcg_gen_xori_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
192void tcg_gen_shli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
193void tcg_gen_shri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
194void tcg_gen_sari_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
195void tcg_gen_muli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
196void tcg_gen_div_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
197void tcg_gen_rem_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
198void tcg_gen_divu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
199void tcg_gen_remu_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
200void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
201void tcg_gen_eqv_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
202void tcg_gen_nand_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
203void tcg_gen_nor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
204void tcg_gen_orc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
205void tcg_gen_clz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
206void tcg_gen_ctz_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
207void tcg_gen_clzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
208void tcg_gen_ctzi_i64(TCGv_i64 ret, TCGv_i64 arg1, uint64_t arg2);
209void tcg_gen_clrsb_i64(TCGv_i64 ret, TCGv_i64 arg);
210void tcg_gen_ctpop_i64(TCGv_i64 a1, TCGv_i64 a2);
211void tcg_gen_rotl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
212void tcg_gen_rotli_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
213void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
214void tcg_gen_rotri_i64(TCGv_i64 ret, TCGv_i64 arg1, int64_t arg2);
215void tcg_gen_deposit_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2,
216 unsigned int ofs, unsigned int len);
217void tcg_gen_deposit_z_i64(TCGv_i64 ret, TCGv_i64 arg,
218 unsigned int ofs, unsigned int len);
219void tcg_gen_extract_i64(TCGv_i64 ret, TCGv_i64 arg,
220 unsigned int ofs, unsigned int len);
221void tcg_gen_sextract_i64(TCGv_i64 ret, TCGv_i64 arg,
222 unsigned int ofs, unsigned int len);
223void tcg_gen_extract2_i64(TCGv_i64 ret, TCGv_i64 al, TCGv_i64 ah,
224 unsigned int ofs);
225void tcg_gen_brcond_i64(TCGCond cond, TCGv_i64 arg1, TCGv_i64 arg2, TCGLabel *);
226void tcg_gen_brcondi_i64(TCGCond cond, TCGv_i64 arg1, int64_t arg2, TCGLabel *);
227void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
228 TCGv_i64 arg1, TCGv_i64 arg2);
229void tcg_gen_setcondi_i64(TCGCond cond, TCGv_i64 ret,
230 TCGv_i64 arg1, int64_t arg2);
3635502d
RH
231void tcg_gen_negsetcond_i64(TCGCond cond, TCGv_i64 ret,
232 TCGv_i64 arg1, TCGv_i64 arg2);
93c86ecd
PB
233void tcg_gen_negsetcondi_i64(TCGCond cond, TCGv_i64 ret,
234 TCGv_i64 arg1, int64_t arg2);
ad3d0e4d
RH
235void tcg_gen_movcond_i64(TCGCond cond, TCGv_i64 ret, TCGv_i64 c1,
236 TCGv_i64 c2, TCGv_i64 v1, TCGv_i64 v2);
237void tcg_gen_add2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
238 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
239void tcg_gen_sub2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 al,
240 TCGv_i64 ah, TCGv_i64 bl, TCGv_i64 bh);
241void tcg_gen_mulu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
242void tcg_gen_muls2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
243void tcg_gen_mulsu2_i64(TCGv_i64 rl, TCGv_i64 rh, TCGv_i64 arg1, TCGv_i64 arg2);
244void tcg_gen_not_i64(TCGv_i64 ret, TCGv_i64 arg);
245void tcg_gen_ext8s_i64(TCGv_i64 ret, TCGv_i64 arg);
246void tcg_gen_ext16s_i64(TCGv_i64 ret, TCGv_i64 arg);
247void tcg_gen_ext32s_i64(TCGv_i64 ret, TCGv_i64 arg);
248void tcg_gen_ext8u_i64(TCGv_i64 ret, TCGv_i64 arg);
249void tcg_gen_ext16u_i64(TCGv_i64 ret, TCGv_i64 arg);
250void tcg_gen_ext32u_i64(TCGv_i64 ret, TCGv_i64 arg);
f1c29532 251void tcg_gen_ext_i64(TCGv_i64 ret, TCGv_i64 val, MemOp opc);
ad3d0e4d
RH
252void tcg_gen_bswap16_i64(TCGv_i64 ret, TCGv_i64 arg, int flags);
253void tcg_gen_bswap32_i64(TCGv_i64 ret, TCGv_i64 arg, int flags);
254void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg);
255void tcg_gen_hswap_i64(TCGv_i64 ret, TCGv_i64 arg);
256void tcg_gen_wswap_i64(TCGv_i64 ret, TCGv_i64 arg);
257void tcg_gen_smin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
258void tcg_gen_smax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
259void tcg_gen_umin_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
260void tcg_gen_umax_i64(TCGv_i64, TCGv_i64 arg1, TCGv_i64 arg2);
261void tcg_gen_abs_i64(TCGv_i64, TCGv_i64);
262
263/* Replicate a value of size @vece from @in to all the lanes in @out */
264void tcg_gen_dup_i64(unsigned vece, TCGv_i64 out, TCGv_i64 in);
265
ad3d0e4d
RH
266void tcg_gen_st8_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
267void tcg_gen_st16_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
268void tcg_gen_st32_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
269
270void tcg_gen_add_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
271void tcg_gen_sub_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
272
273void tcg_gen_discard_i64(TCGv_i64 arg);
274void tcg_gen_mov_i64(TCGv_i64 ret, TCGv_i64 arg);
275void tcg_gen_ld8u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
276void tcg_gen_ld8s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
277void tcg_gen_ld16u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
278void tcg_gen_ld16s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
279void tcg_gen_ld32u_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
280void tcg_gen_ld32s_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
281void tcg_gen_ld_i64(TCGv_i64 ret, TCGv_ptr arg2, tcg_target_long offset);
282void tcg_gen_st_i64(TCGv_i64 arg1, TCGv_ptr arg2, tcg_target_long offset);
283void tcg_gen_and_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
284void tcg_gen_or_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
285void tcg_gen_xor_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
286void tcg_gen_shl_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
287void tcg_gen_shr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
288void tcg_gen_sar_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
289void tcg_gen_mul_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2);
e0de2f55 290void tcg_gen_neg_i64(TCGv_i64 ret, TCGv_i64 arg);
ad3d0e4d 291
ad3d0e4d
RH
292
293/* Size changing operations. */
294
295void tcg_gen_extu_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
296void tcg_gen_ext_i32_i64(TCGv_i64 ret, TCGv_i32 arg);
297void tcg_gen_concat_i32_i64(TCGv_i64 dest, TCGv_i32 low, TCGv_i32 high);
298void tcg_gen_extrl_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
299void tcg_gen_extrh_i64_i32(TCGv_i32 ret, TCGv_i64 arg);
300void tcg_gen_extr_i64_i32(TCGv_i32 lo, TCGv_i32 hi, TCGv_i64 arg);
301void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i64 arg);
e0de2f55 302void tcg_gen_concat32_i64(TCGv_i64 ret, TCGv_i64 lo, TCGv_i64 hi);
ad3d0e4d 303
ad3d0e4d
RH
304void tcg_gen_extr_i128_i64(TCGv_i64 lo, TCGv_i64 hi, TCGv_i128 arg);
305void tcg_gen_concat_i64_i128(TCGv_i128 ret, TCGv_i64 lo, TCGv_i64 hi);
306
e0de2f55
RH
307/* 128 bit ops */
308
309void tcg_gen_mov_i128(TCGv_i128 dst, TCGv_i128 src);
a01d9792
RH
310void tcg_gen_ld_i128(TCGv_i128 ret, TCGv_ptr base, tcg_target_long offset);
311void tcg_gen_st_i128(TCGv_i128 val, TCGv_ptr base, tcg_target_long offset);
312
ad3d0e4d
RH
313/* Local load/store bit ops */
314
315void tcg_gen_qemu_ld_i32_chk(TCGv_i32, TCGTemp *, TCGArg, MemOp, TCGType);
316void tcg_gen_qemu_st_i32_chk(TCGv_i32, TCGTemp *, TCGArg, MemOp, TCGType);
317void tcg_gen_qemu_ld_i64_chk(TCGv_i64, TCGTemp *, TCGArg, MemOp, TCGType);
318void tcg_gen_qemu_st_i64_chk(TCGv_i64, TCGTemp *, TCGArg, MemOp, TCGType);
319void tcg_gen_qemu_ld_i128_chk(TCGv_i128, TCGTemp *, TCGArg, MemOp, TCGType);
320void tcg_gen_qemu_st_i128_chk(TCGv_i128, TCGTemp *, TCGArg, MemOp, TCGType);
321
322/* Atomic ops */
323
324void tcg_gen_atomic_cmpxchg_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, TCGv_i32,
325 TCGArg, MemOp, TCGType);
326void tcg_gen_atomic_cmpxchg_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, TCGv_i64,
327 TCGArg, MemOp, TCGType);
328void tcg_gen_atomic_cmpxchg_i128_chk(TCGv_i128, TCGTemp *, TCGv_i128,
329 TCGv_i128, TCGArg, MemOp, TCGType);
330
331void tcg_gen_nonatomic_cmpxchg_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32, TCGv_i32,
332 TCGArg, MemOp, TCGType);
333void tcg_gen_nonatomic_cmpxchg_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64, TCGv_i64,
334 TCGArg, MemOp, TCGType);
335void tcg_gen_nonatomic_cmpxchg_i128_chk(TCGv_i128, TCGTemp *, TCGv_i128,
336 TCGv_i128, TCGArg, MemOp, TCGType);
337
338void tcg_gen_atomic_xchg_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
339 TCGArg, MemOp, TCGType);
340void tcg_gen_atomic_xchg_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
341 TCGArg, MemOp, TCGType);
342
343void tcg_gen_atomic_fetch_add_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
344 TCGArg, MemOp, TCGType);
345void tcg_gen_atomic_fetch_add_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
346 TCGArg, MemOp, TCGType);
347void tcg_gen_atomic_fetch_and_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
348 TCGArg, MemOp, TCGType);
349void tcg_gen_atomic_fetch_and_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
350 TCGArg, MemOp, TCGType);
351void tcg_gen_atomic_fetch_or_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
352 TCGArg, MemOp, TCGType);
353void tcg_gen_atomic_fetch_or_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
354 TCGArg, MemOp, TCGType);
355void tcg_gen_atomic_fetch_xor_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
356 TCGArg, MemOp, TCGType);
357void tcg_gen_atomic_fetch_xor_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
358 TCGArg, MemOp, TCGType);
359void tcg_gen_atomic_fetch_smin_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
360 TCGArg, MemOp, TCGType);
361void tcg_gen_atomic_fetch_smin_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
362 TCGArg, MemOp, TCGType);
363void tcg_gen_atomic_fetch_umin_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
364 TCGArg, MemOp, TCGType);
365void tcg_gen_atomic_fetch_umin_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
366 TCGArg, MemOp, TCGType);
367void tcg_gen_atomic_fetch_smax_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
368 TCGArg, MemOp, TCGType);
369void tcg_gen_atomic_fetch_smax_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
370 TCGArg, MemOp, TCGType);
371void tcg_gen_atomic_fetch_umax_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
372 TCGArg, MemOp, TCGType);
373void tcg_gen_atomic_fetch_umax_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
374 TCGArg, MemOp, TCGType);
375
376void tcg_gen_atomic_add_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
377 TCGArg, MemOp, TCGType);
378void tcg_gen_atomic_add_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
379 TCGArg, MemOp, TCGType);
380void tcg_gen_atomic_and_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
381 TCGArg, MemOp, TCGType);
382void tcg_gen_atomic_and_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
383 TCGArg, MemOp, TCGType);
384void tcg_gen_atomic_or_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
385 TCGArg, MemOp, TCGType);
386void tcg_gen_atomic_or_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
387 TCGArg, MemOp, TCGType);
388void tcg_gen_atomic_xor_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
389 TCGArg, MemOp, TCGType);
390void tcg_gen_atomic_xor_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
391 TCGArg, MemOp, TCGType);
392void tcg_gen_atomic_smin_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
393 TCGArg, MemOp, TCGType);
394void tcg_gen_atomic_smin_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
395 TCGArg, MemOp, TCGType);
396void tcg_gen_atomic_umin_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
397 TCGArg, MemOp, TCGType);
398void tcg_gen_atomic_umin_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
399 TCGArg, MemOp, TCGType);
400void tcg_gen_atomic_smax_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
401 TCGArg, MemOp, TCGType);
402void tcg_gen_atomic_smax_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
403 TCGArg, MemOp, TCGType);
404void tcg_gen_atomic_umax_fetch_i32_chk(TCGv_i32, TCGTemp *, TCGv_i32,
405 TCGArg, MemOp, TCGType);
406void tcg_gen_atomic_umax_fetch_i64_chk(TCGv_i64, TCGTemp *, TCGv_i64,
407 TCGArg, MemOp, TCGType);
408
409/* Vector ops */
410
411void tcg_gen_mov_vec(TCGv_vec, TCGv_vec);
412void tcg_gen_dup_i32_vec(unsigned vece, TCGv_vec, TCGv_i32);
413void tcg_gen_dup_i64_vec(unsigned vece, TCGv_vec, TCGv_i64);
414void tcg_gen_dup_mem_vec(unsigned vece, TCGv_vec, TCGv_ptr, tcg_target_long);
415void tcg_gen_dupi_vec(unsigned vece, TCGv_vec, uint64_t);
416void tcg_gen_add_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
417void tcg_gen_sub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
418void tcg_gen_mul_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
419void tcg_gen_and_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
420void tcg_gen_or_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
421void tcg_gen_xor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
422void tcg_gen_andc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
423void tcg_gen_orc_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
424void tcg_gen_nand_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
425void tcg_gen_nor_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
426void tcg_gen_eqv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
427void tcg_gen_not_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
428void tcg_gen_neg_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
429void tcg_gen_abs_vec(unsigned vece, TCGv_vec r, TCGv_vec a);
430void tcg_gen_ssadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
431void tcg_gen_usadd_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
432void tcg_gen_sssub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
433void tcg_gen_ussub_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
434void tcg_gen_smin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
435void tcg_gen_umin_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
436void tcg_gen_smax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
437void tcg_gen_umax_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec b);
438
439void tcg_gen_shli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
440void tcg_gen_shri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
441void tcg_gen_sari_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
442void tcg_gen_rotli_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
443void tcg_gen_rotri_vec(unsigned vece, TCGv_vec r, TCGv_vec a, int64_t i);
444
445void tcg_gen_shls_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s);
446void tcg_gen_shrs_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s);
447void tcg_gen_sars_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s);
448void tcg_gen_rotls_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_i32 s);
449
450void tcg_gen_shlv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
451void tcg_gen_shrv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
452void tcg_gen_sarv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
453void tcg_gen_rotlv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
454void tcg_gen_rotrv_vec(unsigned vece, TCGv_vec r, TCGv_vec a, TCGv_vec s);
455
456void tcg_gen_cmp_vec(TCGCond cond, unsigned vece, TCGv_vec r,
457 TCGv_vec a, TCGv_vec b);
458
459void tcg_gen_bitsel_vec(unsigned vece, TCGv_vec r, TCGv_vec a,
460 TCGv_vec b, TCGv_vec c);
461void tcg_gen_cmpsel_vec(TCGCond cond, unsigned vece, TCGv_vec r,
462 TCGv_vec a, TCGv_vec b, TCGv_vec c, TCGv_vec d);
463
464void tcg_gen_ld_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
465void tcg_gen_st_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset);
466void tcg_gen_stl_vec(TCGv_vec r, TCGv_ptr base, TCGArg offset, TCGType t);
467
468/* Host pointer ops */
469
470#if UINTPTR_MAX == UINT32_MAX
471# define PTR i32
472# define NAT TCGv_i32
473#else
474# define PTR i64
475# define NAT TCGv_i64
476#endif
477
16edaee7
RH
478TCGv_ptr tcg_constant_ptr_int(intptr_t x);
479#define tcg_constant_ptr(X) tcg_constant_ptr_int((intptr_t)(X))
480
ad3d0e4d
RH
481static inline void tcg_gen_ld_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t o)
482{
483 glue(tcg_gen_ld_,PTR)((NAT)r, a, o);
484}
485
486static inline void tcg_gen_st_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t o)
487{
488 glue(tcg_gen_st_, PTR)((NAT)r, a, o);
489}
490
491static inline void tcg_gen_discard_ptr(TCGv_ptr a)
492{
493 glue(tcg_gen_discard_,PTR)((NAT)a);
494}
495
496static inline void tcg_gen_add_ptr(TCGv_ptr r, TCGv_ptr a, TCGv_ptr b)
497{
498 glue(tcg_gen_add_,PTR)((NAT)r, (NAT)a, (NAT)b);
499}
500
501static inline void tcg_gen_addi_ptr(TCGv_ptr r, TCGv_ptr a, intptr_t b)
502{
503 glue(tcg_gen_addi_,PTR)((NAT)r, (NAT)a, b);
504}
505
506static inline void tcg_gen_mov_ptr(TCGv_ptr d, TCGv_ptr s)
507{
508 glue(tcg_gen_mov_,PTR)((NAT)d, (NAT)s);
509}
510
511static inline void tcg_gen_movi_ptr(TCGv_ptr d, intptr_t s)
512{
513 glue(tcg_gen_movi_,PTR)((NAT)d, s);
514}
515
516static inline void tcg_gen_brcondi_ptr(TCGCond cond, TCGv_ptr a,
517 intptr_t b, TCGLabel *label)
518{
519 glue(tcg_gen_brcondi_,PTR)(cond, (NAT)a, b, label);
520}
521
522static inline void tcg_gen_ext_i32_ptr(TCGv_ptr r, TCGv_i32 a)
523{
524#if UINTPTR_MAX == UINT32_MAX
525 tcg_gen_mov_i32((NAT)r, a);
526#else
527 tcg_gen_ext_i32_i64((NAT)r, a);
528#endif
529}
530
531static inline void tcg_gen_trunc_i64_ptr(TCGv_ptr r, TCGv_i64 a)
532{
533#if UINTPTR_MAX == UINT32_MAX
534 tcg_gen_extrl_i64_i32((NAT)r, a);
535#else
536 tcg_gen_mov_i64((NAT)r, a);
537#endif
538}
539
540static inline void tcg_gen_extu_ptr_i64(TCGv_i64 r, TCGv_ptr a)
541{
542#if UINTPTR_MAX == UINT32_MAX
543 tcg_gen_extu_i32_i64(r, (NAT)a);
544#else
545 tcg_gen_mov_i64(r, (NAT)a);
546#endif
547}
548
549static inline void tcg_gen_trunc_ptr_i32(TCGv_i32 r, TCGv_ptr a)
550{
551#if UINTPTR_MAX == UINT32_MAX
552 tcg_gen_mov_i32(r, (NAT)a);
553#else
554 tcg_gen_extrl_i64_i32(r, (NAT)a);
555#endif
556}
557
558#undef PTR
559#undef NAT
560
561#endif /* TCG_TCG_OP_COMMON_H */