[mirror_ubuntu-bionic-kernel.git] / include / uapi / drm / omap_drm.h

/*
 * include/uapi/drm/omap_drm.h
 *
 * Copyright (C) 2011 Texas Instruments
 * Author: Rob Clark <rob@ti.com>
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef __OMAP_DRM_H__
#define __OMAP_DRM_H__

#include "drm.h"

#if defined(__cplusplus)
extern "C" {
#endif

/* Please note that modifications to all structs defined here are
 * subject to backwards-compatibility constraints.
 */

#define OMAP_PARAM_CHIPSET_ID	1	/* ie. 0x3430, 0x4430, etc */

struct drm_omap_param {
	__u64 param;			/* in */
	__u64 value;			/* in (set_param), out (get_param) */
};

#define OMAP_BO_SCANOUT		0x00000001	/* scanout capable (phys contiguous) */
#define OMAP_BO_CACHE_MASK	0x00000006	/* cache type mask, see cache modes */
#define OMAP_BO_TILED_MASK	0x00000f00	/* tiled mapping mask, see tiled modes */

/* cache modes */
#define OMAP_BO_CACHED		0x00000000	/* default */
#define OMAP_BO_WC		0x00000002	/* write-combine */
#define OMAP_BO_UNCACHED	0x00000004	/* strongly-ordered (uncached) */

/* tiled modes */
#define OMAP_BO_TILED_8		0x00000100
#define OMAP_BO_TILED_16	0x00000200
#define OMAP_BO_TILED_32	0x00000300
#define OMAP_BO_TILED		(OMAP_BO_TILED_8 | OMAP_BO_TILED_16 | OMAP_BO_TILED_32)

union omap_gem_size {
	__u32 bytes;		/* (for non-tiled formats) */
	struct {
		__u16 width;
		__u16 height;
	} tiled;		/* (for tiled formats) */
};

struct drm_omap_gem_new {
	union omap_gem_size size;	/* in */
	__u32 flags;			/* in */
	__u32 handle;			/* out */
	__u32 __pad;
};

/* mask of operations: */
enum omap_gem_op {
	OMAP_GEM_READ = 0x01,
	OMAP_GEM_WRITE = 0x02,
};

struct drm_omap_gem_cpu_prep {
	__u32 handle;			/* buffer handle (in) */
	__u32 op;			/* mask of omap_gem_op (in) */
};

struct drm_omap_gem_cpu_fini {
	__u32 handle;			/* buffer handle (in) */
	__u32 op;			/* mask of omap_gem_op (in) */
	/* TODO maybe here we pass down info about what regions are touched
	 * by sw so we can be clever about cache ops?  For now a placeholder,
	 * set to zero and we just do full buffer flush..
	 */
	__u32 nregions;
	__u32 __pad;
};

struct drm_omap_gem_info {
	__u32 handle;			/* buffer handle (in) */
	__u32 pad;
	__u64 offset;			/* mmap offset (out) */
	/* note: in case of tiled buffers, the user virtual size can be
	 * different from the physical size (ie. how many pages are needed
	 * to back the object) which is returned in DRM_IOCTL_GEM_OPEN..
	 * This size here is the one that should be used if you want to
	 * mmap() the buffer:
	 */
	__u32 size;			/* virtual size for mmap'ing (out) */
	__u32 __pad;
};

#define DRM_OMAP_GET_PARAM		0x00
#define DRM_OMAP_SET_PARAM		0x01
#define DRM_OMAP_GEM_NEW		0x03
#define DRM_OMAP_GEM_CPU_PREP		0x04
#define DRM_OMAP_GEM_CPU_FINI		0x05
#define DRM_OMAP_GEM_INFO		0x06
#define DRM_OMAP_NUM_IOCTLS		0x07

#define DRM_IOCTL_OMAP_GET_PARAM	DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_PARAM, struct drm_omap_param)
#define DRM_IOCTL_OMAP_SET_PARAM	DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_SET_PARAM, struct drm_omap_param)
#define DRM_IOCTL_OMAP_GEM_NEW		DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_NEW, struct drm_omap_gem_new)
#define DRM_IOCTL_OMAP_GEM_CPU_PREP	DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_PREP, struct drm_omap_gem_cpu_prep)
#define DRM_IOCTL_OMAP_GEM_CPU_FINI	DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini)
#define DRM_IOCTL_OMAP_GEM_INFO		DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_INFO, struct drm_omap_gem_info)

#if defined(__cplusplus)
}
#endif

#endif /* __OMAP_DRM_H__ */
Commit	Line	Data
cd5351f4	1	/*
8bb0daff	2	* include/uapi/drm/omap_drm.h
cd5351f4 RC	3	*
	4	* Copyright (C) 2011 Texas Instruments
	5	* Author: Rob Clark <rob@ti.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify it
	8	* under the terms of the GNU General Public License version 2 as published by
	9	* the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful, but WITHOUT
	12	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	13	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	14	* more details.
	15	*
	16	* You should have received a copy of the GNU General Public License along with
	17	* this program. If not, see <http://www.gnu.org/licenses/>.
	18	*/
	19
	20	#ifndef __OMAP_DRM_H__
	21	#define __OMAP_DRM_H__
	22
7ef500e4	23	#include "drm.h"
cd5351f4	24
c92378a0 EV	25	#if defined(__cplusplus)
	26	extern "C" {
	27	#endif
	28
cd5351f4 RC	29	/* Please note that modifications to all structs defined here are
	30	* subject to backwards-compatibility constraints.
	31	*/
	32
	33	#define OMAP_PARAM_CHIPSET_ID 1 /* ie. 0x3430, 0x4430, etc */
	34
	35	struct drm_omap_param {
337ba7fb DL	36	__u64 param; /* in */
337ba7fb DL	37	__u64 value; /* in (set_param), out (get_param) */
cd5351f4 RC	38	};
	39
	40	#define OMAP_BO_SCANOUT 0x00000001 /* scanout capable (phys contiguous) */
	41	#define OMAP_BO_CACHE_MASK 0x00000006 /* cache type mask, see cache modes */
	42	#define OMAP_BO_TILED_MASK 0x00000f00 /* tiled mapping mask, see tiled modes */
	43
	44	/* cache modes */
	45	#define OMAP_BO_CACHED 0x00000000 /* default */
	46	#define OMAP_BO_WC 0x00000002 /* write-combine */
	47	#define OMAP_BO_UNCACHED 0x00000004 /* strongly-ordered (uncached) */
	48
	49	/* tiled modes */
	50	#define OMAP_BO_TILED_8 0x00000100
	51	#define OMAP_BO_TILED_16 0x00000200
	52	#define OMAP_BO_TILED_32 0x00000300
	53	#define OMAP_BO_TILED (OMAP_BO_TILED_8 \| OMAP_BO_TILED_16 \| OMAP_BO_TILED_32)
	54
	55	union omap_gem_size {
337ba7fb	56	__u32 bytes; /* (for non-tiled formats) */
cd5351f4	57	struct {
337ba7fb DL	58	__u16 width;
337ba7fb DL	59	__u16 height;
cd5351f4 RC	60	} tiled; /* (for tiled formats) */
	61	};
	62
	63	struct drm_omap_gem_new {
	64	union omap_gem_size size; /* in */
337ba7fb DL	65	__u32 flags; /* in */
	66	__u32 handle; /* out */
	67	__u32 __pad;
cd5351f4 RC	68	};
	69
	70	/* mask of operations: */
	71	enum omap_gem_op {
	72	OMAP_GEM_READ = 0x01,
	73	OMAP_GEM_WRITE = 0x02,
	74	};
	75
	76	struct drm_omap_gem_cpu_prep {
337ba7fb DL	77	__u32 handle; /* buffer handle (in) */
337ba7fb DL	78	__u32 op; /* mask of omap_gem_op (in) */
cd5351f4 RC	79	};
	80
	81	struct drm_omap_gem_cpu_fini {
337ba7fb DL	82	__u32 handle; /* buffer handle (in) */
337ba7fb DL	83	__u32 op; /* mask of omap_gem_op (in) */
cd5351f4 RC	84	/* TODO maybe here we pass down info about what regions are touched
	85	* by sw so we can be clever about cache ops? For now a placeholder,
	86	* set to zero and we just do full buffer flush..
	87	*/
337ba7fb DL	88	__u32 nregions;
337ba7fb DL	89	__u32 __pad;
cd5351f4 RC	90	};
	91
	92	struct drm_omap_gem_info {
337ba7fb DL	93	__u32 handle; /* buffer handle (in) */
	94	__u32 pad;
	95	__u64 offset; /* mmap offset (out) */
cd5351f4 RC	96	/* note: in case of tiled buffers, the user virtual size can be
	97	* different from the physical size (ie. how many pages are needed
	98	* to back the object) which is returned in DRM_IOCTL_GEM_OPEN..
	99	* This size here is the one that should be used if you want to
	100	* mmap() the buffer:
	101	*/
337ba7fb DL	102	__u32 size; /* virtual size for mmap'ing (out) */
337ba7fb DL	103	__u32 __pad;
cd5351f4 RC	104	};
	105
	106	#define DRM_OMAP_GET_PARAM 0x00
	107	#define DRM_OMAP_SET_PARAM 0x01
cd5351f4 RC	108	#define DRM_OMAP_GEM_NEW 0x03
	109	#define DRM_OMAP_GEM_CPU_PREP 0x04
	110	#define DRM_OMAP_GEM_CPU_FINI 0x05
	111	#define DRM_OMAP_GEM_INFO 0x06
	112	#define DRM_OMAP_NUM_IOCTLS 0x07
	113
	114	#define DRM_IOCTL_OMAP_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GET_PARAM, struct drm_omap_param)
	115	#define DRM_IOCTL_OMAP_SET_PARAM DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_SET_PARAM, struct drm_omap_param)
cd5351f4 RC	116	#define DRM_IOCTL_OMAP_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_NEW, struct drm_omap_gem_new)
	117	#define DRM_IOCTL_OMAP_GEM_CPU_PREP DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_PREP, struct drm_omap_gem_cpu_prep)
	118	#define DRM_IOCTL_OMAP_GEM_CPU_FINI DRM_IOW (DRM_COMMAND_BASE + DRM_OMAP_GEM_CPU_FINI, struct drm_omap_gem_cpu_fini)
	119	#define DRM_IOCTL_OMAP_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_OMAP_GEM_INFO, struct drm_omap_gem_info)
	120
c92378a0 EV	121	#if defined(__cplusplus)
	122	}
	123	#endif
	124
cd5351f4	125	#endif /* __OMAP_DRM_H__ */