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282a1674 DA |
1 | /* savage_drm.h -- Public header for the savage driver |
2 | * | |
3 | * Copyright 2004 Felix Kuehling | |
4 | * All Rights Reserved. | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | |
7 | * copy of this software and associated documentation files (the "Software"), | |
8 | * to deal in the Software without restriction, including without limitation | |
9 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | |
10 | * and/or sell copies of the Software, and to permit persons to whom the | |
11 | * Software is furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice (including the | |
14 | * next paragraph) shall be included in all copies or substantial portions | |
15 | * of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
18 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
19 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
20 | * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR | |
21 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF | |
22 | * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION | |
23 | * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
24 | */ | |
25 | ||
26 | #ifndef __SAVAGE_DRM_H__ | |
27 | #define __SAVAGE_DRM_H__ | |
28 | ||
3e2d2cdf | 29 | #include "drm.h" |
22375f3e | 30 | |
ea526b7f EV |
31 | #if defined(__cplusplus) |
32 | extern "C" { | |
33 | #endif | |
34 | ||
282a1674 DA |
35 | #ifndef __SAVAGE_SAREA_DEFINES__ |
36 | #define __SAVAGE_SAREA_DEFINES__ | |
37 | ||
25985edc | 38 | /* 2 heaps (1 for card, 1 for agp), each divided into up to 128 |
282a1674 DA |
39 | * regions, subject to a minimum region size of (1<<16) == 64k. |
40 | * | |
41 | * Clients may subdivide regions internally, but when sharing between | |
42 | * clients, the region size is the minimum granularity. | |
43 | */ | |
44 | ||
45 | #define SAVAGE_CARD_HEAP 0 | |
46 | #define SAVAGE_AGP_HEAP 1 | |
47 | #define SAVAGE_NR_TEX_HEAPS 2 | |
48 | #define SAVAGE_NR_TEX_REGIONS 16 | |
49 | #define SAVAGE_LOG_MIN_TEX_REGION_SIZE 16 | |
50 | ||
b5e89ed5 | 51 | #endif /* __SAVAGE_SAREA_DEFINES__ */ |
282a1674 DA |
52 | |
53 | typedef struct _drm_savage_sarea { | |
54 | /* LRU lists for texture memory in agp space and on the card. | |
55 | */ | |
eddca551 | 56 | struct drm_tex_region texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS + |
b5e89ed5 | 57 | 1]; |
282a1674 DA |
58 | unsigned int texAge[SAVAGE_NR_TEX_HEAPS]; |
59 | ||
60 | /* Mechanism to validate card state. | |
61 | */ | |
62 | int ctxOwner; | |
63 | } drm_savage_sarea_t, *drm_savage_sarea_ptr; | |
64 | ||
65 | /* Savage-specific ioctls | |
66 | */ | |
67 | #define DRM_SAVAGE_BCI_INIT 0x00 | |
68 | #define DRM_SAVAGE_BCI_CMDBUF 0x01 | |
69 | #define DRM_SAVAGE_BCI_EVENT_EMIT 0x02 | |
70 | #define DRM_SAVAGE_BCI_EVENT_WAIT 0x03 | |
71 | ||
1b2f1489 DA |
72 | #define DRM_IOCTL_SAVAGE_BCI_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t) |
73 | #define DRM_IOCTL_SAVAGE_BCI_CMDBUF DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t) | |
74 | #define DRM_IOCTL_SAVAGE_BCI_EVENT_EMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t) | |
75 | #define DRM_IOCTL_SAVAGE_BCI_EVENT_WAIT DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t) | |
282a1674 DA |
76 | |
77 | #define SAVAGE_DMA_PCI 1 | |
78 | #define SAVAGE_DMA_AGP 3 | |
79 | typedef struct drm_savage_init { | |
80 | enum { | |
81 | SAVAGE_INIT_BCI = 1, | |
82 | SAVAGE_CLEANUP_BCI = 2 | |
83 | } func; | |
84 | unsigned int sarea_priv_offset; | |
85 | ||
86 | /* some parameters */ | |
87 | unsigned int cob_size; | |
88 | unsigned int bci_threshold_lo, bci_threshold_hi; | |
89 | unsigned int dma_type; | |
90 | ||
91 | /* frame buffer layout */ | |
92 | unsigned int fb_bpp; | |
93 | unsigned int front_offset, front_pitch; | |
94 | unsigned int back_offset, back_pitch; | |
95 | unsigned int depth_bpp; | |
96 | unsigned int depth_offset, depth_pitch; | |
97 | ||
98 | /* local textures */ | |
99 | unsigned int texture_offset; | |
100 | unsigned int texture_size; | |
101 | ||
102 | /* physical locations of non-permanent maps */ | |
103 | unsigned long status_offset; | |
104 | unsigned long buffers_offset; | |
105 | unsigned long agp_textures_offset; | |
106 | unsigned long cmd_dma_offset; | |
107 | } drm_savage_init_t; | |
108 | ||
109 | typedef union drm_savage_cmd_header drm_savage_cmd_header_t; | |
110 | typedef struct drm_savage_cmdbuf { | |
b5e89ed5 | 111 | /* command buffer in client's address space */ |
282a1674 DA |
112 | drm_savage_cmd_header_t __user *cmd_addr; |
113 | unsigned int size; /* size of the command buffer in 64bit units */ | |
114 | ||
115 | unsigned int dma_idx; /* DMA buffer index to use */ | |
116 | int discard; /* discard DMA buffer when done */ | |
b5e89ed5 | 117 | /* vertex buffer in client's address space */ |
282a1674 DA |
118 | unsigned int __user *vb_addr; |
119 | unsigned int vb_size; /* size of client vertex buffer in bytes */ | |
120 | unsigned int vb_stride; /* stride of vertices in 32bit words */ | |
b5e89ed5 | 121 | /* boxes in client's address space */ |
eddca551 | 122 | struct drm_clip_rect __user *box_addr; |
282a1674 DA |
123 | unsigned int nbox; /* number of clipping boxes */ |
124 | } drm_savage_cmdbuf_t; | |
125 | ||
b5e89ed5 DA |
126 | #define SAVAGE_WAIT_2D 0x1 /* wait for 2D idle before updating event tag */ |
127 | #define SAVAGE_WAIT_3D 0x2 /* wait for 3D idle before updating event tag */ | |
128 | #define SAVAGE_WAIT_IRQ 0x4 /* emit or wait for IRQ, not implemented yet */ | |
282a1674 DA |
129 | typedef struct drm_savage_event { |
130 | unsigned int count; | |
131 | unsigned int flags; | |
132 | } drm_savage_event_emit_t, drm_savage_event_wait_t; | |
133 | ||
134 | /* Commands for the cmdbuf ioctl | |
135 | */ | |
b5e89ed5 DA |
136 | #define SAVAGE_CMD_STATE 0 /* a range of state registers */ |
137 | #define SAVAGE_CMD_DMA_PRIM 1 /* vertices from DMA buffer */ | |
138 | #define SAVAGE_CMD_VB_PRIM 2 /* vertices from client vertex buffer */ | |
139 | #define SAVAGE_CMD_DMA_IDX 3 /* indexed vertices from DMA buffer */ | |
140 | #define SAVAGE_CMD_VB_IDX 4 /* indexed vertices client vertex buffer */ | |
141 | #define SAVAGE_CMD_CLEAR 5 /* clear buffers */ | |
142 | #define SAVAGE_CMD_SWAP 6 /* swap buffers */ | |
282a1674 DA |
143 | |
144 | /* Primitive types | |
145 | */ | |
b5e89ed5 DA |
146 | #define SAVAGE_PRIM_TRILIST 0 /* triangle list */ |
147 | #define SAVAGE_PRIM_TRISTRIP 1 /* triangle strip */ | |
148 | #define SAVAGE_PRIM_TRIFAN 2 /* triangle fan */ | |
149 | #define SAVAGE_PRIM_TRILIST_201 3 /* reorder verts for correct flat | |
150 | * shading on s3d */ | |
282a1674 DA |
151 | |
152 | /* Skip flags (vertex format) | |
153 | */ | |
154 | #define SAVAGE_SKIP_Z 0x01 | |
155 | #define SAVAGE_SKIP_W 0x02 | |
156 | #define SAVAGE_SKIP_C0 0x04 | |
157 | #define SAVAGE_SKIP_C1 0x08 | |
158 | #define SAVAGE_SKIP_S0 0x10 | |
159 | #define SAVAGE_SKIP_T0 0x20 | |
160 | #define SAVAGE_SKIP_ST0 0x30 | |
161 | #define SAVAGE_SKIP_S1 0x40 | |
162 | #define SAVAGE_SKIP_T1 0x80 | |
163 | #define SAVAGE_SKIP_ST1 0xc0 | |
164 | #define SAVAGE_SKIP_ALL_S3D 0x3f | |
165 | #define SAVAGE_SKIP_ALL_S4 0xff | |
166 | ||
167 | /* Buffer names for clear command | |
168 | */ | |
169 | #define SAVAGE_FRONT 0x1 | |
170 | #define SAVAGE_BACK 0x2 | |
171 | #define SAVAGE_DEPTH 0x4 | |
172 | ||
173 | /* 64-bit command header | |
174 | */ | |
175 | union drm_savage_cmd_header { | |
176 | struct { | |
177 | unsigned char cmd; /* command */ | |
178 | unsigned char pad0; | |
179 | unsigned short pad1; | |
180 | unsigned short pad2; | |
181 | unsigned short pad3; | |
b5e89ed5 | 182 | } cmd; /* generic */ |
282a1674 DA |
183 | struct { |
184 | unsigned char cmd; | |
185 | unsigned char global; /* need idle engine? */ | |
186 | unsigned short count; /* number of consecutive registers */ | |
187 | unsigned short start; /* first register */ | |
188 | unsigned short pad3; | |
b5e89ed5 | 189 | } state; /* SAVAGE_CMD_STATE */ |
282a1674 DA |
190 | struct { |
191 | unsigned char cmd; | |
192 | unsigned char prim; /* primitive type */ | |
193 | unsigned short skip; /* vertex format (skip flags) */ | |
194 | unsigned short count; /* number of vertices */ | |
195 | unsigned short start; /* first vertex in DMA/vertex buffer */ | |
b5e89ed5 | 196 | } prim; /* SAVAGE_CMD_DMA_PRIM, SAVAGE_CMD_VB_PRIM */ |
282a1674 DA |
197 | struct { |
198 | unsigned char cmd; | |
199 | unsigned char prim; | |
200 | unsigned short skip; | |
201 | unsigned short count; /* number of indices that follow */ | |
202 | unsigned short pad3; | |
b5e89ed5 | 203 | } idx; /* SAVAGE_CMD_DMA_IDX, SAVAGE_CMD_VB_IDX */ |
282a1674 DA |
204 | struct { |
205 | unsigned char cmd; | |
206 | unsigned char pad0; | |
207 | unsigned short pad1; | |
208 | unsigned int flags; | |
b5e89ed5 | 209 | } clear0; /* SAVAGE_CMD_CLEAR */ |
282a1674 DA |
210 | struct { |
211 | unsigned int mask; | |
212 | unsigned int value; | |
b5e89ed5 | 213 | } clear1; /* SAVAGE_CMD_CLEAR data */ |
282a1674 DA |
214 | }; |
215 | ||
ea526b7f EV |
216 | #if defined(__cplusplus) |
217 | } | |
218 | #endif | |
219 | ||
282a1674 | 220 | #endif |