projects / mirror_ubuntu-artful-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 607ca46e DH |
1 | #ifndef _UAPI_LINUX_FB_H |
| 2 | #define _UAPI_LINUX_FB_H | |
| 3 | ||
| 4 | #include <linux/types.h> | |
| 5 | #include <linux/i2c.h> | |
| 6 | ||
| 7 | /* Definitions of frame buffers */ | |
| 8 | ||
| 9 | #define FB_MAX 32 /* sufficient for now */ | |
| 10 | ||
| 11 | /* ioctls | |
| 12 | 0x46 is 'F' */ | |
| 13 | #define FBIOGET_VSCREENINFO 0x4600 | |
| 14 | #define FBIOPUT_VSCREENINFO 0x4601 | |
| 15 | #define FBIOGET_FSCREENINFO 0x4602 | |
| 16 | #define FBIOGETCMAP 0x4604 | |
| 17 | #define FBIOPUTCMAP 0x4605 | |
| 18 | #define FBIOPAN_DISPLAY 0x4606 | |
| 19 | #ifndef __KERNEL__ | |
| 20 | #define FBIO_CURSOR _IOWR('F', 0x08, struct fb_cursor) | |
| 21 | #endif | |
| 22 | /* 0x4607-0x460B are defined below */ | |
| 23 | /* #define FBIOGET_MONITORSPEC 0x460C */ | |
| 24 | /* #define FBIOPUT_MONITORSPEC 0x460D */ | |
| 25 | /* #define FBIOSWITCH_MONIBIT 0x460E */ | |
| 26 | #define FBIOGET_CON2FBMAP 0x460F | |
| 27 | #define FBIOPUT_CON2FBMAP 0x4610 | |
| 28 | #define FBIOBLANK 0x4611 /* arg: 0 or vesa level + 1 */ | |
| 29 | #define FBIOGET_VBLANK _IOR('F', 0x12, struct fb_vblank) | |
| 30 | #define FBIO_ALLOC 0x4613 | |
| 31 | #define FBIO_FREE 0x4614 | |
| 32 | #define FBIOGET_GLYPH 0x4615 | |
| 33 | #define FBIOGET_HWCINFO 0x4616 | |
| 34 | #define FBIOPUT_MODEINFO 0x4617 | |
| 35 | #define FBIOGET_DISPINFO 0x4618 | |
| 36 | #define FBIO_WAITFORVSYNC _IOW('F', 0x20, __u32) | |
| 15844522 SS |
37 | /* |
| 38 | * HACK: use 'z' in order not to clash with any other ioctl numbers which might | |
| 39 | * be concurrently added to the mainline kernel | |
| 40 | */ | |
| 41 | #define FBIOCOPYAREA _IOW('z', 0x21, struct fb_copyarea) | |
| 42 | #define FBIODMACOPY _IOW('z', 0x22, struct fb_dmacopy) | |
| 607ca46e DH |
43 | |
| 44 | #define FB_TYPE_PACKED_PIXELS 0 /* Packed Pixels */ | |
| 45 | #define FB_TYPE_PLANES 1 /* Non interleaved planes */ | |
| 46 | #define FB_TYPE_INTERLEAVED_PLANES 2 /* Interleaved planes */ | |
| 47 | #define FB_TYPE_TEXT 3 /* Text/attributes */ | |
| 48 | #define FB_TYPE_VGA_PLANES 4 /* EGA/VGA planes */ | |
| 49 | #define FB_TYPE_FOURCC 5 /* Type identified by a V4L2 FOURCC */ | |
| 50 | ||
| 51 | #define FB_AUX_TEXT_MDA 0 /* Monochrome text */ | |
| 52 | #define FB_AUX_TEXT_CGA 1 /* CGA/EGA/VGA Color text */ | |
| 53 | #define FB_AUX_TEXT_S3_MMIO 2 /* S3 MMIO fasttext */ | |
| 54 | #define FB_AUX_TEXT_MGA_STEP16 3 /* MGA Millenium I: text, attr, 14 reserved bytes */ | |
| 55 | #define FB_AUX_TEXT_MGA_STEP8 4 /* other MGAs: text, attr, 6 reserved bytes */ | |
| 56 | #define FB_AUX_TEXT_SVGA_GROUP 8 /* 8-15: SVGA tileblit compatible modes */ | |
| 57 | #define FB_AUX_TEXT_SVGA_MASK 7 /* lower three bits says step */ | |
| 58 | #define FB_AUX_TEXT_SVGA_STEP2 8 /* SVGA text mode: text, attr */ | |
| 59 | #define FB_AUX_TEXT_SVGA_STEP4 9 /* SVGA text mode: text, attr, 2 reserved bytes */ | |
| 60 | #define FB_AUX_TEXT_SVGA_STEP8 10 /* SVGA text mode: text, attr, 6 reserved bytes */ | |
| 61 | #define FB_AUX_TEXT_SVGA_STEP16 11 /* SVGA text mode: text, attr, 14 reserved bytes */ | |
| 62 | #define FB_AUX_TEXT_SVGA_LAST 15 /* reserved up to 15 */ | |
| 63 | ||
| 64 | #define FB_AUX_VGA_PLANES_VGA4 0 /* 16 color planes (EGA/VGA) */ | |
| 65 | #define FB_AUX_VGA_PLANES_CFB4 1 /* CFB4 in planes (VGA) */ | |
| 66 | #define FB_AUX_VGA_PLANES_CFB8 2 /* CFB8 in planes (VGA) */ | |
| 67 | ||
| 68 | #define FB_VISUAL_MONO01 0 /* Monochr. 1=Black 0=White */ | |
| 69 | #define FB_VISUAL_MONO10 1 /* Monochr. 1=White 0=Black */ | |
| 70 | #define FB_VISUAL_TRUECOLOR 2 /* True color */ | |
| 71 | #define FB_VISUAL_PSEUDOCOLOR 3 /* Pseudo color (like atari) */ | |
| 72 | #define FB_VISUAL_DIRECTCOLOR 4 /* Direct color */ | |
| 73 | #define FB_VISUAL_STATIC_PSEUDOCOLOR 5 /* Pseudo color readonly */ | |
| 74 | #define FB_VISUAL_FOURCC 6 /* Visual identified by a V4L2 FOURCC */ | |
| 75 | ||
| 76 | #define FB_ACCEL_NONE 0 /* no hardware accelerator */ | |
| 77 | #define FB_ACCEL_ATARIBLITT 1 /* Atari Blitter */ | |
| 78 | #define FB_ACCEL_AMIGABLITT 2 /* Amiga Blitter */ | |
| 79 | #define FB_ACCEL_S3_TRIO64 3 /* Cybervision64 (S3 Trio64) */ | |
| 80 | #define FB_ACCEL_NCR_77C32BLT 4 /* RetinaZ3 (NCR 77C32BLT) */ | |
| 81 | #define FB_ACCEL_S3_VIRGE 5 /* Cybervision64/3D (S3 ViRGE) */ | |
| 82 | #define FB_ACCEL_ATI_MACH64GX 6 /* ATI Mach 64GX family */ | |
| 83 | #define FB_ACCEL_DEC_TGA 7 /* DEC 21030 TGA */ | |
| 84 | #define FB_ACCEL_ATI_MACH64CT 8 /* ATI Mach 64CT family */ | |
| 85 | #define FB_ACCEL_ATI_MACH64VT 9 /* ATI Mach 64CT family VT class */ | |
| 86 | #define FB_ACCEL_ATI_MACH64GT 10 /* ATI Mach 64CT family GT class */ | |
| 87 | #define FB_ACCEL_SUN_CREATOR 11 /* Sun Creator/Creator3D */ | |
| 88 | #define FB_ACCEL_SUN_CGSIX 12 /* Sun cg6 */ | |
| 89 | #define FB_ACCEL_SUN_LEO 13 /* Sun leo/zx */ | |
| 90 | #define FB_ACCEL_IMS_TWINTURBO 14 /* IMS Twin Turbo */ | |
| 91 | #define FB_ACCEL_3DLABS_PERMEDIA2 15 /* 3Dlabs Permedia 2 */ | |
| 92 | #define FB_ACCEL_MATROX_MGA2064W 16 /* Matrox MGA2064W (Millenium) */ | |
| 93 | #define FB_ACCEL_MATROX_MGA1064SG 17 /* Matrox MGA1064SG (Mystique) */ | |
| 94 | #define FB_ACCEL_MATROX_MGA2164W 18 /* Matrox MGA2164W (Millenium II) */ | |
| 95 | #define FB_ACCEL_MATROX_MGA2164W_AGP 19 /* Matrox MGA2164W (Millenium II) */ | |
| 96 | #define FB_ACCEL_MATROX_MGAG100 20 /* Matrox G100 (Productiva G100) */ | |
| 97 | #define FB_ACCEL_MATROX_MGAG200 21 /* Matrox G200 (Myst, Mill, ...) */ | |
| 98 | #define FB_ACCEL_SUN_CG14 22 /* Sun cgfourteen */ | |
| 99 | #define FB_ACCEL_SUN_BWTWO 23 /* Sun bwtwo */ | |
| 100 | #define FB_ACCEL_SUN_CGTHREE 24 /* Sun cgthree */ | |
| 101 | #define FB_ACCEL_SUN_TCX 25 /* Sun tcx */ | |
| 102 | #define FB_ACCEL_MATROX_MGAG400 26 /* Matrox G400 */ | |
| 103 | #define FB_ACCEL_NV3 27 /* nVidia RIVA 128 */ | |
| 104 | #define FB_ACCEL_NV4 28 /* nVidia RIVA TNT */ | |
| 105 | #define FB_ACCEL_NV5 29 /* nVidia RIVA TNT2 */ | |
| 106 | #define FB_ACCEL_CT_6555x 30 /* C&T 6555x */ | |
| 107 | #define FB_ACCEL_3DFX_BANSHEE 31 /* 3Dfx Banshee */ | |
| 108 | #define FB_ACCEL_ATI_RAGE128 32 /* ATI Rage128 family */ | |
| 109 | #define FB_ACCEL_IGS_CYBER2000 33 /* CyberPro 2000 */ | |
| 110 | #define FB_ACCEL_IGS_CYBER2010 34 /* CyberPro 2010 */ | |
| 111 | #define FB_ACCEL_IGS_CYBER5000 35 /* CyberPro 5000 */ | |
| 112 | #define FB_ACCEL_SIS_GLAMOUR 36 /* SiS 300/630/540 */ | |
| 113 | #define FB_ACCEL_3DLABS_PERMEDIA3 37 /* 3Dlabs Permedia 3 */ | |
| 114 | #define FB_ACCEL_ATI_RADEON 38 /* ATI Radeon family */ | |
| 115 | #define FB_ACCEL_I810 39 /* Intel 810/815 */ | |
| 116 | #define FB_ACCEL_SIS_GLAMOUR_2 40 /* SiS 315, 650, 740 */ | |
| 117 | #define FB_ACCEL_SIS_XABRE 41 /* SiS 330 ("Xabre") */ | |
| 118 | #define FB_ACCEL_I830 42 /* Intel 830M/845G/85x/865G */ | |
| 119 | #define FB_ACCEL_NV_10 43 /* nVidia Arch 10 */ | |
| 120 | #define FB_ACCEL_NV_20 44 /* nVidia Arch 20 */ | |
| 121 | #define FB_ACCEL_NV_30 45 /* nVidia Arch 30 */ | |
| 122 | #define FB_ACCEL_NV_40 46 /* nVidia Arch 40 */ | |
| 123 | #define FB_ACCEL_XGI_VOLARI_V 47 /* XGI Volari V3XT, V5, V8 */ | |
| 124 | #define FB_ACCEL_XGI_VOLARI_Z 48 /* XGI Volari Z7 */ | |
| 125 | #define FB_ACCEL_OMAP1610 49 /* TI OMAP16xx */ | |
| 126 | #define FB_ACCEL_TRIDENT_TGUI 50 /* Trident TGUI */ | |
| 127 | #define FB_ACCEL_TRIDENT_3DIMAGE 51 /* Trident 3DImage */ | |
| 128 | #define FB_ACCEL_TRIDENT_BLADE3D 52 /* Trident Blade3D */ | |
| 129 | #define FB_ACCEL_TRIDENT_BLADEXP 53 /* Trident BladeXP */ | |
| 130 | #define FB_ACCEL_CIRRUS_ALPINE 53 /* Cirrus Logic 543x/544x/5480 */ | |
| 131 | #define FB_ACCEL_NEOMAGIC_NM2070 90 /* NeoMagic NM2070 */ | |
| 132 | #define FB_ACCEL_NEOMAGIC_NM2090 91 /* NeoMagic NM2090 */ | |
| 133 | #define FB_ACCEL_NEOMAGIC_NM2093 92 /* NeoMagic NM2093 */ | |
| 134 | #define FB_ACCEL_NEOMAGIC_NM2097 93 /* NeoMagic NM2097 */ | |
| 135 | #define FB_ACCEL_NEOMAGIC_NM2160 94 /* NeoMagic NM2160 */ | |
| 136 | #define FB_ACCEL_NEOMAGIC_NM2200 95 /* NeoMagic NM2200 */ | |
| 137 | #define FB_ACCEL_NEOMAGIC_NM2230 96 /* NeoMagic NM2230 */ | |
| 138 | #define FB_ACCEL_NEOMAGIC_NM2360 97 /* NeoMagic NM2360 */ | |
| 139 | #define FB_ACCEL_NEOMAGIC_NM2380 98 /* NeoMagic NM2380 */ | |
| 140 | #define FB_ACCEL_PXA3XX 99 /* PXA3xx */ | |
| 141 | ||
| 142 | #define FB_ACCEL_SAVAGE4 0x80 /* S3 Savage4 */ | |
| 143 | #define FB_ACCEL_SAVAGE3D 0x81 /* S3 Savage3D */ | |
| 144 | #define FB_ACCEL_SAVAGE3D_MV 0x82 /* S3 Savage3D-MV */ | |
| 145 | #define FB_ACCEL_SAVAGE2000 0x83 /* S3 Savage2000 */ | |
| 146 | #define FB_ACCEL_SAVAGE_MX_MV 0x84 /* S3 Savage/MX-MV */ | |
| 147 | #define FB_ACCEL_SAVAGE_MX 0x85 /* S3 Savage/MX */ | |
| 148 | #define FB_ACCEL_SAVAGE_IX_MV 0x86 /* S3 Savage/IX-MV */ | |
| 149 | #define FB_ACCEL_SAVAGE_IX 0x87 /* S3 Savage/IX */ | |
| 150 | #define FB_ACCEL_PROSAVAGE_PM 0x88 /* S3 ProSavage PM133 */ | |
| 151 | #define FB_ACCEL_PROSAVAGE_KM 0x89 /* S3 ProSavage KM133 */ | |
| 152 | #define FB_ACCEL_S3TWISTER_P 0x8a /* S3 Twister */ | |
| 153 | #define FB_ACCEL_S3TWISTER_K 0x8b /* S3 TwisterK */ | |
| 154 | #define FB_ACCEL_SUPERSAVAGE 0x8c /* S3 Supersavage */ | |
| 155 | #define FB_ACCEL_PROSAVAGE_DDR 0x8d /* S3 ProSavage DDR */ | |
| 156 | #define FB_ACCEL_PROSAVAGE_DDRK 0x8e /* S3 ProSavage DDR-K */ | |
| 157 | ||
| 158 | #define FB_ACCEL_PUV3_UNIGFX 0xa0 /* PKUnity-v3 Unigfx */ | |
| 159 | ||
| 160 | #define FB_CAP_FOURCC 1 /* Device supports FOURCC-based formats */ | |
| 161 | ||
| 162 | struct fb_fix_screeninfo { | |
| 163 | char id[16]; /* identification string eg "TT Builtin" */ | |
| 164 | unsigned long smem_start; /* Start of frame buffer mem */ | |
| 165 | /* (physical address) */ | |
| 166 | __u32 smem_len; /* Length of frame buffer mem */ | |
| 167 | __u32 type; /* see FB_TYPE_* */ | |
| 168 | __u32 type_aux; /* Interleave for interleaved Planes */ | |
| 169 | __u32 visual; /* see FB_VISUAL_* */ | |
| 170 | __u16 xpanstep; /* zero if no hardware panning */ | |
| 171 | __u16 ypanstep; /* zero if no hardware panning */ | |
| 172 | __u16 ywrapstep; /* zero if no hardware ywrap */ | |
| 173 | __u32 line_length; /* length of a line in bytes */ | |
| 174 | unsigned long mmio_start; /* Start of Memory Mapped I/O */ | |
| 175 | /* (physical address) */ | |
| 176 | __u32 mmio_len; /* Length of Memory Mapped I/O */ | |
| 177 | __u32 accel; /* Indicate to driver which */ | |
| 178 | /* specific chip/card we have */ | |
| 179 | __u16 capabilities; /* see FB_CAP_* */ | |
| 180 | __u16 reserved[2]; /* Reserved for future compatibility */ | |
| 181 | }; | |
| 182 | ||
| 183 | /* Interpretation of offset for color fields: All offsets are from the right, | |
| 184 | * inside a "pixel" value, which is exactly 'bits_per_pixel' wide (means: you | |
| 185 | * can use the offset as right argument to <<). A pixel afterwards is a bit | |
| 186 | * stream and is written to video memory as that unmodified. | |
| 187 | * | |
| 188 | * For pseudocolor: offset and length should be the same for all color | |
| 189 | * components. Offset specifies the position of the least significant bit | |
| 190 | * of the pallette index in a pixel value. Length indicates the number | |
| 191 | * of available palette entries (i.e. # of entries = 1 << length). | |
| 192 | */ | |
| 193 | struct fb_bitfield { | |
| 194 | __u32 offset; /* beginning of bitfield */ | |
| 195 | __u32 length; /* length of bitfield */ | |
| 196 | __u32 msb_right; /* != 0 : Most significant bit is */ | |
| 197 | /* right */ | |
| 198 | }; | |
| 199 | ||
| 200 | #define FB_NONSTD_HAM 1 /* Hold-And-Modify (HAM) */ | |
| 201 | #define FB_NONSTD_REV_PIX_IN_B 2 /* order of pixels in each byte is reversed */ | |
| 202 | ||
| 203 | #define FB_ACTIVATE_NOW 0 /* set values immediately (or vbl)*/ | |
| 204 | #define FB_ACTIVATE_NXTOPEN 1 /* activate on next open */ | |
| 205 | #define FB_ACTIVATE_TEST 2 /* don't set, round up impossible */ | |
| 206 | #define FB_ACTIVATE_MASK 15 | |
| 207 | /* values */ | |
| 208 | #define FB_ACTIVATE_VBL 16 /* activate values on next vbl */ | |
| 209 | #define FB_CHANGE_CMAP_VBL 32 /* change colormap on vbl */ | |
| 210 | #define FB_ACTIVATE_ALL 64 /* change all VCs on this fb */ | |
| 211 | #define FB_ACTIVATE_FORCE 128 /* force apply even when no change*/ | |
| 212 | #define FB_ACTIVATE_INV_MODE 256 /* invalidate videomode */ | |
| 213 | ||
| 214 | #define FB_ACCELF_TEXT 1 /* (OBSOLETE) see fb_info.flags and vc_mode */ | |
| 215 | ||
| 216 | #define FB_SYNC_HOR_HIGH_ACT 1 /* horizontal sync high active */ | |
| 217 | #define FB_SYNC_VERT_HIGH_ACT 2 /* vertical sync high active */ | |
| 218 | #define FB_SYNC_EXT 4 /* external sync */ | |
| 219 | #define FB_SYNC_COMP_HIGH_ACT 8 /* composite sync high active */ | |
| 220 | #define FB_SYNC_BROADCAST 16 /* broadcast video timings */ | |
| 221 | /* vtotal = 144d/288n/576i => PAL */ | |
| 222 | /* vtotal = 121d/242n/484i => NTSC */ | |
| 223 | #define FB_SYNC_ON_GREEN 32 /* sync on green */ | |
| 224 | ||
| 225 | #define FB_VMODE_NONINTERLACED 0 /* non interlaced */ | |
| 226 | #define FB_VMODE_INTERLACED 1 /* interlaced */ | |
| 227 | #define FB_VMODE_DOUBLE 2 /* double scan */ | |
| 228 | #define FB_VMODE_ODD_FLD_FIRST 4 /* interlaced: top line first */ | |
| 229 | #define FB_VMODE_MASK 255 | |
| 230 | ||
| 231 | #define FB_VMODE_YWRAP 256 /* ywrap instead of panning */ | |
| 232 | #define FB_VMODE_SMOOTH_XPAN 512 /* smooth xpan possible (internally used) */ | |
| 233 | #define FB_VMODE_CONUPDATE 512 /* don't update x/yoffset */ | |
| 234 | ||
| 235 | /* | |
| 236 | * Display rotation support | |
| 237 | */ | |
| 238 | #define FB_ROTATE_UR 0 | |
| 239 | #define FB_ROTATE_CW 1 | |
| 240 | #define FB_ROTATE_UD 2 | |
| 241 | #define FB_ROTATE_CCW 3 | |
| 242 | ||
| 243 | #define PICOS2KHZ(a) (1000000000UL/(a)) | |
| 244 | #define KHZ2PICOS(a) (1000000000UL/(a)) | |
| 245 | ||
| 246 | struct fb_var_screeninfo { | |
| 247 | __u32 xres; /* visible resolution */ | |
| 248 | __u32 yres; | |
| 249 | __u32 xres_virtual; /* virtual resolution */ | |
| 250 | __u32 yres_virtual; | |
| 251 | __u32 xoffset; /* offset from virtual to visible */ | |
| 252 | __u32 yoffset; /* resolution */ | |
| 253 | ||
| 254 | __u32 bits_per_pixel; /* guess what */ | |
| 255 | __u32 grayscale; /* 0 = color, 1 = grayscale, */ | |
| 256 | /* >1 = FOURCC */ | |
| 257 | struct fb_bitfield red; /* bitfield in fb mem if true color, */ | |
| 258 | struct fb_bitfield green; /* else only length is significant */ | |
| 259 | struct fb_bitfield blue; | |
| 260 | struct fb_bitfield transp; /* transparency */ | |
| 261 | ||
| 262 | __u32 nonstd; /* != 0 Non standard pixel format */ | |
| 263 | ||
| 264 | __u32 activate; /* see FB_ACTIVATE_* */ | |
| 265 | ||
| 266 | __u32 height; /* height of picture in mm */ | |
| 267 | __u32 width; /* width of picture in mm */ | |
| 268 | ||
| 269 | __u32 accel_flags; /* (OBSOLETE) see fb_info.flags */ | |
| 270 | ||
| 271 | /* Timing: All values in pixclocks, except pixclock (of course) */ | |
| 272 | __u32 pixclock; /* pixel clock in ps (pico seconds) */ | |
| 273 | __u32 left_margin; /* time from sync to picture */ | |
| 274 | __u32 right_margin; /* time from picture to sync */ | |
| 275 | __u32 upper_margin; /* time from sync to picture */ | |
| 276 | __u32 lower_margin; | |
| 277 | __u32 hsync_len; /* length of horizontal sync */ | |
| 278 | __u32 vsync_len; /* length of vertical sync */ | |
| 279 | __u32 sync; /* see FB_SYNC_* */ | |
| 280 | __u32 vmode; /* see FB_VMODE_* */ | |
| 281 | __u32 rotate; /* angle we rotate counter clockwise */ | |
| 282 | __u32 colorspace; /* colorspace for FOURCC-based modes */ | |
| 283 | __u32 reserved[4]; /* Reserved for future compatibility */ | |
| 284 | }; | |
| 285 | ||
| 286 | struct fb_cmap { | |
| 287 | __u32 start; /* First entry */ | |
| 288 | __u32 len; /* Number of entries */ | |
| 289 | __u16 *red; /* Red values */ | |
| 290 | __u16 *green; | |
| 291 | __u16 *blue; | |
| 292 | __u16 *transp; /* transparency, can be NULL */ | |
| 293 | }; | |
| 294 | ||
| 295 | struct fb_con2fbmap { | |
| 296 | __u32 console; | |
| 297 | __u32 framebuffer; | |
| 298 | }; | |
| 299 | ||
| 300 | /* VESA Blanking Levels */ | |
| 301 | #define VESA_NO_BLANKING 0 | |
| 302 | #define VESA_VSYNC_SUSPEND 1 | |
| 303 | #define VESA_HSYNC_SUSPEND 2 | |
| 304 | #define VESA_POWERDOWN 3 | |
| 305 | ||
| 306 | ||
| 307 | enum { | |
| 308 | /* screen: unblanked, hsync: on, vsync: on */ | |
| 309 | FB_BLANK_UNBLANK = VESA_NO_BLANKING, | |
| 310 | ||
| 311 | /* screen: blanked, hsync: on, vsync: on */ | |
| 312 | FB_BLANK_NORMAL = VESA_NO_BLANKING + 1, | |
| 313 | ||
| 314 | /* screen: blanked, hsync: on, vsync: off */ | |
| 315 | FB_BLANK_VSYNC_SUSPEND = VESA_VSYNC_SUSPEND + 1, | |
| 316 | ||
| 317 | /* screen: blanked, hsync: off, vsync: on */ | |
| 318 | FB_BLANK_HSYNC_SUSPEND = VESA_HSYNC_SUSPEND + 1, | |
| 319 | ||
| 320 | /* screen: blanked, hsync: off, vsync: off */ | |
| 321 | FB_BLANK_POWERDOWN = VESA_POWERDOWN + 1 | |
| 322 | }; | |
| 323 | ||
| 324 | #define FB_VBLANK_VBLANKING 0x001 /* currently in a vertical blank */ | |
| 325 | #define FB_VBLANK_HBLANKING 0x002 /* currently in a horizontal blank */ | |
| 326 | #define FB_VBLANK_HAVE_VBLANK 0x004 /* vertical blanks can be detected */ | |
| 327 | #define FB_VBLANK_HAVE_HBLANK 0x008 /* horizontal blanks can be detected */ | |
| 328 | #define FB_VBLANK_HAVE_COUNT 0x010 /* global retrace counter is available */ | |
| 329 | #define FB_VBLANK_HAVE_VCOUNT 0x020 /* the vcount field is valid */ | |
| 330 | #define FB_VBLANK_HAVE_HCOUNT 0x040 /* the hcount field is valid */ | |
| 331 | #define FB_VBLANK_VSYNCING 0x080 /* currently in a vsync */ | |
| 332 | #define FB_VBLANK_HAVE_VSYNC 0x100 /* verical syncs can be detected */ | |
| 333 | ||
| 334 | struct fb_vblank { | |
| 335 | __u32 flags; /* FB_VBLANK flags */ | |
| 336 | __u32 count; /* counter of retraces since boot */ | |
| 337 | __u32 vcount; /* current scanline position */ | |
| 338 | __u32 hcount; /* current scandot position */ | |
| 339 | __u32 reserved[4]; /* reserved for future compatibility */ | |
| 340 | }; | |
| 341 | ||
| 342 | /* Internal HW accel */ | |
| 343 | #define ROP_COPY 0 | |
| 344 | #define ROP_XOR 1 | |
| 345 | ||
| 346 | struct fb_copyarea { | |
| 347 | __u32 dx; | |
| 348 | __u32 dy; | |
| 349 | __u32 width; | |
| 350 | __u32 height; | |
| 351 | __u32 sx; | |
| 352 | __u32 sy; | |
| 353 | }; | |
| 354 | ||
| 15844522 SS |
355 | struct fb_dmacopy { |
| 356 | void *dst; | |
| 357 | __u32 src; | |
| 358 | __u32 length; | |
| 359 | }; | |
| 360 | ||
| 607ca46e DH |
361 | struct fb_fillrect { |
| 362 | __u32 dx; /* screen-relative */ | |
| 363 | __u32 dy; | |
| 364 | __u32 width; | |
| 365 | __u32 height; | |
| 366 | __u32 color; | |
| 367 | __u32 rop; | |
| 368 | }; | |
| 369 | ||
| 370 | struct fb_image { | |
| 371 | __u32 dx; /* Where to place image */ | |
| 372 | __u32 dy; | |
| 373 | __u32 width; /* Size of image */ | |
| 374 | __u32 height; | |
| 375 | __u32 fg_color; /* Only used when a mono bitmap */ | |
| 376 | __u32 bg_color; | |
| 377 | __u8 depth; /* Depth of the image */ | |
| 378 | const char *data; /* Pointer to image data */ | |
| 379 | struct fb_cmap cmap; /* color map info */ | |
| 380 | }; | |
| 381 | ||
| 382 | /* | |
| 383 | * hardware cursor control | |
| 384 | */ | |
| 385 | ||
| 386 | #define FB_CUR_SETIMAGE 0x01 | |
| 387 | #define FB_CUR_SETPOS 0x02 | |
| 388 | #define FB_CUR_SETHOT 0x04 | |
| 389 | #define FB_CUR_SETCMAP 0x08 | |
| 390 | #define FB_CUR_SETSHAPE 0x10 | |
| 391 | #define FB_CUR_SETSIZE 0x20 | |
| 392 | #define FB_CUR_SETALL 0xFF | |
| 393 | ||
| 394 | struct fbcurpos { | |
| 395 | __u16 x, y; | |
| 396 | }; | |
| 397 | ||
| 398 | struct fb_cursor { | |
| 399 | __u16 set; /* what to set */ | |
| 400 | __u16 enable; /* cursor on/off */ | |
| 401 | __u16 rop; /* bitop operation */ | |
| 402 | const char *mask; /* cursor mask bits */ | |
| 403 | struct fbcurpos hot; /* cursor hot spot */ | |
| 404 | struct fb_image image; /* Cursor image */ | |
| 405 | }; | |
| 406 | ||
| 407 | #ifdef CONFIG_FB_BACKLIGHT | |
| 408 | /* Settings for the generic backlight code */ | |
| 409 | #define FB_BACKLIGHT_LEVELS 128 | |
| 410 | #define FB_BACKLIGHT_MAX 0xFF | |
| 411 | #endif | |
| 412 | ||
| 413 | ||
| 414 | #endif /* _UAPI_LINUX_FB_H */ |