[mirror_ubuntu-zesty-kernel.git] / include / uapi / linux / ndctl.h

/*
 * Copyright (c) 2014-2015, Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU Lesser General Public License,
 * version 2.1, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT ANY
 * WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
 * FOR A PARTICULAR PURPOSE.  See the GNU Lesser General Public License for
 * more details.
 */
#ifndef __NDCTL_H__
#define __NDCTL_H__

#include <linux/types.h>

struct nd_cmd_smart {
	__u32 status;
	__u8 data[128];
} __packed;

struct nd_cmd_smart_threshold {
	__u32 status;
	__u8 data[8];
} __packed;

struct nd_cmd_dimm_flags {
	__u32 status;
	__u32 flags;
} __packed;

struct nd_cmd_get_config_size {
	__u32 status;
	__u32 config_size;
	__u32 max_xfer;
} __packed;

struct nd_cmd_get_config_data_hdr {
	__u32 in_offset;
	__u32 in_length;
	__u32 status;
	__u8 out_buf[0];
} __packed;

struct nd_cmd_set_config_hdr {
	__u32 in_offset;
	__u32 in_length;
	__u8 in_buf[0];
} __packed;

struct nd_cmd_vendor_hdr {
	__u32 opcode;
	__u32 in_length;
	__u8 in_buf[0];
} __packed;

struct nd_cmd_vendor_tail {
	__u32 status;
	__u32 out_length;
	__u8 out_buf[0];
} __packed;

struct nd_cmd_ars_cap {
	__u64 address;
	__u64 length;
	__u32 status;
	__u32 max_ars_out;
	__u32 clear_err_unit;
	__u32 reserved;
} __packed;

struct nd_cmd_ars_start {
	__u64 address;
	__u64 length;
	__u16 type;
	__u8 flags;
	__u8 reserved[5];
	__u32 status;
	__u32 scrub_time;
} __packed;

struct nd_cmd_ars_status {
	__u32 status;
	__u32 out_length;
	__u64 address;
	__u64 length;
	__u64 restart_address;
	__u64 restart_length;
	__u16 type;
	__u16 flags;
	__u32 num_records;
	struct nd_ars_record {
		__u32 handle;
		__u32 reserved;
		__u64 err_address;
		__u64 length;
	} __packed records[0];
} __packed;

enum {
	ND_CMD_IMPLEMENTED = 0,

	/* bus commands */
	ND_CMD_ARS_CAP = 1,
	ND_CMD_ARS_START = 2,
	ND_CMD_ARS_STATUS = 3,

	/* per-dimm commands */
	ND_CMD_SMART = 1,
	ND_CMD_SMART_THRESHOLD = 2,
	ND_CMD_DIMM_FLAGS = 3,
	ND_CMD_GET_CONFIG_SIZE = 4,
	ND_CMD_GET_CONFIG_DATA = 5,
	ND_CMD_SET_CONFIG_DATA = 6,
	ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7,
	ND_CMD_VENDOR_EFFECT_LOG = 8,
	ND_CMD_VENDOR = 9,
};

enum {
	ND_ARS_VOLATILE = 1,
	ND_ARS_PERSISTENT = 2,
};

static inline const char *nvdimm_bus_cmd_name(unsigned cmd)
{
	static const char * const names[] = {
		[ND_CMD_ARS_CAP] = "ars_cap",
		[ND_CMD_ARS_START] = "ars_start",
		[ND_CMD_ARS_STATUS] = "ars_status",
	};

	if (cmd < ARRAY_SIZE(names) && names[cmd])
		return names[cmd];
	return "unknown";
}

static inline const char *nvdimm_cmd_name(unsigned cmd)
{
	static const char * const names[] = {
		[ND_CMD_SMART] = "smart",
		[ND_CMD_SMART_THRESHOLD] = "smart_thresh",
		[ND_CMD_DIMM_FLAGS] = "flags",
		[ND_CMD_GET_CONFIG_SIZE] = "get_size",
		[ND_CMD_GET_CONFIG_DATA] = "get_data",
		[ND_CMD_SET_CONFIG_DATA] = "set_data",
		[ND_CMD_VENDOR_EFFECT_LOG_SIZE] = "effect_size",
		[ND_CMD_VENDOR_EFFECT_LOG] = "effect_log",
		[ND_CMD_VENDOR] = "vendor",
	};

	if (cmd < ARRAY_SIZE(names) && names[cmd])
		return names[cmd];
	return "unknown";
}

#define ND_IOCTL 'N'

#define ND_IOCTL_SMART			_IOWR(ND_IOCTL, ND_CMD_SMART,\
					struct nd_cmd_smart)

#define ND_IOCTL_SMART_THRESHOLD	_IOWR(ND_IOCTL, ND_CMD_SMART_THRESHOLD,\
					struct nd_cmd_smart_threshold)

#define ND_IOCTL_DIMM_FLAGS		_IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS,\
					struct nd_cmd_dimm_flags)

#define ND_IOCTL_GET_CONFIG_SIZE	_IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE,\
					struct nd_cmd_get_config_size)

#define ND_IOCTL_GET_CONFIG_DATA	_IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA,\
					struct nd_cmd_get_config_data_hdr)

#define ND_IOCTL_SET_CONFIG_DATA	_IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA,\
					struct nd_cmd_set_config_hdr)

#define ND_IOCTL_VENDOR			_IOWR(ND_IOCTL, ND_CMD_VENDOR,\
					struct nd_cmd_vendor_hdr)

#define ND_IOCTL_ARS_CAP		_IOWR(ND_IOCTL, ND_CMD_ARS_CAP,\
					struct nd_cmd_ars_cap)

#define ND_IOCTL_ARS_START		_IOWR(ND_IOCTL, ND_CMD_ARS_START,\
					struct nd_cmd_ars_start)

#define ND_IOCTL_ARS_STATUS		_IOWR(ND_IOCTL, ND_CMD_ARS_STATUS,\
					struct nd_cmd_ars_status)

#define ND_DEVICE_DIMM 1            /* nd_dimm: container for "config data" */
#define ND_DEVICE_REGION_PMEM 2     /* nd_region: (parent of PMEM namespaces) */
#define ND_DEVICE_REGION_BLK 3      /* nd_region: (parent of BLK namespaces) */
#define ND_DEVICE_NAMESPACE_IO 4    /* legacy persistent memory */
#define ND_DEVICE_NAMESPACE_PMEM 5  /* PMEM namespace (may alias with BLK) */
#define ND_DEVICE_NAMESPACE_BLK 6   /* BLK namespace (may alias with PMEM) */

enum nd_driver_flags {
	ND_DRIVER_DIMM            = 1 << ND_DEVICE_DIMM,
	ND_DRIVER_REGION_PMEM     = 1 << ND_DEVICE_REGION_PMEM,
	ND_DRIVER_REGION_BLK      = 1 << ND_DEVICE_REGION_BLK,
	ND_DRIVER_NAMESPACE_IO    = 1 << ND_DEVICE_NAMESPACE_IO,
	ND_DRIVER_NAMESPACE_PMEM  = 1 << ND_DEVICE_NAMESPACE_PMEM,
	ND_DRIVER_NAMESPACE_BLK   = 1 << ND_DEVICE_NAMESPACE_BLK,
};

enum {
	ND_MIN_NAMESPACE_SIZE = 0x00400000,
};

enum ars_masks {
	ARS_STATUS_MASK = 0x0000FFFF,
	ARS_EXT_STATUS_SHIFT = 16,
};
#endif /* __NDCTL_H__ */
Commit	Line	Data
62232e45 DW	1	/*
	2	* Copyright (c) 2014-2015, Intel Corporation.
	3	*
	4	* This program is free software; you can redistribute it and/or modify it
	5	* under the terms and conditions of the GNU Lesser General Public License,
	6	* version 2.1, as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope it will be useful, but WITHOUT ANY
	9	* WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
	10	* FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for
	11	* more details.
	12	*/
	13	#ifndef __NDCTL_H__
	14	#define __NDCTL_H__
	15
	16	#include <linux/types.h>
	17
	18	struct nd_cmd_smart {
	19	__u32 status;
	20	__u8 data[128];
	21	} __packed;
	22
	23	struct nd_cmd_smart_threshold {
	24	__u32 status;
	25	__u8 data[8];
	26	} __packed;
	27
	28	struct nd_cmd_dimm_flags {
	29	__u32 status;
	30	__u32 flags;
	31	} __packed;
	32
	33	struct nd_cmd_get_config_size {
	34	__u32 status;
	35	__u32 config_size;
	36	__u32 max_xfer;
	37	} __packed;
	38
	39	struct nd_cmd_get_config_data_hdr {
	40	__u32 in_offset;
	41	__u32 in_length;
	42	__u32 status;
	43	__u8 out_buf[0];
	44	} __packed;
	45
	46	struct nd_cmd_set_config_hdr {
	47	__u32 in_offset;
	48	__u32 in_length;
	49	__u8 in_buf[0];
	50	} __packed;
	51
	52	struct nd_cmd_vendor_hdr {
	53	__u32 opcode;
	54	__u32 in_length;
	55	__u8 in_buf[0];
	56	} __packed;
	57
	58	struct nd_cmd_vendor_tail {
	59	__u32 status;
	60	__u32 out_length;
	61	__u8 out_buf[0];
	62	} __packed;
	63
	64	struct nd_cmd_ars_cap {
65	__u64 address;
66	__u64 length;
67	__u32 status;
68	__u32 max_ars_out;
4577b066 DW	69	__u32 clear_err_unit;
4577b066 DW	70	__u32 reserved;
62232e45 DW	71	} __packed;
	72
	73	struct nd_cmd_ars_start {
	74	__u64 address;
	75	__u64 length;
	76	__u16 type;
4577b066 DW	77	__u8 flags;
4577b066 DW	78	__u8 reserved[5];
62232e45	79	__u32 status;
4577b066	80	__u32 scrub_time;
62232e45 DW	81	} __packed;
	82
	83	struct nd_cmd_ars_status {
	84	__u32 status;
	85	__u32 out_length;
	86	__u64 address;
	87	__u64 length;
4577b066 DW	88	__u64 restart_address;
4577b066 DW	89	__u64 restart_length;
62232e45	90	__u16 type;
4577b066	91	__u16 flags;
62232e45 DW	92	__u32 num_records;
	93	struct nd_ars_record {
	94	__u32 handle;
4577b066	95	__u32 reserved;
62232e45	96	__u64 err_address;
ec92777f	97	__u64 length;
62232e45 DW	98	} __packed records[0];
	99	} __packed;
	100
	101	enum {
	102	ND_CMD_IMPLEMENTED = 0,
	103
	104	/* bus commands */
	105	ND_CMD_ARS_CAP = 1,
	106	ND_CMD_ARS_START = 2,
	107	ND_CMD_ARS_STATUS = 3,
	108
	109	/* per-dimm commands */
	110	ND_CMD_SMART = 1,
	111	ND_CMD_SMART_THRESHOLD = 2,
	112	ND_CMD_DIMM_FLAGS = 3,
	113	ND_CMD_GET_CONFIG_SIZE = 4,
	114	ND_CMD_GET_CONFIG_DATA = 5,
	115	ND_CMD_SET_CONFIG_DATA = 6,
	116	ND_CMD_VENDOR_EFFECT_LOG_SIZE = 7,
	117	ND_CMD_VENDOR_EFFECT_LOG = 8,
	118	ND_CMD_VENDOR = 9,
	119	};
	120
39c686b8 VV	121	enum {
	122	ND_ARS_VOLATILE = 1,
	123	ND_ARS_PERSISTENT = 2,
	124	};
	125
62232e45 DW	126	static inline const char *nvdimm_bus_cmd_name(unsigned cmd)
	127	{
	128	static const char * const names[] = {
	129	[ND_CMD_ARS_CAP] = "ars_cap",
	130	[ND_CMD_ARS_START] = "ars_start",
	131	[ND_CMD_ARS_STATUS] = "ars_status",
	132	};
	133
	134	if (cmd < ARRAY_SIZE(names) && names[cmd])
	135	return names[cmd];
	136	return "unknown";
	137	}
	138
	139	static inline const char *nvdimm_cmd_name(unsigned cmd)
	140	{
	141	static const char * const names[] = {
	142	[ND_CMD_SMART] = "smart",
	143	[ND_CMD_SMART_THRESHOLD] = "smart_thresh",
	144	[ND_CMD_DIMM_FLAGS] = "flags",
	145	[ND_CMD_GET_CONFIG_SIZE] = "get_size",
	146	[ND_CMD_GET_CONFIG_DATA] = "get_data",
	147	[ND_CMD_SET_CONFIG_DATA] = "set_data",
	148	[ND_CMD_VENDOR_EFFECT_LOG_SIZE] = "effect_size",
	149	[ND_CMD_VENDOR_EFFECT_LOG] = "effect_log",
	150	[ND_CMD_VENDOR] = "vendor",
	151	};
	152
	153	if (cmd < ARRAY_SIZE(names) && names[cmd])
	154	return names[cmd];
	155	return "unknown";
	156	}
	157
	158	#define ND_IOCTL 'N'
	159
	160	#define ND_IOCTL_SMART _IOWR(ND_IOCTL, ND_CMD_SMART,\
	161	struct nd_cmd_smart)
	162
	163	#define ND_IOCTL_SMART_THRESHOLD _IOWR(ND_IOCTL, ND_CMD_SMART_THRESHOLD,\
	164	struct nd_cmd_smart_threshold)
	165
	166	#define ND_IOCTL_DIMM_FLAGS _IOWR(ND_IOCTL, ND_CMD_DIMM_FLAGS,\
	167	struct nd_cmd_dimm_flags)
	168
	169	#define ND_IOCTL_GET_CONFIG_SIZE _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_SIZE,\
	170	struct nd_cmd_get_config_size)
	171
	172	#define ND_IOCTL_GET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_GET_CONFIG_DATA,\
	173	struct nd_cmd_get_config_data_hdr)
	174
	175	#define ND_IOCTL_SET_CONFIG_DATA _IOWR(ND_IOCTL, ND_CMD_SET_CONFIG_DATA,\
	176	struct nd_cmd_set_config_hdr)
	177
	178	#define ND_IOCTL_VENDOR _IOWR(ND_IOCTL, ND_CMD_VENDOR,\
	179	struct nd_cmd_vendor_hdr)
	180
	181	#define ND_IOCTL_ARS_CAP _IOWR(ND_IOCTL, ND_CMD_ARS_CAP,\
	182	struct nd_cmd_ars_cap)
	183
	184	#define ND_IOCTL_ARS_START _IOWR(ND_IOCTL, ND_CMD_ARS_START,\
	185	struct nd_cmd_ars_start)
	186
	187	#define ND_IOCTL_ARS_STATUS _IOWR(ND_IOCTL, ND_CMD_ARS_STATUS,\
	188	struct nd_cmd_ars_status)
	189
4d88a97a	190	#define ND_DEVICE_DIMM 1 /* nd_dimm: container for "config data" */
3d88002e DW	191	#define ND_DEVICE_REGION_PMEM 2 /* nd_region: (parent of PMEM namespaces) */
	192	#define ND_DEVICE_REGION_BLK 3 /* nd_region: (parent of BLK namespaces) */
	193	#define ND_DEVICE_NAMESPACE_IO 4 /* legacy persistent memory */
	194	#define ND_DEVICE_NAMESPACE_PMEM 5 /* PMEM namespace (may alias with BLK) */
	195	#define ND_DEVICE_NAMESPACE_BLK 6 /* BLK namespace (may alias with PMEM) */
4d88a97a DW	196
	197	enum nd_driver_flags {
	198	ND_DRIVER_DIMM = 1 << ND_DEVICE_DIMM,
3d88002e DW	199	ND_DRIVER_REGION_PMEM = 1 << ND_DEVICE_REGION_PMEM,
	200	ND_DRIVER_REGION_BLK = 1 << ND_DEVICE_REGION_BLK,
	201	ND_DRIVER_NAMESPACE_IO = 1 << ND_DEVICE_NAMESPACE_IO,
	202	ND_DRIVER_NAMESPACE_PMEM = 1 << ND_DEVICE_NAMESPACE_PMEM,
	203	ND_DRIVER_NAMESPACE_BLK = 1 << ND_DEVICE_NAMESPACE_BLK,
4d88a97a	204	};
bf9bccc1 DW	205
	206	enum {
	207	ND_MIN_NAMESPACE_SIZE = 0x00400000,
	208	};
39c686b8 VV	209
	210	enum ars_masks {
	211	ARS_STATUS_MASK = 0x0000FFFF,
	212	ARS_EXT_STATUS_SHIFT = 16,
	213	};
62232e45	214	#endif /* __NDCTL_H__ */