[mirror_ubuntu-bionic-kernel.git] / include / uapi / linux / target_core_user.h

/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef __TARGET_CORE_USER_H
#define __TARGET_CORE_USER_H

/* This header will be used by application too */

#include <linux/types.h>
#include <linux/uio.h>

#define TCMU_VERSION "2.0"

/*
 * Ring Design
 * -----------
 *
 * The mmaped area is divided into three parts:
 * 1) The mailbox (struct tcmu_mailbox, below)
 * 2) The command ring
 * 3) Everything beyond the command ring (data)
 *
 * The mailbox tells userspace the offset of the command ring from the
 * start of the shared memory region, and how big the command ring is.
 *
 * The kernel passes SCSI commands to userspace by putting a struct
 * tcmu_cmd_entry in the ring, updating mailbox->cmd_head, and poking
 * userspace via uio's interrupt mechanism.
 *
 * tcmu_cmd_entry contains a header. If the header type is PAD,
 * userspace should skip hdr->length bytes (mod cmdr_size) to find the
 * next cmd_entry.
 *
 * Otherwise, the entry will contain offsets into the mmaped area that
 * contain the cdb and data buffers -- the latter accessible via the
 * iov array. iov addresses are also offsets into the shared area.
 *
 * When userspace is completed handling the command, set
 * entry->rsp.scsi_status, fill in rsp.sense_buffer if appropriate,
 * and also set mailbox->cmd_tail equal to the old cmd_tail plus
 * hdr->length, mod cmdr_size. If cmd_tail doesn't equal cmd_head, it
 * should process the next packet the same way, and so on.
 */

#define TCMU_MAILBOX_VERSION 2
#define ALIGN_SIZE 64 /* Should be enough for most CPUs */
#define TCMU_MAILBOX_FLAG_CAP_OOOC (1 << 0) /* Out-of-order completions */

struct tcmu_mailbox {
	__u16 version;
	__u16 flags;
	__u32 cmdr_off;
	__u32 cmdr_size;

	__u32 cmd_head;

	/* Updated by user. On its own cacheline */
	__u32 cmd_tail __attribute__((__aligned__(ALIGN_SIZE)));

} __packed;

enum tcmu_opcode {
	TCMU_OP_PAD = 0,
	TCMU_OP_CMD,
};

/*
 * Only a few opcodes, and length is 8-byte aligned, so use low bits for opcode.
 */
struct tcmu_cmd_entry_hdr {
	__u32 len_op;
	__u16 cmd_id;
	__u8 kflags;
#define TCMU_UFLAG_UNKNOWN_OP 0x1
	__u8 uflags;

} __packed;

#define TCMU_OP_MASK 0x7

static inline enum tcmu_opcode tcmu_hdr_get_op(__u32 len_op)
{
	return len_op & TCMU_OP_MASK;
}

static inline void tcmu_hdr_set_op(__u32 *len_op, enum tcmu_opcode op)
{
	*len_op &= ~TCMU_OP_MASK;
	*len_op |= (op & TCMU_OP_MASK);
}

static inline __u32 tcmu_hdr_get_len(__u32 len_op)
{
	return len_op & ~TCMU_OP_MASK;
}

static inline void tcmu_hdr_set_len(__u32 *len_op, __u32 len)
{
	*len_op &= TCMU_OP_MASK;
	*len_op |= len;
}

/* Currently the same as SCSI_SENSE_BUFFERSIZE */
#define TCMU_SENSE_BUFFERSIZE 96

struct tcmu_cmd_entry {
	struct tcmu_cmd_entry_hdr hdr;

	union {
		struct {
			__u32 iov_cnt;
			__u32 iov_bidi_cnt;
			__u32 iov_dif_cnt;
			__u64 cdb_off;
			__u64 __pad1;
			__u64 __pad2;
			struct iovec iov[0];
		} req;
		struct {
			__u8 scsi_status;
			__u8 __pad1;
			__u16 __pad2;
			__u32 __pad3;
			char sense_buffer[TCMU_SENSE_BUFFERSIZE];
		} rsp;
	};

} __packed;

#define TCMU_OP_ALIGN_SIZE sizeof(__u64)

enum tcmu_genl_cmd {
	TCMU_CMD_UNSPEC,
	TCMU_CMD_ADDED_DEVICE,
	TCMU_CMD_REMOVED_DEVICE,
	TCMU_CMD_RECONFIG_DEVICE,
	TCMU_CMD_ADDED_DEVICE_DONE,
	TCMU_CMD_REMOVED_DEVICE_DONE,
	TCMU_CMD_RECONFIG_DEVICE_DONE,
	TCMU_CMD_SET_FEATURES,
	__TCMU_CMD_MAX,
};
#define TCMU_CMD_MAX (__TCMU_CMD_MAX - 1)

enum tcmu_genl_attr {
	TCMU_ATTR_UNSPEC,
	TCMU_ATTR_DEVICE,
	TCMU_ATTR_MINOR,
	TCMU_ATTR_PAD,
	TCMU_ATTR_DEV_CFG,
	TCMU_ATTR_DEV_SIZE,
	TCMU_ATTR_WRITECACHE,
	TCMU_ATTR_CMD_STATUS,
	TCMU_ATTR_DEVICE_ID,
	TCMU_ATTR_SUPP_KERN_CMD_REPLY,
	__TCMU_ATTR_MAX,
};
#define TCMU_ATTR_MAX (__TCMU_ATTR_MAX - 1)

#endif
Commit	Line	Data
6f52b16c	1	/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
7c9e7a6f AG	2	#ifndef __TARGET_CORE_USER_H
	3	#define __TARGET_CORE_USER_H
	4
	5	/* This header will be used by application too */
	6
	7	#include <linux/types.h>
	8	#include <linux/uio.h>
	9
0ad46af8	10	#define TCMU_VERSION "2.0"
7c9e7a6f AG	11
	12	/*
	13	* Ring Design
	14	* -----------
	15	*
	16	* The mmaped area is divided into three parts:
	17	* 1) The mailbox (struct tcmu_mailbox, below)
	18	* 2) The command ring
	19	* 3) Everything beyond the command ring (data)
	20	*
	21	* The mailbox tells userspace the offset of the command ring from the
	22	* start of the shared memory region, and how big the command ring is.
	23	*
	24	* The kernel passes SCSI commands to userspace by putting a struct
	25	* tcmu_cmd_entry in the ring, updating mailbox->cmd_head, and poking
	26	* userspace via uio's interrupt mechanism.
	27	*
	28	* tcmu_cmd_entry contains a header. If the header type is PAD,
	29	* userspace should skip hdr->length bytes (mod cmdr_size) to find the
	30	* next cmd_entry.
	31	*
	32	* Otherwise, the entry will contain offsets into the mmaped area that
	33	* contain the cdb and data buffers -- the latter accessible via the
	34	* iov array. iov addresses are also offsets into the shared area.
	35	*
	36	* When userspace is completed handling the command, set
	37	* entry->rsp.scsi_status, fill in rsp.sense_buffer if appropriate,
	38	* and also set mailbox->cmd_tail equal to the old cmd_tail plus
	39	* hdr->length, mod cmdr_size. If cmd_tail doesn't equal cmd_head, it
	40	* should process the next packet the same way, and so on.
	41	*/
	42
0ad46af8	43	#define TCMU_MAILBOX_VERSION 2
7c9e7a6f	44	#define ALIGN_SIZE 64 /* Should be enough for most CPUs */
32c76de3	45	#define TCMU_MAILBOX_FLAG_CAP_OOOC (1 << 0) /* Out-of-order completions */
7c9e7a6f AG	46
	47	struct tcmu_mailbox {
	48	__u16 version;
	49	__u16 flags;
	50	__u32 cmdr_off;
	51	__u32 cmdr_size;
	52
	53	__u32 cmd_head;
	54
	55	/* Updated by user. On its own cacheline */
	56	__u32 cmd_tail __attribute__((__aligned__(ALIGN_SIZE)));
	57
	58	} __packed;
	59
	60	enum tcmu_opcode {
	61	TCMU_OP_PAD = 0,
	62	TCMU_OP_CMD,
	63	};
	64
	65	/*
	66	* Only a few opcodes, and length is 8-byte aligned, so use low bits for opcode.
	67	*/
	68	struct tcmu_cmd_entry_hdr {
0ad46af8 AG	69	__u32 len_op;
	70	__u16 cmd_id;
	71	__u8 kflags;
	72	#define TCMU_UFLAG_UNKNOWN_OP 0x1
	73	__u8 uflags;
	74
7c9e7a6f AG	75	} __packed;
	76
	77	#define TCMU_OP_MASK 0x7
	78
0ad46af8	79	static inline enum tcmu_opcode tcmu_hdr_get_op(__u32 len_op)
7c9e7a6f	80	{
0ad46af8	81	return len_op & TCMU_OP_MASK;
7c9e7a6f AG	82	}
7c9e7a6f AG	83
0ad46af8	84	static inline void tcmu_hdr_set_op(__u32 *len_op, enum tcmu_opcode op)
7c9e7a6f	85	{
0ad46af8 AG	86	*len_op &= ~TCMU_OP_MASK;
0ad46af8 AG	87	*len_op \|= (op & TCMU_OP_MASK);
7c9e7a6f AG	88	}
7c9e7a6f AG	89
0ad46af8	90	static inline __u32 tcmu_hdr_get_len(__u32 len_op)
7c9e7a6f	91	{
0ad46af8	92	return len_op & ~TCMU_OP_MASK;
7c9e7a6f AG	93	}
7c9e7a6f AG	94
0ad46af8	95	static inline void tcmu_hdr_set_len(__u32 *len_op, __u32 len)
7c9e7a6f	96	{
0ad46af8 AG	97	*len_op &= TCMU_OP_MASK;
0ad46af8 AG	98	*len_op \|= len;
7c9e7a6f AG	99	}
	100
	101	/* Currently the same as SCSI_SENSE_BUFFERSIZE */
	102	#define TCMU_SENSE_BUFFERSIZE 96
	103
	104	struct tcmu_cmd_entry {
	105	struct tcmu_cmd_entry_hdr hdr;
	106
7c9e7a6f AG	107	union {
7c9e7a6f AG	108	struct {
762b6f00 DL	109	__u32 iov_cnt;
	110	__u32 iov_bidi_cnt;
	111	__u32 iov_dif_cnt;
	112	__u64 cdb_off;
	113	__u64 __pad1;
	114	__u64 __pad2;
7c9e7a6f AG	115	struct iovec iov[0];
	116	} req;
	117	struct {
762b6f00 DL	118	__u8 scsi_status;
	119	__u8 __pad1;
	120	__u16 __pad2;
	121	__u32 __pad3;
7c9e7a6f AG	122	char sense_buffer[TCMU_SENSE_BUFFERSIZE];
	123	} rsp;
	124	};
	125
	126	} __packed;
	127
762b6f00	128	#define TCMU_OP_ALIGN_SIZE sizeof(__u64)
7c9e7a6f AG	129
	130	enum tcmu_genl_cmd {
	131	TCMU_CMD_UNSPEC,
	132	TCMU_CMD_ADDED_DEVICE,
	133	TCMU_CMD_REMOVED_DEVICE,
1068be7b	134	TCMU_CMD_RECONFIG_DEVICE,
b3af66e2 MC	135	TCMU_CMD_ADDED_DEVICE_DONE,
	136	TCMU_CMD_REMOVED_DEVICE_DONE,
	137	TCMU_CMD_RECONFIG_DEVICE_DONE,
	138	TCMU_CMD_SET_FEATURES,
7c9e7a6f AG	139	__TCMU_CMD_MAX,
	140	};
	141	#define TCMU_CMD_MAX (__TCMU_CMD_MAX - 1)
	142
	143	enum tcmu_genl_attr {
	144	TCMU_ATTR_UNSPEC,
	145	TCMU_ATTR_DEVICE,
	146	TCMU_ATTR_MINOR,
2d76443e MC	147	TCMU_ATTR_PAD,
	148	TCMU_ATTR_DEV_CFG,
	149	TCMU_ATTR_DEV_SIZE,
	150	TCMU_ATTR_WRITECACHE,
b3af66e2 MC	151	TCMU_ATTR_CMD_STATUS,
	152	TCMU_ATTR_DEVICE_ID,
	153	TCMU_ATTR_SUPP_KERN_CMD_REPLY,
7c9e7a6f AG	154	__TCMU_ATTR_MAX,
	155	};
	156	#define TCMU_ATTR_MAX (__TCMU_ATTR_MAX - 1)
	157
	158	#endif