[mirror_ubuntu-zesty-kernel.git] / include / video / atmel_lcdc.h

/*
 *  Header file for AT91/AT32 LCD Controller
 *
 *  Data structure and register user interface
 *
 *  Copyright (C) 2007 Atmel Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 */
#ifndef __ATMEL_LCDC_H__
#define __ATMEL_LCDC_H__

#include <linux/workqueue.h>

/* Way LCD wires are connected to the chip:
 * Some Atmel chips use BGR color mode (instead of standard RGB)
 * A swapped wiring onboard can bring to RGB mode.
 */
#define ATMEL_LCDC_WIRING_BGR	0
#define ATMEL_LCDC_WIRING_RGB	1


 /* LCD Controller info data structure, stored in device platform_data */
struct atmel_lcdfb_pdata {
	unsigned int		guard_time;
	bool			lcdcon_is_backlight;
	bool			lcdcon_pol_negative;
	u8			default_bpp;
	u8			lcd_wiring_mode;
	unsigned int		default_lcdcon2;
	unsigned int		default_dmacon;
	void (*atmel_lcdfb_power_control)(int on);
	struct fb_monspecs	*default_monspecs;
};

#define ATMEL_LCDC_DMABADDR1	0x00
#define ATMEL_LCDC_DMABADDR2	0x04
#define ATMEL_LCDC_DMAFRMPT1	0x08
#define ATMEL_LCDC_DMAFRMPT2	0x0c
#define ATMEL_LCDC_DMAFRMADD1	0x10
#define ATMEL_LCDC_DMAFRMADD2	0x14

#define ATMEL_LCDC_DMAFRMCFG	0x18
#define	ATMEL_LCDC_FRSIZE	(0x7fffff <<  0)
#define	ATMEL_LCDC_BLENGTH_OFFSET	24
#define	ATMEL_LCDC_BLENGTH	(0x7f     << ATMEL_LCDC_BLENGTH_OFFSET)

#define ATMEL_LCDC_DMACON	0x1c
#define	ATMEL_LCDC_DMAEN	(0x1 << 0)
#define	ATMEL_LCDC_DMARST	(0x1 << 1)
#define	ATMEL_LCDC_DMABUSY	(0x1 << 2)
#define		ATMEL_LCDC_DMAUPDT	(0x1 << 3)
#define		ATMEL_LCDC_DMA2DEN	(0x1 << 4)

#define ATMEL_LCDC_DMA2DCFG	0x20
#define		ATMEL_LCDC_ADDRINC_OFFSET	0
#define		ATMEL_LCDC_ADDRINC		(0xffff)
#define		ATMEL_LCDC_PIXELOFF_OFFSET	24
#define		ATMEL_LCDC_PIXELOFF		(0x1f << 24)

#define ATMEL_LCDC_LCDCON1	0x0800
#define	ATMEL_LCDC_BYPASS	(1     <<  0)
#define	ATMEL_LCDC_CLKVAL_OFFSET	12
#define	ATMEL_LCDC_CLKVAL	(0x1ff << ATMEL_LCDC_CLKVAL_OFFSET)
#define	ATMEL_LCDC_LINCNT	(0x7ff << 21)

#define ATMEL_LCDC_LCDCON2	0x0804
#define	ATMEL_LCDC_DISTYPE	(3 << 0)
#define		ATMEL_LCDC_DISTYPE_STNMONO	(0 << 0)
#define		ATMEL_LCDC_DISTYPE_STNCOLOR	(1 << 0)
#define		ATMEL_LCDC_DISTYPE_TFT		(2 << 0)
#define	ATMEL_LCDC_SCANMOD	(1 << 2)
#define		ATMEL_LCDC_SCANMOD_SINGLE	(0 << 2)
#define		ATMEL_LCDC_SCANMOD_DUAL		(1 << 2)
#define	ATMEL_LCDC_IFWIDTH	(3 << 3)
#define		ATMEL_LCDC_IFWIDTH_4		(0 << 3)
#define		ATMEL_LCDC_IFWIDTH_8		(1 << 3)
#define		ATMEL_LCDC_IFWIDTH_16		(2 << 3)
#define	ATMEL_LCDC_PIXELSIZE	(7 << 5)
#define		ATMEL_LCDC_PIXELSIZE_1		(0 << 5)
#define		ATMEL_LCDC_PIXELSIZE_2		(1 << 5)
#define		ATMEL_LCDC_PIXELSIZE_4		(2 << 5)
#define		ATMEL_LCDC_PIXELSIZE_8		(3 << 5)
#define		ATMEL_LCDC_PIXELSIZE_16		(4 << 5)
#define		ATMEL_LCDC_PIXELSIZE_24		(5 << 5)
#define		ATMEL_LCDC_PIXELSIZE_32		(6 << 5)
#define	ATMEL_LCDC_INVVD	(1 << 8)
#define		ATMEL_LCDC_INVVD_NORMAL		(0 << 8)
#define		ATMEL_LCDC_INVVD_INVERTED	(1 << 8)
#define	ATMEL_LCDC_INVFRAME	(1 << 9 )
#define		ATMEL_LCDC_INVFRAME_NORMAL	(0 << 9)
#define		ATMEL_LCDC_INVFRAME_INVERTED	(1 << 9)
#define	ATMEL_LCDC_INVLINE	(1 << 10)
#define		ATMEL_LCDC_INVLINE_NORMAL	(0 << 10)
#define		ATMEL_LCDC_INVLINE_INVERTED	(1 << 10)
#define	ATMEL_LCDC_INVCLK	(1 << 11)
#define		ATMEL_LCDC_INVCLK_NORMAL	(0 << 11)
#define		ATMEL_LCDC_INVCLK_INVERTED	(1 << 11)
#define	ATMEL_LCDC_INVDVAL	(1 << 12)
#define		ATMEL_LCDC_INVDVAL_NORMAL	(0 << 12)
#define		ATMEL_LCDC_INVDVAL_INVERTED	(1 << 12)
#define	ATMEL_LCDC_CLKMOD	(1 << 15)
#define		ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY	(0 << 15)
#define		ATMEL_LCDC_CLKMOD_ALWAYSACTIVE	(1 << 15)
#define	ATMEL_LCDC_MEMOR	(1 << 31)
#define		ATMEL_LCDC_MEMOR_BIG		(0 << 31)
#define		ATMEL_LCDC_MEMOR_LITTLE		(1 << 31)

#define ATMEL_LCDC_TIM1		0x0808
#define	ATMEL_LCDC_VFP		(0xffU <<  0)
#define	ATMEL_LCDC_VBP_OFFSET		8
#define	ATMEL_LCDC_VBP		(0xffU <<  ATMEL_LCDC_VBP_OFFSET)
#define	ATMEL_LCDC_VPW_OFFSET		16
#define	ATMEL_LCDC_VPW		(0x3fU << ATMEL_LCDC_VPW_OFFSET)
#define	ATMEL_LCDC_VHDLY_OFFSET		24
#define	ATMEL_LCDC_VHDLY	(0xfU  << ATMEL_LCDC_VHDLY_OFFSET)

#define ATMEL_LCDC_TIM2		0x080c
#define	ATMEL_LCDC_HBP		(0xffU  <<  0)
#define	ATMEL_LCDC_HPW_OFFSET		8
#define	ATMEL_LCDC_HPW		(0x3fU  <<  ATMEL_LCDC_HPW_OFFSET)
#define	ATMEL_LCDC_HFP_OFFSET		21
#define	ATMEL_LCDC_HFP		(0x7ffU << ATMEL_LCDC_HFP_OFFSET)

#define ATMEL_LCDC_LCDFRMCFG	0x0810
#define	ATMEL_LCDC_LINEVAL	(0x7ff <<  0)
#define	ATMEL_LCDC_HOZVAL_OFFSET	21
#define	ATMEL_LCDC_HOZVAL	(0x7ff << ATMEL_LCDC_HOZVAL_OFFSET)

#define ATMEL_LCDC_FIFO		0x0814
#define	ATMEL_LCDC_FIFOTH	(0xffff)

#define ATMEL_LCDC_MVAL		0x0818

#define ATMEL_LCDC_DP1_2	0x081c
#define ATMEL_LCDC_DP4_7	0x0820
#define ATMEL_LCDC_DP3_5	0x0824
#define ATMEL_LCDC_DP2_3	0x0828
#define ATMEL_LCDC_DP5_7	0x082c
#define ATMEL_LCDC_DP3_4	0x0830
#define ATMEL_LCDC_DP4_5	0x0834
#define ATMEL_LCDC_DP6_7	0x0838
#define	ATMEL_LCDC_DP1_2_VAL	(0xff)
#define	ATMEL_LCDC_DP4_7_VAL	(0xfffffff)
#define	ATMEL_LCDC_DP3_5_VAL	(0xfffff)
#define	ATMEL_LCDC_DP2_3_VAL	(0xfff)
#define	ATMEL_LCDC_DP5_7_VAL	(0xfffffff)
#define	ATMEL_LCDC_DP3_4_VAL	(0xffff)
#define	ATMEL_LCDC_DP4_5_VAL	(0xfffff)
#define	ATMEL_LCDC_DP6_7_VAL	(0xfffffff)

#define ATMEL_LCDC_PWRCON	0x083c
#define	ATMEL_LCDC_PWR		(1    <<  0)
#define	ATMEL_LCDC_GUARDT_OFFSET	1
#define	ATMEL_LCDC_GUARDT	(0x7f <<  ATMEL_LCDC_GUARDT_OFFSET)
#define	ATMEL_LCDC_BUSY		(1    << 31)

#define ATMEL_LCDC_CONTRAST_CTR	0x0840
#define	ATMEL_LCDC_PS		(3 << 0)
#define		ATMEL_LCDC_PS_DIV1		(0 << 0)
#define		ATMEL_LCDC_PS_DIV2		(1 << 0)
#define		ATMEL_LCDC_PS_DIV4		(2 << 0)
#define		ATMEL_LCDC_PS_DIV8		(3 << 0)
#define	ATMEL_LCDC_POL		(1 << 2)
#define		ATMEL_LCDC_POL_NEGATIVE		(0 << 2)
#define		ATMEL_LCDC_POL_POSITIVE		(1 << 2)
#define	ATMEL_LCDC_ENA		(1 << 3)
#define		ATMEL_LCDC_ENA_PWMDISABLE	(0 << 3)
#define		ATMEL_LCDC_ENA_PWMENABLE	(1 << 3)

#define ATMEL_LCDC_CONTRAST_VAL	0x0844
#define	ATMEL_LCDC_CVAL	(0xff)

#define ATMEL_LCDC_IER		0x0848
#define ATMEL_LCDC_IDR		0x084c
#define ATMEL_LCDC_IMR		0x0850
#define ATMEL_LCDC_ISR		0x0854
#define ATMEL_LCDC_ICR		0x0858
#define	ATMEL_LCDC_LNI		(1 << 0)
#define	ATMEL_LCDC_LSTLNI	(1 << 1)
#define	ATMEL_LCDC_EOFI		(1 << 2)
#define	ATMEL_LCDC_UFLWI	(1 << 4)
#define	ATMEL_LCDC_OWRI		(1 << 5)
#define	ATMEL_LCDC_MERI		(1 << 6)

#define ATMEL_LCDC_LUT(n)	(0x0c00 + ((n)*4))

#endif /* __ATMEL_LCDC_H__ */
Commit	Line	Data
14340586 NF	1	/*
	2	* Header file for AT91/AT32 LCD Controller
	3	*
	4	* Data structure and register user interface
	5	*
	6	* Copyright (C) 2007 Atmel Corporation
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	21	*/
	22	#ifndef __ATMEL_LCDC_H__
	23	#define __ATMEL_LCDC_H__
	24
44ccac13	25	#include <linux/workqueue.h>
fd085801 NF	26
	27	/* Way LCD wires are connected to the chip:
	28	* Some Atmel chips use BGR color mode (instead of standard RGB)
	29	* A swapped wiring onboard can bring to RGB mode.
	30	*/
	31	#define ATMEL_LCDC_WIRING_BGR 0
	32	#define ATMEL_LCDC_WIRING_RGB 1
	33
	34
a9a84c37	35	/* LCD Controller info data structure, stored in device platform_data */
8af2c286	36	struct atmel_lcdfb_pdata {
14340586	37	unsigned int guard_time;
a9a84c37	38	bool lcdcon_is_backlight;
7cdcdb69	39	bool lcdcon_pol_negative;
a9a84c37	40	u8 default_bpp;
fd085801	41	u8 lcd_wiring_mode;
14340586 NF	42	unsigned int default_lcdcon2;
	43	unsigned int default_dmacon;
	44	void (*atmel_lcdfb_power_control)(int on);
	45	struct fb_monspecs *default_monspecs;
14340586 NF	46	};
	47
	48	#define ATMEL_LCDC_DMABADDR1 0x00
	49	#define ATMEL_LCDC_DMABADDR2 0x04
	50	#define ATMEL_LCDC_DMAFRMPT1 0x08
	51	#define ATMEL_LCDC_DMAFRMPT2 0x0c
	52	#define ATMEL_LCDC_DMAFRMADD1 0x10
	53	#define ATMEL_LCDC_DMAFRMADD2 0x14
	54
	55	#define ATMEL_LCDC_DMAFRMCFG 0x18
	56	#define ATMEL_LCDC_FRSIZE (0x7fffff << 0)
	57	#define ATMEL_LCDC_BLENGTH_OFFSET 24
	58	#define ATMEL_LCDC_BLENGTH (0x7f << ATMEL_LCDC_BLENGTH_OFFSET)
	59
	60	#define ATMEL_LCDC_DMACON 0x1c
	61	#define ATMEL_LCDC_DMAEN (0x1 << 0)
	62	#define ATMEL_LCDC_DMARST (0x1 << 1)
	63	#define ATMEL_LCDC_DMABUSY (0x1 << 2)
	64	#define ATMEL_LCDC_DMAUPDT (0x1 << 3)
	65	#define ATMEL_LCDC_DMA2DEN (0x1 << 4)
	66
	67	#define ATMEL_LCDC_DMA2DCFG 0x20
	68	#define ATMEL_LCDC_ADDRINC_OFFSET 0
	69	#define ATMEL_LCDC_ADDRINC (0xffff)
	70	#define ATMEL_LCDC_PIXELOFF_OFFSET 24
	71	#define ATMEL_LCDC_PIXELOFF (0x1f << 24)
	72
	73	#define ATMEL_LCDC_LCDCON1 0x0800
	74	#define ATMEL_LCDC_BYPASS (1 << 0)
	75	#define ATMEL_LCDC_CLKVAL_OFFSET 12
	76	#define ATMEL_LCDC_CLKVAL (0x1ff << ATMEL_LCDC_CLKVAL_OFFSET)
	77	#define ATMEL_LCDC_LINCNT (0x7ff << 21)
	78
	79	#define ATMEL_LCDC_LCDCON2 0x0804
	80	#define ATMEL_LCDC_DISTYPE (3 << 0)
	81	#define ATMEL_LCDC_DISTYPE_STNMONO (0 << 0)
	82	#define ATMEL_LCDC_DISTYPE_STNCOLOR (1 << 0)
	83	#define ATMEL_LCDC_DISTYPE_TFT (2 << 0)
	84	#define ATMEL_LCDC_SCANMOD (1 << 2)
	85	#define ATMEL_LCDC_SCANMOD_SINGLE (0 << 2)
	86	#define ATMEL_LCDC_SCANMOD_DUAL (1 << 2)
	87	#define ATMEL_LCDC_IFWIDTH (3 << 3)
	88	#define ATMEL_LCDC_IFWIDTH_4 (0 << 3)
	89	#define ATMEL_LCDC_IFWIDTH_8 (1 << 3)
	90	#define ATMEL_LCDC_IFWIDTH_16 (2 << 3)
	91	#define ATMEL_LCDC_PIXELSIZE (7 << 5)
	92	#define ATMEL_LCDC_PIXELSIZE_1 (0 << 5)
	93	#define ATMEL_LCDC_PIXELSIZE_2 (1 << 5)
	94	#define ATMEL_LCDC_PIXELSIZE_4 (2 << 5)
	95	#define ATMEL_LCDC_PIXELSIZE_8 (3 << 5)
	96	#define ATMEL_LCDC_PIXELSIZE_16 (4 << 5)
	97	#define ATMEL_LCDC_PIXELSIZE_24 (5 << 5)
	98	#define ATMEL_LCDC_PIXELSIZE_32 (6 << 5)
	99	#define ATMEL_LCDC_INVVD (1 << 8)
	100	#define ATMEL_LCDC_INVVD_NORMAL (0 << 8)
	101	#define ATMEL_LCDC_INVVD_INVERTED (1 << 8)
	102	#define ATMEL_LCDC_INVFRAME (1 << 9 )
	103	#define ATMEL_LCDC_INVFRAME_NORMAL (0 << 9)
	104	#define ATMEL_LCDC_INVFRAME_INVERTED (1 << 9)
	105	#define ATMEL_LCDC_INVLINE (1 << 10)
	106	#define ATMEL_LCDC_INVLINE_NORMAL (0 << 10)
	107	#define ATMEL_LCDC_INVLINE_INVERTED (1 << 10)
	108	#define ATMEL_LCDC_INVCLK (1 << 11)
	109	#define ATMEL_LCDC_INVCLK_NORMAL (0 << 11)
110	#define ATMEL_LCDC_INVCLK_INVERTED (1 << 11)
111	#define ATMEL_LCDC_INVDVAL (1 << 12)
112	#define ATMEL_LCDC_INVDVAL_NORMAL (0 << 12)
113	#define ATMEL_LCDC_INVDVAL_INVERTED (1 << 12)
114	#define ATMEL_LCDC_CLKMOD (1 << 15)
115	#define ATMEL_LCDC_CLKMOD_ACTIVEDISPLAY (0 << 15)
116	#define ATMEL_LCDC_CLKMOD_ALWAYSACTIVE (1 << 15)
117	#define ATMEL_LCDC_MEMOR (1 << 31)
118	#define ATMEL_LCDC_MEMOR_BIG (0 << 31)
119	#define ATMEL_LCDC_MEMOR_LITTLE (1 << 31)
120
121	#define ATMEL_LCDC_TIM1 0x0808
162b3a08	122	#define ATMEL_LCDC_VFP (0xffU << 0)
14340586	123	#define ATMEL_LCDC_VBP_OFFSET 8
162b3a08	124	#define ATMEL_LCDC_VBP (0xffU << ATMEL_LCDC_VBP_OFFSET)
14340586	125	#define ATMEL_LCDC_VPW_OFFSET 16
162b3a08	126	#define ATMEL_LCDC_VPW (0x3fU << ATMEL_LCDC_VPW_OFFSET)
14340586	127	#define ATMEL_LCDC_VHDLY_OFFSET 24
162b3a08	128	#define ATMEL_LCDC_VHDLY (0xfU << ATMEL_LCDC_VHDLY_OFFSET)
14340586 NF	129
14340586 NF	130	#define ATMEL_LCDC_TIM2 0x080c
162b3a08	131	#define ATMEL_LCDC_HBP (0xffU << 0)
14340586	132	#define ATMEL_LCDC_HPW_OFFSET 8
162b3a08	133	#define ATMEL_LCDC_HPW (0x3fU << ATMEL_LCDC_HPW_OFFSET)
14340586	134	#define ATMEL_LCDC_HFP_OFFSET 21
162b3a08	135	#define ATMEL_LCDC_HFP (0x7ffU << ATMEL_LCDC_HFP_OFFSET)
14340586 NF	136
	137	#define ATMEL_LCDC_LCDFRMCFG 0x0810
	138	#define ATMEL_LCDC_LINEVAL (0x7ff << 0)
	139	#define ATMEL_LCDC_HOZVAL_OFFSET 21
	140	#define ATMEL_LCDC_HOZVAL (0x7ff << ATMEL_LCDC_HOZVAL_OFFSET)
	141
	142	#define ATMEL_LCDC_FIFO 0x0814
	143	#define ATMEL_LCDC_FIFOTH (0xffff)
	144
	145	#define ATMEL_LCDC_MVAL 0x0818
	146
	147	#define ATMEL_LCDC_DP1_2 0x081c
	148	#define ATMEL_LCDC_DP4_7 0x0820
	149	#define ATMEL_LCDC_DP3_5 0x0824
	150	#define ATMEL_LCDC_DP2_3 0x0828
	151	#define ATMEL_LCDC_DP5_7 0x082c
	152	#define ATMEL_LCDC_DP3_4 0x0830
	153	#define ATMEL_LCDC_DP4_5 0x0834
	154	#define ATMEL_LCDC_DP6_7 0x0838
	155	#define ATMEL_LCDC_DP1_2_VAL (0xff)
	156	#define ATMEL_LCDC_DP4_7_VAL (0xfffffff)
	157	#define ATMEL_LCDC_DP3_5_VAL (0xfffff)
	158	#define ATMEL_LCDC_DP2_3_VAL (0xfff)
	159	#define ATMEL_LCDC_DP5_7_VAL (0xfffffff)
	160	#define ATMEL_LCDC_DP3_4_VAL (0xffff)
	161	#define ATMEL_LCDC_DP4_5_VAL (0xfffff)
	162	#define ATMEL_LCDC_DP6_7_VAL (0xfffffff)
	163
	164	#define ATMEL_LCDC_PWRCON 0x083c
	165	#define ATMEL_LCDC_PWR (1 << 0)
	166	#define ATMEL_LCDC_GUARDT_OFFSET 1
	167	#define ATMEL_LCDC_GUARDT (0x7f << ATMEL_LCDC_GUARDT_OFFSET)
	168	#define ATMEL_LCDC_BUSY (1 << 31)
	169
	170	#define ATMEL_LCDC_CONTRAST_CTR 0x0840
	171	#define ATMEL_LCDC_PS (3 << 0)
	172	#define ATMEL_LCDC_PS_DIV1 (0 << 0)
	173	#define ATMEL_LCDC_PS_DIV2 (1 << 0)
	174	#define ATMEL_LCDC_PS_DIV4 (2 << 0)
	175	#define ATMEL_LCDC_PS_DIV8 (3 << 0)
	176	#define ATMEL_LCDC_POL (1 << 2)
	177	#define ATMEL_LCDC_POL_NEGATIVE (0 << 2)
	178	#define ATMEL_LCDC_POL_POSITIVE (1 << 2)
	179	#define ATMEL_LCDC_ENA (1 << 3)
	180	#define ATMEL_LCDC_ENA_PWMDISABLE (0 << 3)
	181	#define ATMEL_LCDC_ENA_PWMENABLE (1 << 3)
	182
	183	#define ATMEL_LCDC_CONTRAST_VAL 0x0844
	184	#define ATMEL_LCDC_CVAL (0xff)
	185
	186	#define ATMEL_LCDC_IER 0x0848
	187	#define ATMEL_LCDC_IDR 0x084c
	188	#define ATMEL_LCDC_IMR 0x0850
	189	#define ATMEL_LCDC_ISR 0x0854
	190	#define ATMEL_LCDC_ICR 0x0858
	191	#define ATMEL_LCDC_LNI (1 << 0)
	192	#define ATMEL_LCDC_LSTLNI (1 << 1)
	193	#define ATMEL_LCDC_EOFI (1 << 2)
	194	#define ATMEL_LCDC_UFLWI (1 << 4)
	195	#define ATMEL_LCDC_OWRI (1 << 5)
	196	#define ATMEL_LCDC_MERI (1 << 6)
	197
	198	#define ATMEL_LCDC_LUT(n) (0x0c00 + ((n)*4))
	199
200	#endif /* __ATMEL_LCDC_H__ */