projects / mirror_ubuntu-bionic-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 1da177e4 LT |
1 | /* |
| 2 | * Permedia2 framebuffer driver definitions. | |
| 3 | * Copyright (c) 1998-2000 Ilario Nardinocchi (nardinoc@CS.UniBO.IT) | |
| 4 | * -------------------------------------------------------------------------- | |
| 5 | * $Id: pm2fb.h,v 1.26 2000/09/19 00:11:53 illo Exp $ | |
| 6 | * -------------------------------------------------------------------------- | |
| 7 | * This file is subject to the terms and conditions of the GNU General Public | |
| 8 | * License. See the file COPYING in the main directory of this archive | |
| 9 | * for more details. | |
| 10 | */ | |
| 11 | ||
| 12 | #ifndef PM2FB_H | |
| 13 | #define PM2FB_H | |
| 14 | ||
| 15 | #define PM2_REFERENCE_CLOCK 14318 /* in KHz */ | |
| 16 | #define PM2_MAX_PIXCLOCK 230000 /* in KHz */ | |
| 17 | #define PM2_REGS_SIZE 0x10000 | |
| 18 | ||
| 19 | #define PM2TAG(r) (u32 )(((r)-0x8000)>>3) | |
| 20 | ||
| 21 | /***************************************************************************** | |
| 22 | * Permedia2 registers used in the framebuffer | |
| 23 | *****************************************************************************/ | |
| 24 | ||
| 25 | #define PM2R_RESET_STATUS 0x0000 | |
| 26 | #define PM2R_IN_FIFO_SPACE 0x0018 | |
| 27 | #define PM2R_OUT_FIFO_WORDS 0x0020 | |
| 28 | #define PM2R_APERTURE_ONE 0x0050 | |
| 29 | #define PM2R_APERTURE_TWO 0x0058 | |
| 30 | #define PM2R_FIFO_DISCON 0x0068 | |
| 31 | #define PM2R_CHIP_CONFIG 0x0070 | |
| 32 | ||
| 33 | #define PM2R_REBOOT 0x1000 | |
| 34 | #define PM2R_MEM_CONTROL 0x1040 | |
| 35 | #define PM2R_BOOT_ADDRESS 0x1080 | |
| 36 | #define PM2R_MEM_CONFIG 0x10c0 | |
| 37 | #define PM2R_BYPASS_WRITE_MASK 0x1100 | |
| 38 | #define PM2R_FRAMEBUFFER_WRITE_MASK 0x1140 | |
| 39 | ||
| 40 | #define PM2R_OUT_FIFO 0x2000 | |
| 41 | ||
| 42 | #define PM2R_SCREEN_BASE 0x3000 | |
| 43 | #define PM2R_SCREEN_STRIDE 0x3008 | |
| 44 | #define PM2R_H_TOTAL 0x3010 | |
| 45 | #define PM2R_HG_END 0x3018 | |
| 46 | #define PM2R_HB_END 0x3020 | |
| 47 | #define PM2R_HS_START 0x3028 | |
| 48 | #define PM2R_HS_END 0x3030 | |
| 49 | #define PM2R_V_TOTAL 0x3038 | |
| 50 | #define PM2R_VB_END 0x3040 | |
| 51 | #define PM2R_VS_START 0x3048 | |
| 52 | #define PM2R_VS_END 0x3050 | |
| 53 | #define PM2R_VIDEO_CONTROL 0x3058 | |
| 54 | #define PM2R_LINE_COUNT 0x3070 | |
| 55 | #define PM2R_FIFO_CONTROL 0x3078 | |
| 56 | ||
| 57 | #define PM2R_RD_PALETTE_WRITE_ADDRESS 0x4000 | |
| 58 | #define PM2R_RD_PALETTE_DATA 0x4008 | |
| 59 | #define PM2R_RD_PIXEL_MASK 0x4010 | |
| 60 | #define PM2R_RD_PALETTE_READ_ADDRESS 0x4018 | |
| 61 | #define PM2R_RD_INDEXED_DATA 0x4050 | |
| 62 | ||
| 63 | #define PM2R_START_X_DOM 0x8000 | |
| 64 | #define PM2R_D_X_DOM 0x8008 | |
| 65 | #define PM2R_START_X_SUB 0x8010 | |
| 66 | #define PM2R_D_X_SUB 0x8018 | |
| 67 | #define PM2R_START_Y 0x8020 | |
| 68 | #define PM2R_D_Y 0x8028 | |
| 69 | #define PM2R_COUNT 0x8030 | |
| 70 | #define PM2R_RENDER 0x8038 | |
| 91b3a6f4 | 71 | #define PM2R_BIT_MASK_PATTERN 0x8068 |
| 1da177e4 LT |
72 | #define PM2R_RASTERIZER_MODE 0x80a0 |
| 73 | #define PM2R_RECTANGLE_ORIGIN 0x80d0 | |
| 74 | #define PM2R_RECTANGLE_SIZE 0x80d8 | |
| 75 | #define PM2R_PACKED_DATA_LIMITS 0x8150 | |
| 76 | #define PM2R_SCISSOR_MODE 0x8180 | |
| 91b3a6f4 KH |
77 | #define PM2R_SCISSOR_MIN_XY 0x8188 |
| 78 | #define PM2R_SCISSOR_MAX_XY 0x8190 | |
| 1da177e4 LT |
79 | #define PM2R_SCREEN_SIZE 0x8198 |
| 80 | #define PM2R_AREA_STIPPLE_MODE 0x81a0 | |
| 81 | #define PM2R_WINDOW_ORIGIN 0x81c8 | |
| 82 | #define PM2R_TEXTURE_ADDRESS_MODE 0x8380 | |
| 83 | #define PM2R_TEXTURE_MAP_FORMAT 0x8588 | |
| 84 | #define PM2R_TEXTURE_DATA_FORMAT 0x8590 | |
| 85 | #define PM2R_TEXTURE_READ_MODE 0x8670 | |
| 86 | #define PM2R_TEXEL_LUT_MODE 0x8678 | |
| 87 | #define PM2R_TEXTURE_COLOR_MODE 0x8680 | |
| 88 | #define PM2R_FOG_MODE 0x8690 | |
| 91b3a6f4 | 89 | #define PM2R_TEXEL0 0x8760 |
| 1da177e4 | 90 | #define PM2R_COLOR_DDA_MODE 0x87e0 |
| 91b3a6f4 | 91 | #define PM2R_CONSTANT_COLOR 0x87e8 |
| 1da177e4 LT |
92 | #define PM2R_ALPHA_BLEND_MODE 0x8810 |
| 93 | #define PM2R_DITHER_MODE 0x8818 | |
| 94 | #define PM2R_FB_SOFT_WRITE_MASK 0x8820 | |
| 95 | #define PM2R_LOGICAL_OP_MODE 0x8828 | |
| 96 | #define PM2R_LB_READ_MODE 0x8880 | |
| 97 | #define PM2R_LB_READ_FORMAT 0x8888 | |
| 98 | #define PM2R_LB_SOURCE_OFFSET 0x8890 | |
| 99 | #define PM2R_LB_WINDOW_BASE 0x88b8 | |
| 100 | #define PM2R_LB_WRITE_FORMAT 0x88c8 | |
| 101 | #define PM2R_STENCIL_MODE 0x8988 | |
| 102 | #define PM2R_DEPTH_MODE 0x89a0 | |
| 103 | #define PM2R_FB_READ_MODE 0x8a80 | |
| 104 | #define PM2R_FB_SOURCE_OFFSET 0x8a88 | |
| 105 | #define PM2R_FB_PIXEL_OFFSET 0x8a90 | |
| 106 | #define PM2R_FB_WINDOW_BASE 0x8ab0 | |
| 107 | #define PM2R_FB_WRITE_MODE 0x8ab8 | |
| 108 | #define PM2R_FB_HARD_WRITE_MASK 0x8ac0 | |
| 109 | #define PM2R_FB_BLOCK_COLOR 0x8ac8 | |
| 110 | #define PM2R_FB_READ_PIXEL 0x8ad0 | |
| 111 | #define PM2R_FILTER_MODE 0x8c00 | |
| 112 | #define PM2R_SYNC 0x8c40 | |
| 113 | #define PM2R_YUV_MODE 0x8f00 | |
| 114 | #define PM2R_STATISTICS_MODE 0x8c08 | |
| 115 | #define PM2R_FB_SOURCE_DELTA 0x8d88 | |
| 116 | #define PM2R_CONFIG 0x8d90 | |
| 117 | #define PM2R_DELTA_MODE 0x9300 | |
| 118 | ||
| 119 | /* Permedia2v */ | |
| 120 | #define PM2VR_RD_INDEX_LOW 0x4020 | |
| 121 | #define PM2VR_RD_INDEX_HIGH 0x4028 | |
| 122 | #define PM2VR_RD_INDEXED_DATA 0x4030 | |
| 123 | ||
| 124 | /* Permedia2 RAMDAC indexed registers */ | |
| 125 | #define PM2I_RD_CURSOR_CONTROL 0x06 | |
| 126 | #define PM2I_RD_COLOR_MODE 0x18 | |
| 127 | #define PM2I_RD_MODE_CONTROL 0x19 | |
| 128 | #define PM2I_RD_MISC_CONTROL 0x1e | |
| 129 | #define PM2I_RD_PIXEL_CLOCK_A1 0x20 | |
| 130 | #define PM2I_RD_PIXEL_CLOCK_A2 0x21 | |
| 131 | #define PM2I_RD_PIXEL_CLOCK_A3 0x22 | |
| 132 | #define PM2I_RD_PIXEL_CLOCK_STATUS 0x29 | |
| 133 | #define PM2I_RD_MEMORY_CLOCK_1 0x30 | |
| 134 | #define PM2I_RD_MEMORY_CLOCK_2 0x31 | |
| 135 | #define PM2I_RD_MEMORY_CLOCK_3 0x32 | |
| 136 | #define PM2I_RD_MEMORY_CLOCK_STATUS 0x33 | |
| 137 | #define PM2I_RD_COLOR_KEY_CONTROL 0x40 | |
| 138 | #define PM2I_RD_OVERLAY_KEY 0x41 | |
| 139 | #define PM2I_RD_RED_KEY 0x42 | |
| 140 | #define PM2I_RD_GREEN_KEY 0x43 | |
| 141 | #define PM2I_RD_BLUE_KEY 0x44 | |
| 142 | ||
| 143 | /* Permedia2v extensions */ | |
| 144 | #define PM2VI_RD_MISC_CONTROL 0x000 | |
| 145 | #define PM2VI_RD_SYNC_CONTROL 0x001 | |
| 146 | #define PM2VI_RD_DAC_CONTROL 0x002 | |
| 147 | #define PM2VI_RD_PIXEL_SIZE 0x003 | |
| 148 | #define PM2VI_RD_COLOR_FORMAT 0x004 | |
| 149 | #define PM2VI_RD_CURSOR_MODE 0x005 | |
| 150 | #define PM2VI_RD_CURSOR_X_LOW 0x007 | |
| 151 | #define PM2VI_RD_CURSOR_X_HIGH 0x008 | |
| 152 | #define PM2VI_RD_CURSOR_Y_LOW 0x009 | |
| 153 | #define PM2VI_RD_CURSOR_Y_HIGH 0x00A | |
| 154 | #define PM2VI_RD_CURSOR_X_HOT 0x00B | |
| 155 | #define PM2VI_RD_CURSOR_Y_HOT 0x00C | |
| 138a451c | 156 | #define PM2VI_RD_OVERLAY_KEY 0x00D |
| 1da177e4 LT |
157 | #define PM2VI_RD_CLK0_PRESCALE 0x201 |
| 158 | #define PM2VI_RD_CLK0_FEEDBACK 0x202 | |
| 159 | #define PM2VI_RD_CLK0_POSTSCALE 0x203 | |
| 160 | #define PM2VI_RD_CLK1_PRESCALE 0x204 | |
| 161 | #define PM2VI_RD_CLK1_FEEDBACK 0x205 | |
| 162 | #define PM2VI_RD_CLK1_POSTSCALE 0x206 | |
| e5d809d7 KH |
163 | #define PM2VI_RD_MCLK_CONTROL 0x20D |
| 164 | #define PM2VI_RD_MCLK_PRESCALE 0x20E | |
| 165 | #define PM2VI_RD_MCLK_FEEDBACK 0x20F | |
| 166 | #define PM2VI_RD_MCLK_POSTSCALE 0x210 | |
| 1da177e4 LT |
167 | #define PM2VI_RD_CURSOR_PALETTE 0x303 |
| 168 | #define PM2VI_RD_CURSOR_PATTERN 0x400 | |
| 169 | ||
| 170 | /* Fields and flags */ | |
| 171 | #define PM2F_RENDER_AREASTIPPLE (1L<<0) | |
| 172 | #define PM2F_RENDER_FASTFILL (1L<<3) | |
| 173 | #define PM2F_RENDER_PRIMITIVE_MASK (3L<<6) | |
| 174 | #define PM2F_RENDER_LINE 0 | |
| 175 | #define PM2F_RENDER_TRAPEZOID (1L<<6) | |
| 176 | #define PM2F_RENDER_POINT (2L<<6) | |
| 177 | #define PM2F_RENDER_RECTANGLE (3L<<6) | |
| 91b3a6f4 KH |
178 | #define PM2F_RENDER_SYNC_ON_BIT_MASK (1L<<11) |
| 179 | #define PM2F_RENDER_TEXTURE_ENABLE (1L<<13) | |
| 1da177e4 LT |
180 | #define PM2F_SYNCHRONIZATION (1L<<10) |
| 181 | #define PM2F_PLL_LOCKED 0x10 | |
| 182 | #define PM2F_BEING_RESET (1L<<31) | |
| 183 | #define PM2F_DATATYPE_COLOR 0x8000 | |
| 184 | #define PM2F_VGA_ENABLE 0x02 | |
| 185 | #define PM2F_VGA_FIXED 0x04 | |
| 186 | #define PM2F_FB_WRITE_ENABLE 0x01 | |
| 187 | #define PM2F_FB_READ_SOURCE_ENABLE 0x0200 | |
| 188 | #define PM2F_RD_PALETTE_WIDTH_8 0x02 | |
| 189 | #define PM2F_PART_PROD_MASK 0x01ff | |
| 190 | #define PM2F_SCREEN_SCISSOR_ENABLE 0x02 | |
| 191 | #define PM2F_DATA_64_ENABLE 0x00010000 | |
| 192 | #define PM2F_BLANK_LOW 0x02 | |
| 193 | #define PM2F_HSYNC_MASK 0x18 | |
| 194 | #define PM2F_VSYNC_MASK 0x60 | |
| 195 | #define PM2F_HSYNC_ACT_HIGH 0x08 | |
| 196 | #define PM2F_HSYNC_FORCED_LOW 0x10 | |
| 197 | #define PM2F_HSYNC_ACT_LOW 0x18 | |
| 198 | #define PM2F_VSYNC_ACT_HIGH 0x20 | |
| 199 | #define PM2F_VSYNC_FORCED_LOW 0x40 | |
| 200 | #define PM2F_VSYNC_ACT_LOW 0x60 | |
| 201 | #define PM2F_LINE_DOUBLE 0x04 | |
| 202 | #define PM2F_VIDEO_ENABLE 0x01 | |
| 203 | #define PM2F_RD_PIXELFORMAT_SVGA 0x01 | |
| 204 | #define PM2F_RD_PIXELFORMAT_RGB232OFFSET 0x02 | |
| 205 | #define PM2F_RD_PIXELFORMAT_RGBA2321 0x03 | |
| 206 | #define PM2F_RD_PIXELFORMAT_RGBA5551 0x04 | |
| 207 | #define PM2F_RD_PIXELFORMAT_RGBA4444 0x05 | |
| 208 | #define PM2F_RD_PIXELFORMAT_RGB565 0x06 | |
| 209 | #define PM2F_RD_PIXELFORMAT_RGBA8888 0x08 | |
| 210 | #define PM2F_RD_PIXELFORMAT_RGB888 0x09 | |
| 211 | #define PM2F_RD_GUI_ACTIVE 0x10 | |
| 212 | #define PM2F_RD_COLOR_MODE_RGB 0x20 | |
| 213 | #define PM2F_DELTA_ORDER_RGB (1L<<18) | |
| 214 | #define PM2F_RD_TRUECOLOR 0x80 | |
| 215 | #define PM2F_NO_ALPHA_BUFFER 0x10 | |
| 216 | #define PM2F_TEXTEL_SIZE_16 0x00080000 | |
| 217 | #define PM2F_TEXTEL_SIZE_32 0x00100000 | |
| 218 | #define PM2F_TEXTEL_SIZE_4 0x00180000 | |
| 219 | #define PM2F_TEXTEL_SIZE_24 0x00200000 | |
| 220 | #define PM2F_INCREASE_X (1L<<21) | |
| 221 | #define PM2F_INCREASE_Y (1L<<22) | |
| 222 | #define PM2F_CONFIG_FB_WRITE_ENABLE (1L<<3) | |
| 223 | #define PM2F_CONFIG_FB_PACKED_DATA (1L<<2) | |
| 224 | #define PM2F_CONFIG_FB_READ_DEST_ENABLE (1L<<1) | |
| 225 | #define PM2F_CONFIG_FB_READ_SOURCE_ENABLE (1L<<0) | |
| 226 | #define PM2F_COLOR_KEY_TEST_OFF (1L<<4) | |
| 227 | #define PM2F_MEM_CONFIG_RAM_MASK (3L<<29) | |
| 228 | #define PM2F_MEM_BANKS_1 0L | |
| 229 | #define PM2F_MEM_BANKS_2 (1L<<29) | |
| 230 | #define PM2F_MEM_BANKS_3 (2L<<29) | |
| 231 | #define PM2F_MEM_BANKS_4 (3L<<29) | |
| 232 | #define PM2F_APERTURE_STANDARD 0 | |
| 233 | #define PM2F_APERTURE_BYTESWAP 1 | |
| 234 | #define PM2F_APERTURE_HALFWORDSWAP 2 | |
| 8f5d050a KH |
235 | #define PM2F_CURSORMODE_CURSOR_ENABLE (1 << 0) |
| 236 | #define PM2F_CURSORMODE_TYPE_X (1 << 4) | |
| 1da177e4 LT |
237 | |
| 238 | typedef enum { | |
| 239 | PM2_TYPE_PERMEDIA2, | |
| 240 | PM2_TYPE_PERMEDIA2V | |
| 241 | } pm2type_t; | |
| 242 | ||
| 243 | #endif /* PM2FB_H */ | |
| 244 | ||
| 245 | /***************************************************************************** | |
| 246 | * That's all folks! | |
| 247 | *****************************************************************************/ |