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a42089dd JF |
1 | /****************************************************************************** |
2 | * xen.h | |
3 | * | |
4 | * Guest OS interface to Xen. | |
5 | * | |
6 | * Copyright (c) 2004, K A Fraser | |
7 | */ | |
8 | ||
9 | #ifndef __XEN_PUBLIC_XEN_H__ | |
10 | #define __XEN_PUBLIC_XEN_H__ | |
11 | ||
12 | #include <asm/xen/interface.h> | |
1c7b67f7 | 13 | #include <asm/pvclock-abi.h> |
a42089dd JF |
14 | |
15 | /* | |
16 | * XEN "SYSTEM CALLS" (a.k.a. HYPERCALLS). | |
17 | */ | |
18 | ||
19 | /* | |
20 | * x86_32: EAX = vector; EBX, ECX, EDX, ESI, EDI = args 1, 2, 3, 4, 5. | |
21 | * EAX = return value | |
22 | * (argument registers may be clobbered on return) | |
23 | * x86_64: RAX = vector; RDI, RSI, RDX, R10, R8, R9 = args 1, 2, 3, 4, 5, 6. | |
24 | * RAX = return value | |
25 | * (argument registers not clobbered on return; RCX, R11 are) | |
26 | */ | |
27 | #define __HYPERVISOR_set_trap_table 0 | |
28 | #define __HYPERVISOR_mmu_update 1 | |
29 | #define __HYPERVISOR_set_gdt 2 | |
30 | #define __HYPERVISOR_stack_switch 3 | |
31 | #define __HYPERVISOR_set_callbacks 4 | |
32 | #define __HYPERVISOR_fpu_taskswitch 5 | |
33 | #define __HYPERVISOR_sched_op 6 | |
34 | #define __HYPERVISOR_dom0_op 7 | |
35 | #define __HYPERVISOR_set_debugreg 8 | |
36 | #define __HYPERVISOR_get_debugreg 9 | |
37 | #define __HYPERVISOR_update_descriptor 10 | |
38 | #define __HYPERVISOR_memory_op 12 | |
39 | #define __HYPERVISOR_multicall 13 | |
40 | #define __HYPERVISOR_update_va_mapping 14 | |
41 | #define __HYPERVISOR_set_timer_op 15 | |
42 | #define __HYPERVISOR_event_channel_op_compat 16 | |
43 | #define __HYPERVISOR_xen_version 17 | |
44 | #define __HYPERVISOR_console_io 18 | |
45 | #define __HYPERVISOR_physdev_op_compat 19 | |
46 | #define __HYPERVISOR_grant_table_op 20 | |
47 | #define __HYPERVISOR_vm_assist 21 | |
48 | #define __HYPERVISOR_update_va_mapping_otherdomain 22 | |
49 | #define __HYPERVISOR_iret 23 /* x86 only */ | |
50 | #define __HYPERVISOR_vcpu_op 24 | |
51 | #define __HYPERVISOR_set_segment_base 25 /* x86/64 only */ | |
52 | #define __HYPERVISOR_mmuext_op 26 | |
53 | #define __HYPERVISOR_acm_op 27 | |
54 | #define __HYPERVISOR_nmi_op 28 | |
55 | #define __HYPERVISOR_sched_op_new 29 | |
56 | #define __HYPERVISOR_callback_op 30 | |
57 | #define __HYPERVISOR_xenoprof_op 31 | |
58 | #define __HYPERVISOR_event_channel_op 32 | |
59 | #define __HYPERVISOR_physdev_op 33 | |
60 | #define __HYPERVISOR_hvm_op 34 | |
61 | ||
9a9db275 IY |
62 | /* Architecture-specific hypercall definitions. */ |
63 | #define __HYPERVISOR_arch_0 48 | |
64 | #define __HYPERVISOR_arch_1 49 | |
65 | #define __HYPERVISOR_arch_2 50 | |
66 | #define __HYPERVISOR_arch_3 51 | |
67 | #define __HYPERVISOR_arch_4 52 | |
68 | #define __HYPERVISOR_arch_5 53 | |
69 | #define __HYPERVISOR_arch_6 54 | |
70 | #define __HYPERVISOR_arch_7 55 | |
71 | ||
a42089dd JF |
72 | /* |
73 | * VIRTUAL INTERRUPTS | |
74 | * | |
75 | * Virtual interrupts that a guest OS may receive from Xen. | |
76 | */ | |
77 | #define VIRQ_TIMER 0 /* Timebase update, and/or requested timeout. */ | |
78 | #define VIRQ_DEBUG 1 /* Request guest to dump debug info. */ | |
79 | #define VIRQ_CONSOLE 2 /* (DOM0) Bytes received on emergency console. */ | |
80 | #define VIRQ_DOM_EXC 3 /* (DOM0) Exceptional event for some domain. */ | |
81 | #define VIRQ_DEBUGGER 6 /* (DOM0) A domain has paused for debugging. */ | |
a42089dd | 82 | |
2eb6d5eb IY |
83 | /* Architecture-specific VIRQ definitions. */ |
84 | #define VIRQ_ARCH_0 16 | |
85 | #define VIRQ_ARCH_1 17 | |
86 | #define VIRQ_ARCH_2 18 | |
87 | #define VIRQ_ARCH_3 19 | |
88 | #define VIRQ_ARCH_4 20 | |
89 | #define VIRQ_ARCH_5 21 | |
90 | #define VIRQ_ARCH_6 22 | |
91 | #define VIRQ_ARCH_7 23 | |
92 | ||
93 | #define NR_VIRQS 24 | |
a42089dd JF |
94 | /* |
95 | * MMU-UPDATE REQUESTS | |
96 | * | |
97 | * HYPERVISOR_mmu_update() accepts a list of (ptr, val) pairs. | |
98 | * A foreigndom (FD) can be specified (or DOMID_SELF for none). | |
99 | * Where the FD has some effect, it is described below. | |
100 | * ptr[1:0] specifies the appropriate MMU_* command. | |
101 | * | |
102 | * ptr[1:0] == MMU_NORMAL_PT_UPDATE: | |
103 | * Updates an entry in a page table. If updating an L1 table, and the new | |
104 | * table entry is valid/present, the mapped frame must belong to the FD, if | |
105 | * an FD has been specified. If attempting to map an I/O page then the | |
106 | * caller assumes the privilege of the FD. | |
107 | * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller. | |
108 | * FD == DOMID_XEN: Map restricted areas of Xen's heap space. | |
109 | * ptr[:2] -- Machine address of the page-table entry to modify. | |
110 | * val -- Value to write. | |
111 | * | |
112 | * ptr[1:0] == MMU_MACHPHYS_UPDATE: | |
113 | * Updates an entry in the machine->pseudo-physical mapping table. | |
114 | * ptr[:2] -- Machine address within the frame whose mapping to modify. | |
115 | * The frame must belong to the FD, if one is specified. | |
116 | * val -- Value to write into the mapping entry. | |
e57778a1 JF |
117 | * |
118 | * ptr[1:0] == MMU_PT_UPDATE_PRESERVE_AD: | |
119 | * As MMU_NORMAL_PT_UPDATE above, but A/D bits currently in the PTE are ORed | |
120 | * with those in @val. | |
a42089dd | 121 | */ |
e57778a1 JF |
122 | #define MMU_NORMAL_PT_UPDATE 0 /* checked '*ptr = val'. ptr is MA. */ |
123 | #define MMU_MACHPHYS_UPDATE 1 /* ptr = MA of frame to modify entry for */ | |
124 | #define MMU_PT_UPDATE_PRESERVE_AD 2 /* atomically: *ptr = val | (*ptr&(A|D)) */ | |
a42089dd JF |
125 | |
126 | /* | |
127 | * MMU EXTENDED OPERATIONS | |
128 | * | |
129 | * HYPERVISOR_mmuext_op() accepts a list of mmuext_op structures. | |
130 | * A foreigndom (FD) can be specified (or DOMID_SELF for none). | |
131 | * Where the FD has some effect, it is described below. | |
132 | * | |
133 | * cmd: MMUEXT_(UN)PIN_*_TABLE | |
134 | * mfn: Machine frame number to be (un)pinned as a p.t. page. | |
135 | * The frame must belong to the FD, if one is specified. | |
136 | * | |
137 | * cmd: MMUEXT_NEW_BASEPTR | |
138 | * mfn: Machine frame number of new page-table base to install in MMU. | |
139 | * | |
140 | * cmd: MMUEXT_NEW_USER_BASEPTR [x86/64 only] | |
141 | * mfn: Machine frame number of new page-table base to install in MMU | |
142 | * when in user space. | |
143 | * | |
144 | * cmd: MMUEXT_TLB_FLUSH_LOCAL | |
145 | * No additional arguments. Flushes local TLB. | |
146 | * | |
147 | * cmd: MMUEXT_INVLPG_LOCAL | |
148 | * linear_addr: Linear address to be flushed from the local TLB. | |
149 | * | |
150 | * cmd: MMUEXT_TLB_FLUSH_MULTI | |
151 | * vcpumask: Pointer to bitmap of VCPUs to be flushed. | |
152 | * | |
153 | * cmd: MMUEXT_INVLPG_MULTI | |
154 | * linear_addr: Linear address to be flushed. | |
155 | * vcpumask: Pointer to bitmap of VCPUs to be flushed. | |
156 | * | |
157 | * cmd: MMUEXT_TLB_FLUSH_ALL | |
158 | * No additional arguments. Flushes all VCPUs' TLBs. | |
159 | * | |
160 | * cmd: MMUEXT_INVLPG_ALL | |
161 | * linear_addr: Linear address to be flushed from all VCPUs' TLBs. | |
162 | * | |
163 | * cmd: MMUEXT_FLUSH_CACHE | |
164 | * No additional arguments. Writes back and flushes cache contents. | |
165 | * | |
166 | * cmd: MMUEXT_SET_LDT | |
167 | * linear_addr: Linear address of LDT base (NB. must be page-aligned). | |
168 | * nr_ents: Number of entries in LDT. | |
169 | */ | |
170 | #define MMUEXT_PIN_L1_TABLE 0 | |
171 | #define MMUEXT_PIN_L2_TABLE 1 | |
172 | #define MMUEXT_PIN_L3_TABLE 2 | |
173 | #define MMUEXT_PIN_L4_TABLE 3 | |
174 | #define MMUEXT_UNPIN_TABLE 4 | |
175 | #define MMUEXT_NEW_BASEPTR 5 | |
176 | #define MMUEXT_TLB_FLUSH_LOCAL 6 | |
177 | #define MMUEXT_INVLPG_LOCAL 7 | |
178 | #define MMUEXT_TLB_FLUSH_MULTI 8 | |
179 | #define MMUEXT_INVLPG_MULTI 9 | |
180 | #define MMUEXT_TLB_FLUSH_ALL 10 | |
181 | #define MMUEXT_INVLPG_ALL 11 | |
182 | #define MMUEXT_FLUSH_CACHE 12 | |
183 | #define MMUEXT_SET_LDT 13 | |
184 | #define MMUEXT_NEW_USER_BASEPTR 15 | |
185 | ||
186 | #ifndef __ASSEMBLY__ | |
187 | struct mmuext_op { | |
188 | unsigned int cmd; | |
189 | union { | |
190 | /* [UN]PIN_TABLE, NEW_BASEPTR, NEW_USER_BASEPTR */ | |
191 | unsigned long mfn; | |
192 | /* INVLPG_LOCAL, INVLPG_ALL, SET_LDT */ | |
193 | unsigned long linear_addr; | |
194 | } arg1; | |
195 | union { | |
196 | /* SET_LDT */ | |
197 | unsigned int nr_ents; | |
198 | /* TLB_FLUSH_MULTI, INVLPG_MULTI */ | |
199 | void *vcpumask; | |
200 | } arg2; | |
201 | }; | |
202 | DEFINE_GUEST_HANDLE_STRUCT(mmuext_op); | |
203 | #endif | |
204 | ||
205 | /* These are passed as 'flags' to update_va_mapping. They can be ORed. */ | |
206 | /* When specifying UVMF_MULTI, also OR in a pointer to a CPU bitmap. */ | |
207 | /* UVMF_LOCAL is merely UVMF_MULTI with a NULL bitmap pointer. */ | |
208 | #define UVMF_NONE (0UL<<0) /* No flushing at all. */ | |
209 | #define UVMF_TLB_FLUSH (1UL<<0) /* Flush entire TLB(s). */ | |
210 | #define UVMF_INVLPG (2UL<<0) /* Flush only one entry. */ | |
211 | #define UVMF_FLUSHTYPE_MASK (3UL<<0) | |
212 | #define UVMF_MULTI (0UL<<2) /* Flush subset of TLBs. */ | |
213 | #define UVMF_LOCAL (0UL<<2) /* Flush local TLB. */ | |
214 | #define UVMF_ALL (1UL<<2) /* Flush all TLBs. */ | |
215 | ||
216 | /* | |
217 | * Commands to HYPERVISOR_console_io(). | |
218 | */ | |
219 | #define CONSOLEIO_write 0 | |
220 | #define CONSOLEIO_read 1 | |
221 | ||
222 | /* | |
223 | * Commands to HYPERVISOR_vm_assist(). | |
224 | */ | |
225 | #define VMASST_CMD_enable 0 | |
226 | #define VMASST_CMD_disable 1 | |
227 | #define VMASST_TYPE_4gb_segments 0 | |
228 | #define VMASST_TYPE_4gb_segments_notify 1 | |
229 | #define VMASST_TYPE_writable_pagetables 2 | |
230 | #define VMASST_TYPE_pae_extended_cr3 3 | |
231 | #define MAX_VMASST_TYPE 3 | |
232 | ||
233 | #ifndef __ASSEMBLY__ | |
234 | ||
235 | typedef uint16_t domid_t; | |
236 | ||
237 | /* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */ | |
238 | #define DOMID_FIRST_RESERVED (0x7FF0U) | |
239 | ||
240 | /* DOMID_SELF is used in certain contexts to refer to oneself. */ | |
241 | #define DOMID_SELF (0x7FF0U) | |
242 | ||
243 | /* | |
244 | * DOMID_IO is used to restrict page-table updates to mapping I/O memory. | |
245 | * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO | |
246 | * is useful to ensure that no mappings to the OS's own heap are accidentally | |
247 | * installed. (e.g., in Linux this could cause havoc as reference counts | |
248 | * aren't adjusted on the I/O-mapping code path). | |
249 | * This only makes sense in MMUEXT_SET_FOREIGNDOM, but in that context can | |
250 | * be specified by any calling domain. | |
251 | */ | |
252 | #define DOMID_IO (0x7FF1U) | |
253 | ||
254 | /* | |
255 | * DOMID_XEN is used to allow privileged domains to map restricted parts of | |
256 | * Xen's heap space (e.g., the machine_to_phys table). | |
257 | * This only makes sense in MMUEXT_SET_FOREIGNDOM, and is only permitted if | |
258 | * the caller is privileged. | |
259 | */ | |
260 | #define DOMID_XEN (0x7FF2U) | |
261 | ||
262 | /* | |
263 | * Send an array of these to HYPERVISOR_mmu_update(). | |
264 | * NB. The fields are natural pointer/address size for this architecture. | |
265 | */ | |
266 | struct mmu_update { | |
267 | uint64_t ptr; /* Machine address of PTE. */ | |
268 | uint64_t val; /* New contents of PTE. */ | |
269 | }; | |
270 | DEFINE_GUEST_HANDLE_STRUCT(mmu_update); | |
271 | ||
272 | /* | |
273 | * Send an array of these to HYPERVISOR_multicall(). | |
274 | * NB. The fields are natural register size for this architecture. | |
275 | */ | |
276 | struct multicall_entry { | |
277 | unsigned long op; | |
278 | long result; | |
279 | unsigned long args[6]; | |
280 | }; | |
281 | DEFINE_GUEST_HANDLE_STRUCT(multicall_entry); | |
282 | ||
283 | /* | |
284 | * Event channel endpoints per domain: | |
285 | * 1024 if a long is 32 bits; 4096 if a long is 64 bits. | |
286 | */ | |
287 | #define NR_EVENT_CHANNELS (sizeof(unsigned long) * sizeof(unsigned long) * 64) | |
288 | ||
289 | struct vcpu_time_info { | |
290 | /* | |
291 | * Updates to the following values are preceded and followed | |
292 | * by an increment of 'version'. The guest can therefore | |
293 | * detect updates by looking for changes to 'version'. If the | |
294 | * least-significant bit of the version number is set then an | |
295 | * update is in progress and the guest must wait to read a | |
296 | * consistent set of values. The correct way to interact with | |
297 | * the version number is similar to Linux's seqlock: see the | |
298 | * implementations of read_seqbegin/read_seqretry. | |
299 | */ | |
300 | uint32_t version; | |
301 | uint32_t pad0; | |
302 | uint64_t tsc_timestamp; /* TSC at last update of time vals. */ | |
303 | uint64_t system_time; /* Time, in nanosecs, since boot. */ | |
304 | /* | |
305 | * Current system time: | |
306 | * system_time + ((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul | |
307 | * CPU frequency (Hz): | |
308 | * ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift | |
309 | */ | |
310 | uint32_t tsc_to_system_mul; | |
311 | int8_t tsc_shift; | |
312 | int8_t pad1[3]; | |
313 | }; /* 32 bytes */ | |
314 | ||
315 | struct vcpu_info { | |
316 | /* | |
317 | * 'evtchn_upcall_pending' is written non-zero by Xen to indicate | |
318 | * a pending notification for a particular VCPU. It is then cleared | |
319 | * by the guest OS /before/ checking for pending work, thus avoiding | |
320 | * a set-and-check race. Note that the mask is only accessed by Xen | |
321 | * on the CPU that is currently hosting the VCPU. This means that the | |
322 | * pending and mask flags can be updated by the guest without special | |
323 | * synchronisation (i.e., no need for the x86 LOCK prefix). | |
324 | * This may seem suboptimal because if the pending flag is set by | |
325 | * a different CPU then an IPI may be scheduled even when the mask | |
326 | * is set. However, note: | |
327 | * 1. The task of 'interrupt holdoff' is covered by the per-event- | |
328 | * channel mask bits. A 'noisy' event that is continually being | |
329 | * triggered can be masked at source at this very precise | |
330 | * granularity. | |
331 | * 2. The main purpose of the per-VCPU mask is therefore to restrict | |
332 | * reentrant execution: whether for concurrency control, or to | |
333 | * prevent unbounded stack usage. Whatever the purpose, we expect | |
334 | * that the mask will be asserted only for short periods at a time, | |
335 | * and so the likelihood of a 'spurious' IPI is suitably small. | |
336 | * The mask is read before making an event upcall to the guest: a | |
337 | * non-zero mask therefore guarantees that the VCPU will not receive | |
338 | * an upcall activation. The mask is cleared when the VCPU requests | |
339 | * to block: this avoids wakeup-waiting races. | |
340 | */ | |
341 | uint8_t evtchn_upcall_pending; | |
342 | uint8_t evtchn_upcall_mask; | |
343 | unsigned long evtchn_pending_sel; | |
344 | struct arch_vcpu_info arch; | |
1c7b67f7 | 345 | struct pvclock_vcpu_time_info time; |
a42089dd JF |
346 | }; /* 64 bytes (x86) */ |
347 | ||
348 | /* | |
349 | * Xen/kernel shared data -- pointer provided in start_info. | |
350 | * NB. We expect that this struct is smaller than a page. | |
351 | */ | |
352 | struct shared_info { | |
353 | struct vcpu_info vcpu_info[MAX_VIRT_CPUS]; | |
354 | ||
355 | /* | |
356 | * A domain can create "event channels" on which it can send and receive | |
357 | * asynchronous event notifications. There are three classes of event that | |
358 | * are delivered by this mechanism: | |
359 | * 1. Bi-directional inter- and intra-domain connections. Domains must | |
360 | * arrange out-of-band to set up a connection (usually by allocating | |
361 | * an unbound 'listener' port and avertising that via a storage service | |
362 | * such as xenstore). | |
363 | * 2. Physical interrupts. A domain with suitable hardware-access | |
364 | * privileges can bind an event-channel port to a physical interrupt | |
365 | * source. | |
366 | * 3. Virtual interrupts ('events'). A domain can bind an event-channel | |
367 | * port to a virtual interrupt source, such as the virtual-timer | |
368 | * device or the emergency console. | |
369 | * | |
370 | * Event channels are addressed by a "port index". Each channel is | |
371 | * associated with two bits of information: | |
372 | * 1. PENDING -- notifies the domain that there is a pending notification | |
373 | * to be processed. This bit is cleared by the guest. | |
374 | * 2. MASK -- if this bit is clear then a 0->1 transition of PENDING | |
375 | * will cause an asynchronous upcall to be scheduled. This bit is only | |
376 | * updated by the guest. It is read-only within Xen. If a channel | |
377 | * becomes pending while the channel is masked then the 'edge' is lost | |
378 | * (i.e., when the channel is unmasked, the guest must manually handle | |
379 | * pending notifications as no upcall will be scheduled by Xen). | |
380 | * | |
381 | * To expedite scanning of pending notifications, any 0->1 pending | |
382 | * transition on an unmasked channel causes a corresponding bit in a | |
383 | * per-vcpu selector word to be set. Each bit in the selector covers a | |
384 | * 'C long' in the PENDING bitfield array. | |
385 | */ | |
386 | unsigned long evtchn_pending[sizeof(unsigned long) * 8]; | |
387 | unsigned long evtchn_mask[sizeof(unsigned long) * 8]; | |
388 | ||
389 | /* | |
390 | * Wallclock time: updated only by control software. Guests should base | |
391 | * their gettimeofday() syscall on this wallclock-base value. | |
392 | */ | |
1c7b67f7 | 393 | struct pvclock_wall_clock wc; |
a42089dd JF |
394 | |
395 | struct arch_shared_info arch; | |
396 | ||
397 | }; | |
398 | ||
399 | /* | |
400 | * Start-of-day memory layout for the initial domain (DOM0): | |
401 | * 1. The domain is started within contiguous virtual-memory region. | |
402 | * 2. The contiguous region begins and ends on an aligned 4MB boundary. | |
403 | * 3. The region start corresponds to the load address of the OS image. | |
404 | * If the load address is not 4MB aligned then the address is rounded down. | |
405 | * 4. This the order of bootstrap elements in the initial virtual region: | |
406 | * a. relocated kernel image | |
407 | * b. initial ram disk [mod_start, mod_len] | |
408 | * c. list of allocated page frames [mfn_list, nr_pages] | |
409 | * d. start_info_t structure [register ESI (x86)] | |
410 | * e. bootstrap page tables [pt_base, CR3 (x86)] | |
411 | * f. bootstrap stack [register ESP (x86)] | |
412 | * 5. Bootstrap elements are packed together, but each is 4kB-aligned. | |
413 | * 6. The initial ram disk may be omitted. | |
414 | * 7. The list of page frames forms a contiguous 'pseudo-physical' memory | |
415 | * layout for the domain. In particular, the bootstrap virtual-memory | |
416 | * region is a 1:1 mapping to the first section of the pseudo-physical map. | |
417 | * 8. All bootstrap elements are mapped read-writable for the guest OS. The | |
418 | * only exception is the bootstrap page table, which is mapped read-only. | |
419 | * 9. There is guaranteed to be at least 512kB padding after the final | |
420 | * bootstrap element. If necessary, the bootstrap virtual region is | |
421 | * extended by an extra 4MB to ensure this. | |
422 | */ | |
423 | ||
424 | #define MAX_GUEST_CMDLINE 1024 | |
425 | struct start_info { | |
426 | /* THE FOLLOWING ARE FILLED IN BOTH ON INITIAL BOOT AND ON RESUME. */ | |
427 | char magic[32]; /* "xen-<version>-<platform>". */ | |
428 | unsigned long nr_pages; /* Total pages allocated to this domain. */ | |
429 | unsigned long shared_info; /* MACHINE address of shared info struct. */ | |
430 | uint32_t flags; /* SIF_xxx flags. */ | |
431 | unsigned long store_mfn; /* MACHINE page number of shared page. */ | |
432 | uint32_t store_evtchn; /* Event channel for store communication. */ | |
433 | union { | |
434 | struct { | |
435 | unsigned long mfn; /* MACHINE page number of console page. */ | |
436 | uint32_t evtchn; /* Event channel for console page. */ | |
437 | } domU; | |
438 | struct { | |
439 | uint32_t info_off; /* Offset of console_info struct. */ | |
440 | uint32_t info_size; /* Size of console_info struct from start.*/ | |
441 | } dom0; | |
442 | } console; | |
443 | /* THE FOLLOWING ARE ONLY FILLED IN ON INITIAL BOOT (NOT RESUME). */ | |
444 | unsigned long pt_base; /* VIRTUAL address of page directory. */ | |
445 | unsigned long nr_pt_frames; /* Number of bootstrap p.t. frames. */ | |
446 | unsigned long mfn_list; /* VIRTUAL address of page-frame list. */ | |
447 | unsigned long mod_start; /* VIRTUAL address of pre-loaded module. */ | |
448 | unsigned long mod_len; /* Size (bytes) of pre-loaded module. */ | |
449 | int8_t cmd_line[MAX_GUEST_CMDLINE]; | |
450 | }; | |
451 | ||
452 | /* These flags are passed in the 'flags' field of start_info_t. */ | |
453 | #define SIF_PRIVILEGED (1<<0) /* Is the domain privileged? */ | |
454 | #define SIF_INITDOMAIN (1<<1) /* Is this the initial control domain? */ | |
455 | ||
456 | typedef uint64_t cpumap_t; | |
457 | ||
458 | typedef uint8_t xen_domain_handle_t[16]; | |
459 | ||
460 | /* Turn a plain number into a C unsigned long constant. */ | |
461 | #define __mk_unsigned_long(x) x ## UL | |
462 | #define mk_unsigned_long(x) __mk_unsigned_long(x) | |
463 | ||
464 | #else /* __ASSEMBLY__ */ | |
465 | ||
466 | /* In assembly code we cannot use C numeric constant suffixes. */ | |
467 | #define mk_unsigned_long(x) x | |
468 | ||
469 | #endif /* !__ASSEMBLY__ */ | |
470 | ||
471 | #endif /* __XEN_PUBLIC_XEN_H__ */ |