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Commit | Line | Data |
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457c8996 | 1 | // SPDX-License-Identifier: GPL-2.0-only |
1da177e4 LT |
2 | /* |
3 | * Dynamic DMA mapping support. | |
4 | * | |
563aaf06 | 5 | * This implementation is a fallback for platforms that do not support |
1da177e4 LT |
6 | * I/O TLBs (aka DMA address translation hardware). |
7 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
8 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
9 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
10 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
11 | * | |
12 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
13 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
14 | * unnecessary i-cache flushing. | |
569c8bf5 JL |
15 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
16 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
17 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
fb05a379 | 18 | * 08/12/11 beckyb Add highmem support |
1da177e4 LT |
19 | */ |
20 | ||
7d63fb3a KC |
21 | #define pr_fmt(fmt) "software IO TLB: " fmt |
22 | ||
1da177e4 | 23 | #include <linux/cache.h> |
ea8c64ac | 24 | #include <linux/dma-direct.h> |
9f4df96b | 25 | #include <linux/dma-map-ops.h> |
1da177e4 | 26 | #include <linux/mm.h> |
8bc3bcc9 | 27 | #include <linux/export.h> |
1da177e4 LT |
28 | #include <linux/spinlock.h> |
29 | #include <linux/string.h> | |
0016fdee | 30 | #include <linux/swiotlb.h> |
fb05a379 | 31 | #include <linux/pfn.h> |
1da177e4 LT |
32 | #include <linux/types.h> |
33 | #include <linux/ctype.h> | |
ef9b1893 | 34 | #include <linux/highmem.h> |
5a0e3ad6 | 35 | #include <linux/gfp.h> |
84be456f | 36 | #include <linux/scatterlist.h> |
c7753208 | 37 | #include <linux/mem_encrypt.h> |
e7de6c7c | 38 | #include <linux/set_memory.h> |
71602fe6 DZ |
39 | #ifdef CONFIG_DEBUG_FS |
40 | #include <linux/debugfs.h> | |
41 | #endif | |
1da177e4 LT |
42 | |
43 | #include <asm/io.h> | |
1da177e4 LT |
44 | #include <asm/dma.h> |
45 | ||
46 | #include <linux/init.h> | |
57c8a661 | 47 | #include <linux/memblock.h> |
a8522509 | 48 | #include <linux/iommu-helper.h> |
1da177e4 | 49 | |
ce5be5a1 | 50 | #define CREATE_TRACE_POINTS |
2b2b614d ZK |
51 | #include <trace/events/swiotlb.h> |
52 | ||
0b9afede AW |
53 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
54 | ||
55 | /* | |
56 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
57 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
58 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
59 | */ | |
60 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
61 | ||
ae7871be | 62 | enum swiotlb_force swiotlb_force; |
1da177e4 LT |
63 | |
64 | /* | |
bfc5501f KRW |
65 | * Used to do a quick range check in swiotlb_tbl_unmap_single and |
66 | * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this | |
1da177e4 LT |
67 | * API. |
68 | */ | |
55897af6 | 69 | phys_addr_t io_tlb_start, io_tlb_end; |
1da177e4 LT |
70 | |
71 | /* | |
b595076a | 72 | * The number of IO TLB blocks (in groups of 64) between io_tlb_start and |
1da177e4 LT |
73 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. |
74 | */ | |
75 | static unsigned long io_tlb_nslabs; | |
76 | ||
71602fe6 DZ |
77 | /* |
78 | * The number of used IO TLB block | |
79 | */ | |
80 | static unsigned long io_tlb_used; | |
81 | ||
1da177e4 LT |
82 | /* |
83 | * This is a free list describing the number of free entries available from | |
84 | * each index | |
85 | */ | |
86 | static unsigned int *io_tlb_list; | |
87 | static unsigned int io_tlb_index; | |
88 | ||
7453c549 KRW |
89 | /* |
90 | * Max segment that we can provide which (if pages are contingous) will | |
91 | * not be bounced (unless SWIOTLB_FORCE is set). | |
92 | */ | |
b51e6271 | 93 | static unsigned int max_segment; |
7453c549 | 94 | |
1da177e4 LT |
95 | /* |
96 | * We need to save away the original address corresponding to a mapped entry | |
97 | * for the sync operations. | |
98 | */ | |
8e0629c1 | 99 | #define INVALID_PHYS_ADDR (~(phys_addr_t)0) |
bc40ac66 | 100 | static phys_addr_t *io_tlb_orig_addr; |
1da177e4 | 101 | |
daf9514f MR |
102 | /* |
103 | * The mapped buffer's size should be validated during a sync operation. | |
104 | */ | |
2973073a | 105 | static size_t *io_tlb_alloc_size; |
daf9514f | 106 | |
1da177e4 LT |
107 | /* |
108 | * Protect the above data structures in the map and unmap calls | |
109 | */ | |
110 | static DEFINE_SPINLOCK(io_tlb_lock); | |
111 | ||
5740afdb FT |
112 | static int late_alloc; |
113 | ||
1da177e4 LT |
114 | static int __init |
115 | setup_io_tlb_npages(char *str) | |
116 | { | |
117 | if (isdigit(*str)) { | |
e8579e72 | 118 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
1da177e4 LT |
119 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
120 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
121 | } | |
122 | if (*str == ',') | |
123 | ++str; | |
fff5d992 | 124 | if (!strcmp(str, "force")) { |
ae7871be | 125 | swiotlb_force = SWIOTLB_FORCE; |
fff5d992 GU |
126 | } else if (!strcmp(str, "noforce")) { |
127 | swiotlb_force = SWIOTLB_NO_FORCE; | |
128 | io_tlb_nslabs = 1; | |
129 | } | |
b18485e7 | 130 | |
c729de8f | 131 | return 0; |
1da177e4 | 132 | } |
c729de8f | 133 | early_param("swiotlb", setup_io_tlb_npages); |
1da177e4 | 134 | |
4aa095ea FF |
135 | static bool no_iotlb_memory; |
136 | ||
f21ffe9f | 137 | unsigned long swiotlb_nr_tbl(void) |
5f98ecdb | 138 | { |
4aa095ea | 139 | return unlikely(no_iotlb_memory) ? 0 : io_tlb_nslabs; |
5f98ecdb | 140 | } |
f21ffe9f | 141 | EXPORT_SYMBOL_GPL(swiotlb_nr_tbl); |
c729de8f | 142 | |
7453c549 KRW |
143 | unsigned int swiotlb_max_segment(void) |
144 | { | |
4aa095ea | 145 | return unlikely(no_iotlb_memory) ? 0 : max_segment; |
7453c549 KRW |
146 | } |
147 | EXPORT_SYMBOL_GPL(swiotlb_max_segment); | |
148 | ||
149 | void swiotlb_set_max_segment(unsigned int val) | |
150 | { | |
151 | if (swiotlb_force == SWIOTLB_FORCE) | |
152 | max_segment = 1; | |
153 | else | |
154 | max_segment = rounddown(val, PAGE_SIZE); | |
155 | } | |
156 | ||
c729de8f YL |
157 | unsigned long swiotlb_size_or_default(void) |
158 | { | |
159 | unsigned long size; | |
160 | ||
161 | size = io_tlb_nslabs << IO_TLB_SHIFT; | |
162 | ||
163 | return size ? size : (IO_TLB_DEFAULT_SIZE); | |
164 | } | |
165 | ||
e998879d AK |
166 | void __init swiotlb_adjust_size(unsigned long new_size) |
167 | { | |
168 | unsigned long size; | |
169 | ||
170 | /* | |
171 | * If swiotlb parameter has not been specified, give a chance to | |
172 | * architectures such as those supporting memory encryption to | |
173 | * adjust/expand SWIOTLB size for their use. | |
174 | */ | |
175 | if (!io_tlb_nslabs) { | |
b5d7ccb7 | 176 | size = ALIGN(new_size, IO_TLB_SIZE); |
e998879d AK |
177 | io_tlb_nslabs = size >> IO_TLB_SHIFT; |
178 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
179 | ||
180 | pr_info("SWIOTLB bounce buffer size adjusted to %luMB", size >> 20); | |
181 | } | |
182 | } | |
183 | ||
ad32e8cb | 184 | void swiotlb_print_info(void) |
2e5b2b86 | 185 | { |
ad32e8cb | 186 | unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
2e5b2b86 | 187 | |
ac2cbab2 | 188 | if (no_iotlb_memory) { |
7d63fb3a | 189 | pr_warn("No low mem\n"); |
ac2cbab2 YL |
190 | return; |
191 | } | |
192 | ||
4db7b6aa | 193 | pr_info("mapped [mem %pa-%pa] (%luMB)\n", &io_tlb_start, &io_tlb_end, |
7d63fb3a | 194 | bytes >> 20); |
2e5b2b86 IC |
195 | } |
196 | ||
c7fbeca7 CH |
197 | static inline unsigned long io_tlb_offset(unsigned long val) |
198 | { | |
199 | return val & (IO_TLB_SEGSIZE - 1); | |
200 | } | |
201 | ||
c32a77fd CH |
202 | static inline unsigned long nr_slots(u64 val) |
203 | { | |
204 | return DIV_ROUND_UP(val, IO_TLB_SIZE); | |
205 | } | |
206 | ||
c7753208 TL |
207 | /* |
208 | * Early SWIOTLB allocation may be too early to allow an architecture to | |
209 | * perform the desired operations. This function allows the architecture to | |
210 | * call SWIOTLB when the operations are possible. It needs to be called | |
211 | * before the SWIOTLB memory is used. | |
212 | */ | |
213 | void __init swiotlb_update_mem_attributes(void) | |
214 | { | |
215 | void *vaddr; | |
216 | unsigned long bytes; | |
217 | ||
218 | if (no_iotlb_memory || late_alloc) | |
219 | return; | |
220 | ||
221 | vaddr = phys_to_virt(io_tlb_start); | |
222 | bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT); | |
e7de6c7c | 223 | set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT); |
c7753208 | 224 | memset(vaddr, 0, bytes); |
c7753208 TL |
225 | } |
226 | ||
ac2cbab2 | 227 | int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose) |
1da177e4 | 228 | { |
563aaf06 | 229 | unsigned long i, bytes; |
a0bf842e | 230 | size_t alloc_size; |
1da177e4 | 231 | |
5d0538b2 CH |
232 | /* protect against double initialization */ |
233 | if (WARN_ON_ONCE(io_tlb_start)) | |
234 | return -ENOMEM; | |
235 | ||
abbceff7 | 236 | bytes = nslabs << IO_TLB_SHIFT; |
1da177e4 | 237 | |
abbceff7 | 238 | io_tlb_nslabs = nslabs; |
ff7204a7 AD |
239 | io_tlb_start = __pa(tlb); |
240 | io_tlb_end = io_tlb_start + bytes; | |
1da177e4 LT |
241 | |
242 | /* | |
243 | * Allocate and initialize the free list array. This array is used | |
244 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
245 | * between io_tlb_start and io_tlb_end. | |
246 | */ | |
a0bf842e MR |
247 | alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(int)); |
248 | io_tlb_list = memblock_alloc(alloc_size, PAGE_SIZE); | |
249 | if (!io_tlb_list) | |
8a7f97b9 | 250 | panic("%s: Failed to allocate %zu bytes align=0x%lx\n", |
a0bf842e MR |
251 | __func__, alloc_size, PAGE_SIZE); |
252 | ||
253 | alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)); | |
254 | io_tlb_orig_addr = memblock_alloc(alloc_size, PAGE_SIZE); | |
255 | if (!io_tlb_orig_addr) | |
8a7f97b9 | 256 | panic("%s: Failed to allocate %zu bytes align=0x%lx\n", |
a0bf842e MR |
257 | __func__, alloc_size, PAGE_SIZE); |
258 | ||
daf9514f | 259 | alloc_size = PAGE_ALIGN(io_tlb_nslabs * sizeof(size_t)); |
2973073a CH |
260 | io_tlb_alloc_size = memblock_alloc(alloc_size, PAGE_SIZE); |
261 | if (!io_tlb_alloc_size) | |
daf9514f MR |
262 | panic("%s: Failed to allocate %zu bytes align=0x%lx\n", |
263 | __func__, alloc_size, PAGE_SIZE); | |
264 | ||
8e0629c1 | 265 | for (i = 0; i < io_tlb_nslabs; i++) { |
c7fbeca7 | 266 | io_tlb_list[i] = IO_TLB_SEGSIZE - io_tlb_offset(i); |
8e0629c1 | 267 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; |
2973073a | 268 | io_tlb_alloc_size[i] = 0; |
8e0629c1 JB |
269 | } |
270 | io_tlb_index = 0; | |
e9696d25 | 271 | no_iotlb_memory = false; |
1da177e4 | 272 | |
ad32e8cb FT |
273 | if (verbose) |
274 | swiotlb_print_info(); | |
ac2cbab2 | 275 | |
7453c549 | 276 | swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT); |
ac2cbab2 | 277 | return 0; |
1da177e4 LT |
278 | } |
279 | ||
abbceff7 FT |
280 | /* |
281 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
282 | * structures for the software IO TLB used to implement the DMA API. | |
283 | */ | |
ac2cbab2 YL |
284 | void __init |
285 | swiotlb_init(int verbose) | |
abbceff7 | 286 | { |
c729de8f | 287 | size_t default_size = IO_TLB_DEFAULT_SIZE; |
ff7204a7 | 288 | unsigned char *vstart; |
abbceff7 FT |
289 | unsigned long bytes; |
290 | ||
291 | if (!io_tlb_nslabs) { | |
292 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
293 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
294 | } | |
295 | ||
296 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
297 | ||
ac2cbab2 | 298 | /* Get IO TLB memory from the low pages */ |
26fb3dae | 299 | vstart = memblock_alloc_low(PAGE_ALIGN(bytes), PAGE_SIZE); |
ac2cbab2 YL |
300 | if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose)) |
301 | return; | |
abbceff7 | 302 | |
e9696d25 | 303 | if (io_tlb_start) { |
457ff1de SS |
304 | memblock_free_early(io_tlb_start, |
305 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); | |
e9696d25 SS |
306 | io_tlb_start = 0; |
307 | } | |
7d63fb3a | 308 | pr_warn("Cannot allocate buffer"); |
ac2cbab2 | 309 | no_iotlb_memory = true; |
1da177e4 LT |
310 | } |
311 | ||
0b9afede AW |
312 | /* |
313 | * Systems with larger DMA zones (those that don't support ISA) can | |
314 | * initialize the swiotlb later using the slab allocator if needed. | |
315 | * This should be just like above, but with some error catching. | |
316 | */ | |
317 | int | |
563aaf06 | 318 | swiotlb_late_init_with_default_size(size_t default_size) |
0b9afede | 319 | { |
74838b75 | 320 | unsigned long bytes, req_nslabs = io_tlb_nslabs; |
ff7204a7 | 321 | unsigned char *vstart = NULL; |
0b9afede | 322 | unsigned int order; |
74838b75 | 323 | int rc = 0; |
0b9afede AW |
324 | |
325 | if (!io_tlb_nslabs) { | |
326 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
327 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
328 | } | |
329 | ||
330 | /* | |
331 | * Get IO TLB memory from the low pages | |
332 | */ | |
563aaf06 | 333 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
0b9afede | 334 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
563aaf06 | 335 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede AW |
336 | |
337 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
ff7204a7 AD |
338 | vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, |
339 | order); | |
340 | if (vstart) | |
0b9afede AW |
341 | break; |
342 | order--; | |
343 | } | |
344 | ||
ff7204a7 | 345 | if (!vstart) { |
74838b75 KRW |
346 | io_tlb_nslabs = req_nslabs; |
347 | return -ENOMEM; | |
348 | } | |
563aaf06 | 349 | if (order != get_order(bytes)) { |
7d63fb3a KC |
350 | pr_warn("only able to allocate %ld MB\n", |
351 | (PAGE_SIZE << order) >> 20); | |
0b9afede AW |
352 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
353 | } | |
ff7204a7 | 354 | rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs); |
74838b75 | 355 | if (rc) |
ff7204a7 | 356 | free_pages((unsigned long)vstart, order); |
7453c549 | 357 | |
74838b75 KRW |
358 | return rc; |
359 | } | |
360 | ||
0bfaffbf FF |
361 | static void swiotlb_cleanup(void) |
362 | { | |
363 | io_tlb_end = 0; | |
364 | io_tlb_start = 0; | |
365 | io_tlb_nslabs = 0; | |
366 | max_segment = 0; | |
367 | } | |
368 | ||
74838b75 KRW |
369 | int |
370 | swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs) | |
371 | { | |
372 | unsigned long i, bytes; | |
373 | ||
5d0538b2 CH |
374 | /* protect against double initialization */ |
375 | if (WARN_ON_ONCE(io_tlb_start)) | |
376 | return -ENOMEM; | |
377 | ||
74838b75 KRW |
378 | bytes = nslabs << IO_TLB_SHIFT; |
379 | ||
380 | io_tlb_nslabs = nslabs; | |
ff7204a7 AD |
381 | io_tlb_start = virt_to_phys(tlb); |
382 | io_tlb_end = io_tlb_start + bytes; | |
74838b75 | 383 | |
e7de6c7c | 384 | set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT); |
ff7204a7 | 385 | memset(tlb, 0, bytes); |
0b9afede AW |
386 | |
387 | /* | |
388 | * Allocate and initialize the free list array. This array is used | |
389 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
390 | * between io_tlb_start and io_tlb_end. | |
391 | */ | |
392 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
daf9514f | 393 | get_order(io_tlb_nslabs * sizeof(int))); |
0b9afede | 394 | if (!io_tlb_list) |
ee3f6ba8 | 395 | goto cleanup3; |
0b9afede | 396 | |
bc40ac66 BB |
397 | io_tlb_orig_addr = (phys_addr_t *) |
398 | __get_free_pages(GFP_KERNEL, | |
399 | get_order(io_tlb_nslabs * | |
400 | sizeof(phys_addr_t))); | |
0b9afede | 401 | if (!io_tlb_orig_addr) |
ee3f6ba8 | 402 | goto cleanup4; |
0b9afede | 403 | |
2973073a | 404 | io_tlb_alloc_size = (size_t *) |
daf9514f MR |
405 | __get_free_pages(GFP_KERNEL, |
406 | get_order(io_tlb_nslabs * | |
407 | sizeof(size_t))); | |
2973073a | 408 | if (!io_tlb_alloc_size) |
daf9514f MR |
409 | goto cleanup5; |
410 | ||
411 | ||
8e0629c1 | 412 | for (i = 0; i < io_tlb_nslabs; i++) { |
c7fbeca7 | 413 | io_tlb_list[i] = IO_TLB_SEGSIZE - io_tlb_offset(i); |
8e0629c1 | 414 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; |
2973073a | 415 | io_tlb_alloc_size[i] = 0; |
8e0629c1 JB |
416 | } |
417 | io_tlb_index = 0; | |
e9696d25 | 418 | no_iotlb_memory = false; |
0b9afede | 419 | |
ad32e8cb | 420 | swiotlb_print_info(); |
0b9afede | 421 | |
5740afdb FT |
422 | late_alloc = 1; |
423 | ||
7453c549 KRW |
424 | swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT); |
425 | ||
0b9afede AW |
426 | return 0; |
427 | ||
daf9514f MR |
428 | cleanup5: |
429 | free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs * | |
430 | sizeof(phys_addr_t))); | |
431 | ||
0b9afede | 432 | cleanup4: |
25667d67 TL |
433 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
434 | sizeof(int))); | |
0b9afede | 435 | io_tlb_list = NULL; |
ee3f6ba8 | 436 | cleanup3: |
0bfaffbf | 437 | swiotlb_cleanup(); |
0b9afede AW |
438 | return -ENOMEM; |
439 | } | |
440 | ||
7f2c8bbd | 441 | void __init swiotlb_exit(void) |
5740afdb | 442 | { |
ee3f6ba8 | 443 | if (!io_tlb_orig_addr) |
5740afdb FT |
444 | return; |
445 | ||
446 | if (late_alloc) { | |
2973073a | 447 | free_pages((unsigned long)io_tlb_alloc_size, |
daf9514f | 448 | get_order(io_tlb_nslabs * sizeof(size_t))); |
5740afdb FT |
449 | free_pages((unsigned long)io_tlb_orig_addr, |
450 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
451 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | |
452 | sizeof(int))); | |
ff7204a7 | 453 | free_pages((unsigned long)phys_to_virt(io_tlb_start), |
5740afdb FT |
454 | get_order(io_tlb_nslabs << IO_TLB_SHIFT)); |
455 | } else { | |
457ff1de SS |
456 | memblock_free_late(__pa(io_tlb_orig_addr), |
457 | PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t))); | |
2973073a | 458 | memblock_free_late(__pa(io_tlb_alloc_size), |
daf9514f | 459 | PAGE_ALIGN(io_tlb_nslabs * sizeof(size_t))); |
457ff1de SS |
460 | memblock_free_late(__pa(io_tlb_list), |
461 | PAGE_ALIGN(io_tlb_nslabs * sizeof(int))); | |
462 | memblock_free_late(io_tlb_start, | |
463 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); | |
5740afdb | 464 | } |
0bfaffbf | 465 | swiotlb_cleanup(); |
5740afdb FT |
466 | } |
467 | ||
fb05a379 | 468 | /* |
6442ca2a | 469 | * Bounce: copy the swiotlb buffer from or back to the original dma location |
fb05a379 | 470 | */ |
2bdba622 CH |
471 | static void swiotlb_bounce(struct device *dev, phys_addr_t tlb_addr, size_t size, |
472 | enum dma_data_direction dir) | |
fb05a379 | 473 | { |
2bdba622 CH |
474 | int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; |
475 | size_t alloc_size = io_tlb_alloc_size[index]; | |
476 | phys_addr_t orig_addr = io_tlb_orig_addr[index]; | |
af51a9f1 AD |
477 | unsigned long pfn = PFN_DOWN(orig_addr); |
478 | unsigned char *vaddr = phys_to_virt(tlb_addr); | |
fb05a379 | 479 | |
2bdba622 CH |
480 | if (orig_addr == INVALID_PHYS_ADDR) |
481 | return; | |
482 | ||
483 | if (size > alloc_size) { | |
484 | dev_WARN_ONCE(dev, 1, | |
485 | "Buffer overflow detected. Allocation size: %zu. Mapping size: %zu.\n", | |
486 | alloc_size, size); | |
487 | size = alloc_size; | |
488 | } | |
489 | ||
fb05a379 BB |
490 | if (PageHighMem(pfn_to_page(pfn))) { |
491 | /* The buffer does not have a mapping. Map it in and copy */ | |
af51a9f1 | 492 | unsigned int offset = orig_addr & ~PAGE_MASK; |
fb05a379 BB |
493 | char *buffer; |
494 | unsigned int sz = 0; | |
495 | unsigned long flags; | |
496 | ||
497 | while (size) { | |
67131ad0 | 498 | sz = min_t(size_t, PAGE_SIZE - offset, size); |
fb05a379 BB |
499 | |
500 | local_irq_save(flags); | |
c3eede8e | 501 | buffer = kmap_atomic(pfn_to_page(pfn)); |
fb05a379 | 502 | if (dir == DMA_TO_DEVICE) |
af51a9f1 | 503 | memcpy(vaddr, buffer + offset, sz); |
ef9b1893 | 504 | else |
af51a9f1 | 505 | memcpy(buffer + offset, vaddr, sz); |
c3eede8e | 506 | kunmap_atomic(buffer); |
ef9b1893 | 507 | local_irq_restore(flags); |
fb05a379 BB |
508 | |
509 | size -= sz; | |
510 | pfn++; | |
af51a9f1 | 511 | vaddr += sz; |
fb05a379 | 512 | offset = 0; |
ef9b1893 | 513 | } |
af51a9f1 AD |
514 | } else if (dir == DMA_TO_DEVICE) { |
515 | memcpy(vaddr, phys_to_virt(orig_addr), size); | |
ef9b1893 | 516 | } else { |
af51a9f1 | 517 | memcpy(phys_to_virt(orig_addr), vaddr, size); |
ef9b1893 | 518 | } |
1b548f66 JF |
519 | } |
520 | ||
26a7e094 | 521 | #define slot_addr(start, idx) ((start) + ((idx) << IO_TLB_SHIFT)) |
648babb7 | 522 | |
1f221a0d CH |
523 | /* |
524 | * Return the offset into a iotlb slot required to keep the device happy. | |
525 | */ | |
526 | static unsigned int swiotlb_align_offset(struct device *dev, u64 addr) | |
527 | { | |
528 | return addr & dma_get_min_align_mask(dev) & (IO_TLB_SIZE - 1); | |
529 | } | |
530 | ||
26a7e094 CH |
531 | /* |
532 | * Carefully handle integer overflow which can occur when boundary_mask == ~0UL. | |
533 | */ | |
534 | static inline unsigned long get_max_slots(unsigned long boundary_mask) | |
535 | { | |
536 | if (boundary_mask == ~0UL) | |
537 | return 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
538 | return nr_slots(boundary_mask + 1); | |
539 | } | |
681cc5cd | 540 | |
26a7e094 CH |
541 | static unsigned int wrap_index(unsigned int index) |
542 | { | |
543 | if (index >= io_tlb_nslabs) | |
544 | return 0; | |
545 | return index; | |
546 | } | |
eb605a57 | 547 | |
26a7e094 CH |
548 | /* |
549 | * Find a suitable number of IO TLB entries size that will fit this request and | |
550 | * allocate a buffer from that IO TLB pool. | |
551 | */ | |
1f221a0d CH |
552 | static int find_slots(struct device *dev, phys_addr_t orig_addr, |
553 | size_t alloc_size) | |
26a7e094 CH |
554 | { |
555 | unsigned long boundary_mask = dma_get_seg_boundary(dev); | |
556 | dma_addr_t tbl_dma_addr = | |
557 | phys_to_dma_unencrypted(dev, io_tlb_start) & boundary_mask; | |
558 | unsigned long max_slots = get_max_slots(boundary_mask); | |
1f221a0d CH |
559 | unsigned int iotlb_align_mask = |
560 | dma_get_min_align_mask(dev) & ~(IO_TLB_SIZE - 1); | |
561 | unsigned int nslots = nr_slots(alloc_size), stride; | |
26a7e094 CH |
562 | unsigned int index, wrap, count = 0, i; |
563 | unsigned long flags; | |
a5ddde4a | 564 | |
26a7e094 | 565 | BUG_ON(!nslots); |
1da177e4 LT |
566 | |
567 | /* | |
1f221a0d CH |
568 | * For mappings with an alignment requirement don't bother looping to |
569 | * unaligned slots once we found an aligned one. For allocations of | |
570 | * PAGE_SIZE or larger only look for page aligned allocations. | |
1da177e4 | 571 | */ |
1f221a0d | 572 | stride = (iotlb_align_mask >> IO_TLB_SHIFT) + 1; |
3fc1ca00 | 573 | if (alloc_size >= PAGE_SIZE) |
1f221a0d | 574 | stride = max(stride, stride << (PAGE_SHIFT - IO_TLB_SHIFT)); |
1da177e4 | 575 | |
1da177e4 | 576 | spin_lock_irqsave(&io_tlb_lock, flags); |
60513ed0 DZ |
577 | if (unlikely(nslots > io_tlb_nslabs - io_tlb_used)) |
578 | goto not_found; | |
579 | ||
26a7e094 | 580 | index = wrap = wrap_index(ALIGN(io_tlb_index, stride)); |
a7133a15 | 581 | do { |
1f221a0d CH |
582 | if ((slot_addr(tbl_dma_addr, index) & iotlb_align_mask) != |
583 | (orig_addr & iotlb_align_mask)) { | |
584 | index = wrap_index(index + 1); | |
585 | continue; | |
586 | } | |
587 | ||
a7133a15 AM |
588 | /* |
589 | * If we find a slot that indicates we have 'nslots' number of | |
590 | * contiguous buffers, we allocate the buffers from that slot | |
591 | * and mark the entries as '0' indicating unavailable. | |
592 | */ | |
26a7e094 CH |
593 | if (!iommu_is_span_boundary(index, nslots, |
594 | nr_slots(tbl_dma_addr), | |
595 | max_slots)) { | |
596 | if (io_tlb_list[index] >= nslots) | |
597 | goto found; | |
a7133a15 | 598 | } |
26a7e094 | 599 | index = wrap_index(index + stride); |
a7133a15 AM |
600 | } while (index != wrap); |
601 | ||
602 | not_found: | |
603 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
26a7e094 CH |
604 | return -1; |
605 | ||
a7133a15 | 606 | found: |
26a7e094 CH |
607 | for (i = index; i < index + nslots; i++) |
608 | io_tlb_list[i] = 0; | |
609 | for (i = index - 1; | |
610 | io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 && | |
611 | io_tlb_list[i]; i--) | |
612 | io_tlb_list[i] = ++count; | |
613 | ||
614 | /* | |
615 | * Update the indices to avoid searching in the next round. | |
616 | */ | |
617 | if (index + nslots < io_tlb_nslabs) | |
618 | io_tlb_index = index + nslots; | |
619 | else | |
620 | io_tlb_index = 0; | |
71602fe6 | 621 | io_tlb_used += nslots; |
26a7e094 | 622 | |
1da177e4 | 623 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
26a7e094 CH |
624 | return index; |
625 | } | |
626 | ||
627 | phys_addr_t swiotlb_tbl_map_single(struct device *dev, phys_addr_t orig_addr, | |
628 | size_t mapping_size, size_t alloc_size, | |
629 | enum dma_data_direction dir, unsigned long attrs) | |
630 | { | |
1f221a0d | 631 | unsigned int offset = swiotlb_align_offset(dev, orig_addr); |
26a7e094 CH |
632 | unsigned int index, i; |
633 | phys_addr_t tlb_addr; | |
634 | ||
635 | if (no_iotlb_memory) | |
636 | panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer"); | |
637 | ||
638 | if (mem_encrypt_active()) | |
639 | pr_warn_once("Memory encryption is active and system is using DMA bounce buffers\n"); | |
640 | ||
641 | if (mapping_size > alloc_size) { | |
642 | dev_warn_once(dev, "Invalid sizes (mapping: %zd bytes, alloc: %zd bytes)", | |
643 | mapping_size, alloc_size); | |
644 | return (phys_addr_t)DMA_MAPPING_ERROR; | |
645 | } | |
646 | ||
1f221a0d | 647 | index = find_slots(dev, orig_addr, alloc_size + offset); |
26a7e094 CH |
648 | if (index == -1) { |
649 | if (!(attrs & DMA_ATTR_NO_WARN)) | |
650 | dev_warn_ratelimited(dev, | |
651 | "swiotlb buffer is full (sz: %zd bytes), total %lu (slots), used %lu (slots)\n", | |
652 | alloc_size, io_tlb_nslabs, io_tlb_used); | |
653 | return (phys_addr_t)DMA_MAPPING_ERROR; | |
654 | } | |
1da177e4 LT |
655 | |
656 | /* | |
657 | * Save away the mapping from the original address to the DMA address. | |
658 | * This is needed when we sync the memory. Then we sync the buffer if | |
659 | * needed. | |
660 | */ | |
daf9514f | 661 | for (i = 0; i < nr_slots(alloc_size + offset); i++) { |
26a7e094 | 662 | io_tlb_orig_addr[index + i] = slot_addr(orig_addr, i); |
2973073a | 663 | io_tlb_alloc_size[index+i] = alloc_size - (i << IO_TLB_SHIFT); |
daf9514f | 664 | } |
1f221a0d | 665 | tlb_addr = slot_addr(io_tlb_start, index) + offset; |
0443fa00 AD |
666 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) && |
667 | (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
2bdba622 | 668 | swiotlb_bounce(dev, tlb_addr, mapping_size, DMA_TO_DEVICE); |
e05ed4d1 | 669 | return tlb_addr; |
1da177e4 LT |
670 | } |
671 | ||
672 | /* | |
d0c8ba40 | 673 | * tlb_addr is the physical address of the bounce buffer to unmap. |
1da177e4 | 674 | */ |
61ca08c3 | 675 | void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr, |
2973073a CH |
676 | size_t mapping_size, enum dma_data_direction dir, |
677 | unsigned long attrs) | |
1da177e4 LT |
678 | { |
679 | unsigned long flags; | |
1f221a0d | 680 | unsigned int offset = swiotlb_align_offset(hwdev, tlb_addr); |
1f221a0d | 681 | int index = (tlb_addr - offset - io_tlb_start) >> IO_TLB_SHIFT; |
2bdba622 CH |
682 | int nslots = nr_slots(io_tlb_alloc_size[index] + offset); |
683 | int count, i; | |
daf9514f | 684 | |
1da177e4 LT |
685 | /* |
686 | * First, sync the memory before unmapping the entry | |
687 | */ | |
2bdba622 CH |
688 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) && |
689 | (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
690 | swiotlb_bounce(hwdev, tlb_addr, mapping_size, DMA_FROM_DEVICE); | |
1da177e4 LT |
691 | |
692 | /* | |
693 | * Return the buffer to the free list by setting the corresponding | |
af901ca1 | 694 | * entries to indicate the number of contiguous entries available. |
1da177e4 LT |
695 | * While returning the entries to the free list, we merge the entries |
696 | * with slots below and above the pool being returned. | |
697 | */ | |
698 | spin_lock_irqsave(&io_tlb_lock, flags); | |
ca10d0f8 CH |
699 | if (index + nslots < ALIGN(index + 1, IO_TLB_SEGSIZE)) |
700 | count = io_tlb_list[index + nslots]; | |
701 | else | |
702 | count = 0; | |
71602fe6 | 703 | |
ca10d0f8 CH |
704 | /* |
705 | * Step 1: return the slots to the free list, merging the slots with | |
706 | * superceeding slots | |
707 | */ | |
708 | for (i = index + nslots - 1; i >= index; i--) { | |
709 | io_tlb_list[i] = ++count; | |
710 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; | |
2973073a | 711 | io_tlb_alloc_size[i] = 0; |
1da177e4 | 712 | } |
ca10d0f8 CH |
713 | |
714 | /* | |
715 | * Step 2: merge the returned slots with the preceding slots, if | |
716 | * available (non zero) | |
717 | */ | |
718 | for (i = index - 1; | |
719 | io_tlb_offset(i) != IO_TLB_SEGSIZE - 1 && io_tlb_list[i]; | |
720 | i--) | |
721 | io_tlb_list[i] = ++count; | |
722 | io_tlb_used -= nslots; | |
1da177e4 LT |
723 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
724 | } | |
725 | ||
80808d27 CH |
726 | void swiotlb_sync_single_for_device(struct device *dev, phys_addr_t tlb_addr, |
727 | size_t size, enum dma_data_direction dir) | |
1da177e4 | 728 | { |
80808d27 CH |
729 | if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL) |
730 | swiotlb_bounce(dev, tlb_addr, size, DMA_TO_DEVICE); | |
731 | else | |
732 | BUG_ON(dir != DMA_FROM_DEVICE); | |
733 | } | |
734 | ||
735 | void swiotlb_sync_single_for_cpu(struct device *dev, phys_addr_t tlb_addr, | |
736 | size_t size, enum dma_data_direction dir) | |
737 | { | |
738 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) | |
739 | swiotlb_bounce(dev, tlb_addr, size, DMA_FROM_DEVICE); | |
740 | else | |
741 | BUG_ON(dir != DMA_TO_DEVICE); | |
1da177e4 LT |
742 | } |
743 | ||
55897af6 | 744 | /* |
4a47cbae | 745 | * Create a swiotlb mapping for the buffer at @paddr, and in case of DMAing |
55897af6 CH |
746 | * to the device copy the data into it as well. |
747 | */ | |
4a47cbae CH |
748 | dma_addr_t swiotlb_map(struct device *dev, phys_addr_t paddr, size_t size, |
749 | enum dma_data_direction dir, unsigned long attrs) | |
c4dae366 | 750 | { |
4a47cbae CH |
751 | phys_addr_t swiotlb_addr; |
752 | dma_addr_t dma_addr; | |
c4dae366 | 753 | |
4a47cbae CH |
754 | trace_swiotlb_bounced(dev, phys_to_dma(dev, paddr), size, |
755 | swiotlb_force); | |
c4dae366 | 756 | |
fc0021aa CH |
757 | swiotlb_addr = swiotlb_tbl_map_single(dev, paddr, size, size, dir, |
758 | attrs); | |
4a47cbae CH |
759 | if (swiotlb_addr == (phys_addr_t)DMA_MAPPING_ERROR) |
760 | return DMA_MAPPING_ERROR; | |
c4dae366 CH |
761 | |
762 | /* Ensure that the address returned is DMA'ble */ | |
5ceda740 | 763 | dma_addr = phys_to_dma_unencrypted(dev, swiotlb_addr); |
4a47cbae | 764 | if (unlikely(!dma_capable(dev, dma_addr, size, true))) { |
2973073a | 765 | swiotlb_tbl_unmap_single(dev, swiotlb_addr, size, dir, |
c4dae366 | 766 | attrs | DMA_ATTR_SKIP_CPU_SYNC); |
4a47cbae CH |
767 | dev_WARN_ONCE(dev, 1, |
768 | "swiotlb addr %pad+%zu overflow (mask %llx, bus limit %llx).\n", | |
769 | &dma_addr, size, *dev->dma_mask, dev->bus_dma_limit); | |
770 | return DMA_MAPPING_ERROR; | |
a4a4330d CH |
771 | } |
772 | ||
4a47cbae CH |
773 | if (!dev_is_dma_coherent(dev) && !(attrs & DMA_ATTR_SKIP_CPU_SYNC)) |
774 | arch_sync_dma_for_device(swiotlb_addr, size, dir); | |
775 | return dma_addr; | |
1da177e4 LT |
776 | } |
777 | ||
abe420bf JR |
778 | size_t swiotlb_max_mapping_size(struct device *dev) |
779 | { | |
b5d7ccb7 | 780 | return ((size_t)IO_TLB_SIZE) * IO_TLB_SEGSIZE; |
abe420bf | 781 | } |
492366f7 JR |
782 | |
783 | bool is_swiotlb_active(void) | |
784 | { | |
785 | /* | |
786 | * When SWIOTLB is initialized, even if io_tlb_start points to physical | |
787 | * address zero, io_tlb_end surely doesn't. | |
788 | */ | |
789 | return io_tlb_end != 0; | |
790 | } | |
45ba8d5d | 791 | |
71602fe6 DZ |
792 | #ifdef CONFIG_DEBUG_FS |
793 | ||
794 | static int __init swiotlb_create_debugfs(void) | |
795 | { | |
1be51474 | 796 | struct dentry *root; |
71602fe6 | 797 | |
1be51474 GKH |
798 | root = debugfs_create_dir("swiotlb", NULL); |
799 | debugfs_create_ulong("io_tlb_nslabs", 0400, root, &io_tlb_nslabs); | |
800 | debugfs_create_ulong("io_tlb_used", 0400, root, &io_tlb_used); | |
71602fe6 | 801 | return 0; |
71602fe6 DZ |
802 | } |
803 | ||
804 | late_initcall(swiotlb_create_debugfs); | |
805 | ||
806 | #endif |