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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Dynamic DMA mapping support. | |
3 | * | |
563aaf06 | 4 | * This implementation is a fallback for platforms that do not support |
1da177e4 LT |
5 | * I/O TLBs (aka DMA address translation hardware). |
6 | * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com> | |
7 | * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com> | |
8 | * Copyright (C) 2000, 2003 Hewlett-Packard Co | |
9 | * David Mosberger-Tang <davidm@hpl.hp.com> | |
10 | * | |
11 | * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API. | |
12 | * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid | |
13 | * unnecessary i-cache flushing. | |
569c8bf5 JL |
14 | * 04/07/.. ak Better overflow handling. Assorted fixes. |
15 | * 05/09/10 linville Add support for syncing ranges, support syncing for | |
16 | * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup. | |
fb05a379 | 17 | * 08/12/11 beckyb Add highmem support |
1da177e4 LT |
18 | */ |
19 | ||
7d63fb3a KC |
20 | #define pr_fmt(fmt) "software IO TLB: " fmt |
21 | ||
1da177e4 | 22 | #include <linux/cache.h> |
ea8c64ac | 23 | #include <linux/dma-direct.h> |
1da177e4 | 24 | #include <linux/mm.h> |
8bc3bcc9 | 25 | #include <linux/export.h> |
1da177e4 LT |
26 | #include <linux/spinlock.h> |
27 | #include <linux/string.h> | |
0016fdee | 28 | #include <linux/swiotlb.h> |
fb05a379 | 29 | #include <linux/pfn.h> |
1da177e4 LT |
30 | #include <linux/types.h> |
31 | #include <linux/ctype.h> | |
ef9b1893 | 32 | #include <linux/highmem.h> |
5a0e3ad6 | 33 | #include <linux/gfp.h> |
84be456f | 34 | #include <linux/scatterlist.h> |
c7753208 | 35 | #include <linux/mem_encrypt.h> |
e7de6c7c | 36 | #include <linux/set_memory.h> |
71602fe6 DZ |
37 | #ifdef CONFIG_DEBUG_FS |
38 | #include <linux/debugfs.h> | |
39 | #endif | |
1da177e4 LT |
40 | |
41 | #include <asm/io.h> | |
1da177e4 LT |
42 | #include <asm/dma.h> |
43 | ||
44 | #include <linux/init.h> | |
57c8a661 | 45 | #include <linux/memblock.h> |
a8522509 | 46 | #include <linux/iommu-helper.h> |
1da177e4 | 47 | |
ce5be5a1 | 48 | #define CREATE_TRACE_POINTS |
2b2b614d ZK |
49 | #include <trace/events/swiotlb.h> |
50 | ||
1da177e4 LT |
51 | #define OFFSET(val,align) ((unsigned long) \ |
52 | ( (val) & ( (align) - 1))) | |
53 | ||
0b9afede AW |
54 | #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT)) |
55 | ||
56 | /* | |
57 | * Minimum IO TLB size to bother booting with. Systems with mainly | |
58 | * 64bit capable cards will only lightly use the swiotlb. If we can't | |
59 | * allocate a contiguous 1MB, we're probably in trouble anyway. | |
60 | */ | |
61 | #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT) | |
62 | ||
ae7871be | 63 | enum swiotlb_force swiotlb_force; |
1da177e4 LT |
64 | |
65 | /* | |
bfc5501f KRW |
66 | * Used to do a quick range check in swiotlb_tbl_unmap_single and |
67 | * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this | |
1da177e4 LT |
68 | * API. |
69 | */ | |
55897af6 | 70 | phys_addr_t io_tlb_start, io_tlb_end; |
1da177e4 LT |
71 | |
72 | /* | |
b595076a | 73 | * The number of IO TLB blocks (in groups of 64) between io_tlb_start and |
1da177e4 LT |
74 | * io_tlb_end. This is command line adjustable via setup_io_tlb_npages. |
75 | */ | |
76 | static unsigned long io_tlb_nslabs; | |
77 | ||
71602fe6 DZ |
78 | /* |
79 | * The number of used IO TLB block | |
80 | */ | |
81 | static unsigned long io_tlb_used; | |
82 | ||
1da177e4 LT |
83 | /* |
84 | * This is a free list describing the number of free entries available from | |
85 | * each index | |
86 | */ | |
87 | static unsigned int *io_tlb_list; | |
88 | static unsigned int io_tlb_index; | |
89 | ||
7453c549 KRW |
90 | /* |
91 | * Max segment that we can provide which (if pages are contingous) will | |
92 | * not be bounced (unless SWIOTLB_FORCE is set). | |
93 | */ | |
94 | unsigned int max_segment; | |
95 | ||
1da177e4 LT |
96 | /* |
97 | * We need to save away the original address corresponding to a mapped entry | |
98 | * for the sync operations. | |
99 | */ | |
8e0629c1 | 100 | #define INVALID_PHYS_ADDR (~(phys_addr_t)0) |
bc40ac66 | 101 | static phys_addr_t *io_tlb_orig_addr; |
1da177e4 LT |
102 | |
103 | /* | |
104 | * Protect the above data structures in the map and unmap calls | |
105 | */ | |
106 | static DEFINE_SPINLOCK(io_tlb_lock); | |
107 | ||
5740afdb FT |
108 | static int late_alloc; |
109 | ||
1da177e4 LT |
110 | static int __init |
111 | setup_io_tlb_npages(char *str) | |
112 | { | |
113 | if (isdigit(*str)) { | |
e8579e72 | 114 | io_tlb_nslabs = simple_strtoul(str, &str, 0); |
1da177e4 LT |
115 | /* avoid tail segment of size < IO_TLB_SEGSIZE */ |
116 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
117 | } | |
118 | if (*str == ',') | |
119 | ++str; | |
fff5d992 | 120 | if (!strcmp(str, "force")) { |
ae7871be | 121 | swiotlb_force = SWIOTLB_FORCE; |
fff5d992 GU |
122 | } else if (!strcmp(str, "noforce")) { |
123 | swiotlb_force = SWIOTLB_NO_FORCE; | |
124 | io_tlb_nslabs = 1; | |
125 | } | |
b18485e7 | 126 | |
c729de8f | 127 | return 0; |
1da177e4 | 128 | } |
c729de8f | 129 | early_param("swiotlb", setup_io_tlb_npages); |
1da177e4 | 130 | |
f21ffe9f | 131 | unsigned long swiotlb_nr_tbl(void) |
5f98ecdb FT |
132 | { |
133 | return io_tlb_nslabs; | |
134 | } | |
f21ffe9f | 135 | EXPORT_SYMBOL_GPL(swiotlb_nr_tbl); |
c729de8f | 136 | |
7453c549 KRW |
137 | unsigned int swiotlb_max_segment(void) |
138 | { | |
139 | return max_segment; | |
140 | } | |
141 | EXPORT_SYMBOL_GPL(swiotlb_max_segment); | |
142 | ||
143 | void swiotlb_set_max_segment(unsigned int val) | |
144 | { | |
145 | if (swiotlb_force == SWIOTLB_FORCE) | |
146 | max_segment = 1; | |
147 | else | |
148 | max_segment = rounddown(val, PAGE_SIZE); | |
149 | } | |
150 | ||
c729de8f YL |
151 | /* default to 64MB */ |
152 | #define IO_TLB_DEFAULT_SIZE (64UL<<20) | |
153 | unsigned long swiotlb_size_or_default(void) | |
154 | { | |
155 | unsigned long size; | |
156 | ||
157 | size = io_tlb_nslabs << IO_TLB_SHIFT; | |
158 | ||
159 | return size ? size : (IO_TLB_DEFAULT_SIZE); | |
160 | } | |
161 | ||
ac2cbab2 YL |
162 | static bool no_iotlb_memory; |
163 | ||
ad32e8cb | 164 | void swiotlb_print_info(void) |
2e5b2b86 | 165 | { |
ad32e8cb | 166 | unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
2e5b2b86 | 167 | |
ac2cbab2 | 168 | if (no_iotlb_memory) { |
7d63fb3a | 169 | pr_warn("No low mem\n"); |
ac2cbab2 YL |
170 | return; |
171 | } | |
172 | ||
7d63fb3a | 173 | pr_info("mapped [mem %#010llx-%#010llx] (%luMB)\n", |
ff7204a7 | 174 | (unsigned long long)io_tlb_start, |
c40dba06 | 175 | (unsigned long long)io_tlb_end, |
7d63fb3a | 176 | bytes >> 20); |
2e5b2b86 IC |
177 | } |
178 | ||
c7753208 TL |
179 | /* |
180 | * Early SWIOTLB allocation may be too early to allow an architecture to | |
181 | * perform the desired operations. This function allows the architecture to | |
182 | * call SWIOTLB when the operations are possible. It needs to be called | |
183 | * before the SWIOTLB memory is used. | |
184 | */ | |
185 | void __init swiotlb_update_mem_attributes(void) | |
186 | { | |
187 | void *vaddr; | |
188 | unsigned long bytes; | |
189 | ||
190 | if (no_iotlb_memory || late_alloc) | |
191 | return; | |
192 | ||
193 | vaddr = phys_to_virt(io_tlb_start); | |
194 | bytes = PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT); | |
e7de6c7c | 195 | set_memory_decrypted((unsigned long)vaddr, bytes >> PAGE_SHIFT); |
c7753208 | 196 | memset(vaddr, 0, bytes); |
c7753208 TL |
197 | } |
198 | ||
ac2cbab2 | 199 | int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose) |
1da177e4 | 200 | { |
563aaf06 | 201 | unsigned long i, bytes; |
1da177e4 | 202 | |
abbceff7 | 203 | bytes = nslabs << IO_TLB_SHIFT; |
1da177e4 | 204 | |
abbceff7 | 205 | io_tlb_nslabs = nslabs; |
ff7204a7 AD |
206 | io_tlb_start = __pa(tlb); |
207 | io_tlb_end = io_tlb_start + bytes; | |
1da177e4 LT |
208 | |
209 | /* | |
210 | * Allocate and initialize the free list array. This array is used | |
211 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
212 | * between io_tlb_start and io_tlb_end. | |
213 | */ | |
eb31d559 | 214 | io_tlb_list = memblock_alloc( |
457ff1de SS |
215 | PAGE_ALIGN(io_tlb_nslabs * sizeof(int)), |
216 | PAGE_SIZE); | |
eb31d559 | 217 | io_tlb_orig_addr = memblock_alloc( |
457ff1de SS |
218 | PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)), |
219 | PAGE_SIZE); | |
8e0629c1 JB |
220 | for (i = 0; i < io_tlb_nslabs; i++) { |
221 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
222 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; | |
223 | } | |
224 | io_tlb_index = 0; | |
1da177e4 | 225 | |
ad32e8cb FT |
226 | if (verbose) |
227 | swiotlb_print_info(); | |
ac2cbab2 | 228 | |
7453c549 | 229 | swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT); |
ac2cbab2 | 230 | return 0; |
1da177e4 LT |
231 | } |
232 | ||
abbceff7 FT |
233 | /* |
234 | * Statically reserve bounce buffer space and initialize bounce buffer data | |
235 | * structures for the software IO TLB used to implement the DMA API. | |
236 | */ | |
ac2cbab2 YL |
237 | void __init |
238 | swiotlb_init(int verbose) | |
abbceff7 | 239 | { |
c729de8f | 240 | size_t default_size = IO_TLB_DEFAULT_SIZE; |
ff7204a7 | 241 | unsigned char *vstart; |
abbceff7 FT |
242 | unsigned long bytes; |
243 | ||
244 | if (!io_tlb_nslabs) { | |
245 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
246 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
247 | } | |
248 | ||
249 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; | |
250 | ||
ac2cbab2 | 251 | /* Get IO TLB memory from the low pages */ |
eb31d559 | 252 | vstart = memblock_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE); |
ac2cbab2 YL |
253 | if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose)) |
254 | return; | |
abbceff7 | 255 | |
ac2cbab2 | 256 | if (io_tlb_start) |
457ff1de SS |
257 | memblock_free_early(io_tlb_start, |
258 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); | |
7d63fb3a | 259 | pr_warn("Cannot allocate buffer"); |
ac2cbab2 | 260 | no_iotlb_memory = true; |
1da177e4 LT |
261 | } |
262 | ||
0b9afede AW |
263 | /* |
264 | * Systems with larger DMA zones (those that don't support ISA) can | |
265 | * initialize the swiotlb later using the slab allocator if needed. | |
266 | * This should be just like above, but with some error catching. | |
267 | */ | |
268 | int | |
563aaf06 | 269 | swiotlb_late_init_with_default_size(size_t default_size) |
0b9afede | 270 | { |
74838b75 | 271 | unsigned long bytes, req_nslabs = io_tlb_nslabs; |
ff7204a7 | 272 | unsigned char *vstart = NULL; |
0b9afede | 273 | unsigned int order; |
74838b75 | 274 | int rc = 0; |
0b9afede AW |
275 | |
276 | if (!io_tlb_nslabs) { | |
277 | io_tlb_nslabs = (default_size >> IO_TLB_SHIFT); | |
278 | io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE); | |
279 | } | |
280 | ||
281 | /* | |
282 | * Get IO TLB memory from the low pages | |
283 | */ | |
563aaf06 | 284 | order = get_order(io_tlb_nslabs << IO_TLB_SHIFT); |
0b9afede | 285 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
563aaf06 | 286 | bytes = io_tlb_nslabs << IO_TLB_SHIFT; |
0b9afede AW |
287 | |
288 | while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) { | |
ff7204a7 AD |
289 | vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, |
290 | order); | |
291 | if (vstart) | |
0b9afede AW |
292 | break; |
293 | order--; | |
294 | } | |
295 | ||
ff7204a7 | 296 | if (!vstart) { |
74838b75 KRW |
297 | io_tlb_nslabs = req_nslabs; |
298 | return -ENOMEM; | |
299 | } | |
563aaf06 | 300 | if (order != get_order(bytes)) { |
7d63fb3a KC |
301 | pr_warn("only able to allocate %ld MB\n", |
302 | (PAGE_SIZE << order) >> 20); | |
0b9afede AW |
303 | io_tlb_nslabs = SLABS_PER_PAGE << order; |
304 | } | |
ff7204a7 | 305 | rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs); |
74838b75 | 306 | if (rc) |
ff7204a7 | 307 | free_pages((unsigned long)vstart, order); |
7453c549 | 308 | |
74838b75 KRW |
309 | return rc; |
310 | } | |
311 | ||
312 | int | |
313 | swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs) | |
314 | { | |
315 | unsigned long i, bytes; | |
316 | ||
317 | bytes = nslabs << IO_TLB_SHIFT; | |
318 | ||
319 | io_tlb_nslabs = nslabs; | |
ff7204a7 AD |
320 | io_tlb_start = virt_to_phys(tlb); |
321 | io_tlb_end = io_tlb_start + bytes; | |
74838b75 | 322 | |
e7de6c7c | 323 | set_memory_decrypted((unsigned long)tlb, bytes >> PAGE_SHIFT); |
ff7204a7 | 324 | memset(tlb, 0, bytes); |
0b9afede AW |
325 | |
326 | /* | |
327 | * Allocate and initialize the free list array. This array is used | |
328 | * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE | |
329 | * between io_tlb_start and io_tlb_end. | |
330 | */ | |
331 | io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL, | |
332 | get_order(io_tlb_nslabs * sizeof(int))); | |
333 | if (!io_tlb_list) | |
ee3f6ba8 | 334 | goto cleanup3; |
0b9afede | 335 | |
bc40ac66 BB |
336 | io_tlb_orig_addr = (phys_addr_t *) |
337 | __get_free_pages(GFP_KERNEL, | |
338 | get_order(io_tlb_nslabs * | |
339 | sizeof(phys_addr_t))); | |
0b9afede | 340 | if (!io_tlb_orig_addr) |
ee3f6ba8 | 341 | goto cleanup4; |
0b9afede | 342 | |
8e0629c1 JB |
343 | for (i = 0; i < io_tlb_nslabs; i++) { |
344 | io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE); | |
345 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; | |
346 | } | |
347 | io_tlb_index = 0; | |
0b9afede | 348 | |
ad32e8cb | 349 | swiotlb_print_info(); |
0b9afede | 350 | |
5740afdb FT |
351 | late_alloc = 1; |
352 | ||
7453c549 KRW |
353 | swiotlb_set_max_segment(io_tlb_nslabs << IO_TLB_SHIFT); |
354 | ||
0b9afede AW |
355 | return 0; |
356 | ||
357 | cleanup4: | |
25667d67 TL |
358 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * |
359 | sizeof(int))); | |
0b9afede | 360 | io_tlb_list = NULL; |
ee3f6ba8 | 361 | cleanup3: |
c40dba06 | 362 | io_tlb_end = 0; |
ff7204a7 | 363 | io_tlb_start = 0; |
74838b75 | 364 | io_tlb_nslabs = 0; |
7453c549 | 365 | max_segment = 0; |
0b9afede AW |
366 | return -ENOMEM; |
367 | } | |
368 | ||
7f2c8bbd | 369 | void __init swiotlb_exit(void) |
5740afdb | 370 | { |
ee3f6ba8 | 371 | if (!io_tlb_orig_addr) |
5740afdb FT |
372 | return; |
373 | ||
374 | if (late_alloc) { | |
5740afdb FT |
375 | free_pages((unsigned long)io_tlb_orig_addr, |
376 | get_order(io_tlb_nslabs * sizeof(phys_addr_t))); | |
377 | free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs * | |
378 | sizeof(int))); | |
ff7204a7 | 379 | free_pages((unsigned long)phys_to_virt(io_tlb_start), |
5740afdb FT |
380 | get_order(io_tlb_nslabs << IO_TLB_SHIFT)); |
381 | } else { | |
457ff1de SS |
382 | memblock_free_late(__pa(io_tlb_orig_addr), |
383 | PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t))); | |
384 | memblock_free_late(__pa(io_tlb_list), | |
385 | PAGE_ALIGN(io_tlb_nslabs * sizeof(int))); | |
386 | memblock_free_late(io_tlb_start, | |
387 | PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT)); | |
5740afdb | 388 | } |
227a76b6 CH |
389 | io_tlb_start = 0; |
390 | io_tlb_end = 0; | |
f21ffe9f | 391 | io_tlb_nslabs = 0; |
7453c549 | 392 | max_segment = 0; |
5740afdb FT |
393 | } |
394 | ||
fb05a379 | 395 | /* |
6442ca2a | 396 | * Bounce: copy the swiotlb buffer from or back to the original dma location |
fb05a379 | 397 | */ |
af51a9f1 AD |
398 | static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr, |
399 | size_t size, enum dma_data_direction dir) | |
fb05a379 | 400 | { |
af51a9f1 AD |
401 | unsigned long pfn = PFN_DOWN(orig_addr); |
402 | unsigned char *vaddr = phys_to_virt(tlb_addr); | |
fb05a379 BB |
403 | |
404 | if (PageHighMem(pfn_to_page(pfn))) { | |
405 | /* The buffer does not have a mapping. Map it in and copy */ | |
af51a9f1 | 406 | unsigned int offset = orig_addr & ~PAGE_MASK; |
fb05a379 BB |
407 | char *buffer; |
408 | unsigned int sz = 0; | |
409 | unsigned long flags; | |
410 | ||
411 | while (size) { | |
67131ad0 | 412 | sz = min_t(size_t, PAGE_SIZE - offset, size); |
fb05a379 BB |
413 | |
414 | local_irq_save(flags); | |
c3eede8e | 415 | buffer = kmap_atomic(pfn_to_page(pfn)); |
fb05a379 | 416 | if (dir == DMA_TO_DEVICE) |
af51a9f1 | 417 | memcpy(vaddr, buffer + offset, sz); |
ef9b1893 | 418 | else |
af51a9f1 | 419 | memcpy(buffer + offset, vaddr, sz); |
c3eede8e | 420 | kunmap_atomic(buffer); |
ef9b1893 | 421 | local_irq_restore(flags); |
fb05a379 BB |
422 | |
423 | size -= sz; | |
424 | pfn++; | |
af51a9f1 | 425 | vaddr += sz; |
fb05a379 | 426 | offset = 0; |
ef9b1893 | 427 | } |
af51a9f1 AD |
428 | } else if (dir == DMA_TO_DEVICE) { |
429 | memcpy(vaddr, phys_to_virt(orig_addr), size); | |
ef9b1893 | 430 | } else { |
af51a9f1 | 431 | memcpy(phys_to_virt(orig_addr), vaddr, size); |
ef9b1893 | 432 | } |
1b548f66 JF |
433 | } |
434 | ||
e05ed4d1 AD |
435 | phys_addr_t swiotlb_tbl_map_single(struct device *hwdev, |
436 | dma_addr_t tbl_dma_addr, | |
437 | phys_addr_t orig_addr, size_t size, | |
0443fa00 AD |
438 | enum dma_data_direction dir, |
439 | unsigned long attrs) | |
1da177e4 LT |
440 | { |
441 | unsigned long flags; | |
e05ed4d1 | 442 | phys_addr_t tlb_addr; |
1da177e4 LT |
443 | unsigned int nslots, stride, index, wrap; |
444 | int i; | |
681cc5cd FT |
445 | unsigned long mask; |
446 | unsigned long offset_slots; | |
447 | unsigned long max_slots; | |
448 | ||
ac2cbab2 YL |
449 | if (no_iotlb_memory) |
450 | panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer"); | |
451 | ||
d7b417fa TL |
452 | if (mem_encrypt_active()) |
453 | pr_warn_once("%s is active and system is using DMA bounce buffers\n", | |
454 | sme_active() ? "SME" : "SEV"); | |
648babb7 | 455 | |
681cc5cd | 456 | mask = dma_get_seg_boundary(hwdev); |
681cc5cd | 457 | |
eb605a57 FT |
458 | tbl_dma_addr &= mask; |
459 | ||
460 | offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
a5ddde4a IC |
461 | |
462 | /* | |
463 | * Carefully handle integer overflow which can occur when mask == ~0UL. | |
464 | */ | |
b15a3891 JB |
465 | max_slots = mask + 1 |
466 | ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT | |
467 | : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT); | |
1da177e4 LT |
468 | |
469 | /* | |
602d9858 NY |
470 | * For mappings greater than or equal to a page, we limit the stride |
471 | * (and hence alignment) to a page size. | |
1da177e4 LT |
472 | */ |
473 | nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
602d9858 | 474 | if (size >= PAGE_SIZE) |
1da177e4 LT |
475 | stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT)); |
476 | else | |
477 | stride = 1; | |
478 | ||
34814545 | 479 | BUG_ON(!nslots); |
1da177e4 LT |
480 | |
481 | /* | |
482 | * Find suitable number of IO TLB entries size that will fit this | |
483 | * request and allocate a buffer from that IO TLB pool. | |
484 | */ | |
485 | spin_lock_irqsave(&io_tlb_lock, flags); | |
60513ed0 DZ |
486 | |
487 | if (unlikely(nslots > io_tlb_nslabs - io_tlb_used)) | |
488 | goto not_found; | |
489 | ||
a7133a15 AM |
490 | index = ALIGN(io_tlb_index, stride); |
491 | if (index >= io_tlb_nslabs) | |
492 | index = 0; | |
493 | wrap = index; | |
494 | ||
495 | do { | |
a8522509 FT |
496 | while (iommu_is_span_boundary(index, nslots, offset_slots, |
497 | max_slots)) { | |
b15a3891 JB |
498 | index += stride; |
499 | if (index >= io_tlb_nslabs) | |
500 | index = 0; | |
a7133a15 AM |
501 | if (index == wrap) |
502 | goto not_found; | |
503 | } | |
504 | ||
505 | /* | |
506 | * If we find a slot that indicates we have 'nslots' number of | |
507 | * contiguous buffers, we allocate the buffers from that slot | |
508 | * and mark the entries as '0' indicating unavailable. | |
509 | */ | |
510 | if (io_tlb_list[index] >= nslots) { | |
511 | int count = 0; | |
512 | ||
513 | for (i = index; i < (int) (index + nslots); i++) | |
514 | io_tlb_list[i] = 0; | |
515 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--) | |
516 | io_tlb_list[i] = ++count; | |
e05ed4d1 | 517 | tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT); |
1da177e4 | 518 | |
a7133a15 AM |
519 | /* |
520 | * Update the indices to avoid searching in the next | |
521 | * round. | |
522 | */ | |
523 | io_tlb_index = ((index + nslots) < io_tlb_nslabs | |
524 | ? (index + nslots) : 0); | |
525 | ||
526 | goto found; | |
527 | } | |
528 | index += stride; | |
529 | if (index >= io_tlb_nslabs) | |
530 | index = 0; | |
531 | } while (index != wrap); | |
532 | ||
533 | not_found: | |
534 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
d0bc0c2a | 535 | if (!(attrs & DMA_ATTR_NO_WARN) && printk_ratelimit()) |
0cb637bf | 536 | dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size); |
b907e205 | 537 | return DMA_MAPPING_ERROR; |
a7133a15 | 538 | found: |
71602fe6 | 539 | io_tlb_used += nslots; |
1da177e4 LT |
540 | spin_unlock_irqrestore(&io_tlb_lock, flags); |
541 | ||
542 | /* | |
543 | * Save away the mapping from the original address to the DMA address. | |
544 | * This is needed when we sync the memory. Then we sync the buffer if | |
545 | * needed. | |
546 | */ | |
bc40ac66 | 547 | for (i = 0; i < nslots; i++) |
e05ed4d1 | 548 | io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT); |
0443fa00 AD |
549 | if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) && |
550 | (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
af51a9f1 | 551 | swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE); |
1da177e4 | 552 | |
e05ed4d1 | 553 | return tlb_addr; |
1da177e4 LT |
554 | } |
555 | ||
556 | /* | |
d0c8ba40 | 557 | * tlb_addr is the physical address of the bounce buffer to unmap. |
1da177e4 | 558 | */ |
61ca08c3 | 559 | void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr, |
0443fa00 AD |
560 | size_t size, enum dma_data_direction dir, |
561 | unsigned long attrs) | |
1da177e4 LT |
562 | { |
563 | unsigned long flags; | |
564 | int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT; | |
61ca08c3 AD |
565 | int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; |
566 | phys_addr_t orig_addr = io_tlb_orig_addr[index]; | |
1da177e4 LT |
567 | |
568 | /* | |
569 | * First, sync the memory before unmapping the entry | |
570 | */ | |
8e0629c1 | 571 | if (orig_addr != INVALID_PHYS_ADDR && |
0443fa00 | 572 | !(attrs & DMA_ATTR_SKIP_CPU_SYNC) && |
8e0629c1 | 573 | ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))) |
af51a9f1 | 574 | swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE); |
1da177e4 LT |
575 | |
576 | /* | |
577 | * Return the buffer to the free list by setting the corresponding | |
af901ca1 | 578 | * entries to indicate the number of contiguous entries available. |
1da177e4 LT |
579 | * While returning the entries to the free list, we merge the entries |
580 | * with slots below and above the pool being returned. | |
581 | */ | |
582 | spin_lock_irqsave(&io_tlb_lock, flags); | |
583 | { | |
584 | count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ? | |
585 | io_tlb_list[index + nslots] : 0); | |
586 | /* | |
587 | * Step 1: return the slots to the free list, merging the | |
588 | * slots with superceeding slots | |
589 | */ | |
8e0629c1 | 590 | for (i = index + nslots - 1; i >= index; i--) { |
1da177e4 | 591 | io_tlb_list[i] = ++count; |
8e0629c1 JB |
592 | io_tlb_orig_addr[i] = INVALID_PHYS_ADDR; |
593 | } | |
1da177e4 LT |
594 | /* |
595 | * Step 2: merge the returned slots with the preceding slots, | |
596 | * if available (non zero) | |
597 | */ | |
598 | for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--) | |
599 | io_tlb_list[i] = ++count; | |
71602fe6 DZ |
600 | |
601 | io_tlb_used -= nslots; | |
1da177e4 LT |
602 | } |
603 | spin_unlock_irqrestore(&io_tlb_lock, flags); | |
604 | } | |
605 | ||
fbfda893 AD |
606 | void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr, |
607 | size_t size, enum dma_data_direction dir, | |
608 | enum dma_sync_target target) | |
1da177e4 | 609 | { |
fbfda893 AD |
610 | int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT; |
611 | phys_addr_t orig_addr = io_tlb_orig_addr[index]; | |
bc40ac66 | 612 | |
8e0629c1 JB |
613 | if (orig_addr == INVALID_PHYS_ADDR) |
614 | return; | |
fbfda893 | 615 | orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1); |
df336d1c | 616 | |
de69e0f0 JL |
617 | switch (target) { |
618 | case SYNC_FOR_CPU: | |
619 | if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
af51a9f1 | 620 | swiotlb_bounce(orig_addr, tlb_addr, |
fbfda893 | 621 | size, DMA_FROM_DEVICE); |
34814545 ES |
622 | else |
623 | BUG_ON(dir != DMA_TO_DEVICE); | |
de69e0f0 JL |
624 | break; |
625 | case SYNC_FOR_DEVICE: | |
626 | if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)) | |
af51a9f1 | 627 | swiotlb_bounce(orig_addr, tlb_addr, |
fbfda893 | 628 | size, DMA_TO_DEVICE); |
34814545 ES |
629 | else |
630 | BUG_ON(dir != DMA_FROM_DEVICE); | |
de69e0f0 JL |
631 | break; |
632 | default: | |
1da177e4 | 633 | BUG(); |
de69e0f0 | 634 | } |
1da177e4 LT |
635 | } |
636 | ||
55897af6 CH |
637 | /* |
638 | * Create a swiotlb mapping for the buffer at @phys, and in case of DMAing | |
639 | * to the device copy the data into it as well. | |
640 | */ | |
641 | bool swiotlb_map(struct device *dev, phys_addr_t *phys, dma_addr_t *dma_addr, | |
c4dae366 CH |
642 | size_t size, enum dma_data_direction dir, unsigned long attrs) |
643 | { | |
55897af6 | 644 | trace_swiotlb_bounced(dev, *dma_addr, size, swiotlb_force); |
c4dae366 CH |
645 | |
646 | if (unlikely(swiotlb_force == SWIOTLB_NO_FORCE)) { | |
647 | dev_warn_ratelimited(dev, | |
648 | "Cannot do DMA to address %pa\n", phys); | |
55897af6 | 649 | return false; |
c4dae366 CH |
650 | } |
651 | ||
652 | /* Oh well, have to allocate and map a bounce buffer. */ | |
653 | *phys = swiotlb_tbl_map_single(dev, __phys_to_dma(dev, io_tlb_start), | |
654 | *phys, size, dir, attrs); | |
b907e205 | 655 | if (*phys == DMA_MAPPING_ERROR) |
55897af6 | 656 | return false; |
c4dae366 CH |
657 | |
658 | /* Ensure that the address returned is DMA'ble */ | |
55897af6 CH |
659 | *dma_addr = __phys_to_dma(dev, *phys); |
660 | if (unlikely(!dma_capable(dev, *dma_addr, size))) { | |
c4dae366 CH |
661 | swiotlb_tbl_unmap_single(dev, *phys, size, dir, |
662 | attrs | DMA_ATTR_SKIP_CPU_SYNC); | |
55897af6 | 663 | return false; |
a4a4330d CH |
664 | } |
665 | ||
55897af6 | 666 | return true; |
1da177e4 LT |
667 | } |
668 | ||
abe420bf JR |
669 | size_t swiotlb_max_mapping_size(struct device *dev) |
670 | { | |
671 | return ((size_t)1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE; | |
672 | } | |
492366f7 JR |
673 | |
674 | bool is_swiotlb_active(void) | |
675 | { | |
676 | /* | |
677 | * When SWIOTLB is initialized, even if io_tlb_start points to physical | |
678 | * address zero, io_tlb_end surely doesn't. | |
679 | */ | |
680 | return io_tlb_end != 0; | |
681 | } | |
45ba8d5d | 682 | |
71602fe6 DZ |
683 | #ifdef CONFIG_DEBUG_FS |
684 | ||
685 | static int __init swiotlb_create_debugfs(void) | |
686 | { | |
22cb45d7 | 687 | struct dentry *d_swiotlb_usage; |
71602fe6 DZ |
688 | struct dentry *ent; |
689 | ||
690 | d_swiotlb_usage = debugfs_create_dir("swiotlb", NULL); | |
691 | ||
692 | if (!d_swiotlb_usage) | |
693 | return -ENOMEM; | |
694 | ||
695 | ent = debugfs_create_ulong("io_tlb_nslabs", 0400, | |
696 | d_swiotlb_usage, &io_tlb_nslabs); | |
697 | if (!ent) | |
698 | goto fail; | |
699 | ||
700 | ent = debugfs_create_ulong("io_tlb_used", 0400, | |
701 | d_swiotlb_usage, &io_tlb_used); | |
702 | if (!ent) | |
703 | goto fail; | |
704 | ||
705 | return 0; | |
706 | ||
707 | fail: | |
708 | debugfs_remove_recursive(d_swiotlb_usage); | |
709 | return -ENOMEM; | |
710 | } | |
711 | ||
712 | late_initcall(swiotlb_create_debugfs); | |
713 | ||
714 | #endif |