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Commit | Line | Data |
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dd87eb3a TG |
1 | /* |
2 | * linux/kernel/irq/chip.c | |
3 | * | |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar | |
5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
6 | * | |
7 | * This file contains the core interrupt handling code, for irq-chip | |
8 | * based architectures. | |
9 | * | |
10 | * Detailed information is available in Documentation/DocBook/genericirq | |
11 | */ | |
12 | ||
13 | #include <linux/irq.h> | |
7fe3730d | 14 | #include <linux/msi.h> |
dd87eb3a TG |
15 | #include <linux/module.h> |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel_stat.h> | |
18 | ||
19 | #include "internals.h" | |
20 | ||
3a16d713 EB |
21 | /** |
22 | * dynamic_irq_init - initialize a dynamically allocated irq | |
23 | * @irq: irq number to initialize | |
24 | */ | |
25 | void dynamic_irq_init(unsigned int irq) | |
26 | { | |
d3c60047 | 27 | struct irq_desc *desc = irq_to_desc(irq); |
3a16d713 EB |
28 | unsigned long flags; |
29 | ||
7d94f7ca | 30 | if (!desc) { |
261c40c1 | 31 | WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq); |
3a16d713 EB |
32 | return; |
33 | } | |
34 | ||
35 | /* Ensure we don't have left over values from a previous use of this irq */ | |
3a16d713 EB |
36 | spin_lock_irqsave(&desc->lock, flags); |
37 | desc->status = IRQ_DISABLED; | |
38 | desc->chip = &no_irq_chip; | |
39 | desc->handle_irq = handle_bad_irq; | |
40 | desc->depth = 1; | |
5b912c10 | 41 | desc->msi_desc = NULL; |
3a16d713 EB |
42 | desc->handler_data = NULL; |
43 | desc->chip_data = NULL; | |
44 | desc->action = NULL; | |
45 | desc->irq_count = 0; | |
46 | desc->irqs_unhandled = 0; | |
47 | #ifdef CONFIG_SMP | |
0de26520 | 48 | cpumask_setall(&desc->affinity); |
3a16d713 EB |
49 | #endif |
50 | spin_unlock_irqrestore(&desc->lock, flags); | |
51 | } | |
52 | ||
53 | /** | |
54 | * dynamic_irq_cleanup - cleanup a dynamically allocated irq | |
55 | * @irq: irq number to initialize | |
56 | */ | |
57 | void dynamic_irq_cleanup(unsigned int irq) | |
58 | { | |
d3c60047 | 59 | struct irq_desc *desc = irq_to_desc(irq); |
3a16d713 EB |
60 | unsigned long flags; |
61 | ||
7d94f7ca | 62 | if (!desc) { |
261c40c1 | 63 | WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq); |
3a16d713 EB |
64 | return; |
65 | } | |
66 | ||
3a16d713 | 67 | spin_lock_irqsave(&desc->lock, flags); |
1f80025e EB |
68 | if (desc->action) { |
69 | spin_unlock_irqrestore(&desc->lock, flags); | |
261c40c1 | 70 | WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n", |
1f80025e | 71 | irq); |
1f80025e EB |
72 | return; |
73 | } | |
5b912c10 EB |
74 | desc->msi_desc = NULL; |
75 | desc->handler_data = NULL; | |
76 | desc->chip_data = NULL; | |
3a16d713 EB |
77 | desc->handle_irq = handle_bad_irq; |
78 | desc->chip = &no_irq_chip; | |
b6f3b780 | 79 | desc->name = NULL; |
3a16d713 EB |
80 | spin_unlock_irqrestore(&desc->lock, flags); |
81 | } | |
82 | ||
83 | ||
dd87eb3a TG |
84 | /** |
85 | * set_irq_chip - set the irq chip for an irq | |
86 | * @irq: irq number | |
87 | * @chip: pointer to irq chip description structure | |
88 | */ | |
89 | int set_irq_chip(unsigned int irq, struct irq_chip *chip) | |
90 | { | |
d3c60047 | 91 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
92 | unsigned long flags; |
93 | ||
7d94f7ca | 94 | if (!desc) { |
261c40c1 | 95 | WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq); |
dd87eb3a TG |
96 | return -EINVAL; |
97 | } | |
98 | ||
99 | if (!chip) | |
100 | chip = &no_irq_chip; | |
101 | ||
dd87eb3a TG |
102 | spin_lock_irqsave(&desc->lock, flags); |
103 | irq_chip_set_defaults(chip); | |
104 | desc->chip = chip; | |
dd87eb3a TG |
105 | spin_unlock_irqrestore(&desc->lock, flags); |
106 | ||
107 | return 0; | |
108 | } | |
109 | EXPORT_SYMBOL(set_irq_chip); | |
110 | ||
111 | /** | |
0c5d1eb7 | 112 | * set_irq_type - set the irq trigger type for an irq |
dd87eb3a | 113 | * @irq: irq number |
0c5d1eb7 | 114 | * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h |
dd87eb3a TG |
115 | */ |
116 | int set_irq_type(unsigned int irq, unsigned int type) | |
117 | { | |
d3c60047 | 118 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
119 | unsigned long flags; |
120 | int ret = -ENXIO; | |
121 | ||
7d94f7ca | 122 | if (!desc) { |
dd87eb3a TG |
123 | printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq); |
124 | return -ENODEV; | |
125 | } | |
126 | ||
0c5d1eb7 DB |
127 | if (type == IRQ_TYPE_NONE) |
128 | return 0; | |
129 | ||
130 | spin_lock_irqsave(&desc->lock, flags); | |
0b3682ba | 131 | ret = __irq_set_trigger(desc, irq, type); |
0c5d1eb7 | 132 | spin_unlock_irqrestore(&desc->lock, flags); |
dd87eb3a TG |
133 | return ret; |
134 | } | |
135 | EXPORT_SYMBOL(set_irq_type); | |
136 | ||
137 | /** | |
138 | * set_irq_data - set irq type data for an irq | |
139 | * @irq: Interrupt number | |
140 | * @data: Pointer to interrupt specific data | |
141 | * | |
142 | * Set the hardware irq controller data for an irq | |
143 | */ | |
144 | int set_irq_data(unsigned int irq, void *data) | |
145 | { | |
d3c60047 | 146 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
147 | unsigned long flags; |
148 | ||
7d94f7ca | 149 | if (!desc) { |
dd87eb3a TG |
150 | printk(KERN_ERR |
151 | "Trying to install controller data for IRQ%d\n", irq); | |
152 | return -EINVAL; | |
153 | } | |
154 | ||
dd87eb3a TG |
155 | spin_lock_irqsave(&desc->lock, flags); |
156 | desc->handler_data = data; | |
157 | spin_unlock_irqrestore(&desc->lock, flags); | |
158 | return 0; | |
159 | } | |
160 | EXPORT_SYMBOL(set_irq_data); | |
161 | ||
5b912c10 EB |
162 | /** |
163 | * set_irq_data - set irq type data for an irq | |
164 | * @irq: Interrupt number | |
472900b8 | 165 | * @entry: Pointer to MSI descriptor data |
5b912c10 EB |
166 | * |
167 | * Set the hardware irq controller data for an irq | |
168 | */ | |
169 | int set_irq_msi(unsigned int irq, struct msi_desc *entry) | |
170 | { | |
d3c60047 | 171 | struct irq_desc *desc = irq_to_desc(irq); |
5b912c10 EB |
172 | unsigned long flags; |
173 | ||
7d94f7ca | 174 | if (!desc) { |
5b912c10 EB |
175 | printk(KERN_ERR |
176 | "Trying to install msi data for IRQ%d\n", irq); | |
177 | return -EINVAL; | |
178 | } | |
7d94f7ca | 179 | |
5b912c10 EB |
180 | spin_lock_irqsave(&desc->lock, flags); |
181 | desc->msi_desc = entry; | |
7fe3730d ME |
182 | if (entry) |
183 | entry->irq = irq; | |
5b912c10 EB |
184 | spin_unlock_irqrestore(&desc->lock, flags); |
185 | return 0; | |
186 | } | |
187 | ||
dd87eb3a TG |
188 | /** |
189 | * set_irq_chip_data - set irq chip data for an irq | |
190 | * @irq: Interrupt number | |
191 | * @data: Pointer to chip specific data | |
192 | * | |
193 | * Set the hardware irq chip data for an irq | |
194 | */ | |
195 | int set_irq_chip_data(unsigned int irq, void *data) | |
196 | { | |
d3c60047 | 197 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
198 | unsigned long flags; |
199 | ||
7d94f7ca YL |
200 | if (!desc) { |
201 | printk(KERN_ERR | |
202 | "Trying to install chip data for IRQ%d\n", irq); | |
203 | return -EINVAL; | |
204 | } | |
205 | ||
206 | if (!desc->chip) { | |
dd87eb3a TG |
207 | printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq); |
208 | return -EINVAL; | |
209 | } | |
210 | ||
211 | spin_lock_irqsave(&desc->lock, flags); | |
212 | desc->chip_data = data; | |
213 | spin_unlock_irqrestore(&desc->lock, flags); | |
214 | ||
215 | return 0; | |
216 | } | |
217 | EXPORT_SYMBOL(set_irq_chip_data); | |
218 | ||
219 | /* | |
220 | * default enable function | |
221 | */ | |
222 | static void default_enable(unsigned int irq) | |
223 | { | |
d3c60047 | 224 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
225 | |
226 | desc->chip->unmask(irq); | |
227 | desc->status &= ~IRQ_MASKED; | |
228 | } | |
229 | ||
230 | /* | |
231 | * default disable function | |
232 | */ | |
233 | static void default_disable(unsigned int irq) | |
234 | { | |
dd87eb3a TG |
235 | } |
236 | ||
237 | /* | |
238 | * default startup function | |
239 | */ | |
240 | static unsigned int default_startup(unsigned int irq) | |
241 | { | |
d3c60047 | 242 | struct irq_desc *desc = irq_to_desc(irq); |
08678b08 | 243 | |
08678b08 | 244 | desc->chip->enable(irq); |
dd87eb3a TG |
245 | return 0; |
246 | } | |
247 | ||
89d694b9 TG |
248 | /* |
249 | * default shutdown function | |
250 | */ | |
251 | static void default_shutdown(unsigned int irq) | |
252 | { | |
d3c60047 | 253 | struct irq_desc *desc = irq_to_desc(irq); |
89d694b9 TG |
254 | |
255 | desc->chip->mask(irq); | |
256 | desc->status |= IRQ_MASKED; | |
257 | } | |
258 | ||
dd87eb3a TG |
259 | /* |
260 | * Fixup enable/disable function pointers | |
261 | */ | |
262 | void irq_chip_set_defaults(struct irq_chip *chip) | |
263 | { | |
264 | if (!chip->enable) | |
265 | chip->enable = default_enable; | |
266 | if (!chip->disable) | |
267 | chip->disable = default_disable; | |
268 | if (!chip->startup) | |
269 | chip->startup = default_startup; | |
89d694b9 TG |
270 | /* |
271 | * We use chip->disable, when the user provided its own. When | |
272 | * we have default_disable set for chip->disable, then we need | |
273 | * to use default_shutdown, otherwise the irq line is not | |
274 | * disabled on free_irq(): | |
275 | */ | |
dd87eb3a | 276 | if (!chip->shutdown) |
89d694b9 TG |
277 | chip->shutdown = chip->disable != default_disable ? |
278 | chip->disable : default_shutdown; | |
dd87eb3a TG |
279 | if (!chip->name) |
280 | chip->name = chip->typename; | |
b86432b4 ZY |
281 | if (!chip->end) |
282 | chip->end = dummy_irq_chip.end; | |
dd87eb3a TG |
283 | } |
284 | ||
285 | static inline void mask_ack_irq(struct irq_desc *desc, int irq) | |
286 | { | |
287 | if (desc->chip->mask_ack) | |
288 | desc->chip->mask_ack(irq); | |
289 | else { | |
290 | desc->chip->mask(irq); | |
291 | desc->chip->ack(irq); | |
292 | } | |
293 | } | |
294 | ||
295 | /** | |
296 | * handle_simple_irq - Simple and software-decoded IRQs. | |
297 | * @irq: the interrupt number | |
298 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
299 | * |
300 | * Simple interrupts are either sent from a demultiplexing interrupt | |
301 | * handler or come from hardware, where no interrupt hardware control | |
302 | * is necessary. | |
303 | * | |
304 | * Note: The caller is expected to handle the ack, clear, mask and | |
305 | * unmask issues if necessary. | |
306 | */ | |
7ad5b3a5 | 307 | void |
7d12e780 | 308 | handle_simple_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a TG |
309 | { |
310 | struct irqaction *action; | |
311 | irqreturn_t action_ret; | |
dd87eb3a TG |
312 | |
313 | spin_lock(&desc->lock); | |
314 | ||
315 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
316 | goto out_unlock; | |
971e5b35 | 317 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
d6c88a50 | 318 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
319 | |
320 | action = desc->action; | |
971e5b35 | 321 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) |
dd87eb3a TG |
322 | goto out_unlock; |
323 | ||
324 | desc->status |= IRQ_INPROGRESS; | |
325 | spin_unlock(&desc->lock); | |
326 | ||
7d12e780 | 327 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 328 | if (!noirqdebug) |
7d12e780 | 329 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
330 | |
331 | spin_lock(&desc->lock); | |
332 | desc->status &= ~IRQ_INPROGRESS; | |
333 | out_unlock: | |
334 | spin_unlock(&desc->lock); | |
335 | } | |
336 | ||
337 | /** | |
338 | * handle_level_irq - Level type irq handler | |
339 | * @irq: the interrupt number | |
340 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
341 | * |
342 | * Level type interrupts are active as long as the hardware line has | |
343 | * the active level. This may require to mask the interrupt and unmask | |
344 | * it after the associated handler has acknowledged the device, so the | |
345 | * interrupt line is back to inactive. | |
346 | */ | |
7ad5b3a5 | 347 | void |
7d12e780 | 348 | handle_level_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 349 | { |
dd87eb3a TG |
350 | struct irqaction *action; |
351 | irqreturn_t action_ret; | |
352 | ||
353 | spin_lock(&desc->lock); | |
354 | mask_ack_irq(desc, irq); | |
355 | ||
356 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
86998aa6 | 357 | goto out_unlock; |
dd87eb3a | 358 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); |
d6c88a50 | 359 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
360 | |
361 | /* | |
362 | * If its disabled or no action available | |
363 | * keep it masked and get out of here | |
364 | */ | |
365 | action = desc->action; | |
49663421 | 366 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) |
86998aa6 | 367 | goto out_unlock; |
dd87eb3a TG |
368 | |
369 | desc->status |= IRQ_INPROGRESS; | |
370 | spin_unlock(&desc->lock); | |
371 | ||
7d12e780 | 372 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 373 | if (!noirqdebug) |
7d12e780 | 374 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
375 | |
376 | spin_lock(&desc->lock); | |
377 | desc->status &= ~IRQ_INPROGRESS; | |
dd87eb3a TG |
378 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) |
379 | desc->chip->unmask(irq); | |
86998aa6 | 380 | out_unlock: |
dd87eb3a TG |
381 | spin_unlock(&desc->lock); |
382 | } | |
383 | ||
384 | /** | |
47c2a3aa | 385 | * handle_fasteoi_irq - irq handler for transparent controllers |
dd87eb3a TG |
386 | * @irq: the interrupt number |
387 | * @desc: the interrupt description structure for this irq | |
dd87eb3a | 388 | * |
47c2a3aa | 389 | * Only a single callback will be issued to the chip: an ->eoi() |
dd87eb3a TG |
390 | * call when the interrupt has been serviced. This enables support |
391 | * for modern forms of interrupt handlers, which handle the flow | |
392 | * details in hardware, transparently. | |
393 | */ | |
7ad5b3a5 | 394 | void |
7d12e780 | 395 | handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 396 | { |
dd87eb3a TG |
397 | struct irqaction *action; |
398 | irqreturn_t action_ret; | |
399 | ||
400 | spin_lock(&desc->lock); | |
401 | ||
402 | if (unlikely(desc->status & IRQ_INPROGRESS)) | |
403 | goto out; | |
404 | ||
405 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | |
d6c88a50 | 406 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
407 | |
408 | /* | |
409 | * If its disabled or no action available | |
76d21601 | 410 | * then mask it and get out of here: |
dd87eb3a TG |
411 | */ |
412 | action = desc->action; | |
98bb244b BH |
413 | if (unlikely(!action || (desc->status & IRQ_DISABLED))) { |
414 | desc->status |= IRQ_PENDING; | |
76d21601 IM |
415 | if (desc->chip->mask) |
416 | desc->chip->mask(irq); | |
dd87eb3a | 417 | goto out; |
98bb244b | 418 | } |
dd87eb3a TG |
419 | |
420 | desc->status |= IRQ_INPROGRESS; | |
98bb244b | 421 | desc->status &= ~IRQ_PENDING; |
dd87eb3a TG |
422 | spin_unlock(&desc->lock); |
423 | ||
7d12e780 | 424 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 425 | if (!noirqdebug) |
7d12e780 | 426 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
427 | |
428 | spin_lock(&desc->lock); | |
429 | desc->status &= ~IRQ_INPROGRESS; | |
430 | out: | |
47c2a3aa | 431 | desc->chip->eoi(irq); |
dd87eb3a TG |
432 | |
433 | spin_unlock(&desc->lock); | |
434 | } | |
435 | ||
436 | /** | |
437 | * handle_edge_irq - edge type IRQ handler | |
438 | * @irq: the interrupt number | |
439 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
440 | * |
441 | * Interrupt occures on the falling and/or rising edge of a hardware | |
442 | * signal. The occurence is latched into the irq controller hardware | |
443 | * and must be acked in order to be reenabled. After the ack another | |
444 | * interrupt can happen on the same source even before the first one | |
445 | * is handled by the assosiacted event handler. If this happens it | |
446 | * might be necessary to disable (mask) the interrupt depending on the | |
447 | * controller hardware. This requires to reenable the interrupt inside | |
448 | * of the loop which handles the interrupts which have arrived while | |
449 | * the handler was running. If all pending interrupts are handled, the | |
450 | * loop is left. | |
451 | */ | |
7ad5b3a5 | 452 | void |
7d12e780 | 453 | handle_edge_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a | 454 | { |
dd87eb3a TG |
455 | spin_lock(&desc->lock); |
456 | ||
457 | desc->status &= ~(IRQ_REPLAY | IRQ_WAITING); | |
458 | ||
459 | /* | |
460 | * If we're currently running this IRQ, or its disabled, | |
461 | * we shouldn't process the IRQ. Mark it pending, handle | |
462 | * the necessary masking and go out | |
463 | */ | |
464 | if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) || | |
465 | !desc->action)) { | |
466 | desc->status |= (IRQ_PENDING | IRQ_MASKED); | |
467 | mask_ack_irq(desc, irq); | |
468 | goto out_unlock; | |
469 | } | |
d6c88a50 | 470 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
471 | |
472 | /* Start handling the irq */ | |
473 | desc->chip->ack(irq); | |
474 | ||
475 | /* Mark the IRQ currently in progress.*/ | |
476 | desc->status |= IRQ_INPROGRESS; | |
477 | ||
478 | do { | |
479 | struct irqaction *action = desc->action; | |
480 | irqreturn_t action_ret; | |
481 | ||
482 | if (unlikely(!action)) { | |
483 | desc->chip->mask(irq); | |
484 | goto out_unlock; | |
485 | } | |
486 | ||
487 | /* | |
488 | * When another irq arrived while we were handling | |
489 | * one, we could have masked the irq. | |
490 | * Renable it, if it was not disabled in meantime. | |
491 | */ | |
492 | if (unlikely((desc->status & | |
493 | (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) == | |
494 | (IRQ_PENDING | IRQ_MASKED))) { | |
495 | desc->chip->unmask(irq); | |
496 | desc->status &= ~IRQ_MASKED; | |
497 | } | |
498 | ||
499 | desc->status &= ~IRQ_PENDING; | |
500 | spin_unlock(&desc->lock); | |
7d12e780 | 501 | action_ret = handle_IRQ_event(irq, action); |
dd87eb3a | 502 | if (!noirqdebug) |
7d12e780 | 503 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
504 | spin_lock(&desc->lock); |
505 | ||
506 | } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING); | |
507 | ||
508 | desc->status &= ~IRQ_INPROGRESS; | |
509 | out_unlock: | |
510 | spin_unlock(&desc->lock); | |
511 | } | |
512 | ||
dd87eb3a TG |
513 | /** |
514 | * handle_percpu_IRQ - Per CPU local irq handler | |
515 | * @irq: the interrupt number | |
516 | * @desc: the interrupt description structure for this irq | |
dd87eb3a TG |
517 | * |
518 | * Per CPU interrupts on SMP machines without locking requirements | |
519 | */ | |
7ad5b3a5 | 520 | void |
7d12e780 | 521 | handle_percpu_irq(unsigned int irq, struct irq_desc *desc) |
dd87eb3a TG |
522 | { |
523 | irqreturn_t action_ret; | |
524 | ||
d6c88a50 | 525 | kstat_incr_irqs_this_cpu(irq, desc); |
dd87eb3a TG |
526 | |
527 | if (desc->chip->ack) | |
528 | desc->chip->ack(irq); | |
529 | ||
7d12e780 | 530 | action_ret = handle_IRQ_event(irq, desc->action); |
dd87eb3a | 531 | if (!noirqdebug) |
7d12e780 | 532 | note_interrupt(irq, desc, action_ret); |
dd87eb3a TG |
533 | |
534 | if (desc->chip->eoi) | |
535 | desc->chip->eoi(irq); | |
536 | } | |
537 | ||
dd87eb3a | 538 | void |
a460e745 IM |
539 | __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained, |
540 | const char *name) | |
dd87eb3a | 541 | { |
d3c60047 | 542 | struct irq_desc *desc = irq_to_desc(irq); |
dd87eb3a TG |
543 | unsigned long flags; |
544 | ||
7d94f7ca | 545 | if (!desc) { |
dd87eb3a TG |
546 | printk(KERN_ERR |
547 | "Trying to install type control for IRQ%d\n", irq); | |
548 | return; | |
549 | } | |
550 | ||
dd87eb3a TG |
551 | if (!handle) |
552 | handle = handle_bad_irq; | |
9d7ac8be | 553 | else if (desc->chip == &no_irq_chip) { |
f8b5473f | 554 | printk(KERN_WARNING "Trying to install %sinterrupt handler " |
b039db8e | 555 | "for IRQ%d\n", is_chained ? "chained " : "", irq); |
f8b5473f TG |
556 | /* |
557 | * Some ARM implementations install a handler for really dumb | |
558 | * interrupt hardware without setting an irq_chip. This worked | |
559 | * with the ARM no_irq_chip but the check in setup_irq would | |
560 | * prevent us to setup the interrupt at all. Switch it to | |
561 | * dummy_irq_chip for easy transition. | |
562 | */ | |
563 | desc->chip = &dummy_irq_chip; | |
564 | } | |
dd87eb3a TG |
565 | |
566 | spin_lock_irqsave(&desc->lock, flags); | |
567 | ||
568 | /* Uninstall? */ | |
569 | if (handle == handle_bad_irq) { | |
5575ddf7 JB |
570 | if (desc->chip != &no_irq_chip) |
571 | mask_ack_irq(desc, irq); | |
dd87eb3a TG |
572 | desc->status |= IRQ_DISABLED; |
573 | desc->depth = 1; | |
574 | } | |
575 | desc->handle_irq = handle; | |
a460e745 | 576 | desc->name = name; |
dd87eb3a TG |
577 | |
578 | if (handle != handle_bad_irq && is_chained) { | |
579 | desc->status &= ~IRQ_DISABLED; | |
580 | desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE; | |
581 | desc->depth = 0; | |
7e6e178a | 582 | desc->chip->startup(irq); |
dd87eb3a TG |
583 | } |
584 | spin_unlock_irqrestore(&desc->lock, flags); | |
585 | } | |
586 | ||
587 | void | |
588 | set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip, | |
57a58a94 | 589 | irq_flow_handler_t handle) |
dd87eb3a TG |
590 | { |
591 | set_irq_chip(irq, chip); | |
a460e745 | 592 | __set_irq_handler(irq, handle, 0, NULL); |
dd87eb3a TG |
593 | } |
594 | ||
a460e745 IM |
595 | void |
596 | set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip, | |
597 | irq_flow_handler_t handle, const char *name) | |
dd87eb3a | 598 | { |
a460e745 IM |
599 | set_irq_chip(irq, chip); |
600 | __set_irq_handler(irq, handle, 0, name); | |
dd87eb3a | 601 | } |
46f4f8f6 RB |
602 | |
603 | void __init set_irq_noprobe(unsigned int irq) | |
604 | { | |
d3c60047 | 605 | struct irq_desc *desc = irq_to_desc(irq); |
46f4f8f6 RB |
606 | unsigned long flags; |
607 | ||
7d94f7ca | 608 | if (!desc) { |
46f4f8f6 | 609 | printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq); |
46f4f8f6 RB |
610 | return; |
611 | } | |
612 | ||
46f4f8f6 RB |
613 | spin_lock_irqsave(&desc->lock, flags); |
614 | desc->status |= IRQ_NOPROBE; | |
615 | spin_unlock_irqrestore(&desc->lock, flags); | |
616 | } | |
617 | ||
618 | void __init set_irq_probe(unsigned int irq) | |
619 | { | |
d3c60047 | 620 | struct irq_desc *desc = irq_to_desc(irq); |
46f4f8f6 RB |
621 | unsigned long flags; |
622 | ||
7d94f7ca | 623 | if (!desc) { |
46f4f8f6 | 624 | printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq); |
46f4f8f6 RB |
625 | return; |
626 | } | |
627 | ||
46f4f8f6 RB |
628 | spin_lock_irqsave(&desc->lock, flags); |
629 | desc->status &= ~IRQ_NOPROBE; | |
630 | spin_unlock_irqrestore(&desc->lock, flags); | |
631 | } |