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genirq: Provide compat handling for chip->set_wake()
[mirror_ubuntu-zesty-kernel.git] / kernel / irq / chip.c
CommitLineData
dd87eb3a
TG
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
7fe3730d 14#include <linux/msi.h>
dd87eb3a
TG
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
ced5b697 21static void dynamic_irq_init_x(unsigned int irq, bool keep_chip_data)
3a16d713 22{
0b8f1efa 23 struct irq_desc *desc;
3a16d713
EB
24 unsigned long flags;
25
0b8f1efa 26 desc = irq_to_desc(irq);
7d94f7ca 27 if (!desc) {
261c40c1 28 WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq);
3a16d713
EB
29 return;
30 }
31
32 /* Ensure we don't have left over values from a previous use of this irq */
239007b8 33 raw_spin_lock_irqsave(&desc->lock, flags);
3a16d713 34 desc->status = IRQ_DISABLED;
6b8ff312 35 desc->irq_data.chip = &no_irq_chip;
3a16d713
EB
36 desc->handle_irq = handle_bad_irq;
37 desc->depth = 1;
6b8ff312
TG
38 desc->irq_data.msi_desc = NULL;
39 desc->irq_data.handler_data = NULL;
ced5b697 40 if (!keep_chip_data)
6b8ff312 41 desc->irq_data.chip_data = NULL;
3a16d713
EB
42 desc->action = NULL;
43 desc->irq_count = 0;
44 desc->irqs_unhandled = 0;
45#ifdef CONFIG_SMP
6b8ff312 46 cpumask_setall(desc->irq_data.affinity);
7f7ace0c
MT
47#ifdef CONFIG_GENERIC_PENDING_IRQ
48 cpumask_clear(desc->pending_mask);
49#endif
3a16d713 50#endif
239007b8 51 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a16d713
EB
52}
53
54/**
ced5b697 55 * dynamic_irq_init - initialize a dynamically allocated irq
3a16d713
EB
56 * @irq: irq number to initialize
57 */
ced5b697
BP
58void dynamic_irq_init(unsigned int irq)
59{
60 dynamic_irq_init_x(irq, false);
61}
62
63/**
64 * dynamic_irq_init_keep_chip_data - initialize a dynamically allocated irq
65 * @irq: irq number to initialize
66 *
6b8ff312 67 * does not set irq_to_desc(irq)->irq_data.chip_data to NULL
ced5b697
BP
68 */
69void dynamic_irq_init_keep_chip_data(unsigned int irq)
70{
71 dynamic_irq_init_x(irq, true);
72}
73
74static void dynamic_irq_cleanup_x(unsigned int irq, bool keep_chip_data)
3a16d713 75{
d3c60047 76 struct irq_desc *desc = irq_to_desc(irq);
3a16d713
EB
77 unsigned long flags;
78
7d94f7ca 79 if (!desc) {
261c40c1 80 WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq);
3a16d713
EB
81 return;
82 }
83
239007b8 84 raw_spin_lock_irqsave(&desc->lock, flags);
1f80025e 85 if (desc->action) {
239007b8 86 raw_spin_unlock_irqrestore(&desc->lock, flags);
261c40c1 87 WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n",
1f80025e 88 irq);
1f80025e
EB
89 return;
90 }
6b8ff312
TG
91 desc->irq_data.msi_desc = NULL;
92 desc->irq_data.handler_data = NULL;
ced5b697 93 if (!keep_chip_data)
6b8ff312 94 desc->irq_data.chip_data = NULL;
3a16d713 95 desc->handle_irq = handle_bad_irq;
6b8ff312 96 desc->irq_data.chip = &no_irq_chip;
b6f3b780 97 desc->name = NULL;
0f3c2a89 98 clear_kstat_irqs(desc);
239007b8 99 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a16d713
EB
100}
101
ced5b697
BP
102/**
103 * dynamic_irq_cleanup - cleanup a dynamically allocated irq
104 * @irq: irq number to initialize
105 */
106void dynamic_irq_cleanup(unsigned int irq)
107{
108 dynamic_irq_cleanup_x(irq, false);
109}
110
111/**
112 * dynamic_irq_cleanup_keep_chip_data - cleanup a dynamically allocated irq
113 * @irq: irq number to initialize
114 *
6b8ff312 115 * does not set irq_to_desc(irq)->irq_data.chip_data to NULL
ced5b697
BP
116 */
117void dynamic_irq_cleanup_keep_chip_data(unsigned int irq)
118{
119 dynamic_irq_cleanup_x(irq, true);
120}
121
3a16d713 122
dd87eb3a
TG
123/**
124 * set_irq_chip - set the irq chip for an irq
125 * @irq: irq number
126 * @chip: pointer to irq chip description structure
127 */
128int set_irq_chip(unsigned int irq, struct irq_chip *chip)
129{
d3c60047 130 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
131 unsigned long flags;
132
7d94f7ca 133 if (!desc) {
261c40c1 134 WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
dd87eb3a
TG
135 return -EINVAL;
136 }
137
138 if (!chip)
139 chip = &no_irq_chip;
140
239007b8 141 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a 142 irq_chip_set_defaults(chip);
6b8ff312 143 desc->irq_data.chip = chip;
239007b8 144 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
145
146 return 0;
147}
148EXPORT_SYMBOL(set_irq_chip);
149
150/**
0c5d1eb7 151 * set_irq_type - set the irq trigger type for an irq
dd87eb3a 152 * @irq: irq number
0c5d1eb7 153 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
dd87eb3a
TG
154 */
155int set_irq_type(unsigned int irq, unsigned int type)
156{
d3c60047 157 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
158 unsigned long flags;
159 int ret = -ENXIO;
160
7d94f7ca 161 if (!desc) {
dd87eb3a
TG
162 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
163 return -ENODEV;
164 }
165
f2b662da 166 type &= IRQ_TYPE_SENSE_MASK;
0c5d1eb7
DB
167 if (type == IRQ_TYPE_NONE)
168 return 0;
169
239007b8 170 raw_spin_lock_irqsave(&desc->lock, flags);
0b3682ba 171 ret = __irq_set_trigger(desc, irq, type);
239007b8 172 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
173 return ret;
174}
175EXPORT_SYMBOL(set_irq_type);
176
177/**
178 * set_irq_data - set irq type data for an irq
179 * @irq: Interrupt number
180 * @data: Pointer to interrupt specific data
181 *
182 * Set the hardware irq controller data for an irq
183 */
184int set_irq_data(unsigned int irq, void *data)
185{
d3c60047 186 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
187 unsigned long flags;
188
7d94f7ca 189 if (!desc) {
dd87eb3a
TG
190 printk(KERN_ERR
191 "Trying to install controller data for IRQ%d\n", irq);
192 return -EINVAL;
193 }
194
239007b8 195 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 196 desc->irq_data.handler_data = data;
239007b8 197 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
198 return 0;
199}
200EXPORT_SYMBOL(set_irq_data);
201
5b912c10 202/**
24b26d42 203 * set_irq_msi - set MSI descriptor data for an irq
5b912c10 204 * @irq: Interrupt number
472900b8 205 * @entry: Pointer to MSI descriptor data
5b912c10 206 *
24b26d42 207 * Set the MSI descriptor entry for an irq
5b912c10
EB
208 */
209int set_irq_msi(unsigned int irq, struct msi_desc *entry)
210{
d3c60047 211 struct irq_desc *desc = irq_to_desc(irq);
5b912c10
EB
212 unsigned long flags;
213
7d94f7ca 214 if (!desc) {
5b912c10
EB
215 printk(KERN_ERR
216 "Trying to install msi data for IRQ%d\n", irq);
217 return -EINVAL;
218 }
7d94f7ca 219
239007b8 220 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 221 desc->irq_data.msi_desc = entry;
7fe3730d
ME
222 if (entry)
223 entry->irq = irq;
239007b8 224 raw_spin_unlock_irqrestore(&desc->lock, flags);
5b912c10
EB
225 return 0;
226}
227
dd87eb3a
TG
228/**
229 * set_irq_chip_data - set irq chip data for an irq
230 * @irq: Interrupt number
231 * @data: Pointer to chip specific data
232 *
233 * Set the hardware irq chip data for an irq
234 */
235int set_irq_chip_data(unsigned int irq, void *data)
236{
d3c60047 237 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
238 unsigned long flags;
239
7d94f7ca
YL
240 if (!desc) {
241 printk(KERN_ERR
242 "Trying to install chip data for IRQ%d\n", irq);
243 return -EINVAL;
244 }
245
6b8ff312 246 if (!desc->irq_data.chip) {
dd87eb3a
TG
247 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
248 return -EINVAL;
249 }
250
239007b8 251 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 252 desc->irq_data.chip_data = data;
239007b8 253 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
254
255 return 0;
256}
257EXPORT_SYMBOL(set_irq_chip_data);
258
399b5da2
TG
259/**
260 * set_irq_nested_thread - Set/Reset the IRQ_NESTED_THREAD flag of an irq
261 *
262 * @irq: Interrupt number
263 * @nest: 0 to clear / 1 to set the IRQ_NESTED_THREAD flag
264 *
265 * The IRQ_NESTED_THREAD flag indicates that on
266 * request_threaded_irq() no separate interrupt thread should be
267 * created for the irq as the handler are called nested in the
268 * context of a demultiplexing interrupt handler thread.
269 */
270void set_irq_nested_thread(unsigned int irq, int nest)
271{
272 struct irq_desc *desc = irq_to_desc(irq);
273 unsigned long flags;
274
275 if (!desc)
276 return;
277
239007b8 278 raw_spin_lock_irqsave(&desc->lock, flags);
399b5da2
TG
279 if (nest)
280 desc->status |= IRQ_NESTED_THREAD;
281 else
282 desc->status &= ~IRQ_NESTED_THREAD;
239007b8 283 raw_spin_unlock_irqrestore(&desc->lock, flags);
399b5da2
TG
284}
285EXPORT_SYMBOL_GPL(set_irq_nested_thread);
286
dd87eb3a
TG
287/*
288 * default enable function
289 */
c5f75634 290static void default_enable(struct irq_data *data)
dd87eb3a 291{
c5f75634 292 struct irq_desc *desc = irq_data_to_desc(data);
dd87eb3a 293
0eda58b7 294 desc->irq_data.chip->irq_unmask(&desc->irq_data);
dd87eb3a
TG
295 desc->status &= ~IRQ_MASKED;
296}
297
298/*
299 * default disable function
300 */
bc310dda 301static void default_disable(struct irq_data *data)
dd87eb3a 302{
dd87eb3a
TG
303}
304
305/*
306 * default startup function
307 */
37e12df7 308static unsigned int default_startup(struct irq_data *data)
dd87eb3a 309{
37e12df7 310 struct irq_desc *desc = irq_data_to_desc(data);
08678b08 311
37e12df7 312 desc->irq_data.chip->irq_enable(data);
dd87eb3a
TG
313 return 0;
314}
315
89d694b9
TG
316/*
317 * default shutdown function
318 */
bc310dda 319static void default_shutdown(struct irq_data *data)
89d694b9 320{
bc310dda 321 struct irq_desc *desc = irq_data_to_desc(data);
89d694b9 322
e2c0f8ff 323 desc->irq_data.chip->irq_mask(&desc->irq_data);
89d694b9
TG
324 desc->status |= IRQ_MASKED;
325}
326
3876ec9e 327/* Temporary migration helpers */
e2c0f8ff
TG
328static void compat_irq_mask(struct irq_data *data)
329{
330 data->chip->mask(data->irq);
331}
332
0eda58b7
TG
333static void compat_irq_unmask(struct irq_data *data)
334{
335 data->chip->unmask(data->irq);
336}
337
22a49163
TG
338static void compat_irq_ack(struct irq_data *data)
339{
340 data->chip->ack(data->irq);
341}
342
9205e31d
TG
343static void compat_irq_mask_ack(struct irq_data *data)
344{
345 data->chip->mask_ack(data->irq);
346}
347
0c5c1557
TG
348static void compat_irq_eoi(struct irq_data *data)
349{
350 data->chip->eoi(data->irq);
351}
352
c5f75634
TG
353static void compat_irq_enable(struct irq_data *data)
354{
355 data->chip->enable(data->irq);
356}
357
bc310dda
TG
358static void compat_irq_disable(struct irq_data *data)
359{
360 data->chip->disable(data->irq);
361}
362
363static void compat_irq_shutdown(struct irq_data *data)
364{
365 data->chip->shutdown(data->irq);
366}
367
37e12df7
TG
368static unsigned int compat_irq_startup(struct irq_data *data)
369{
370 return data->chip->startup(data->irq);
371}
372
c96b3b3c
TG
373static int compat_irq_set_affinity(struct irq_data *data,
374 const struct cpumask *dest, bool force)
375{
376 return data->chip->set_affinity(data->irq, dest);
377}
378
b2ba2c30
TG
379static int compat_irq_set_type(struct irq_data *data, unsigned int type)
380{
381 return data->chip->set_type(data->irq, type);
382}
383
2f7e99bb
TG
384static int compat_irq_set_wake(struct irq_data *data, unsigned int on)
385{
386 return data->chip->set_wake(data->irq, on);
387}
388
3876ec9e
TG
389static void compat_bus_lock(struct irq_data *data)
390{
391 data->chip->bus_lock(data->irq);
392}
393
394static void compat_bus_sync_unlock(struct irq_data *data)
395{
396 data->chip->bus_sync_unlock(data->irq);
397}
398
dd87eb3a
TG
399/*
400 * Fixup enable/disable function pointers
401 */
402void irq_chip_set_defaults(struct irq_chip *chip)
403{
c5f75634
TG
404 /*
405 * Compat fixup functions need to be before we set the
406 * defaults for enable/disable/startup/shutdown
407 */
408 if (chip->enable)
409 chip->irq_enable = compat_irq_enable;
bc310dda
TG
410 if (chip->disable)
411 chip->irq_disable = compat_irq_disable;
412 if (chip->shutdown)
413 chip->irq_shutdown = compat_irq_shutdown;
37e12df7
TG
414 if (chip->startup)
415 chip->irq_startup = compat_irq_startup;
c5f75634
TG
416
417 /*
418 * The real defaults
419 */
420 if (!chip->irq_enable)
421 chip->irq_enable = default_enable;
bc310dda
TG
422 if (!chip->irq_disable)
423 chip->irq_disable = default_disable;
37e12df7
TG
424 if (!chip->irq_startup)
425 chip->irq_startup = default_startup;
89d694b9 426 /*
bc310dda
TG
427 * We use chip->irq_disable, when the user provided its own. When
428 * we have default_disable set for chip->irq_disable, then we need
89d694b9
TG
429 * to use default_shutdown, otherwise the irq line is not
430 * disabled on free_irq():
431 */
bc310dda
TG
432 if (!chip->irq_shutdown)
433 chip->irq_shutdown = chip->irq_disable != default_disable ?
434 chip->irq_disable : default_shutdown;
b86432b4
ZY
435 if (!chip->end)
436 chip->end = dummy_irq_chip.end;
3876ec9e 437
bc310dda
TG
438 /*
439 * Now fix up the remaining compat handlers
440 */
3876ec9e
TG
441 if (chip->bus_lock)
442 chip->irq_bus_lock = compat_bus_lock;
443 if (chip->bus_sync_unlock)
444 chip->irq_bus_sync_unlock = compat_bus_sync_unlock;
e2c0f8ff
TG
445 if (chip->mask)
446 chip->irq_mask = compat_irq_mask;
0eda58b7
TG
447 if (chip->unmask)
448 chip->irq_unmask = compat_irq_unmask;
22a49163
TG
449 if (chip->ack)
450 chip->irq_ack = compat_irq_ack;
9205e31d
TG
451 if (chip->mask_ack)
452 chip->irq_mask_ack = compat_irq_mask_ack;
0c5c1557
TG
453 if (chip->eoi)
454 chip->irq_eoi = compat_irq_eoi;
c96b3b3c
TG
455 if (chip->set_affinity)
456 chip->irq_set_affinity = compat_irq_set_affinity;
b2ba2c30
TG
457 if (chip->set_type)
458 chip->irq_set_type = compat_irq_set_type;
2f7e99bb
TG
459 if (chip->set_wake)
460 chip->irq_set_wake = compat_irq_set_wake;
dd87eb3a
TG
461}
462
9205e31d 463static inline void mask_ack_irq(struct irq_desc *desc)
dd87eb3a 464{
9205e31d
TG
465 if (desc->irq_data.chip->irq_mask_ack)
466 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
dd87eb3a 467 else {
e2c0f8ff 468 desc->irq_data.chip->irq_mask(&desc->irq_data);
22a49163
TG
469 if (desc->irq_data.chip->irq_ack)
470 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a 471 }
0b1adaa0
TG
472 desc->status |= IRQ_MASKED;
473}
474
e2c0f8ff 475static inline void mask_irq(struct irq_desc *desc)
0b1adaa0 476{
e2c0f8ff
TG
477 if (desc->irq_data.chip->irq_mask) {
478 desc->irq_data.chip->irq_mask(&desc->irq_data);
0b1adaa0
TG
479 desc->status |= IRQ_MASKED;
480 }
481}
482
0eda58b7 483static inline void unmask_irq(struct irq_desc *desc)
0b1adaa0 484{
0eda58b7
TG
485 if (desc->irq_data.chip->irq_unmask) {
486 desc->irq_data.chip->irq_unmask(&desc->irq_data);
0b1adaa0
TG
487 desc->status &= ~IRQ_MASKED;
488 }
dd87eb3a
TG
489}
490
399b5da2
TG
491/*
492 * handle_nested_irq - Handle a nested irq from a irq thread
493 * @irq: the interrupt number
494 *
495 * Handle interrupts which are nested into a threaded interrupt
496 * handler. The handler function is called inside the calling
497 * threads context.
498 */
499void handle_nested_irq(unsigned int irq)
500{
501 struct irq_desc *desc = irq_to_desc(irq);
502 struct irqaction *action;
503 irqreturn_t action_ret;
504
505 might_sleep();
506
239007b8 507 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
508
509 kstat_incr_irqs_this_cpu(irq, desc);
510
511 action = desc->action;
512 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
513 goto out_unlock;
514
515 desc->status |= IRQ_INPROGRESS;
239007b8 516 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
517
518 action_ret = action->thread_fn(action->irq, action->dev_id);
519 if (!noirqdebug)
520 note_interrupt(irq, desc, action_ret);
521
239007b8 522 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
523 desc->status &= ~IRQ_INPROGRESS;
524
525out_unlock:
239007b8 526 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
527}
528EXPORT_SYMBOL_GPL(handle_nested_irq);
529
dd87eb3a
TG
530/**
531 * handle_simple_irq - Simple and software-decoded IRQs.
532 * @irq: the interrupt number
533 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
534 *
535 * Simple interrupts are either sent from a demultiplexing interrupt
536 * handler or come from hardware, where no interrupt hardware control
537 * is necessary.
538 *
539 * Note: The caller is expected to handle the ack, clear, mask and
540 * unmask issues if necessary.
541 */
7ad5b3a5 542void
7d12e780 543handle_simple_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
544{
545 struct irqaction *action;
546 irqreturn_t action_ret;
dd87eb3a 547
239007b8 548 raw_spin_lock(&desc->lock);
dd87eb3a
TG
549
550 if (unlikely(desc->status & IRQ_INPROGRESS))
551 goto out_unlock;
971e5b35 552 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 553 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
554
555 action = desc->action;
971e5b35 556 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
dd87eb3a
TG
557 goto out_unlock;
558
559 desc->status |= IRQ_INPROGRESS;
239007b8 560 raw_spin_unlock(&desc->lock);
dd87eb3a 561
7d12e780 562 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 563 if (!noirqdebug)
7d12e780 564 note_interrupt(irq, desc, action_ret);
dd87eb3a 565
239007b8 566 raw_spin_lock(&desc->lock);
dd87eb3a
TG
567 desc->status &= ~IRQ_INPROGRESS;
568out_unlock:
239007b8 569 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
570}
571
572/**
573 * handle_level_irq - Level type irq handler
574 * @irq: the interrupt number
575 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
576 *
577 * Level type interrupts are active as long as the hardware line has
578 * the active level. This may require to mask the interrupt and unmask
579 * it after the associated handler has acknowledged the device, so the
580 * interrupt line is back to inactive.
581 */
7ad5b3a5 582void
7d12e780 583handle_level_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 584{
dd87eb3a
TG
585 struct irqaction *action;
586 irqreturn_t action_ret;
587
239007b8 588 raw_spin_lock(&desc->lock);
9205e31d 589 mask_ack_irq(desc);
dd87eb3a
TG
590
591 if (unlikely(desc->status & IRQ_INPROGRESS))
86998aa6 592 goto out_unlock;
dd87eb3a 593 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 594 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
595
596 /*
597 * If its disabled or no action available
598 * keep it masked and get out of here
599 */
600 action = desc->action;
49663421 601 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
86998aa6 602 goto out_unlock;
dd87eb3a
TG
603
604 desc->status |= IRQ_INPROGRESS;
239007b8 605 raw_spin_unlock(&desc->lock);
dd87eb3a 606
7d12e780 607 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 608 if (!noirqdebug)
7d12e780 609 note_interrupt(irq, desc, action_ret);
dd87eb3a 610
239007b8 611 raw_spin_lock(&desc->lock);
dd87eb3a 612 desc->status &= ~IRQ_INPROGRESS;
b25c340c 613
0b1adaa0 614 if (!(desc->status & (IRQ_DISABLED | IRQ_ONESHOT)))
0eda58b7 615 unmask_irq(desc);
86998aa6 616out_unlock:
239007b8 617 raw_spin_unlock(&desc->lock);
dd87eb3a 618}
14819ea1 619EXPORT_SYMBOL_GPL(handle_level_irq);
dd87eb3a
TG
620
621/**
47c2a3aa 622 * handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a
TG
623 * @irq: the interrupt number
624 * @desc: the interrupt description structure for this irq
dd87eb3a 625 *
47c2a3aa 626 * Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a
TG
627 * call when the interrupt has been serviced. This enables support
628 * for modern forms of interrupt handlers, which handle the flow
629 * details in hardware, transparently.
630 */
7ad5b3a5 631void
7d12e780 632handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 633{
dd87eb3a
TG
634 struct irqaction *action;
635 irqreturn_t action_ret;
636
239007b8 637 raw_spin_lock(&desc->lock);
dd87eb3a
TG
638
639 if (unlikely(desc->status & IRQ_INPROGRESS))
640 goto out;
641
642 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 643 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
644
645 /*
646 * If its disabled or no action available
76d21601 647 * then mask it and get out of here:
dd87eb3a
TG
648 */
649 action = desc->action;
98bb244b
BH
650 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
651 desc->status |= IRQ_PENDING;
e2c0f8ff 652 mask_irq(desc);
dd87eb3a 653 goto out;
98bb244b 654 }
dd87eb3a
TG
655
656 desc->status |= IRQ_INPROGRESS;
98bb244b 657 desc->status &= ~IRQ_PENDING;
239007b8 658 raw_spin_unlock(&desc->lock);
dd87eb3a 659
7d12e780 660 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 661 if (!noirqdebug)
7d12e780 662 note_interrupt(irq, desc, action_ret);
dd87eb3a 663
239007b8 664 raw_spin_lock(&desc->lock);
dd87eb3a
TG
665 desc->status &= ~IRQ_INPROGRESS;
666out:
0c5c1557 667 desc->irq_data.chip->irq_eoi(&desc->irq_data);
dd87eb3a 668
239007b8 669 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
670}
671
672/**
673 * handle_edge_irq - edge type IRQ handler
674 * @irq: the interrupt number
675 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
676 *
677 * Interrupt occures on the falling and/or rising edge of a hardware
678 * signal. The occurence is latched into the irq controller hardware
679 * and must be acked in order to be reenabled. After the ack another
680 * interrupt can happen on the same source even before the first one
dfff0615 681 * is handled by the associated event handler. If this happens it
dd87eb3a
TG
682 * might be necessary to disable (mask) the interrupt depending on the
683 * controller hardware. This requires to reenable the interrupt inside
684 * of the loop which handles the interrupts which have arrived while
685 * the handler was running. If all pending interrupts are handled, the
686 * loop is left.
687 */
7ad5b3a5 688void
7d12e780 689handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 690{
239007b8 691 raw_spin_lock(&desc->lock);
dd87eb3a
TG
692
693 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
694
695 /*
696 * If we're currently running this IRQ, or its disabled,
697 * we shouldn't process the IRQ. Mark it pending, handle
698 * the necessary masking and go out
699 */
700 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
701 !desc->action)) {
702 desc->status |= (IRQ_PENDING | IRQ_MASKED);
9205e31d 703 mask_ack_irq(desc);
dd87eb3a
TG
704 goto out_unlock;
705 }
d6c88a50 706 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
707
708 /* Start handling the irq */
22a49163 709 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a
TG
710
711 /* Mark the IRQ currently in progress.*/
712 desc->status |= IRQ_INPROGRESS;
713
714 do {
715 struct irqaction *action = desc->action;
716 irqreturn_t action_ret;
717
718 if (unlikely(!action)) {
e2c0f8ff 719 mask_irq(desc);
dd87eb3a
TG
720 goto out_unlock;
721 }
722
723 /*
724 * When another irq arrived while we were handling
725 * one, we could have masked the irq.
726 * Renable it, if it was not disabled in meantime.
727 */
728 if (unlikely((desc->status &
729 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
730 (IRQ_PENDING | IRQ_MASKED))) {
0eda58b7 731 unmask_irq(desc);
dd87eb3a
TG
732 }
733
734 desc->status &= ~IRQ_PENDING;
239007b8 735 raw_spin_unlock(&desc->lock);
7d12e780 736 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 737 if (!noirqdebug)
7d12e780 738 note_interrupt(irq, desc, action_ret);
239007b8 739 raw_spin_lock(&desc->lock);
dd87eb3a
TG
740
741 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
742
743 desc->status &= ~IRQ_INPROGRESS;
744out_unlock:
239007b8 745 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
746}
747
dd87eb3a 748/**
24b26d42 749 * handle_percpu_irq - Per CPU local irq handler
dd87eb3a
TG
750 * @irq: the interrupt number
751 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
752 *
753 * Per CPU interrupts on SMP machines without locking requirements
754 */
7ad5b3a5 755void
7d12e780 756handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
757{
758 irqreturn_t action_ret;
759
d6c88a50 760 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a 761
22a49163
TG
762 if (desc->irq_data.chip->irq_ack)
763 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a 764
7d12e780 765 action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a 766 if (!noirqdebug)
7d12e780 767 note_interrupt(irq, desc, action_ret);
dd87eb3a 768
0c5c1557
TG
769 if (desc->irq_data.chip->irq_eoi)
770 desc->irq_data.chip->irq_eoi(&desc->irq_data);
dd87eb3a
TG
771}
772
dd87eb3a 773void
a460e745
IM
774__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
775 const char *name)
dd87eb3a 776{
d3c60047 777 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
778 unsigned long flags;
779
7d94f7ca 780 if (!desc) {
dd87eb3a
TG
781 printk(KERN_ERR
782 "Trying to install type control for IRQ%d\n", irq);
783 return;
784 }
785
dd87eb3a
TG
786 if (!handle)
787 handle = handle_bad_irq;
6b8ff312 788 else if (desc->irq_data.chip == &no_irq_chip) {
f8b5473f 789 printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e 790 "for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f
TG
791 /*
792 * Some ARM implementations install a handler for really dumb
793 * interrupt hardware without setting an irq_chip. This worked
794 * with the ARM no_irq_chip but the check in setup_irq would
795 * prevent us to setup the interrupt at all. Switch it to
796 * dummy_irq_chip for easy transition.
797 */
6b8ff312 798 desc->irq_data.chip = &dummy_irq_chip;
f8b5473f 799 }
dd87eb3a 800
3876ec9e 801 chip_bus_lock(desc);
239007b8 802 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a
TG
803
804 /* Uninstall? */
805 if (handle == handle_bad_irq) {
6b8ff312 806 if (desc->irq_data.chip != &no_irq_chip)
9205e31d 807 mask_ack_irq(desc);
dd87eb3a
TG
808 desc->status |= IRQ_DISABLED;
809 desc->depth = 1;
810 }
811 desc->handle_irq = handle;
a460e745 812 desc->name = name;
dd87eb3a
TG
813
814 if (handle != handle_bad_irq && is_chained) {
815 desc->status &= ~IRQ_DISABLED;
816 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
817 desc->depth = 0;
37e12df7 818 desc->irq_data.chip->irq_startup(&desc->irq_data);
dd87eb3a 819 }
239007b8 820 raw_spin_unlock_irqrestore(&desc->lock, flags);
3876ec9e 821 chip_bus_sync_unlock(desc);
dd87eb3a 822}
14819ea1 823EXPORT_SYMBOL_GPL(__set_irq_handler);
dd87eb3a
TG
824
825void
826set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94 827 irq_flow_handler_t handle)
dd87eb3a
TG
828{
829 set_irq_chip(irq, chip);
a460e745 830 __set_irq_handler(irq, handle, 0, NULL);
dd87eb3a
TG
831}
832
a460e745
IM
833void
834set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
835 irq_flow_handler_t handle, const char *name)
dd87eb3a 836{
a460e745
IM
837 set_irq_chip(irq, chip);
838 __set_irq_handler(irq, handle, 0, name);
dd87eb3a 839}
46f4f8f6 840
860652bf 841void set_irq_noprobe(unsigned int irq)
46f4f8f6 842{
d3c60047 843 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
844 unsigned long flags;
845
7d94f7ca 846 if (!desc) {
46f4f8f6 847 printk(KERN_ERR "Trying to mark IRQ%d non-probeable\n", irq);
46f4f8f6
RB
848 return;
849 }
850
239007b8 851 raw_spin_lock_irqsave(&desc->lock, flags);
46f4f8f6 852 desc->status |= IRQ_NOPROBE;
239007b8 853 raw_spin_unlock_irqrestore(&desc->lock, flags);
46f4f8f6
RB
854}
855
860652bf 856void set_irq_probe(unsigned int irq)
46f4f8f6 857{
d3c60047 858 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
859 unsigned long flags;
860
7d94f7ca 861 if (!desc) {
46f4f8f6 862 printk(KERN_ERR "Trying to mark IRQ%d probeable\n", irq);
46f4f8f6
RB
863 return;
864 }
865
239007b8 866 raw_spin_lock_irqsave(&desc->lock, flags);
46f4f8f6 867 desc->status &= ~IRQ_NOPROBE;
239007b8 868 raw_spin_unlock_irqrestore(&desc->lock, flags);
46f4f8f6 869}