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genirq: Remove default magic
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CommitLineData
dd87eb3a
TG
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
7fe3730d 14#include <linux/msi.h>
dd87eb3a
TG
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
21/**
a0cd9ca2 22 * irq_set_chip - set the irq chip for an irq
dd87eb3a
TG
23 * @irq: irq number
24 * @chip: pointer to irq chip description structure
25 */
a0cd9ca2 26int irq_set_chip(unsigned int irq, struct irq_chip *chip)
dd87eb3a 27{
d3c60047 28 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
29 unsigned long flags;
30
7d94f7ca 31 if (!desc) {
261c40c1 32 WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
dd87eb3a
TG
33 return -EINVAL;
34 }
35
36 if (!chip)
37 chip = &no_irq_chip;
38
239007b8 39 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a 40 irq_chip_set_defaults(chip);
6b8ff312 41 desc->irq_data.chip = chip;
239007b8 42 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
43
44 return 0;
45}
a0cd9ca2 46EXPORT_SYMBOL(irq_set_chip);
dd87eb3a
TG
47
48/**
a0cd9ca2 49 * irq_set_type - set the irq trigger type for an irq
dd87eb3a 50 * @irq: irq number
0c5d1eb7 51 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
dd87eb3a 52 */
a0cd9ca2 53int irq_set_irq_type(unsigned int irq, unsigned int type)
dd87eb3a 54{
d3c60047 55 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
56 unsigned long flags;
57 int ret = -ENXIO;
58
7d94f7ca 59 if (!desc) {
dd87eb3a
TG
60 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
61 return -ENODEV;
62 }
63
f2b662da 64 type &= IRQ_TYPE_SENSE_MASK;
0c5d1eb7
DB
65 if (type == IRQ_TYPE_NONE)
66 return 0;
67
43abe43c 68 chip_bus_lock(desc);
239007b8 69 raw_spin_lock_irqsave(&desc->lock, flags);
0b3682ba 70 ret = __irq_set_trigger(desc, irq, type);
239007b8 71 raw_spin_unlock_irqrestore(&desc->lock, flags);
43abe43c 72 chip_bus_sync_unlock(desc);
dd87eb3a
TG
73 return ret;
74}
a0cd9ca2 75EXPORT_SYMBOL(irq_set_irq_type);
dd87eb3a
TG
76
77/**
a0cd9ca2 78 * irq_set_handler_data - set irq handler data for an irq
dd87eb3a
TG
79 * @irq: Interrupt number
80 * @data: Pointer to interrupt specific data
81 *
82 * Set the hardware irq controller data for an irq
83 */
a0cd9ca2 84int irq_set_handler_data(unsigned int irq, void *data)
dd87eb3a 85{
d3c60047 86 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
87 unsigned long flags;
88
7d94f7ca 89 if (!desc) {
dd87eb3a
TG
90 printk(KERN_ERR
91 "Trying to install controller data for IRQ%d\n", irq);
92 return -EINVAL;
93 }
94
239007b8 95 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 96 desc->irq_data.handler_data = data;
239007b8 97 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
98 return 0;
99}
a0cd9ca2 100EXPORT_SYMBOL(irq_set_handler_data);
dd87eb3a 101
5b912c10 102/**
a0cd9ca2 103 * irq_set_msi_desc - set MSI descriptor data for an irq
5b912c10 104 * @irq: Interrupt number
472900b8 105 * @entry: Pointer to MSI descriptor data
5b912c10 106 *
24b26d42 107 * Set the MSI descriptor entry for an irq
5b912c10 108 */
a0cd9ca2 109int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
5b912c10 110{
d3c60047 111 struct irq_desc *desc = irq_to_desc(irq);
5b912c10
EB
112 unsigned long flags;
113
7d94f7ca 114 if (!desc) {
5b912c10
EB
115 printk(KERN_ERR
116 "Trying to install msi data for IRQ%d\n", irq);
117 return -EINVAL;
118 }
7d94f7ca 119
239007b8 120 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 121 desc->irq_data.msi_desc = entry;
7fe3730d
ME
122 if (entry)
123 entry->irq = irq;
239007b8 124 raw_spin_unlock_irqrestore(&desc->lock, flags);
5b912c10
EB
125 return 0;
126}
127
dd87eb3a 128/**
a0cd9ca2 129 * irq_set_chip_data - set irq chip data for an irq
dd87eb3a
TG
130 * @irq: Interrupt number
131 * @data: Pointer to chip specific data
132 *
133 * Set the hardware irq chip data for an irq
134 */
a0cd9ca2 135int irq_set_chip_data(unsigned int irq, void *data)
dd87eb3a 136{
d3c60047 137 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
138 unsigned long flags;
139
7d94f7ca
YL
140 if (!desc) {
141 printk(KERN_ERR
142 "Trying to install chip data for IRQ%d\n", irq);
143 return -EINVAL;
144 }
145
6b8ff312 146 if (!desc->irq_data.chip) {
dd87eb3a
TG
147 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
148 return -EINVAL;
149 }
150
239007b8 151 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 152 desc->irq_data.chip_data = data;
239007b8 153 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
154
155 return 0;
156}
a0cd9ca2 157EXPORT_SYMBOL(irq_set_chip_data);
dd87eb3a 158
f303a6dd
TG
159struct irq_data *irq_get_irq_data(unsigned int irq)
160{
161 struct irq_desc *desc = irq_to_desc(irq);
162
163 return desc ? &desc->irq_data : NULL;
164}
165EXPORT_SYMBOL_GPL(irq_get_irq_data);
166
399b5da2
TG
167/**
168 * set_irq_nested_thread - Set/Reset the IRQ_NESTED_THREAD flag of an irq
169 *
170 * @irq: Interrupt number
171 * @nest: 0 to clear / 1 to set the IRQ_NESTED_THREAD flag
172 *
173 * The IRQ_NESTED_THREAD flag indicates that on
174 * request_threaded_irq() no separate interrupt thread should be
175 * created for the irq as the handler are called nested in the
176 * context of a demultiplexing interrupt handler thread.
177 */
178void set_irq_nested_thread(unsigned int irq, int nest)
179{
180 struct irq_desc *desc = irq_to_desc(irq);
181 unsigned long flags;
182
183 if (!desc)
184 return;
185
239007b8 186 raw_spin_lock_irqsave(&desc->lock, flags);
399b5da2
TG
187 if (nest)
188 desc->status |= IRQ_NESTED_THREAD;
189 else
190 desc->status &= ~IRQ_NESTED_THREAD;
239007b8 191 raw_spin_unlock_irqrestore(&desc->lock, flags);
399b5da2
TG
192}
193EXPORT_SYMBOL_GPL(set_irq_nested_thread);
194
46999238
TG
195int irq_startup(struct irq_desc *desc)
196{
197 desc->status &= ~(IRQ_MASKED | IRQ_DISABLED);
198 desc->depth = 0;
199
200 if (desc->irq_data.chip->irq_startup)
201 return desc->irq_data.chip->irq_startup(&desc->irq_data);
202
87923470 203 irq_enable(desc);
46999238
TG
204 return 0;
205}
206
207void irq_shutdown(struct irq_desc *desc)
208{
209 desc->status |= IRQ_MASKED | IRQ_DISABLED;
210 desc->depth = 1;
50f7c032
TG
211 if (desc->irq_data.chip->irq_shutdown)
212 desc->irq_data.chip->irq_shutdown(&desc->irq_data);
213 if (desc->irq_data.chip->irq_disable)
214 desc->irq_data.chip->irq_disable(&desc->irq_data);
215 else
216 desc->irq_data.chip->irq_mask(&desc->irq_data);
46999238
TG
217}
218
87923470
TG
219void irq_enable(struct irq_desc *desc)
220{
50f7c032
TG
221 if (desc->irq_data.chip->irq_enable)
222 desc->irq_data.chip->irq_enable(&desc->irq_data);
223 else
224 desc->irq_data.chip->irq_unmask(&desc->irq_data);
dd87eb3a
TG
225 desc->status &= ~IRQ_MASKED;
226}
227
50f7c032 228void irq_disable(struct irq_desc *desc)
89d694b9 229{
50f7c032
TG
230 if (desc->irq_data.chip->irq_disable) {
231 desc->irq_data.chip->irq_disable(&desc->irq_data);
232 desc->status |= IRQ_MASKED;
233 }
89d694b9
TG
234}
235
bd151412 236#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
3876ec9e 237/* Temporary migration helpers */
e2c0f8ff
TG
238static void compat_irq_mask(struct irq_data *data)
239{
240 data->chip->mask(data->irq);
241}
242
0eda58b7
TG
243static void compat_irq_unmask(struct irq_data *data)
244{
245 data->chip->unmask(data->irq);
246}
247
22a49163
TG
248static void compat_irq_ack(struct irq_data *data)
249{
250 data->chip->ack(data->irq);
251}
252
9205e31d
TG
253static void compat_irq_mask_ack(struct irq_data *data)
254{
255 data->chip->mask_ack(data->irq);
256}
257
0c5c1557
TG
258static void compat_irq_eoi(struct irq_data *data)
259{
260 data->chip->eoi(data->irq);
261}
262
c5f75634
TG
263static void compat_irq_enable(struct irq_data *data)
264{
265 data->chip->enable(data->irq);
266}
267
bc310dda
TG
268static void compat_irq_disable(struct irq_data *data)
269{
270 data->chip->disable(data->irq);
271}
272
273static void compat_irq_shutdown(struct irq_data *data)
274{
275 data->chip->shutdown(data->irq);
276}
277
37e12df7
TG
278static unsigned int compat_irq_startup(struct irq_data *data)
279{
280 return data->chip->startup(data->irq);
281}
282
c96b3b3c
TG
283static int compat_irq_set_affinity(struct irq_data *data,
284 const struct cpumask *dest, bool force)
285{
286 return data->chip->set_affinity(data->irq, dest);
287}
288
b2ba2c30
TG
289static int compat_irq_set_type(struct irq_data *data, unsigned int type)
290{
291 return data->chip->set_type(data->irq, type);
292}
293
2f7e99bb
TG
294static int compat_irq_set_wake(struct irq_data *data, unsigned int on)
295{
296 return data->chip->set_wake(data->irq, on);
297}
298
21e2b8c6
TG
299static int compat_irq_retrigger(struct irq_data *data)
300{
301 return data->chip->retrigger(data->irq);
302}
303
3876ec9e
TG
304static void compat_bus_lock(struct irq_data *data)
305{
306 data->chip->bus_lock(data->irq);
307}
308
309static void compat_bus_sync_unlock(struct irq_data *data)
310{
311 data->chip->bus_sync_unlock(data->irq);
312}
bd151412 313#endif
3876ec9e 314
dd87eb3a
TG
315/*
316 * Fixup enable/disable function pointers
317 */
318void irq_chip_set_defaults(struct irq_chip *chip)
319{
bd151412 320#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
c5f75634
TG
321 if (chip->enable)
322 chip->irq_enable = compat_irq_enable;
bc310dda
TG
323 if (chip->disable)
324 chip->irq_disable = compat_irq_disable;
325 if (chip->shutdown)
326 chip->irq_shutdown = compat_irq_shutdown;
37e12df7
TG
327 if (chip->startup)
328 chip->irq_startup = compat_irq_startup;
b86432b4
ZY
329 if (!chip->end)
330 chip->end = dummy_irq_chip.end;
3876ec9e
TG
331 if (chip->bus_lock)
332 chip->irq_bus_lock = compat_bus_lock;
333 if (chip->bus_sync_unlock)
334 chip->irq_bus_sync_unlock = compat_bus_sync_unlock;
e2c0f8ff
TG
335 if (chip->mask)
336 chip->irq_mask = compat_irq_mask;
0eda58b7
TG
337 if (chip->unmask)
338 chip->irq_unmask = compat_irq_unmask;
22a49163
TG
339 if (chip->ack)
340 chip->irq_ack = compat_irq_ack;
9205e31d
TG
341 if (chip->mask_ack)
342 chip->irq_mask_ack = compat_irq_mask_ack;
0c5c1557
TG
343 if (chip->eoi)
344 chip->irq_eoi = compat_irq_eoi;
c96b3b3c
TG
345 if (chip->set_affinity)
346 chip->irq_set_affinity = compat_irq_set_affinity;
b2ba2c30
TG
347 if (chip->set_type)
348 chip->irq_set_type = compat_irq_set_type;
2f7e99bb
TG
349 if (chip->set_wake)
350 chip->irq_set_wake = compat_irq_set_wake;
21e2b8c6
TG
351 if (chip->retrigger)
352 chip->irq_retrigger = compat_irq_retrigger;
bd151412 353#endif
dd87eb3a
TG
354}
355
9205e31d 356static inline void mask_ack_irq(struct irq_desc *desc)
dd87eb3a 357{
9205e31d
TG
358 if (desc->irq_data.chip->irq_mask_ack)
359 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
dd87eb3a 360 else {
e2c0f8ff 361 desc->irq_data.chip->irq_mask(&desc->irq_data);
22a49163
TG
362 if (desc->irq_data.chip->irq_ack)
363 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a 364 }
0b1adaa0
TG
365 desc->status |= IRQ_MASKED;
366}
367
e2c0f8ff 368static inline void mask_irq(struct irq_desc *desc)
0b1adaa0 369{
e2c0f8ff
TG
370 if (desc->irq_data.chip->irq_mask) {
371 desc->irq_data.chip->irq_mask(&desc->irq_data);
0b1adaa0
TG
372 desc->status |= IRQ_MASKED;
373 }
374}
375
0eda58b7 376static inline void unmask_irq(struct irq_desc *desc)
0b1adaa0 377{
0eda58b7
TG
378 if (desc->irq_data.chip->irq_unmask) {
379 desc->irq_data.chip->irq_unmask(&desc->irq_data);
0b1adaa0
TG
380 desc->status &= ~IRQ_MASKED;
381 }
dd87eb3a
TG
382}
383
399b5da2
TG
384/*
385 * handle_nested_irq - Handle a nested irq from a irq thread
386 * @irq: the interrupt number
387 *
388 * Handle interrupts which are nested into a threaded interrupt
389 * handler. The handler function is called inside the calling
390 * threads context.
391 */
392void handle_nested_irq(unsigned int irq)
393{
394 struct irq_desc *desc = irq_to_desc(irq);
395 struct irqaction *action;
396 irqreturn_t action_ret;
397
398 might_sleep();
399
239007b8 400 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
401
402 kstat_incr_irqs_this_cpu(irq, desc);
403
404 action = desc->action;
405 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
406 goto out_unlock;
407
408 desc->status |= IRQ_INPROGRESS;
239007b8 409 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
410
411 action_ret = action->thread_fn(action->irq, action->dev_id);
412 if (!noirqdebug)
413 note_interrupt(irq, desc, action_ret);
414
239007b8 415 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
416 desc->status &= ~IRQ_INPROGRESS;
417
418out_unlock:
239007b8 419 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
420}
421EXPORT_SYMBOL_GPL(handle_nested_irq);
422
fe200ae4
TG
423static bool irq_check_poll(struct irq_desc *desc)
424{
425 if (!(desc->status & IRQ_POLL_INPROGRESS))
426 return false;
427 return irq_wait_for_poll(desc);
428}
429
dd87eb3a
TG
430/**
431 * handle_simple_irq - Simple and software-decoded IRQs.
432 * @irq: the interrupt number
433 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
434 *
435 * Simple interrupts are either sent from a demultiplexing interrupt
436 * handler or come from hardware, where no interrupt hardware control
437 * is necessary.
438 *
439 * Note: The caller is expected to handle the ack, clear, mask and
440 * unmask issues if necessary.
441 */
7ad5b3a5 442void
7d12e780 443handle_simple_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
444{
445 struct irqaction *action;
446 irqreturn_t action_ret;
dd87eb3a 447
239007b8 448 raw_spin_lock(&desc->lock);
dd87eb3a
TG
449
450 if (unlikely(desc->status & IRQ_INPROGRESS))
fe200ae4
TG
451 if (!irq_check_poll(desc))
452 goto out_unlock;
453
971e5b35 454 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 455 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
456
457 action = desc->action;
971e5b35 458 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
dd87eb3a
TG
459 goto out_unlock;
460
461 desc->status |= IRQ_INPROGRESS;
239007b8 462 raw_spin_unlock(&desc->lock);
dd87eb3a 463
7d12e780 464 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 465 if (!noirqdebug)
7d12e780 466 note_interrupt(irq, desc, action_ret);
dd87eb3a 467
239007b8 468 raw_spin_lock(&desc->lock);
dd87eb3a
TG
469 desc->status &= ~IRQ_INPROGRESS;
470out_unlock:
239007b8 471 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
472}
473
474/**
475 * handle_level_irq - Level type irq handler
476 * @irq: the interrupt number
477 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
478 *
479 * Level type interrupts are active as long as the hardware line has
480 * the active level. This may require to mask the interrupt and unmask
481 * it after the associated handler has acknowledged the device, so the
482 * interrupt line is back to inactive.
483 */
7ad5b3a5 484void
7d12e780 485handle_level_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 486{
dd87eb3a
TG
487 struct irqaction *action;
488 irqreturn_t action_ret;
489
239007b8 490 raw_spin_lock(&desc->lock);
9205e31d 491 mask_ack_irq(desc);
dd87eb3a
TG
492
493 if (unlikely(desc->status & IRQ_INPROGRESS))
fe200ae4
TG
494 if (!irq_check_poll(desc))
495 goto out_unlock;
496
dd87eb3a 497 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 498 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
499
500 /*
501 * If its disabled or no action available
502 * keep it masked and get out of here
503 */
504 action = desc->action;
49663421 505 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
86998aa6 506 goto out_unlock;
dd87eb3a
TG
507
508 desc->status |= IRQ_INPROGRESS;
239007b8 509 raw_spin_unlock(&desc->lock);
dd87eb3a 510
7d12e780 511 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 512 if (!noirqdebug)
7d12e780 513 note_interrupt(irq, desc, action_ret);
dd87eb3a 514
239007b8 515 raw_spin_lock(&desc->lock);
dd87eb3a 516 desc->status &= ~IRQ_INPROGRESS;
b25c340c 517
0b1adaa0 518 if (!(desc->status & (IRQ_DISABLED | IRQ_ONESHOT)))
0eda58b7 519 unmask_irq(desc);
86998aa6 520out_unlock:
239007b8 521 raw_spin_unlock(&desc->lock);
dd87eb3a 522}
14819ea1 523EXPORT_SYMBOL_GPL(handle_level_irq);
dd87eb3a
TG
524
525/**
47c2a3aa 526 * handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a
TG
527 * @irq: the interrupt number
528 * @desc: the interrupt description structure for this irq
dd87eb3a 529 *
47c2a3aa 530 * Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a
TG
531 * call when the interrupt has been serviced. This enables support
532 * for modern forms of interrupt handlers, which handle the flow
533 * details in hardware, transparently.
534 */
7ad5b3a5 535void
7d12e780 536handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 537{
dd87eb3a
TG
538 struct irqaction *action;
539 irqreturn_t action_ret;
540
239007b8 541 raw_spin_lock(&desc->lock);
dd87eb3a
TG
542
543 if (unlikely(desc->status & IRQ_INPROGRESS))
fe200ae4
TG
544 if (!irq_check_poll(desc))
545 goto out;
dd87eb3a
TG
546
547 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 548 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
549
550 /*
551 * If its disabled or no action available
76d21601 552 * then mask it and get out of here:
dd87eb3a
TG
553 */
554 action = desc->action;
98bb244b
BH
555 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
556 desc->status |= IRQ_PENDING;
e2c0f8ff 557 mask_irq(desc);
dd87eb3a 558 goto out;
98bb244b 559 }
dd87eb3a
TG
560
561 desc->status |= IRQ_INPROGRESS;
98bb244b 562 desc->status &= ~IRQ_PENDING;
239007b8 563 raw_spin_unlock(&desc->lock);
dd87eb3a 564
7d12e780 565 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 566 if (!noirqdebug)
7d12e780 567 note_interrupt(irq, desc, action_ret);
dd87eb3a 568
239007b8 569 raw_spin_lock(&desc->lock);
dd87eb3a
TG
570 desc->status &= ~IRQ_INPROGRESS;
571out:
0c5c1557 572 desc->irq_data.chip->irq_eoi(&desc->irq_data);
dd87eb3a 573
239007b8 574 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
575}
576
577/**
578 * handle_edge_irq - edge type IRQ handler
579 * @irq: the interrupt number
580 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
581 *
582 * Interrupt occures on the falling and/or rising edge of a hardware
583 * signal. The occurence is latched into the irq controller hardware
584 * and must be acked in order to be reenabled. After the ack another
585 * interrupt can happen on the same source even before the first one
dfff0615 586 * is handled by the associated event handler. If this happens it
dd87eb3a
TG
587 * might be necessary to disable (mask) the interrupt depending on the
588 * controller hardware. This requires to reenable the interrupt inside
589 * of the loop which handles the interrupts which have arrived while
590 * the handler was running. If all pending interrupts are handled, the
591 * loop is left.
592 */
7ad5b3a5 593void
7d12e780 594handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 595{
239007b8 596 raw_spin_lock(&desc->lock);
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TG
597
598 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
599
600 /*
601 * If we're currently running this IRQ, or its disabled,
602 * we shouldn't process the IRQ. Mark it pending, handle
603 * the necessary masking and go out
604 */
605 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
606 !desc->action)) {
fe200ae4
TG
607 if (!irq_check_poll(desc)) {
608 desc->status |= (IRQ_PENDING | IRQ_MASKED);
609 mask_ack_irq(desc);
610 goto out_unlock;
611 }
dd87eb3a 612 }
d6c88a50 613 kstat_incr_irqs_this_cpu(irq, desc);
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TG
614
615 /* Start handling the irq */
22a49163 616 desc->irq_data.chip->irq_ack(&desc->irq_data);
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TG
617
618 /* Mark the IRQ currently in progress.*/
619 desc->status |= IRQ_INPROGRESS;
620
621 do {
622 struct irqaction *action = desc->action;
623 irqreturn_t action_ret;
624
625 if (unlikely(!action)) {
e2c0f8ff 626 mask_irq(desc);
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TG
627 goto out_unlock;
628 }
629
630 /*
631 * When another irq arrived while we were handling
632 * one, we could have masked the irq.
633 * Renable it, if it was not disabled in meantime.
634 */
635 if (unlikely((desc->status &
636 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
637 (IRQ_PENDING | IRQ_MASKED))) {
0eda58b7 638 unmask_irq(desc);
dd87eb3a
TG
639 }
640
641 desc->status &= ~IRQ_PENDING;
239007b8 642 raw_spin_unlock(&desc->lock);
7d12e780 643 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 644 if (!noirqdebug)
7d12e780 645 note_interrupt(irq, desc, action_ret);
239007b8 646 raw_spin_lock(&desc->lock);
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647
648 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
649
650 desc->status &= ~IRQ_INPROGRESS;
651out_unlock:
239007b8 652 raw_spin_unlock(&desc->lock);
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TG
653}
654
dd87eb3a 655/**
24b26d42 656 * handle_percpu_irq - Per CPU local irq handler
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TG
657 * @irq: the interrupt number
658 * @desc: the interrupt description structure for this irq
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659 *
660 * Per CPU interrupts on SMP machines without locking requirements
661 */
7ad5b3a5 662void
7d12e780 663handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
664{
665 irqreturn_t action_ret;
666
d6c88a50 667 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a 668
22a49163
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669 if (desc->irq_data.chip->irq_ack)
670 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a 671
7d12e780 672 action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a 673 if (!noirqdebug)
7d12e780 674 note_interrupt(irq, desc, action_ret);
dd87eb3a 675
0c5c1557
TG
676 if (desc->irq_data.chip->irq_eoi)
677 desc->irq_data.chip->irq_eoi(&desc->irq_data);
dd87eb3a
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678}
679
dd87eb3a 680void
a460e745
IM
681__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
682 const char *name)
dd87eb3a 683{
d3c60047 684 struct irq_desc *desc = irq_to_desc(irq);
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685 unsigned long flags;
686
7d94f7ca 687 if (!desc) {
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TG
688 printk(KERN_ERR
689 "Trying to install type control for IRQ%d\n", irq);
690 return;
691 }
692
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693 if (!handle)
694 handle = handle_bad_irq;
6b8ff312 695 else if (desc->irq_data.chip == &no_irq_chip) {
f8b5473f 696 printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e 697 "for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f
TG
698 /*
699 * Some ARM implementations install a handler for really dumb
700 * interrupt hardware without setting an irq_chip. This worked
701 * with the ARM no_irq_chip but the check in setup_irq would
702 * prevent us to setup the interrupt at all. Switch it to
703 * dummy_irq_chip for easy transition.
704 */
6b8ff312 705 desc->irq_data.chip = &dummy_irq_chip;
f8b5473f 706 }
dd87eb3a 707
3876ec9e 708 chip_bus_lock(desc);
239007b8 709 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a
TG
710
711 /* Uninstall? */
712 if (handle == handle_bad_irq) {
6b8ff312 713 if (desc->irq_data.chip != &no_irq_chip)
9205e31d 714 mask_ack_irq(desc);
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715 desc->status |= IRQ_DISABLED;
716 desc->depth = 1;
717 }
718 desc->handle_irq = handle;
a460e745 719 desc->name = name;
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720
721 if (handle != handle_bad_irq && is_chained) {
dd87eb3a 722 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
46999238 723 irq_startup(desc);
dd87eb3a 724 }
239007b8 725 raw_spin_unlock_irqrestore(&desc->lock, flags);
3876ec9e 726 chip_bus_sync_unlock(desc);
dd87eb3a 727}
14819ea1 728EXPORT_SYMBOL_GPL(__set_irq_handler);
dd87eb3a
TG
729
730void
731set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94 732 irq_flow_handler_t handle)
dd87eb3a
TG
733{
734 set_irq_chip(irq, chip);
a460e745 735 __set_irq_handler(irq, handle, 0, NULL);
dd87eb3a
TG
736}
737
a460e745
IM
738void
739set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
740 irq_flow_handler_t handle, const char *name)
dd87eb3a 741{
a460e745
IM
742 set_irq_chip(irq, chip);
743 __set_irq_handler(irq, handle, 0, name);
dd87eb3a 744}
46f4f8f6 745
44247184 746void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
46f4f8f6 747{
d3c60047 748 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
749 unsigned long flags;
750
44247184 751 if (!desc)
46f4f8f6 752 return;
46f4f8f6 753
44247184
TG
754 /* Sanitize flags */
755 set &= IRQF_MODIFY_MASK;
756 clr &= IRQF_MODIFY_MASK;
46f4f8f6 757
239007b8 758 raw_spin_lock_irqsave(&desc->lock, flags);
44247184
TG
759 desc->status &= ~clr;
760 desc->status |= set;
239007b8 761 raw_spin_unlock_irqrestore(&desc->lock, flags);
46f4f8f6 762}