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1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/handle.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
1da177e4 LT |
6 | * |
7 | * This file contains the core interrupt handling code. | |
a34db9b2 IM |
8 | * |
9 | * Detailed information is available in Documentation/DocBook/genericirq | |
10 | * | |
1da177e4 LT |
11 | */ |
12 | ||
13 | #include <linux/irq.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/random.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel_stat.h> | |
0b8f1efa YL |
18 | #include <linux/rculist.h> |
19 | #include <linux/hash.h> | |
0fa0ebbf | 20 | #include <linux/bootmem.h> |
1da177e4 | 21 | |
a8d154b0 SR |
22 | #define CREATE_TRACE_POINTS |
23 | #include <trace/irq.h> | |
24 | ||
1da177e4 LT |
25 | #include "internals.h" |
26 | ||
0b8f1efa YL |
27 | /* |
28 | * lockdep: we want to handle all irq_desc locks as a single lock-class: | |
29 | */ | |
48a1b10a | 30 | struct lock_class_key irq_desc_lock_class; |
0b8f1efa | 31 | |
6a6de9ef TG |
32 | /** |
33 | * handle_bad_irq - handle spurious and unhandled irqs | |
43a1dd50 HK |
34 | * @irq: the interrupt number |
35 | * @desc: description of the interrupt | |
43a1dd50 HK |
36 | * |
37 | * Handles spurious and unhandled IRQ's. It also prints a debugmessage. | |
6a6de9ef | 38 | */ |
d6c88a50 | 39 | void handle_bad_irq(unsigned int irq, struct irq_desc *desc) |
6a6de9ef | 40 | { |
43f77759 | 41 | print_irq_desc(irq, desc); |
d6c88a50 | 42 | kstat_incr_irqs_this_cpu(irq, desc); |
6a6de9ef TG |
43 | ack_bad_irq(irq); |
44 | } | |
45 | ||
97179fd4 DD |
46 | #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS) |
47 | static void __init init_irq_default_affinity(void) | |
48 | { | |
49 | alloc_bootmem_cpumask_var(&irq_default_affinity); | |
50 | cpumask_setall(irq_default_affinity); | |
51 | } | |
52 | #else | |
53 | static void __init init_irq_default_affinity(void) | |
54 | { | |
55 | } | |
56 | #endif | |
57 | ||
1da177e4 LT |
58 | /* |
59 | * Linux has a controller-independent interrupt architecture. | |
60 | * Every controller has a 'controller-template', that is used | |
61 | * by the main code to do the right thing. Each driver-visible | |
06fcb0c6 | 62 | * interrupt source is transparently wired to the appropriate |
1da177e4 LT |
63 | * controller. Thus drivers need not be aware of the |
64 | * interrupt-controller. | |
65 | * | |
66 | * The code is designed to be easily extended with new/different | |
67 | * interrupt controllers, without having to do assembly magic or | |
68 | * having to touch the generic code. | |
69 | * | |
70 | * Controller mappings for all interrupt sources: | |
71 | */ | |
85c0f909 | 72 | int nr_irqs = NR_IRQS; |
fa42d10d | 73 | EXPORT_SYMBOL_GPL(nr_irqs); |
d60458b2 | 74 | |
0b8f1efa | 75 | #ifdef CONFIG_SPARSE_IRQ |
92296c6d | 76 | |
0b8f1efa YL |
77 | static struct irq_desc irq_desc_init = { |
78 | .irq = -1, | |
79 | .status = IRQ_DISABLED, | |
80 | .chip = &no_irq_chip, | |
81 | .handle_irq = handle_bad_irq, | |
82 | .depth = 1, | |
83 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock), | |
0b8f1efa YL |
84 | }; |
85 | ||
48a1b10a | 86 | void init_kstat_irqs(struct irq_desc *desc, int cpu, int nr) |
0b8f1efa | 87 | { |
0b8f1efa | 88 | int node; |
005bf0e6 | 89 | void *ptr; |
0b8f1efa YL |
90 | |
91 | node = cpu_to_node(cpu); | |
005bf0e6 | 92 | ptr = kzalloc_node(nr * sizeof(*desc->kstat_irqs), GFP_ATOMIC, node); |
0b8f1efa | 93 | |
005bf0e6 YL |
94 | /* |
95 | * don't overwite if can not get new one | |
96 | * init_copy_kstat_irqs() could still use old one | |
97 | */ | |
98 | if (ptr) { | |
99 | printk(KERN_DEBUG " alloc kstat_irqs on cpu %d node %d\n", | |
100 | cpu, node); | |
101 | desc->kstat_irqs = ptr; | |
102 | } | |
0b8f1efa YL |
103 | } |
104 | ||
0b8f1efa YL |
105 | static void init_one_irq_desc(int irq, struct irq_desc *desc, int cpu) |
106 | { | |
107 | memcpy(desc, &irq_desc_init, sizeof(struct irq_desc)); | |
793f7b12 IM |
108 | |
109 | spin_lock_init(&desc->lock); | |
0b8f1efa YL |
110 | desc->irq = irq; |
111 | #ifdef CONFIG_SMP | |
112 | desc->cpu = cpu; | |
113 | #endif | |
114 | lockdep_set_class(&desc->lock, &irq_desc_lock_class); | |
115 | init_kstat_irqs(desc, cpu, nr_cpu_ids); | |
116 | if (!desc->kstat_irqs) { | |
117 | printk(KERN_ERR "can not alloc kstat_irqs\n"); | |
118 | BUG_ON(1); | |
119 | } | |
802bf931 | 120 | if (!init_alloc_desc_masks(desc, cpu, false)) { |
7f7ace0c MT |
121 | printk(KERN_ERR "can not alloc irq_desc cpumasks\n"); |
122 | BUG_ON(1); | |
123 | } | |
0b8f1efa YL |
124 | arch_init_chip_data(desc, cpu); |
125 | } | |
126 | ||
127 | /* | |
128 | * Protect the sparse_irqs: | |
129 | */ | |
48a1b10a | 130 | DEFINE_SPINLOCK(sparse_irq_lock); |
0b8f1efa | 131 | |
0fa0ebbf | 132 | struct irq_desc **irq_desc_ptrs __read_mostly; |
0b8f1efa | 133 | |
99d093d1 YL |
134 | static struct irq_desc irq_desc_legacy[NR_IRQS_LEGACY] __cacheline_aligned_in_smp = { |
135 | [0 ... NR_IRQS_LEGACY-1] = { | |
0b8f1efa YL |
136 | .irq = -1, |
137 | .status = IRQ_DISABLED, | |
138 | .chip = &no_irq_chip, | |
139 | .handle_irq = handle_bad_irq, | |
140 | .depth = 1, | |
141 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc_init.lock), | |
0b8f1efa YL |
142 | } |
143 | }; | |
144 | ||
542d865b | 145 | static unsigned int *kstat_irqs_legacy; |
0b8f1efa | 146 | |
13a0c3c2 | 147 | int __init early_irq_init(void) |
0b8f1efa YL |
148 | { |
149 | struct irq_desc *desc; | |
150 | int legacy_count; | |
151 | int i; | |
152 | ||
97179fd4 DD |
153 | init_irq_default_affinity(); |
154 | ||
4a046d17 YL |
155 | /* initialize nr_irqs based on nr_cpu_ids */ |
156 | arch_probe_nr_irqs(); | |
9594949b MT |
157 | printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d\n", NR_IRQS, nr_irqs); |
158 | ||
0b8f1efa YL |
159 | desc = irq_desc_legacy; |
160 | legacy_count = ARRAY_SIZE(irq_desc_legacy); | |
161 | ||
0fa0ebbf MT |
162 | /* allocate irq_desc_ptrs array based on nr_irqs */ |
163 | irq_desc_ptrs = alloc_bootmem(nr_irqs * sizeof(void *)); | |
164 | ||
542d865b MT |
165 | /* allocate based on nr_cpu_ids */ |
166 | /* FIXME: invert kstat_irgs, and it'd be a per_cpu_alloc'd thing */ | |
167 | kstat_irqs_legacy = alloc_bootmem(NR_IRQS_LEGACY * nr_cpu_ids * | |
168 | sizeof(int)); | |
169 | ||
0b8f1efa YL |
170 | for (i = 0; i < legacy_count; i++) { |
171 | desc[i].irq = i; | |
542d865b | 172 | desc[i].kstat_irqs = kstat_irqs_legacy + i * nr_cpu_ids; |
fa6beb37 | 173 | lockdep_set_class(&desc[i].lock, &irq_desc_lock_class); |
7f7ace0c | 174 | init_alloc_desc_masks(&desc[i], 0, true); |
0b8f1efa YL |
175 | irq_desc_ptrs[i] = desc + i; |
176 | } | |
177 | ||
9594949b | 178 | for (i = legacy_count; i < nr_irqs; i++) |
0b8f1efa YL |
179 | irq_desc_ptrs[i] = NULL; |
180 | ||
13a0c3c2 | 181 | return arch_early_irq_init(); |
0b8f1efa YL |
182 | } |
183 | ||
184 | struct irq_desc *irq_to_desc(unsigned int irq) | |
185 | { | |
0fa0ebbf MT |
186 | if (irq_desc_ptrs && irq < nr_irqs) |
187 | return irq_desc_ptrs[irq]; | |
188 | ||
189 | return NULL; | |
0b8f1efa YL |
190 | } |
191 | ||
192 | struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu) | |
193 | { | |
194 | struct irq_desc *desc; | |
195 | unsigned long flags; | |
196 | int node; | |
197 | ||
9594949b | 198 | if (irq >= nr_irqs) { |
e2f4d065 MT |
199 | WARN(1, "irq (%d) >= nr_irqs (%d) in irq_to_desc_alloc\n", |
200 | irq, nr_irqs); | |
0b8f1efa YL |
201 | return NULL; |
202 | } | |
203 | ||
204 | desc = irq_desc_ptrs[irq]; | |
205 | if (desc) | |
206 | return desc; | |
207 | ||
208 | spin_lock_irqsave(&sparse_irq_lock, flags); | |
209 | ||
210 | /* We have to check it to avoid races with another CPU */ | |
211 | desc = irq_desc_ptrs[irq]; | |
212 | if (desc) | |
213 | goto out_unlock; | |
214 | ||
215 | node = cpu_to_node(cpu); | |
216 | desc = kzalloc_node(sizeof(*desc), GFP_ATOMIC, node); | |
217 | printk(KERN_DEBUG " alloc irq_desc for %d on cpu %d node %d\n", | |
218 | irq, cpu, node); | |
219 | if (!desc) { | |
220 | printk(KERN_ERR "can not alloc irq_desc\n"); | |
221 | BUG_ON(1); | |
222 | } | |
223 | init_one_irq_desc(irq, desc, cpu); | |
224 | ||
225 | irq_desc_ptrs[irq] = desc; | |
226 | ||
227 | out_unlock: | |
228 | spin_unlock_irqrestore(&sparse_irq_lock, flags); | |
229 | ||
230 | return desc; | |
231 | } | |
232 | ||
f9af0e70 | 233 | #else /* !CONFIG_SPARSE_IRQ */ |
0b8f1efa | 234 | |
e729aa16 | 235 | struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = { |
1da177e4 | 236 | [0 ... NR_IRQS-1] = { |
4f167fb4 | 237 | .status = IRQ_DISABLED, |
f1c2662c | 238 | .chip = &no_irq_chip, |
7a55713a | 239 | .handle_irq = handle_bad_irq, |
94d39e1f | 240 | .depth = 1, |
aac3f2b6 | 241 | .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock), |
1da177e4 LT |
242 | } |
243 | }; | |
08678b08 | 244 | |
d7e51e66 | 245 | static unsigned int kstat_irqs_all[NR_IRQS][NR_CPUS]; |
12026ea1 YL |
246 | int __init early_irq_init(void) |
247 | { | |
248 | struct irq_desc *desc; | |
249 | int count; | |
250 | int i; | |
251 | ||
97179fd4 DD |
252 | init_irq_default_affinity(); |
253 | ||
9594949b MT |
254 | printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS); |
255 | ||
12026ea1 YL |
256 | desc = irq_desc; |
257 | count = ARRAY_SIZE(irq_desc); | |
258 | ||
d7e51e66 | 259 | for (i = 0; i < count; i++) { |
12026ea1 | 260 | desc[i].irq = i; |
7f7ace0c | 261 | init_alloc_desc_masks(&desc[i], 0, true); |
d7e51e66 YL |
262 | desc[i].kstat_irqs = kstat_irqs_all[i]; |
263 | } | |
12026ea1 YL |
264 | return arch_early_irq_init(); |
265 | } | |
266 | ||
f9af0e70 KM |
267 | struct irq_desc *irq_to_desc(unsigned int irq) |
268 | { | |
269 | return (irq < NR_IRQS) ? irq_desc + irq : NULL; | |
270 | } | |
271 | ||
272 | struct irq_desc *irq_to_desc_alloc_cpu(unsigned int irq, int cpu) | |
273 | { | |
274 | return irq_to_desc(irq); | |
275 | } | |
276 | #endif /* !CONFIG_SPARSE_IRQ */ | |
0b8f1efa | 277 | |
0f3c2a89 YL |
278 | void clear_kstat_irqs(struct irq_desc *desc) |
279 | { | |
280 | memset(desc->kstat_irqs, 0, nr_cpu_ids * sizeof(*(desc->kstat_irqs))); | |
281 | } | |
282 | ||
1da177e4 | 283 | /* |
77a5afec IM |
284 | * What should we do if we get a hw irq event on an illegal vector? |
285 | * Each architecture has to answer this themself. | |
1da177e4 | 286 | */ |
77a5afec | 287 | static void ack_bad(unsigned int irq) |
1da177e4 | 288 | { |
d3c60047 | 289 | struct irq_desc *desc = irq_to_desc(irq); |
08678b08 | 290 | |
08678b08 | 291 | print_irq_desc(irq, desc); |
1da177e4 LT |
292 | ack_bad_irq(irq); |
293 | } | |
294 | ||
77a5afec IM |
295 | /* |
296 | * NOP functions | |
297 | */ | |
298 | static void noop(unsigned int irq) | |
299 | { | |
300 | } | |
301 | ||
302 | static unsigned int noop_ret(unsigned int irq) | |
303 | { | |
304 | return 0; | |
305 | } | |
306 | ||
307 | /* | |
308 | * Generic no controller implementation | |
309 | */ | |
f1c2662c IM |
310 | struct irq_chip no_irq_chip = { |
311 | .name = "none", | |
77a5afec IM |
312 | .startup = noop_ret, |
313 | .shutdown = noop, | |
314 | .enable = noop, | |
315 | .disable = noop, | |
316 | .ack = ack_bad, | |
317 | .end = noop, | |
1da177e4 LT |
318 | }; |
319 | ||
f8b5473f TG |
320 | /* |
321 | * Generic dummy implementation which can be used for | |
322 | * real dumb interrupt sources | |
323 | */ | |
324 | struct irq_chip dummy_irq_chip = { | |
325 | .name = "dummy", | |
326 | .startup = noop_ret, | |
327 | .shutdown = noop, | |
328 | .enable = noop, | |
329 | .disable = noop, | |
330 | .ack = noop, | |
331 | .mask = noop, | |
332 | .unmask = noop, | |
333 | .end = noop, | |
334 | }; | |
335 | ||
1da177e4 LT |
336 | /* |
337 | * Special, empty irq handler: | |
338 | */ | |
7d12e780 | 339 | irqreturn_t no_action(int cpl, void *dev_id) |
1da177e4 LT |
340 | { |
341 | return IRQ_NONE; | |
342 | } | |
343 | ||
f48fe81e TG |
344 | static void warn_no_thread(unsigned int irq, struct irqaction *action) |
345 | { | |
346 | if (test_and_set_bit(IRQTF_WARNED, &action->thread_flags)) | |
347 | return; | |
348 | ||
349 | printk(KERN_WARNING "IRQ %d device %s returned IRQ_WAKE_THREAD " | |
350 | "but no thread function available.", irq, action->name); | |
351 | } | |
352 | ||
8d28bc75 IM |
353 | /** |
354 | * handle_IRQ_event - irq action chain handler | |
355 | * @irq: the interrupt number | |
8d28bc75 IM |
356 | * @action: the interrupt action chain for this irq |
357 | * | |
358 | * Handles the action chain of an irq event | |
1da177e4 | 359 | */ |
7d12e780 | 360 | irqreturn_t handle_IRQ_event(unsigned int irq, struct irqaction *action) |
1da177e4 | 361 | { |
908dcecd JB |
362 | irqreturn_t ret, retval = IRQ_NONE; |
363 | unsigned int status = 0; | |
1da177e4 | 364 | |
044d4084 PZ |
365 | WARN_ONCE(!in_irq(), "BUG: IRQ handler called from non-hardirq context!"); |
366 | ||
3cca53b0 | 367 | if (!(action->flags & IRQF_DISABLED)) |
366c7f55 | 368 | local_irq_enable_in_hardirq(); |
1da177e4 LT |
369 | |
370 | do { | |
af39241b | 371 | trace_irq_handler_entry(irq, action); |
7d12e780 | 372 | ret = action->handler(irq, action->dev_id); |
af39241b | 373 | trace_irq_handler_exit(irq, action, ret); |
3aa551c9 TG |
374 | |
375 | switch (ret) { | |
376 | case IRQ_WAKE_THREAD: | |
f48fe81e TG |
377 | /* |
378 | * Set result to handled so the spurious check | |
379 | * does not trigger. | |
380 | */ | |
381 | ret = IRQ_HANDLED; | |
382 | ||
383 | /* | |
384 | * Catch drivers which return WAKE_THREAD but | |
385 | * did not set up a thread function | |
386 | */ | |
387 | if (unlikely(!action->thread_fn)) { | |
388 | warn_no_thread(irq, action); | |
389 | break; | |
390 | } | |
391 | ||
3aa551c9 TG |
392 | /* |
393 | * Wake up the handler thread for this | |
394 | * action. In case the thread crashed and was | |
395 | * killed we just pretend that we handled the | |
396 | * interrupt. The hardirq handler above has | |
397 | * disabled the device interrupt, so no irq | |
398 | * storm is lurking. | |
399 | */ | |
400 | if (likely(!test_bit(IRQTF_DIED, | |
401 | &action->thread_flags))) { | |
402 | set_bit(IRQTF_RUNTHREAD, &action->thread_flags); | |
403 | wake_up_process(action->thread); | |
404 | } | |
405 | ||
3aa551c9 TG |
406 | /* Fall through to add to randomness */ |
407 | case IRQ_HANDLED: | |
1da177e4 | 408 | status |= action->flags; |
3aa551c9 TG |
409 | break; |
410 | ||
411 | default: | |
412 | break; | |
413 | } | |
414 | ||
1da177e4 LT |
415 | retval |= ret; |
416 | action = action->next; | |
417 | } while (action); | |
418 | ||
3cca53b0 | 419 | if (status & IRQF_SAMPLE_RANDOM) |
1da177e4 LT |
420 | add_interrupt_randomness(irq); |
421 | local_irq_disable(); | |
422 | ||
423 | return retval; | |
424 | } | |
425 | ||
af8c65b5 | 426 | #ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ |
0e57aa11 TG |
427 | |
428 | #ifdef CONFIG_ENABLE_WARN_DEPRECATED | |
429 | # warning __do_IRQ is deprecated. Please convert to proper flow handlers | |
430 | #endif | |
431 | ||
8d28bc75 IM |
432 | /** |
433 | * __do_IRQ - original all in one highlevel IRQ handler | |
434 | * @irq: the interrupt number | |
8d28bc75 IM |
435 | * |
436 | * __do_IRQ handles all normal device IRQ's (the special | |
1da177e4 LT |
437 | * SMP cross-CPU interrupts have their own specific |
438 | * handlers). | |
8d28bc75 IM |
439 | * |
440 | * This is the original x86 implementation which is used for every | |
441 | * interrupt type. | |
1da177e4 | 442 | */ |
7ad5b3a5 | 443 | unsigned int __do_IRQ(unsigned int irq) |
1da177e4 | 444 | { |
08678b08 | 445 | struct irq_desc *desc = irq_to_desc(irq); |
06fcb0c6 | 446 | struct irqaction *action; |
1da177e4 LT |
447 | unsigned int status; |
448 | ||
d6c88a50 TG |
449 | kstat_incr_irqs_this_cpu(irq, desc); |
450 | ||
f26fdd59 | 451 | if (CHECK_IRQ_PER_CPU(desc->status)) { |
1da177e4 LT |
452 | irqreturn_t action_ret; |
453 | ||
454 | /* | |
455 | * No locking required for CPU-local interrupts: | |
456 | */ | |
48a1b10a | 457 | if (desc->chip->ack) { |
d1bef4ed | 458 | desc->chip->ack(irq); |
48a1b10a YL |
459 | /* get new one */ |
460 | desc = irq_remap_to_desc(irq, desc); | |
461 | } | |
c642b839 RA |
462 | if (likely(!(desc->status & IRQ_DISABLED))) { |
463 | action_ret = handle_IRQ_event(irq, desc->action); | |
464 | if (!noirqdebug) | |
465 | note_interrupt(irq, desc, action_ret); | |
466 | } | |
d1bef4ed | 467 | desc->chip->end(irq); |
1da177e4 LT |
468 | return 1; |
469 | } | |
470 | ||
471 | spin_lock(&desc->lock); | |
48a1b10a | 472 | if (desc->chip->ack) { |
d1bef4ed | 473 | desc->chip->ack(irq); |
48a1b10a YL |
474 | desc = irq_remap_to_desc(irq, desc); |
475 | } | |
1da177e4 LT |
476 | /* |
477 | * REPLAY is when Linux resends an IRQ that was dropped earlier | |
478 | * WAITING is used by probe to mark irqs that are being tested | |
479 | */ | |
480 | status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING); | |
481 | status |= IRQ_PENDING; /* we _want_ to handle it */ | |
482 | ||
483 | /* | |
484 | * If the IRQ is disabled for whatever reason, we cannot | |
485 | * use the action we have. | |
486 | */ | |
487 | action = NULL; | |
488 | if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) { | |
489 | action = desc->action; | |
490 | status &= ~IRQ_PENDING; /* we commit to handling */ | |
491 | status |= IRQ_INPROGRESS; /* we are handling it */ | |
492 | } | |
493 | desc->status = status; | |
494 | ||
495 | /* | |
496 | * If there is no IRQ handler or it was disabled, exit early. | |
497 | * Since we set PENDING, if another processor is handling | |
498 | * a different instance of this same irq, the other processor | |
499 | * will take care of it. | |
500 | */ | |
501 | if (unlikely(!action)) | |
502 | goto out; | |
503 | ||
504 | /* | |
505 | * Edge triggered interrupts need to remember | |
506 | * pending events. | |
507 | * This applies to any hw interrupts that allow a second | |
508 | * instance of the same irq to arrive while we are in do_IRQ | |
509 | * or in the handler. But the code here only handles the _second_ | |
510 | * instance of the irq, not the third or fourth. So it is mostly | |
511 | * useful for irq hardware that does not mask cleanly in an | |
512 | * SMP environment. | |
513 | */ | |
514 | for (;;) { | |
515 | irqreturn_t action_ret; | |
516 | ||
517 | spin_unlock(&desc->lock); | |
518 | ||
7d12e780 | 519 | action_ret = handle_IRQ_event(irq, action); |
1da177e4 | 520 | if (!noirqdebug) |
7d12e780 | 521 | note_interrupt(irq, desc, action_ret); |
b42172fc LT |
522 | |
523 | spin_lock(&desc->lock); | |
1da177e4 LT |
524 | if (likely(!(desc->status & IRQ_PENDING))) |
525 | break; | |
526 | desc->status &= ~IRQ_PENDING; | |
527 | } | |
528 | desc->status &= ~IRQ_INPROGRESS; | |
529 | ||
530 | out: | |
531 | /* | |
532 | * The ->end() handler has to deal with interrupts which got | |
533 | * disabled while the handler was running. | |
534 | */ | |
d1bef4ed | 535 | desc->chip->end(irq); |
1da177e4 LT |
536 | spin_unlock(&desc->lock); |
537 | ||
538 | return 1; | |
539 | } | |
af8c65b5 | 540 | #endif |
1da177e4 | 541 | |
243c7621 IM |
542 | void early_init_irq_lock_class(void) |
543 | { | |
10e58084 | 544 | struct irq_desc *desc; |
243c7621 IM |
545 | int i; |
546 | ||
0b8f1efa | 547 | for_each_irq_desc(i, desc) { |
10e58084 | 548 | lockdep_set_class(&desc->lock, &irq_desc_lock_class); |
0b8f1efa | 549 | } |
0b8f1efa | 550 | } |
0b8f1efa | 551 | |
0b8f1efa YL |
552 | unsigned int kstat_irqs_cpu(unsigned int irq, int cpu) |
553 | { | |
554 | struct irq_desc *desc = irq_to_desc(irq); | |
26ddd8d5 | 555 | return desc ? desc->kstat_irqs[cpu] : 0; |
243c7621 | 556 | } |
0b8f1efa YL |
557 | EXPORT_SYMBOL(kstat_irqs_cpu); |
558 |