]>
Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/handle.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006, Thomas Gleixner, Russell King | |
1da177e4 LT |
6 | * |
7 | * This file contains the core interrupt handling code. | |
a34db9b2 IM |
8 | * |
9 | * Detailed information is available in Documentation/DocBook/genericirq | |
10 | * | |
1da177e4 LT |
11 | */ |
12 | ||
13 | #include <linux/irq.h> | |
14 | #include <linux/module.h> | |
15 | #include <linux/random.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/kernel_stat.h> | |
18 | ||
19 | #include "internals.h" | |
20 | ||
6a6de9ef TG |
21 | /** |
22 | * handle_bad_irq - handle spurious and unhandled irqs | |
23 | */ | |
24 | void fastcall | |
25 | handle_bad_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs) | |
26 | { | |
27 | kstat_this_cpu.irqs[irq]++; | |
28 | ack_bad_irq(irq); | |
29 | } | |
30 | ||
1da177e4 LT |
31 | /* |
32 | * Linux has a controller-independent interrupt architecture. | |
33 | * Every controller has a 'controller-template', that is used | |
34 | * by the main code to do the right thing. Each driver-visible | |
06fcb0c6 | 35 | * interrupt source is transparently wired to the appropriate |
1da177e4 LT |
36 | * controller. Thus drivers need not be aware of the |
37 | * interrupt-controller. | |
38 | * | |
39 | * The code is designed to be easily extended with new/different | |
40 | * interrupt controllers, without having to do assembly magic or | |
41 | * having to touch the generic code. | |
42 | * | |
43 | * Controller mappings for all interrupt sources: | |
44 | */ | |
34ffdb72 | 45 | struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned = { |
1da177e4 | 46 | [0 ... NR_IRQS-1] = { |
4f167fb4 | 47 | .status = IRQ_DISABLED, |
f1c2662c | 48 | .chip = &no_irq_chip, |
7a55713a | 49 | .handle_irq = handle_bad_irq, |
94d39e1f | 50 | .depth = 1, |
a53da52f IM |
51 | .lock = SPIN_LOCK_UNLOCKED, |
52 | #ifdef CONFIG_SMP | |
53 | .affinity = CPU_MASK_ALL | |
54 | #endif | |
1da177e4 LT |
55 | } |
56 | }; | |
57 | ||
58 | /* | |
77a5afec IM |
59 | * What should we do if we get a hw irq event on an illegal vector? |
60 | * Each architecture has to answer this themself. | |
1da177e4 | 61 | */ |
77a5afec | 62 | static void ack_bad(unsigned int irq) |
1da177e4 | 63 | { |
1da177e4 LT |
64 | ack_bad_irq(irq); |
65 | } | |
66 | ||
77a5afec IM |
67 | /* |
68 | * NOP functions | |
69 | */ | |
70 | static void noop(unsigned int irq) | |
71 | { | |
72 | } | |
73 | ||
74 | static unsigned int noop_ret(unsigned int irq) | |
75 | { | |
76 | return 0; | |
77 | } | |
78 | ||
79 | /* | |
80 | * Generic no controller implementation | |
81 | */ | |
f1c2662c IM |
82 | struct irq_chip no_irq_chip = { |
83 | .name = "none", | |
77a5afec IM |
84 | .startup = noop_ret, |
85 | .shutdown = noop, | |
86 | .enable = noop, | |
87 | .disable = noop, | |
88 | .ack = ack_bad, | |
89 | .end = noop, | |
1da177e4 LT |
90 | }; |
91 | ||
92 | /* | |
93 | * Special, empty irq handler: | |
94 | */ | |
95 | irqreturn_t no_action(int cpl, void *dev_id, struct pt_regs *regs) | |
96 | { | |
97 | return IRQ_NONE; | |
98 | } | |
99 | ||
8d28bc75 IM |
100 | /** |
101 | * handle_IRQ_event - irq action chain handler | |
102 | * @irq: the interrupt number | |
103 | * @regs: pointer to a register structure | |
104 | * @action: the interrupt action chain for this irq | |
105 | * | |
106 | * Handles the action chain of an irq event | |
1da177e4 | 107 | */ |
2e60bbb6 IM |
108 | irqreturn_t handle_IRQ_event(unsigned int irq, struct pt_regs *regs, |
109 | struct irqaction *action) | |
1da177e4 | 110 | { |
908dcecd JB |
111 | irqreturn_t ret, retval = IRQ_NONE; |
112 | unsigned int status = 0; | |
1da177e4 LT |
113 | |
114 | if (!(action->flags & SA_INTERRUPT)) | |
115 | local_irq_enable(); | |
116 | ||
117 | do { | |
118 | ret = action->handler(irq, action->dev_id, regs); | |
119 | if (ret == IRQ_HANDLED) | |
120 | status |= action->flags; | |
121 | retval |= ret; | |
122 | action = action->next; | |
123 | } while (action); | |
124 | ||
125 | if (status & SA_SAMPLE_RANDOM) | |
126 | add_interrupt_randomness(irq); | |
127 | local_irq_disable(); | |
128 | ||
129 | return retval; | |
130 | } | |
131 | ||
8d28bc75 IM |
132 | /** |
133 | * __do_IRQ - original all in one highlevel IRQ handler | |
134 | * @irq: the interrupt number | |
135 | * @regs: pointer to a register structure | |
136 | * | |
137 | * __do_IRQ handles all normal device IRQ's (the special | |
1da177e4 LT |
138 | * SMP cross-CPU interrupts have their own specific |
139 | * handlers). | |
8d28bc75 IM |
140 | * |
141 | * This is the original x86 implementation which is used for every | |
142 | * interrupt type. | |
1da177e4 LT |
143 | */ |
144 | fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs) | |
145 | { | |
34ffdb72 | 146 | struct irq_desc *desc = irq_desc + irq; |
06fcb0c6 | 147 | struct irqaction *action; |
1da177e4 LT |
148 | unsigned int status; |
149 | ||
150 | kstat_this_cpu.irqs[irq]++; | |
f26fdd59 | 151 | if (CHECK_IRQ_PER_CPU(desc->status)) { |
1da177e4 LT |
152 | irqreturn_t action_ret; |
153 | ||
154 | /* | |
155 | * No locking required for CPU-local interrupts: | |
156 | */ | |
d1bef4ed IM |
157 | if (desc->chip->ack) |
158 | desc->chip->ack(irq); | |
1da177e4 | 159 | action_ret = handle_IRQ_event(irq, regs, desc->action); |
d1bef4ed | 160 | desc->chip->end(irq); |
1da177e4 LT |
161 | return 1; |
162 | } | |
163 | ||
164 | spin_lock(&desc->lock); | |
d1bef4ed IM |
165 | if (desc->chip->ack) |
166 | desc->chip->ack(irq); | |
1da177e4 LT |
167 | /* |
168 | * REPLAY is when Linux resends an IRQ that was dropped earlier | |
169 | * WAITING is used by probe to mark irqs that are being tested | |
170 | */ | |
171 | status = desc->status & ~(IRQ_REPLAY | IRQ_WAITING); | |
172 | status |= IRQ_PENDING; /* we _want_ to handle it */ | |
173 | ||
174 | /* | |
175 | * If the IRQ is disabled for whatever reason, we cannot | |
176 | * use the action we have. | |
177 | */ | |
178 | action = NULL; | |
179 | if (likely(!(status & (IRQ_DISABLED | IRQ_INPROGRESS)))) { | |
180 | action = desc->action; | |
181 | status &= ~IRQ_PENDING; /* we commit to handling */ | |
182 | status |= IRQ_INPROGRESS; /* we are handling it */ | |
183 | } | |
184 | desc->status = status; | |
185 | ||
186 | /* | |
187 | * If there is no IRQ handler or it was disabled, exit early. | |
188 | * Since we set PENDING, if another processor is handling | |
189 | * a different instance of this same irq, the other processor | |
190 | * will take care of it. | |
191 | */ | |
192 | if (unlikely(!action)) | |
193 | goto out; | |
194 | ||
195 | /* | |
196 | * Edge triggered interrupts need to remember | |
197 | * pending events. | |
198 | * This applies to any hw interrupts that allow a second | |
199 | * instance of the same irq to arrive while we are in do_IRQ | |
200 | * or in the handler. But the code here only handles the _second_ | |
201 | * instance of the irq, not the third or fourth. So it is mostly | |
202 | * useful for irq hardware that does not mask cleanly in an | |
203 | * SMP environment. | |
204 | */ | |
205 | for (;;) { | |
206 | irqreturn_t action_ret; | |
207 | ||
208 | spin_unlock(&desc->lock); | |
209 | ||
210 | action_ret = handle_IRQ_event(irq, regs, action); | |
211 | ||
212 | spin_lock(&desc->lock); | |
213 | if (!noirqdebug) | |
200803df | 214 | note_interrupt(irq, desc, action_ret, regs); |
1da177e4 LT |
215 | if (likely(!(desc->status & IRQ_PENDING))) |
216 | break; | |
217 | desc->status &= ~IRQ_PENDING; | |
218 | } | |
219 | desc->status &= ~IRQ_INPROGRESS; | |
220 | ||
221 | out: | |
222 | /* | |
223 | * The ->end() handler has to deal with interrupts which got | |
224 | * disabled while the handler was running. | |
225 | */ | |
d1bef4ed | 226 | desc->chip->end(irq); |
1da177e4 LT |
227 | spin_unlock(&desc->lock); |
228 | ||
229 | return 1; | |
230 | } | |
231 |