[mirror_ubuntu-artful-kernel.git] / kernel / irq / irqdesc.c

/*
 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
 *
 * This file contains the interrupt descriptor management code
 *
 * Detailed information is available in Documentation/DocBook/genericirq
 *
 */
#include <linux/irq.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/interrupt.h>
#include <linux/kernel_stat.h>
#include <linux/radix-tree.h>
#include <linux/bitmap.h>

#include "internals.h"

/*
 * lockdep: we want to handle all irq_desc locks as a single lock-class:
 */
static struct lock_class_key irq_desc_lock_class;

#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS)
static void __init init_irq_default_affinity(void)
{
	alloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT);
	cpumask_setall(irq_default_affinity);
}
#else
static void __init init_irq_default_affinity(void)
{
}
#endif

#ifdef CONFIG_SMP
static int alloc_masks(struct irq_desc *desc, gfp_t gfp, int node)
{
	if (!zalloc_cpumask_var_node(&desc->irq_data.affinity, gfp, node))
		return -ENOMEM;

#ifdef CONFIG_GENERIC_PENDING_IRQ
	if (!zalloc_cpumask_var_node(&desc->pending_mask, gfp, node)) {
		free_cpumask_var(desc->irq_data.affinity);
		return -ENOMEM;
	}
#endif
	return 0;
}

static void desc_smp_init(struct irq_desc *desc, int node)
{
	desc->irq_data.node = node;
	cpumask_copy(desc->irq_data.affinity, irq_default_affinity);
#ifdef CONFIG_GENERIC_PENDING_IRQ
	cpumask_clear(desc->pending_mask);
#endif
}

static inline int desc_node(struct irq_desc *desc)
{
	return desc->irq_data.node;
}

#else
static inline int
alloc_masks(struct irq_desc *desc, gfp_t gfp, int node) { return 0; }
static inline void desc_smp_init(struct irq_desc *desc, int node) { }
static inline int desc_node(struct irq_desc *desc) { return 0; }
#endif

static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node)
{
	int cpu;

	desc->irq_data.irq = irq;
	desc->irq_data.chip = &no_irq_chip;
	desc->irq_data.chip_data = NULL;
	desc->irq_data.handler_data = NULL;
	desc->irq_data.msi_desc = NULL;
	irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS);
	desc->istate = IRQS_DISABLED;
	desc->handle_irq = handle_bad_irq;
	desc->depth = 1;
	desc->irq_count = 0;
	desc->irqs_unhandled = 0;
	desc->name = NULL;
	for_each_possible_cpu(cpu)
		*per_cpu_ptr(desc->kstat_irqs, cpu) = 0;
	desc_smp_init(desc, node);
}

int nr_irqs = NR_IRQS;
EXPORT_SYMBOL_GPL(nr_irqs);

static DEFINE_MUTEX(sparse_irq_lock);
static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS);

#ifdef CONFIG_SPARSE_IRQ

static RADIX_TREE(irq_desc_tree, GFP_KERNEL);

static void irq_insert_desc(unsigned int irq, struct irq_desc *desc)
{
	radix_tree_insert(&irq_desc_tree, irq, desc);
}

struct irq_desc *irq_to_desc(unsigned int irq)
{
	return radix_tree_lookup(&irq_desc_tree, irq);
}

static void delete_irq_desc(unsigned int irq)
{
	radix_tree_delete(&irq_desc_tree, irq);
}

#ifdef CONFIG_SMP
static void free_masks(struct irq_desc *desc)
{
#ifdef CONFIG_GENERIC_PENDING_IRQ
	free_cpumask_var(desc->pending_mask);
#endif
	free_cpumask_var(desc->irq_data.affinity);
}
#else
static inline void free_masks(struct irq_desc *desc) { }
#endif

static struct irq_desc *alloc_desc(int irq, int node)
{
	struct irq_desc *desc;
	gfp_t gfp = GFP_KERNEL;

	desc = kzalloc_node(sizeof(*desc), gfp, node);
	if (!desc)
		return NULL;
	/* allocate based on nr_cpu_ids */
	desc->kstat_irqs = alloc_percpu(unsigned int);
	if (!desc->kstat_irqs)
		goto err_desc;

	if (alloc_masks(desc, gfp, node))
		goto err_kstat;

	raw_spin_lock_init(&desc->lock);
	lockdep_set_class(&desc->lock, &irq_desc_lock_class);

	desc_set_defaults(irq, desc, node);

	return desc;

err_kstat:
	free_percpu(desc->kstat_irqs);
err_desc:
	kfree(desc);
	return NULL;
}

static void free_desc(unsigned int irq)
{
	struct irq_desc *desc = irq_to_desc(irq);

	unregister_irq_proc(irq, desc);

	mutex_lock(&sparse_irq_lock);
	delete_irq_desc(irq);
	mutex_unlock(&sparse_irq_lock);

	free_masks(desc);
	free_percpu(desc->kstat_irqs);
	kfree(desc);
}

static int alloc_descs(unsigned int start, unsigned int cnt, int node)
{
	struct irq_desc *desc;
	int i;

	for (i = 0; i < cnt; i++) {
		desc = alloc_desc(start + i, node);
		if (!desc)
			goto err;
		mutex_lock(&sparse_irq_lock);
		irq_insert_desc(start + i, desc);
		mutex_unlock(&sparse_irq_lock);
	}
	return start;

err:
	for (i--; i >= 0; i--)
		free_desc(start + i);

	mutex_lock(&sparse_irq_lock);
	bitmap_clear(allocated_irqs, start, cnt);
	mutex_unlock(&sparse_irq_lock);
	return -ENOMEM;
}

static int irq_expand_nr_irqs(unsigned int nr)
{
	if (nr > IRQ_BITMAP_BITS)
		return -ENOMEM;
	nr_irqs = nr;
	return 0;
}

int __init early_irq_init(void)
{
	int i, initcnt, node = first_online_node;
	struct irq_desc *desc;

	init_irq_default_affinity();

	/* Let arch update nr_irqs and return the nr of preallocated irqs */
	initcnt = arch_probe_nr_irqs();
	printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d %d\n", NR_IRQS, nr_irqs, initcnt);

	if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS))
		nr_irqs = IRQ_BITMAP_BITS;

	if (WARN_ON(initcnt > IRQ_BITMAP_BITS))
		initcnt = IRQ_BITMAP_BITS;

	if (initcnt > nr_irqs)
		nr_irqs = initcnt;

	for (i = 0; i < initcnt; i++) {
		desc = alloc_desc(i, node);
		set_bit(i, allocated_irqs);
		irq_insert_desc(i, desc);
	}
	return arch_early_irq_init();
}

#else /* !CONFIG_SPARSE_IRQ */

struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
	[0 ... NR_IRQS-1] = {
		.istate		= IRQS_DISABLED,
		.handle_irq	= handle_bad_irq,
		.depth		= 1,
		.lock		= __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock),
	}
};

int __init early_irq_init(void)
{
	int count, i, node = first_online_node;
	struct irq_desc *desc;

	init_irq_default_affinity();

	printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS);

	desc = irq_desc;
	count = ARRAY_SIZE(irq_desc);

	for (i = 0; i < count; i++) {
		desc[i].irq_data.irq = i;
		desc[i].irq_data.chip = &no_irq_chip;
		desc[i].kstat_irqs = alloc_percpu(unsigned int);
		irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS);
		alloc_masks(desc + i, GFP_KERNEL, node);
		desc_smp_init(desc + i, node);
		lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
	}
	return arch_early_irq_init();
}

struct irq_desc *irq_to_desc(unsigned int irq)
{
	return (irq < NR_IRQS) ? irq_desc + irq : NULL;
}

static void free_desc(unsigned int irq)
{
	dynamic_irq_cleanup(irq);
}

static inline int alloc_descs(unsigned int start, unsigned int cnt, int node)
{
	return start;
}

static int irq_expand_nr_irqs(unsigned int nr)
{
	return -ENOMEM;
}

#endif /* !CONFIG_SPARSE_IRQ */

/* Dynamic interrupt handling */

/**
 * irq_free_descs - free irq descriptors
 * @from:	Start of descriptor range
 * @cnt:	Number of consecutive irqs to free
 */
void irq_free_descs(unsigned int from, unsigned int cnt)
{
	int i;

	if (from >= nr_irqs || (from + cnt) > nr_irqs)
		return;

	for (i = 0; i < cnt; i++)
		free_desc(from + i);

	mutex_lock(&sparse_irq_lock);
	bitmap_clear(allocated_irqs, from, cnt);
	mutex_unlock(&sparse_irq_lock);
}

/**
 * irq_alloc_descs - allocate and initialize a range of irq descriptors
 * @irq:	Allocate for specific irq number if irq >= 0
 * @from:	Start the search from this irq number
 * @cnt:	Number of consecutive irqs to allocate.
 * @node:	Preferred node on which the irq descriptor should be allocated
 *
 * Returns the first irq number or error code
 */
int __ref
irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node)
{
	int start, ret;

	if (!cnt)
		return -EINVAL;

	mutex_lock(&sparse_irq_lock);

	start = bitmap_find_next_zero_area(allocated_irqs, IRQ_BITMAP_BITS,
					   from, cnt, 0);
	ret = -EEXIST;
	if (irq >=0 && start != irq)
		goto err;

	if (start + cnt > nr_irqs) {
		ret = irq_expand_nr_irqs(start + cnt);
		if (ret)
			goto err;
	}

	bitmap_set(allocated_irqs, start, cnt);
	mutex_unlock(&sparse_irq_lock);
	return alloc_descs(start, cnt, node);

err:
	mutex_unlock(&sparse_irq_lock);
	return ret;
}

/**
 * irq_reserve_irqs - mark irqs allocated
 * @from:	mark from irq number
 * @cnt:	number of irqs to mark
 *
 * Returns 0 on success or an appropriate error code
 */
int irq_reserve_irqs(unsigned int from, unsigned int cnt)
{
	unsigned int start;
	int ret = 0;

	if (!cnt || (from + cnt) > nr_irqs)
		return -EINVAL;

	mutex_lock(&sparse_irq_lock);
	start = bitmap_find_next_zero_area(allocated_irqs, nr_irqs, from, cnt, 0);
	if (start == from)
		bitmap_set(allocated_irqs, start, cnt);
	else
		ret = -EEXIST;
	mutex_unlock(&sparse_irq_lock);
	return ret;
}

/**
 * irq_get_next_irq - get next allocated irq number
 * @offset:	where to start the search
 *
 * Returns next irq number after offset or nr_irqs if none is found.
 */
unsigned int irq_get_next_irq(unsigned int offset)
{
	return find_next_bit(allocated_irqs, nr_irqs, offset);
}

struct irq_desc *
__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus)
{
	struct irq_desc *desc = irq_to_desc(irq);

	if (desc) {
		if (bus)
			chip_bus_lock(desc);
		raw_spin_lock_irqsave(&desc->lock, *flags);
	}
	return desc;
}

void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus)
{
	raw_spin_unlock_irqrestore(&desc->lock, flags);
	if (bus)
		chip_bus_sync_unlock(desc);
}

/**
 * dynamic_irq_cleanup - cleanup a dynamically allocated irq
 * @irq:	irq number to initialize
 */
void dynamic_irq_cleanup(unsigned int irq)
{
	struct irq_desc *desc = irq_to_desc(irq);
	unsigned long flags;

	raw_spin_lock_irqsave(&desc->lock, flags);
	desc_set_defaults(irq, desc, desc_node(desc));
	raw_spin_unlock_irqrestore(&desc->lock, flags);
}

unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
{
	struct irq_desc *desc = irq_to_desc(irq);

	return desc && desc->kstat_irqs ?
			*per_cpu_ptr(desc->kstat_irqs, cpu) : 0;
}

#ifdef CONFIG_GENERIC_HARDIRQS
unsigned int kstat_irqs(unsigned int irq)
{
	struct irq_desc *desc = irq_to_desc(irq);
	int cpu;
	int sum = 0;

	if (!desc || !desc->kstat_irqs)
		return 0;
	for_each_possible_cpu(cpu)
		sum += *per_cpu_ptr(desc->kstat_irqs, cpu);
	return sum;
}
#endif /* CONFIG_GENERIC_HARDIRQS */
Commit	Line	Data
3795de23 TG	1	/*
	2	* Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
	3	* Copyright (C) 2005-2006, Thomas Gleixner, Russell King
	4	*
	5	* This file contains the interrupt descriptor management code
	6	*
	7	* Detailed information is available in Documentation/DocBook/genericirq
	8	*
	9	*/
	10	#include <linux/irq.h>
	11	#include <linux/slab.h>
	12	#include <linux/module.h>
	13	#include <linux/interrupt.h>
	14	#include <linux/kernel_stat.h>
	15	#include <linux/radix-tree.h>
1f5a5b87	16	#include <linux/bitmap.h>
3795de23 TG	17
	18	#include "internals.h"
	19
	20	/*
	21	* lockdep: we want to handle all irq_desc locks as a single lock-class:
	22	*/
78f90d91	23	static struct lock_class_key irq_desc_lock_class;
3795de23 TG	24
	25	#if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_HARDIRQS)
	26	static void __init init_irq_default_affinity(void)
	27	{
	28	alloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT);
	29	cpumask_setall(irq_default_affinity);
	30	}
	31	#else
	32	static void __init init_irq_default_affinity(void)
	33	{
	34	}
	35	#endif
	36
1f5a5b87 TG	37	#ifdef CONFIG_SMP
	38	static int alloc_masks(struct irq_desc *desc, gfp_t gfp, int node)
	39	{
	40	if (!zalloc_cpumask_var_node(&desc->irq_data.affinity, gfp, node))
	41	return -ENOMEM;
	42
	43	#ifdef CONFIG_GENERIC_PENDING_IRQ
	44	if (!zalloc_cpumask_var_node(&desc->pending_mask, gfp, node)) {
	45	free_cpumask_var(desc->irq_data.affinity);
	46	return -ENOMEM;
	47	}
	48	#endif
	49	return 0;
	50	}
	51
	52	static void desc_smp_init(struct irq_desc *desc, int node)
	53	{
aa99ec0f	54	desc->irq_data.node = node;
1f5a5b87	55	cpumask_copy(desc->irq_data.affinity, irq_default_affinity);
b7b29338 TG	56	#ifdef CONFIG_GENERIC_PENDING_IRQ
	57	cpumask_clear(desc->pending_mask);
	58	#endif
	59	}
	60
	61	static inline int desc_node(struct irq_desc *desc)
	62	{
	63	return desc->irq_data.node;
1f5a5b87 TG	64	}
	65
	66	#else
	67	static inline int
	68	alloc_masks(struct irq_desc *desc, gfp_t gfp, int node) { return 0; }
	69	static inline void desc_smp_init(struct irq_desc *desc, int node) { }
b7b29338	70	static inline int desc_node(struct irq_desc *desc) { return 0; }
1f5a5b87 TG	71	#endif
	72
	73	static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node)
	74	{
6c9ae009 ED	75	int cpu;
6c9ae009 ED	76
1f5a5b87 TG	77	desc->irq_data.irq = irq;
	78	desc->irq_data.chip = &no_irq_chip;
	79	desc->irq_data.chip_data = NULL;
	80	desc->irq_data.handler_data = NULL;
	81	desc->irq_data.msi_desc = NULL;
f9e4989e	82	irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS);
c1594b77	83	desc->istate = IRQS_DISABLED;
1f5a5b87 TG	84	desc->handle_irq = handle_bad_irq;
1f5a5b87 TG	85	desc->depth = 1;
b7b29338 TG	86	desc->irq_count = 0;
b7b29338 TG	87	desc->irqs_unhandled = 0;
1f5a5b87	88	desc->name = NULL;
6c9ae009 ED	89	for_each_possible_cpu(cpu)
6c9ae009 ED	90	*per_cpu_ptr(desc->kstat_irqs, cpu) = 0;
1f5a5b87 TG	91	desc_smp_init(desc, node);
	92	}
	93
3795de23 TG	94	int nr_irqs = NR_IRQS;
	95	EXPORT_SYMBOL_GPL(nr_irqs);
	96
a05a900a	97	static DEFINE_MUTEX(sparse_irq_lock);
c1ee6264	98	static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS);
1f5a5b87	99
3795de23 TG	100	#ifdef CONFIG_SPARSE_IRQ
3795de23 TG	101
baa0d233	102	static RADIX_TREE(irq_desc_tree, GFP_KERNEL);
3795de23	103
1f5a5b87	104	static void irq_insert_desc(unsigned int irq, struct irq_desc *desc)
3795de23 TG	105	{
	106	radix_tree_insert(&irq_desc_tree, irq, desc);
	107	}
	108
	109	struct irq_desc *irq_to_desc(unsigned int irq)
	110	{
	111	return radix_tree_lookup(&irq_desc_tree, irq);
	112	}
	113
1f5a5b87 TG	114	static void delete_irq_desc(unsigned int irq)
	115	{
	116	radix_tree_delete(&irq_desc_tree, irq);
	117	}
	118
	119	#ifdef CONFIG_SMP
	120	static void free_masks(struct irq_desc *desc)
	121	{
	122	#ifdef CONFIG_GENERIC_PENDING_IRQ
	123	free_cpumask_var(desc->pending_mask);
	124	#endif
c0a19ebc	125	free_cpumask_var(desc->irq_data.affinity);
1f5a5b87 TG	126	}
	127	#else
	128	static inline void free_masks(struct irq_desc *desc) { }
	129	#endif
	130
	131	static struct irq_desc *alloc_desc(int irq, int node)
	132	{
	133	struct irq_desc *desc;
baa0d233	134	gfp_t gfp = GFP_KERNEL;
1f5a5b87 TG	135
	136	desc = kzalloc_node(sizeof(*desc), gfp, node);
	137	if (!desc)
	138	return NULL;
	139	/* allocate based on nr_cpu_ids */
6c9ae009	140	desc->kstat_irqs = alloc_percpu(unsigned int);
1f5a5b87 TG	141	if (!desc->kstat_irqs)
	142	goto err_desc;
	143
	144	if (alloc_masks(desc, gfp, node))
	145	goto err_kstat;
	146
	147	raw_spin_lock_init(&desc->lock);
	148	lockdep_set_class(&desc->lock, &irq_desc_lock_class);
	149
	150	desc_set_defaults(irq, desc, node);
	151
	152	return desc;
	153
	154	err_kstat:
6c9ae009	155	free_percpu(desc->kstat_irqs);
1f5a5b87 TG	156	err_desc:
	157	kfree(desc);
	158	return NULL;
	159	}
	160
	161	static void free_desc(unsigned int irq)
	162	{
	163	struct irq_desc *desc = irq_to_desc(irq);
1f5a5b87	164
13bfe99e TG	165	unregister_irq_proc(irq, desc);
13bfe99e TG	166
a05a900a	167	mutex_lock(&sparse_irq_lock);
1f5a5b87	168	delete_irq_desc(irq);
a05a900a	169	mutex_unlock(&sparse_irq_lock);
1f5a5b87 TG	170
1f5a5b87 TG	171	free_masks(desc);
6c9ae009	172	free_percpu(desc->kstat_irqs);
1f5a5b87 TG	173	kfree(desc);
	174	}
	175
	176	static int alloc_descs(unsigned int start, unsigned int cnt, int node)
	177	{
	178	struct irq_desc *desc;
1f5a5b87 TG	179	int i;
	180
	181	for (i = 0; i < cnt; i++) {
	182	desc = alloc_desc(start + i, node);
	183	if (!desc)
	184	goto err;
a05a900a	185	mutex_lock(&sparse_irq_lock);
1f5a5b87	186	irq_insert_desc(start + i, desc);
a05a900a	187	mutex_unlock(&sparse_irq_lock);
1f5a5b87 TG	188	}
	189	return start;
	190
	191	err:
	192	for (i--; i >= 0; i--)
	193	free_desc(start + i);
	194
a05a900a	195	mutex_lock(&sparse_irq_lock);
1f5a5b87	196	bitmap_clear(allocated_irqs, start, cnt);
a05a900a	197	mutex_unlock(&sparse_irq_lock);
1f5a5b87 TG	198	return -ENOMEM;
	199	}
	200
ed4dea6e	201	static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7	202	{
ed4dea6e	203	if (nr > IRQ_BITMAP_BITS)
e7bcecb7	204	return -ENOMEM;
ed4dea6e	205	nr_irqs = nr;
e7bcecb7 TG	206	return 0;
	207	}
	208
3795de23 TG	209	int __init early_irq_init(void)
3795de23 TG	210	{
b683de2b	211	int i, initcnt, node = first_online_node;
3795de23	212	struct irq_desc *desc;
3795de23 TG	213
	214	init_irq_default_affinity();
	215
b683de2b TG	216	/* Let arch update nr_irqs and return the nr of preallocated irqs */
	217	initcnt = arch_probe_nr_irqs();
	218	printk(KERN_INFO "NR_IRQS:%d nr_irqs:%d %d\n", NR_IRQS, nr_irqs, initcnt);
3795de23	219
c1ee6264 TG	220	if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS))
	221	nr_irqs = IRQ_BITMAP_BITS;
	222
	223	if (WARN_ON(initcnt > IRQ_BITMAP_BITS))
	224	initcnt = IRQ_BITMAP_BITS;
	225
	226	if (initcnt > nr_irqs)
	227	nr_irqs = initcnt;
	228
b683de2b	229	for (i = 0; i < initcnt; i++) {
aa99ec0f TG	230	desc = alloc_desc(i, node);
	231	set_bit(i, allocated_irqs);
	232	irq_insert_desc(i, desc);
3795de23	233	}
3795de23 TG	234	return arch_early_irq_init();
	235	}
	236
3795de23 TG	237	#else /* !CONFIG_SPARSE_IRQ */
	238
	239	struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
	240	[0 ... NR_IRQS-1] = {
c1594b77	241	.istate = IRQS_DISABLED,
3795de23 TG	242	.handle_irq = handle_bad_irq,
	243	.depth = 1,
	244	.lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock),
	245	}
	246	};
	247
3795de23 TG	248	int __init early_irq_init(void)
3795de23 TG	249	{
aa99ec0f	250	int count, i, node = first_online_node;
3795de23	251	struct irq_desc *desc;
3795de23 TG	252
	253	init_irq_default_affinity();
	254
	255	printk(KERN_INFO "NR_IRQS:%d\n", NR_IRQS);
	256
	257	desc = irq_desc;
	258	count = ARRAY_SIZE(irq_desc);
	259
	260	for (i = 0; i < count; i++) {
	261	desc[i].irq_data.irq = i;
	262	desc[i].irq_data.chip = &no_irq_chip;
6c9ae009	263	desc[i].kstat_irqs = alloc_percpu(unsigned int);
f9e4989e	264	irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS);
aa99ec0f TG	265	alloc_masks(desc + i, GFP_KERNEL, node);
aa99ec0f TG	266	desc_smp_init(desc + i, node);
154cd387	267	lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
3795de23 TG	268	}
	269	return arch_early_irq_init();
	270	}
	271
	272	struct irq_desc *irq_to_desc(unsigned int irq)
	273	{
	274	return (irq < NR_IRQS) ? irq_desc + irq : NULL;
	275	}
	276
1f5a5b87 TG	277	static void free_desc(unsigned int irq)
1f5a5b87 TG	278	{
b7b29338	279	dynamic_irq_cleanup(irq);
1f5a5b87 TG	280	}
	281
	282	static inline int alloc_descs(unsigned int start, unsigned int cnt, int node)
	283	{
	284	return start;
	285	}
e7bcecb7	286
ed4dea6e	287	static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7 TG	288	{
	289	return -ENOMEM;
	290	}
	291
3795de23 TG	292	#endif /* !CONFIG_SPARSE_IRQ */
3795de23 TG	293
1f5a5b87 TG	294	/* Dynamic interrupt handling */
	295
	296	/**
	297	* irq_free_descs - free irq descriptors
	298	* @from: Start of descriptor range
	299	* @cnt: Number of consecutive irqs to free
	300	*/
	301	void irq_free_descs(unsigned int from, unsigned int cnt)
	302	{
1f5a5b87 TG	303	int i;
	304
	305	if (from >= nr_irqs \|\| (from + cnt) > nr_irqs)
	306	return;
	307
	308	for (i = 0; i < cnt; i++)
	309	free_desc(from + i);
	310
a05a900a	311	mutex_lock(&sparse_irq_lock);
1f5a5b87	312	bitmap_clear(allocated_irqs, from, cnt);
a05a900a	313	mutex_unlock(&sparse_irq_lock);
1f5a5b87 TG	314	}
	315
	316	/**
	317	* irq_alloc_descs - allocate and initialize a range of irq descriptors
	318	* @irq: Allocate for specific irq number if irq >= 0
	319	* @from: Start the search from this irq number
	320	* @cnt: Number of consecutive irqs to allocate.
	321	* @node: Preferred node on which the irq descriptor should be allocated
	322	*
	323	* Returns the first irq number or error code
	324	*/
	325	int __ref
	326	irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node)
	327	{
1f5a5b87 TG	328	int start, ret;
	329
	330	if (!cnt)
	331	return -EINVAL;
	332
a05a900a	333	mutex_lock(&sparse_irq_lock);
1f5a5b87	334
ed4dea6e YL	335	start = bitmap_find_next_zero_area(allocated_irqs, IRQ_BITMAP_BITS,
ed4dea6e YL	336	from, cnt, 0);
1f5a5b87 TG	337	ret = -EEXIST;
	338	if (irq >=0 && start != irq)
	339	goto err;
	340
ed4dea6e YL	341	if (start + cnt > nr_irqs) {
ed4dea6e YL	342	ret = irq_expand_nr_irqs(start + cnt);
e7bcecb7 TG	343	if (ret)
	344	goto err;
	345	}
1f5a5b87 TG	346
1f5a5b87 TG	347	bitmap_set(allocated_irqs, start, cnt);
a05a900a	348	mutex_unlock(&sparse_irq_lock);
1f5a5b87 TG	349	return alloc_descs(start, cnt, node);
	350
	351	err:
a05a900a	352	mutex_unlock(&sparse_irq_lock);
1f5a5b87 TG	353	return ret;
	354	}
	355
06f6c339 TG	356	/**
	357	* irq_reserve_irqs - mark irqs allocated
	358	* @from: mark from irq number
	359	* @cnt: number of irqs to mark
	360	*
	361	* Returns 0 on success or an appropriate error code
	362	*/
	363	int irq_reserve_irqs(unsigned int from, unsigned int cnt)
	364	{
06f6c339 TG	365	unsigned int start;
	366	int ret = 0;
	367
	368	if (!cnt \|\| (from + cnt) > nr_irqs)
	369	return -EINVAL;
	370
a05a900a	371	mutex_lock(&sparse_irq_lock);
06f6c339 TG	372	start = bitmap_find_next_zero_area(allocated_irqs, nr_irqs, from, cnt, 0);
	373	if (start == from)
	374	bitmap_set(allocated_irqs, start, cnt);
	375	else
	376	ret = -EEXIST;
a05a900a	377	mutex_unlock(&sparse_irq_lock);
06f6c339 TG	378	return ret;
	379	}
	380
a98d24b7 TG	381	/**
	382	* irq_get_next_irq - get next allocated irq number
	383	* @offset: where to start the search
	384	*
	385	* Returns next irq number after offset or nr_irqs if none is found.
	386	*/
	387	unsigned int irq_get_next_irq(unsigned int offset)
	388	{
	389	return find_next_bit(allocated_irqs, nr_irqs, offset);
	390	}
	391
d5eb4ad2 TG	392	struct irq_desc *
	393	__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus)
	394	{
	395	struct irq_desc *desc = irq_to_desc(irq);
	396
	397	if (desc) {
	398	if (bus)
	399	chip_bus_lock(desc);
	400	raw_spin_lock_irqsave(&desc->lock, *flags);
	401	}
	402	return desc;
	403	}
	404
	405	void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus)
	406	{
	407	raw_spin_unlock_irqrestore(&desc->lock, flags);
	408	if (bus)
	409	chip_bus_sync_unlock(desc);
	410	}
	411
b7b29338 TG	412	/**
	413	* dynamic_irq_cleanup - cleanup a dynamically allocated irq
	414	* @irq: irq number to initialize
	415	*/
	416	void dynamic_irq_cleanup(unsigned int irq)
3795de23	417	{
b7b29338 TG	418	struct irq_desc *desc = irq_to_desc(irq);
	419	unsigned long flags;
	420
	421	raw_spin_lock_irqsave(&desc->lock, flags);
	422	desc_set_defaults(irq, desc, desc_node(desc));
	423	raw_spin_unlock_irqrestore(&desc->lock, flags);
3795de23 TG	424	}
3795de23 TG	425
3795de23 TG	426	unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
	427	{
	428	struct irq_desc *desc = irq_to_desc(irq);
6c9ae009 ED	429
	430	return desc && desc->kstat_irqs ?
	431	*per_cpu_ptr(desc->kstat_irqs, cpu) : 0;
3795de23	432	}
478735e3 KH	433
	434	#ifdef CONFIG_GENERIC_HARDIRQS
	435	unsigned int kstat_irqs(unsigned int irq)
	436	{
	437	struct irq_desc *desc = irq_to_desc(irq);
	438	int cpu;
	439	int sum = 0;
	440
6c9ae009	441	if (!desc \|\| !desc->kstat_irqs)
478735e3 KH	442	return 0;
478735e3 KH	443	for_each_possible_cpu(cpu)
6c9ae009	444	sum += *per_cpu_ptr(desc->kstat_irqs, cpu);
478735e3 KH	445	return sum;
	446	}
	447	#endif /* CONFIG_GENERIC_HARDIRQS */