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genirq/msi: Fix populating multiple interrupts
[mirror_ubuntu-bionic-kernel.git] / kernel / irq / irqdesc.c
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3795de23
TG
1/*
2 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
3 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
4 *
5 * This file contains the interrupt descriptor management code
6 *
c0c6e085 7 * Detailed information is available in Documentation/core-api/genericirq.rst
3795de23
TG
8 *
9 */
10#include <linux/irq.h>
11#include <linux/slab.h>
ec53cf23 12#include <linux/export.h>
3795de23
TG
13#include <linux/interrupt.h>
14#include <linux/kernel_stat.h>
15#include <linux/radix-tree.h>
1f5a5b87 16#include <linux/bitmap.h>
76ba59f8 17#include <linux/irqdomain.h>
ecb3f394 18#include <linux/sysfs.h>
3795de23
TG
19
20#include "internals.h"
21
22/*
23 * lockdep: we want to handle all irq_desc locks as a single lock-class:
24 */
78f90d91 25static struct lock_class_key irq_desc_lock_class;
3795de23 26
fe051434 27#if defined(CONFIG_SMP)
fbf19803
TG
28static int __init irq_affinity_setup(char *str)
29{
30 zalloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT);
31 cpulist_parse(str, irq_default_affinity);
32 /*
33 * Set at least the boot cpu. We don't want to end up with
34 * bugreports caused by random comandline masks
35 */
36 cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
37 return 1;
38}
39__setup("irqaffinity=", irq_affinity_setup);
40
3795de23
TG
41static void __init init_irq_default_affinity(void)
42{
fbf19803
TG
43#ifdef CONFIG_CPUMASK_OFFSTACK
44 if (!irq_default_affinity)
45 zalloc_cpumask_var(&irq_default_affinity, GFP_NOWAIT);
46#endif
47 if (cpumask_empty(irq_default_affinity))
48 cpumask_setall(irq_default_affinity);
3795de23
TG
49}
50#else
51static void __init init_irq_default_affinity(void)
52{
53}
54#endif
55
1f5a5b87 56#ifdef CONFIG_SMP
4ab764c3 57static int alloc_masks(struct irq_desc *desc, int node)
1f5a5b87 58{
9df872fa 59 if (!zalloc_cpumask_var_node(&desc->irq_common_data.affinity,
4ab764c3 60 GFP_KERNEL, node))
1f5a5b87
TG
61 return -ENOMEM;
62
0d3f5425
TG
63#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
64 if (!zalloc_cpumask_var_node(&desc->irq_common_data.effective_affinity,
65 GFP_KERNEL, node)) {
66 free_cpumask_var(desc->irq_common_data.affinity);
67 return -ENOMEM;
68 }
69#endif
70
1f5a5b87 71#ifdef CONFIG_GENERIC_PENDING_IRQ
4ab764c3 72 if (!zalloc_cpumask_var_node(&desc->pending_mask, GFP_KERNEL, node)) {
0d3f5425
TG
73#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
74 free_cpumask_var(desc->irq_common_data.effective_affinity);
75#endif
9df872fa 76 free_cpumask_var(desc->irq_common_data.affinity);
1f5a5b87
TG
77 return -ENOMEM;
78 }
79#endif
80 return 0;
81}
82
45ddcecb
TG
83static void desc_smp_init(struct irq_desc *desc, int node,
84 const struct cpumask *affinity)
1f5a5b87 85{
45ddcecb
TG
86 if (!affinity)
87 affinity = irq_default_affinity;
88 cpumask_copy(desc->irq_common_data.affinity, affinity);
89
b7b29338
TG
90#ifdef CONFIG_GENERIC_PENDING_IRQ
91 cpumask_clear(desc->pending_mask);
92#endif
449e9cae
JL
93#ifdef CONFIG_NUMA
94 desc->irq_common_data.node = node;
95#endif
b7b29338
TG
96}
97
1f5a5b87
TG
98#else
99static inline int
4ab764c3 100alloc_masks(struct irq_desc *desc, int node) { return 0; }
45ddcecb
TG
101static inline void
102desc_smp_init(struct irq_desc *desc, int node, const struct cpumask *affinity) { }
1f5a5b87
TG
103#endif
104
b6873807 105static void desc_set_defaults(unsigned int irq, struct irq_desc *desc, int node,
45ddcecb 106 const struct cpumask *affinity, struct module *owner)
1f5a5b87 107{
6c9ae009
ED
108 int cpu;
109
af7080e0 110 desc->irq_common_data.handler_data = NULL;
b237721c 111 desc->irq_common_data.msi_desc = NULL;
af7080e0 112
0d0b4c86 113 desc->irq_data.common = &desc->irq_common_data;
1f5a5b87
TG
114 desc->irq_data.irq = irq;
115 desc->irq_data.chip = &no_irq_chip;
116 desc->irq_data.chip_data = NULL;
f9e4989e 117 irq_settings_clr_and_set(desc, ~0, _IRQ_DEFAULT_INIT_FLAGS);
801a0e9a 118 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
d829b8fb 119 irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
1f5a5b87
TG
120 desc->handle_irq = handle_bad_irq;
121 desc->depth = 1;
b7b29338
TG
122 desc->irq_count = 0;
123 desc->irqs_unhandled = 0;
1f5a5b87 124 desc->name = NULL;
b6873807 125 desc->owner = owner;
6c9ae009
ED
126 for_each_possible_cpu(cpu)
127 *per_cpu_ptr(desc->kstat_irqs, cpu) = 0;
45ddcecb 128 desc_smp_init(desc, node, affinity);
1f5a5b87
TG
129}
130
3795de23
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131int nr_irqs = NR_IRQS;
132EXPORT_SYMBOL_GPL(nr_irqs);
133
a05a900a 134static DEFINE_MUTEX(sparse_irq_lock);
c1ee6264 135static DECLARE_BITMAP(allocated_irqs, IRQ_BITMAP_BITS);
1f5a5b87 136
3795de23
TG
137#ifdef CONFIG_SPARSE_IRQ
138
ecb3f394
CG
139static void irq_kobj_release(struct kobject *kobj);
140
141#ifdef CONFIG_SYSFS
142static struct kobject *irq_kobj_base;
143
144#define IRQ_ATTR_RO(_name) \
145static struct kobj_attribute _name##_attr = __ATTR_RO(_name)
146
147static ssize_t per_cpu_count_show(struct kobject *kobj,
148 struct kobj_attribute *attr, char *buf)
149{
150 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
151 int cpu, irq = desc->irq_data.irq;
152 ssize_t ret = 0;
153 char *p = "";
154
155 for_each_possible_cpu(cpu) {
156 unsigned int c = kstat_irqs_cpu(irq, cpu);
157
158 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "%s%u", p, c);
159 p = ",";
160 }
161
162 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n");
163 return ret;
164}
165IRQ_ATTR_RO(per_cpu_count);
166
167static ssize_t chip_name_show(struct kobject *kobj,
168 struct kobj_attribute *attr, char *buf)
169{
170 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
171 ssize_t ret = 0;
172
173 raw_spin_lock_irq(&desc->lock);
174 if (desc->irq_data.chip && desc->irq_data.chip->name) {
175 ret = scnprintf(buf, PAGE_SIZE, "%s\n",
176 desc->irq_data.chip->name);
177 }
178 raw_spin_unlock_irq(&desc->lock);
179
180 return ret;
181}
182IRQ_ATTR_RO(chip_name);
183
184static ssize_t hwirq_show(struct kobject *kobj,
185 struct kobj_attribute *attr, char *buf)
186{
187 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
188 ssize_t ret = 0;
189
190 raw_spin_lock_irq(&desc->lock);
191 if (desc->irq_data.domain)
192 ret = sprintf(buf, "%d\n", (int)desc->irq_data.hwirq);
193 raw_spin_unlock_irq(&desc->lock);
194
195 return ret;
196}
197IRQ_ATTR_RO(hwirq);
198
199static ssize_t type_show(struct kobject *kobj,
200 struct kobj_attribute *attr, char *buf)
201{
202 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
203 ssize_t ret = 0;
204
205 raw_spin_lock_irq(&desc->lock);
206 ret = sprintf(buf, "%s\n",
207 irqd_is_level_type(&desc->irq_data) ? "level" : "edge");
208 raw_spin_unlock_irq(&desc->lock);
209
210 return ret;
211
212}
213IRQ_ATTR_RO(type);
214
215static ssize_t name_show(struct kobject *kobj,
216 struct kobj_attribute *attr, char *buf)
217{
218 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
219 ssize_t ret = 0;
220
221 raw_spin_lock_irq(&desc->lock);
222 if (desc->name)
223 ret = scnprintf(buf, PAGE_SIZE, "%s\n", desc->name);
224 raw_spin_unlock_irq(&desc->lock);
225
226 return ret;
227}
228IRQ_ATTR_RO(name);
229
230static ssize_t actions_show(struct kobject *kobj,
231 struct kobj_attribute *attr, char *buf)
232{
233 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
234 struct irqaction *action;
235 ssize_t ret = 0;
236 char *p = "";
237
238 raw_spin_lock_irq(&desc->lock);
239 for (action = desc->action; action != NULL; action = action->next) {
240 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "%s%s",
241 p, action->name);
242 p = ",";
243 }
244 raw_spin_unlock_irq(&desc->lock);
245
246 if (ret)
247 ret += scnprintf(buf + ret, PAGE_SIZE - ret, "\n");
248
249 return ret;
250}
251IRQ_ATTR_RO(actions);
252
253static struct attribute *irq_attrs[] = {
254 &per_cpu_count_attr.attr,
255 &chip_name_attr.attr,
256 &hwirq_attr.attr,
257 &type_attr.attr,
258 &name_attr.attr,
259 &actions_attr.attr,
260 NULL
261};
262
263static struct kobj_type irq_kobj_type = {
264 .release = irq_kobj_release,
265 .sysfs_ops = &kobj_sysfs_ops,
266 .default_attrs = irq_attrs,
267};
268
269static void irq_sysfs_add(int irq, struct irq_desc *desc)
270{
271 if (irq_kobj_base) {
272 /*
273 * Continue even in case of failure as this is nothing
274 * crucial.
275 */
276 if (kobject_add(&desc->kobj, irq_kobj_base, "%d", irq))
277 pr_warn("Failed to add kobject for irq %d\n", irq);
278 }
279}
280
281static int __init irq_sysfs_init(void)
282{
283 struct irq_desc *desc;
284 int irq;
285
286 /* Prevent concurrent irq alloc/free */
287 irq_lock_sparse();
288
289 irq_kobj_base = kobject_create_and_add("irq", kernel_kobj);
290 if (!irq_kobj_base) {
291 irq_unlock_sparse();
292 return -ENOMEM;
293 }
294
295 /* Add the already allocated interrupts */
296 for_each_irq_desc(irq, desc)
297 irq_sysfs_add(irq, desc);
298 irq_unlock_sparse();
299
300 return 0;
301}
302postcore_initcall(irq_sysfs_init);
303
304#else /* !CONFIG_SYSFS */
305
306static struct kobj_type irq_kobj_type = {
307 .release = irq_kobj_release,
308};
309
310static void irq_sysfs_add(int irq, struct irq_desc *desc) {}
311
312#endif /* CONFIG_SYSFS */
313
baa0d233 314static RADIX_TREE(irq_desc_tree, GFP_KERNEL);
3795de23 315
1f5a5b87 316static void irq_insert_desc(unsigned int irq, struct irq_desc *desc)
3795de23
TG
317{
318 radix_tree_insert(&irq_desc_tree, irq, desc);
319}
320
321struct irq_desc *irq_to_desc(unsigned int irq)
322{
323 return radix_tree_lookup(&irq_desc_tree, irq);
324}
3911ff30 325EXPORT_SYMBOL(irq_to_desc);
3795de23 326
1f5a5b87
TG
327static void delete_irq_desc(unsigned int irq)
328{
329 radix_tree_delete(&irq_desc_tree, irq);
330}
331
332#ifdef CONFIG_SMP
333static void free_masks(struct irq_desc *desc)
334{
335#ifdef CONFIG_GENERIC_PENDING_IRQ
336 free_cpumask_var(desc->pending_mask);
337#endif
9df872fa 338 free_cpumask_var(desc->irq_common_data.affinity);
0d3f5425
TG
339#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
340 free_cpumask_var(desc->irq_common_data.effective_affinity);
341#endif
1f5a5b87
TG
342}
343#else
344static inline void free_masks(struct irq_desc *desc) { }
345#endif
346
c291ee62
TG
347void irq_lock_sparse(void)
348{
349 mutex_lock(&sparse_irq_lock);
350}
351
352void irq_unlock_sparse(void)
353{
354 mutex_unlock(&sparse_irq_lock);
355}
356
45ddcecb
TG
357static struct irq_desc *alloc_desc(int irq, int node, unsigned int flags,
358 const struct cpumask *affinity,
359 struct module *owner)
1f5a5b87
TG
360{
361 struct irq_desc *desc;
1f5a5b87 362
4ab764c3 363 desc = kzalloc_node(sizeof(*desc), GFP_KERNEL, node);
1f5a5b87
TG
364 if (!desc)
365 return NULL;
366 /* allocate based on nr_cpu_ids */
6c9ae009 367 desc->kstat_irqs = alloc_percpu(unsigned int);
1f5a5b87
TG
368 if (!desc->kstat_irqs)
369 goto err_desc;
370
4ab764c3 371 if (alloc_masks(desc, node))
1f5a5b87
TG
372 goto err_kstat;
373
374 raw_spin_lock_init(&desc->lock);
375 lockdep_set_class(&desc->lock, &irq_desc_lock_class);
9114014c 376 mutex_init(&desc->request_mutex);
425a5072 377 init_rcu_head(&desc->rcu);
1f5a5b87 378
45ddcecb
TG
379 desc_set_defaults(irq, desc, node, affinity, owner);
380 irqd_set(&desc->irq_data, flags);
ecb3f394 381 kobject_init(&desc->kobj, &irq_kobj_type);
1f5a5b87
TG
382
383 return desc;
384
385err_kstat:
6c9ae009 386 free_percpu(desc->kstat_irqs);
1f5a5b87
TG
387err_desc:
388 kfree(desc);
389 return NULL;
390}
391
ecb3f394 392static void irq_kobj_release(struct kobject *kobj)
425a5072 393{
ecb3f394 394 struct irq_desc *desc = container_of(kobj, struct irq_desc, kobj);
425a5072
TG
395
396 free_masks(desc);
397 free_percpu(desc->kstat_irqs);
398 kfree(desc);
399}
400
ecb3f394
CG
401static void delayed_free_desc(struct rcu_head *rhp)
402{
403 struct irq_desc *desc = container_of(rhp, struct irq_desc, rcu);
404
405 kobject_put(&desc->kobj);
406}
407
1f5a5b87
TG
408static void free_desc(unsigned int irq)
409{
410 struct irq_desc *desc = irq_to_desc(irq);
1f5a5b87 411
087cdfb6 412 irq_remove_debugfs_entry(desc);
13bfe99e
TG
413 unregister_irq_proc(irq, desc);
414
c291ee62
TG
415 /*
416 * sparse_irq_lock protects also show_interrupts() and
417 * kstat_irq_usr(). Once we deleted the descriptor from the
418 * sparse tree we can free it. Access in proc will fail to
419 * lookup the descriptor.
ecb3f394
CG
420 *
421 * The sysfs entry must be serialized against a concurrent
422 * irq_sysfs_init() as well.
c291ee62 423 */
a05a900a 424 mutex_lock(&sparse_irq_lock);
ecb3f394 425 kobject_del(&desc->kobj);
1f5a5b87 426 delete_irq_desc(irq);
a05a900a 427 mutex_unlock(&sparse_irq_lock);
1f5a5b87 428
425a5072
TG
429 /*
430 * We free the descriptor, masks and stat fields via RCU. That
431 * allows demultiplex interrupts to do rcu based management of
432 * the child interrupts.
433 */
434 call_rcu(&desc->rcu, delayed_free_desc);
1f5a5b87
TG
435}
436
b6873807 437static int alloc_descs(unsigned int start, unsigned int cnt, int node,
06ee6d57 438 const struct cpumask *affinity, struct module *owner)
1f5a5b87 439{
45ddcecb 440 const struct cpumask *mask = NULL;
1f5a5b87 441 struct irq_desc *desc;
45ddcecb 442 unsigned int flags;
e75eafb9 443 int i;
45ddcecb 444
e75eafb9
TG
445 /* Validate affinity mask(s) */
446 if (affinity) {
447 for (i = 0, mask = affinity; i < cnt; i++, mask++) {
448 if (cpumask_empty(mask))
449 return -EINVAL;
450 }
451 }
45ddcecb
TG
452
453 flags = affinity ? IRQD_AFFINITY_MANAGED : 0;
e75eafb9 454 mask = NULL;
1f5a5b87
TG
455
456 for (i = 0; i < cnt; i++) {
45ddcecb 457 if (affinity) {
e75eafb9
TG
458 node = cpu_to_node(cpumask_first(affinity));
459 mask = affinity;
460 affinity++;
45ddcecb
TG
461 }
462 desc = alloc_desc(start + i, node, flags, mask, owner);
1f5a5b87
TG
463 if (!desc)
464 goto err;
a05a900a 465 mutex_lock(&sparse_irq_lock);
1f5a5b87 466 irq_insert_desc(start + i, desc);
ecb3f394 467 irq_sysfs_add(start + i, desc);
a05a900a 468 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
469 }
470 return start;
471
472err:
473 for (i--; i >= 0; i--)
474 free_desc(start + i);
475
a05a900a 476 mutex_lock(&sparse_irq_lock);
1f5a5b87 477 bitmap_clear(allocated_irqs, start, cnt);
a05a900a 478 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
479 return -ENOMEM;
480}
481
ed4dea6e 482static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7 483{
ed4dea6e 484 if (nr > IRQ_BITMAP_BITS)
e7bcecb7 485 return -ENOMEM;
ed4dea6e 486 nr_irqs = nr;
e7bcecb7
TG
487 return 0;
488}
489
3795de23
TG
490int __init early_irq_init(void)
491{
b683de2b 492 int i, initcnt, node = first_online_node;
3795de23 493 struct irq_desc *desc;
3795de23
TG
494
495 init_irq_default_affinity();
496
b683de2b
TG
497 /* Let arch update nr_irqs and return the nr of preallocated irqs */
498 initcnt = arch_probe_nr_irqs();
5a29ef22
VL
499 printk(KERN_INFO "NR_IRQS: %d, nr_irqs: %d, preallocated irqs: %d\n",
500 NR_IRQS, nr_irqs, initcnt);
3795de23 501
c1ee6264
TG
502 if (WARN_ON(nr_irqs > IRQ_BITMAP_BITS))
503 nr_irqs = IRQ_BITMAP_BITS;
504
505 if (WARN_ON(initcnt > IRQ_BITMAP_BITS))
506 initcnt = IRQ_BITMAP_BITS;
507
508 if (initcnt > nr_irqs)
509 nr_irqs = initcnt;
510
b683de2b 511 for (i = 0; i < initcnt; i++) {
45ddcecb 512 desc = alloc_desc(i, node, 0, NULL, NULL);
aa99ec0f
TG
513 set_bit(i, allocated_irqs);
514 irq_insert_desc(i, desc);
3795de23 515 }
3795de23
TG
516 return arch_early_irq_init();
517}
518
3795de23
TG
519#else /* !CONFIG_SPARSE_IRQ */
520
521struct irq_desc irq_desc[NR_IRQS] __cacheline_aligned_in_smp = {
522 [0 ... NR_IRQS-1] = {
3795de23
TG
523 .handle_irq = handle_bad_irq,
524 .depth = 1,
525 .lock = __RAW_SPIN_LOCK_UNLOCKED(irq_desc->lock),
526 }
527};
528
3795de23
TG
529int __init early_irq_init(void)
530{
aa99ec0f 531 int count, i, node = first_online_node;
3795de23 532 struct irq_desc *desc;
3795de23
TG
533
534 init_irq_default_affinity();
535
5a29ef22 536 printk(KERN_INFO "NR_IRQS: %d\n", NR_IRQS);
3795de23
TG
537
538 desc = irq_desc;
539 count = ARRAY_SIZE(irq_desc);
540
541 for (i = 0; i < count; i++) {
6c9ae009 542 desc[i].kstat_irqs = alloc_percpu(unsigned int);
4ab764c3 543 alloc_masks(&desc[i], node);
e7fbad30 544 raw_spin_lock_init(&desc[i].lock);
154cd387 545 lockdep_set_class(&desc[i].lock, &irq_desc_lock_class);
45ddcecb 546 desc_set_defaults(i, &desc[i], node, NULL, NULL);
3795de23
TG
547 }
548 return arch_early_irq_init();
549}
550
551struct irq_desc *irq_to_desc(unsigned int irq)
552{
553 return (irq < NR_IRQS) ? irq_desc + irq : NULL;
554}
2c45aada 555EXPORT_SYMBOL(irq_to_desc);
3795de23 556
1f5a5b87
TG
557static void free_desc(unsigned int irq)
558{
d8179bc0
TG
559 struct irq_desc *desc = irq_to_desc(irq);
560 unsigned long flags;
561
562 raw_spin_lock_irqsave(&desc->lock, flags);
45ddcecb 563 desc_set_defaults(irq, desc, irq_desc_get_node(desc), NULL, NULL);
d8179bc0 564 raw_spin_unlock_irqrestore(&desc->lock, flags);
1f5a5b87
TG
565}
566
b6873807 567static inline int alloc_descs(unsigned int start, unsigned int cnt, int node,
06ee6d57 568 const struct cpumask *affinity,
b6873807 569 struct module *owner)
1f5a5b87 570{
b6873807
SAS
571 u32 i;
572
573 for (i = 0; i < cnt; i++) {
574 struct irq_desc *desc = irq_to_desc(start + i);
575
576 desc->owner = owner;
577 }
1f5a5b87
TG
578 return start;
579}
e7bcecb7 580
ed4dea6e 581static int irq_expand_nr_irqs(unsigned int nr)
e7bcecb7
TG
582{
583 return -ENOMEM;
584}
585
f63b6a05
TG
586void irq_mark_irq(unsigned int irq)
587{
588 mutex_lock(&sparse_irq_lock);
589 bitmap_set(allocated_irqs, irq, 1);
590 mutex_unlock(&sparse_irq_lock);
591}
592
c940e01c
TG
593#ifdef CONFIG_GENERIC_IRQ_LEGACY
594void irq_init_desc(unsigned int irq)
595{
d8179bc0 596 free_desc(irq);
c940e01c
TG
597}
598#endif
599
3795de23
TG
600#endif /* !CONFIG_SPARSE_IRQ */
601
fe12bc2c
TG
602/**
603 * generic_handle_irq - Invoke the handler for a particular irq
604 * @irq: The irq number to handle
605 *
606 */
607int generic_handle_irq(unsigned int irq)
608{
609 struct irq_desc *desc = irq_to_desc(irq);
610
611 if (!desc)
612 return -EINVAL;
bd0b9ac4 613 generic_handle_irq_desc(desc);
fe12bc2c
TG
614 return 0;
615}
edf76f83 616EXPORT_SYMBOL_GPL(generic_handle_irq);
fe12bc2c 617
76ba59f8
MZ
618#ifdef CONFIG_HANDLE_DOMAIN_IRQ
619/**
620 * __handle_domain_irq - Invoke the handler for a HW irq belonging to a domain
621 * @domain: The domain where to perform the lookup
622 * @hwirq: The HW irq number to convert to a logical one
623 * @lookup: Whether to perform the domain lookup or not
624 * @regs: Register file coming from the low-level handling code
625 *
626 * Returns: 0 on success, or -EINVAL if conversion has failed
627 */
628int __handle_domain_irq(struct irq_domain *domain, unsigned int hwirq,
629 bool lookup, struct pt_regs *regs)
630{
631 struct pt_regs *old_regs = set_irq_regs(regs);
632 unsigned int irq = hwirq;
633 int ret = 0;
634
635 irq_enter();
636
637#ifdef CONFIG_IRQ_DOMAIN
638 if (lookup)
639 irq = irq_find_mapping(domain, hwirq);
640#endif
641
642 /*
643 * Some hardware gives randomly wrong interrupts. Rather
644 * than crashing, do something sensible.
645 */
646 if (unlikely(!irq || irq >= nr_irqs)) {
647 ack_bad_irq(irq);
648 ret = -EINVAL;
649 } else {
650 generic_handle_irq(irq);
651 }
652
653 irq_exit();
654 set_irq_regs(old_regs);
655 return ret;
656}
657#endif
658
1f5a5b87
TG
659/* Dynamic interrupt handling */
660
661/**
662 * irq_free_descs - free irq descriptors
663 * @from: Start of descriptor range
664 * @cnt: Number of consecutive irqs to free
665 */
666void irq_free_descs(unsigned int from, unsigned int cnt)
667{
1f5a5b87
TG
668 int i;
669
670 if (from >= nr_irqs || (from + cnt) > nr_irqs)
671 return;
672
673 for (i = 0; i < cnt; i++)
674 free_desc(from + i);
675
a05a900a 676 mutex_lock(&sparse_irq_lock);
1f5a5b87 677 bitmap_clear(allocated_irqs, from, cnt);
a05a900a 678 mutex_unlock(&sparse_irq_lock);
1f5a5b87 679}
edf76f83 680EXPORT_SYMBOL_GPL(irq_free_descs);
1f5a5b87
TG
681
682/**
683 * irq_alloc_descs - allocate and initialize a range of irq descriptors
684 * @irq: Allocate for specific irq number if irq >= 0
685 * @from: Start the search from this irq number
686 * @cnt: Number of consecutive irqs to allocate.
687 * @node: Preferred node on which the irq descriptor should be allocated
d522a0d1 688 * @owner: Owning module (can be NULL)
e75eafb9
TG
689 * @affinity: Optional pointer to an affinity mask array of size @cnt which
690 * hints where the irq descriptors should be allocated and which
691 * default affinities to use
1f5a5b87
TG
692 *
693 * Returns the first irq number or error code
694 */
695int __ref
b6873807 696__irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
06ee6d57 697 struct module *owner, const struct cpumask *affinity)
1f5a5b87 698{
1f5a5b87
TG
699 int start, ret;
700
701 if (!cnt)
702 return -EINVAL;
703
c5182b88
MB
704 if (irq >= 0) {
705 if (from > irq)
706 return -EINVAL;
707 from = irq;
62a08ae2
TG
708 } else {
709 /*
710 * For interrupts which are freely allocated the
711 * architecture can force a lower bound to the @from
712 * argument. x86 uses this to exclude the GSI space.
713 */
714 from = arch_dynirq_lower_bound(from);
c5182b88
MB
715 }
716
a05a900a 717 mutex_lock(&sparse_irq_lock);
1f5a5b87 718
ed4dea6e
YL
719 start = bitmap_find_next_zero_area(allocated_irqs, IRQ_BITMAP_BITS,
720 from, cnt, 0);
1f5a5b87
TG
721 ret = -EEXIST;
722 if (irq >=0 && start != irq)
723 goto err;
724
ed4dea6e
YL
725 if (start + cnt > nr_irqs) {
726 ret = irq_expand_nr_irqs(start + cnt);
e7bcecb7
TG
727 if (ret)
728 goto err;
729 }
1f5a5b87
TG
730
731 bitmap_set(allocated_irqs, start, cnt);
a05a900a 732 mutex_unlock(&sparse_irq_lock);
06ee6d57 733 return alloc_descs(start, cnt, node, affinity, owner);
1f5a5b87
TG
734
735err:
a05a900a 736 mutex_unlock(&sparse_irq_lock);
1f5a5b87
TG
737 return ret;
738}
b6873807 739EXPORT_SYMBOL_GPL(__irq_alloc_descs);
1f5a5b87 740
7b6ef126
TG
741#ifdef CONFIG_GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
742/**
743 * irq_alloc_hwirqs - Allocate an irq descriptor and initialize the hardware
744 * @cnt: number of interrupts to allocate
745 * @node: node on which to allocate
746 *
747 * Returns an interrupt number > 0 or 0, if the allocation fails.
748 */
749unsigned int irq_alloc_hwirqs(int cnt, int node)
750{
06ee6d57 751 int i, irq = __irq_alloc_descs(-1, 0, cnt, node, NULL, NULL);
7b6ef126
TG
752
753 if (irq < 0)
754 return 0;
755
756 for (i = irq; cnt > 0; i++, cnt--) {
757 if (arch_setup_hwirq(i, node))
758 goto err;
759 irq_clear_status_flags(i, _IRQ_NOREQUEST);
760 }
761 return irq;
762
763err:
764 for (i--; i >= irq; i--) {
765 irq_set_status_flags(i, _IRQ_NOREQUEST | _IRQ_NOPROBE);
766 arch_teardown_hwirq(i);
767 }
768 irq_free_descs(irq, cnt);
769 return 0;
770}
771EXPORT_SYMBOL_GPL(irq_alloc_hwirqs);
772
773/**
774 * irq_free_hwirqs - Free irq descriptor and cleanup the hardware
775 * @from: Free from irq number
776 * @cnt: number of interrupts to free
777 *
778 */
779void irq_free_hwirqs(unsigned int from, int cnt)
780{
8844aad8 781 int i, j;
7b6ef126 782
8844aad8 783 for (i = from, j = cnt; j > 0; i++, j--) {
7b6ef126
TG
784 irq_set_status_flags(i, _IRQ_NOREQUEST | _IRQ_NOPROBE);
785 arch_teardown_hwirq(i);
786 }
787 irq_free_descs(from, cnt);
788}
789EXPORT_SYMBOL_GPL(irq_free_hwirqs);
790#endif
791
a98d24b7
TG
792/**
793 * irq_get_next_irq - get next allocated irq number
794 * @offset: where to start the search
795 *
796 * Returns next irq number after offset or nr_irqs if none is found.
797 */
798unsigned int irq_get_next_irq(unsigned int offset)
799{
800 return find_next_bit(allocated_irqs, nr_irqs, offset);
801}
802
d5eb4ad2 803struct irq_desc *
31d9d9b6
MZ
804__irq_get_desc_lock(unsigned int irq, unsigned long *flags, bool bus,
805 unsigned int check)
d5eb4ad2
TG
806{
807 struct irq_desc *desc = irq_to_desc(irq);
808
809 if (desc) {
31d9d9b6
MZ
810 if (check & _IRQ_DESC_CHECK) {
811 if ((check & _IRQ_DESC_PERCPU) &&
812 !irq_settings_is_per_cpu_devid(desc))
813 return NULL;
814
815 if (!(check & _IRQ_DESC_PERCPU) &&
816 irq_settings_is_per_cpu_devid(desc))
817 return NULL;
818 }
819
d5eb4ad2
TG
820 if (bus)
821 chip_bus_lock(desc);
822 raw_spin_lock_irqsave(&desc->lock, *flags);
823 }
824 return desc;
825}
826
827void __irq_put_desc_unlock(struct irq_desc *desc, unsigned long flags, bool bus)
828{
829 raw_spin_unlock_irqrestore(&desc->lock, flags);
830 if (bus)
831 chip_bus_sync_unlock(desc);
832}
833
222df54f
MZ
834int irq_set_percpu_devid_partition(unsigned int irq,
835 const struct cpumask *affinity)
31d9d9b6
MZ
836{
837 struct irq_desc *desc = irq_to_desc(irq);
838
839 if (!desc)
840 return -EINVAL;
841
842 if (desc->percpu_enabled)
843 return -EINVAL;
844
845 desc->percpu_enabled = kzalloc(sizeof(*desc->percpu_enabled), GFP_KERNEL);
846
847 if (!desc->percpu_enabled)
848 return -ENOMEM;
849
222df54f
MZ
850 if (affinity)
851 desc->percpu_affinity = affinity;
852 else
853 desc->percpu_affinity = cpu_possible_mask;
854
31d9d9b6
MZ
855 irq_set_percpu_devid_flags(irq);
856 return 0;
857}
858
222df54f
MZ
859int irq_set_percpu_devid(unsigned int irq)
860{
861 return irq_set_percpu_devid_partition(irq, NULL);
862}
863
864int irq_get_percpu_devid_partition(unsigned int irq, struct cpumask *affinity)
865{
866 struct irq_desc *desc = irq_to_desc(irq);
867
868 if (!desc || !desc->percpu_enabled)
869 return -EINVAL;
870
871 if (affinity)
872 cpumask_copy(affinity, desc->percpu_affinity);
873
874 return 0;
875}
876
792d0018
TG
877void kstat_incr_irq_this_cpu(unsigned int irq)
878{
b51bf95c 879 kstat_incr_irqs_this_cpu(irq_to_desc(irq));
792d0018
TG
880}
881
c291ee62
TG
882/**
883 * kstat_irqs_cpu - Get the statistics for an interrupt on a cpu
884 * @irq: The interrupt number
885 * @cpu: The cpu number
886 *
887 * Returns the sum of interrupt counts on @cpu since boot for
888 * @irq. The caller must ensure that the interrupt is not removed
889 * concurrently.
890 */
3795de23
TG
891unsigned int kstat_irqs_cpu(unsigned int irq, int cpu)
892{
893 struct irq_desc *desc = irq_to_desc(irq);
6c9ae009
ED
894
895 return desc && desc->kstat_irqs ?
896 *per_cpu_ptr(desc->kstat_irqs, cpu) : 0;
3795de23 897}
478735e3 898
c291ee62
TG
899/**
900 * kstat_irqs - Get the statistics for an interrupt
901 * @irq: The interrupt number
902 *
903 * Returns the sum of interrupt counts on all cpus since boot for
904 * @irq. The caller must ensure that the interrupt is not removed
905 * concurrently.
906 */
478735e3
KH
907unsigned int kstat_irqs(unsigned int irq)
908{
909 struct irq_desc *desc = irq_to_desc(irq);
910 int cpu;
5e9662fa 911 unsigned int sum = 0;
478735e3 912
6c9ae009 913 if (!desc || !desc->kstat_irqs)
478735e3
KH
914 return 0;
915 for_each_possible_cpu(cpu)
6c9ae009 916 sum += *per_cpu_ptr(desc->kstat_irqs, cpu);
478735e3
KH
917 return sum;
918}
c291ee62
TG
919
920/**
921 * kstat_irqs_usr - Get the statistics for an interrupt
922 * @irq: The interrupt number
923 *
924 * Returns the sum of interrupt counts on all cpus since boot for
925 * @irq. Contrary to kstat_irqs() this can be called from any
926 * preemptible context. It's protected against concurrent removal of
927 * an interrupt descriptor when sparse irqs are enabled.
928 */
929unsigned int kstat_irqs_usr(unsigned int irq)
930{
7df0b278 931 unsigned int sum;
c291ee62
TG
932
933 irq_lock_sparse();
934 sum = kstat_irqs(irq);
935 irq_unlock_sparse();
936 return sum;
937}