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Merge branch 'for-4.9/dax' into libnvdimm-for-next
[mirror_ubuntu-zesty-kernel.git] / kernel / irq / manage.c
CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
4d1d61a6 20#include <linux/task_work.h>
1da177e4
LT
21
22#include "internals.h"
23
8d32a307
TG
24#ifdef CONFIG_IRQ_FORCED_THREADING
25__read_mostly bool force_irqthreads;
26
27static int __init setup_forced_irqthreads(char *arg)
28{
29 force_irqthreads = true;
30 return 0;
31}
32early_param("threadirqs", setup_forced_irqthreads);
33#endif
34
18258f72 35static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 36{
32f4125e 37 bool inprogress;
1da177e4 38
a98ce5c6
HX
39 do {
40 unsigned long flags;
41
42 /*
43 * Wait until we're out of the critical section. This might
44 * give the wrong answer due to the lack of memory barriers.
45 */
32f4125e 46 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
47 cpu_relax();
48
49 /* Ok, that indicated we're done: double-check carefully. */
239007b8 50 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 51 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 52 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
53
54 /* Oops, that failed? */
32f4125e 55 } while (inprogress);
18258f72
TG
56}
57
58/**
59 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
60 * @irq: interrupt number to wait for
61 *
62 * This function waits for any pending hard IRQ handlers for this
63 * interrupt to complete before returning. If you use this
64 * function while holding a resource the IRQ handler may need you
65 * will deadlock. It does not take associated threaded handlers
66 * into account.
67 *
68 * Do not use this for shutdown scenarios where you must be sure
69 * that all parts (hardirq and threaded handler) have completed.
70 *
02cea395
PZ
71 * Returns: false if a threaded handler is active.
72 *
18258f72
TG
73 * This function may be called - with care - from IRQ context.
74 */
02cea395 75bool synchronize_hardirq(unsigned int irq)
18258f72
TG
76{
77 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 78
02cea395 79 if (desc) {
18258f72 80 __synchronize_hardirq(desc);
02cea395
PZ
81 return !atomic_read(&desc->threads_active);
82 }
83
84 return true;
18258f72
TG
85}
86EXPORT_SYMBOL(synchronize_hardirq);
87
88/**
89 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
90 * @irq: interrupt number to wait for
91 *
92 * This function waits for any pending IRQ handlers for this interrupt
93 * to complete before returning. If you use this function while
94 * holding a resource the IRQ handler may need you will deadlock.
95 *
96 * This function may be called - with care - from IRQ context.
97 */
98void synchronize_irq(unsigned int irq)
99{
100 struct irq_desc *desc = irq_to_desc(irq);
101
102 if (desc) {
103 __synchronize_hardirq(desc);
104 /*
105 * We made sure that no hardirq handler is
106 * running. Now verify that no threaded handlers are
107 * active.
108 */
109 wait_event(desc->wait_for_threads,
110 !atomic_read(&desc->threads_active));
111 }
1da177e4 112}
1da177e4
LT
113EXPORT_SYMBOL(synchronize_irq);
114
3aa551c9
TG
115#ifdef CONFIG_SMP
116cpumask_var_t irq_default_affinity;
117
9c255583 118static bool __irq_can_set_affinity(struct irq_desc *desc)
e019c249
JL
119{
120 if (!desc || !irqd_can_balance(&desc->irq_data) ||
121 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
9c255583
TG
122 return false;
123 return true;
e019c249
JL
124}
125
771ee3b0
TG
126/**
127 * irq_can_set_affinity - Check if the affinity of a given irq can be set
128 * @irq: Interrupt to check
129 *
130 */
131int irq_can_set_affinity(unsigned int irq)
132{
e019c249 133 return __irq_can_set_affinity(irq_to_desc(irq));
771ee3b0
TG
134}
135
9c255583
TG
136/**
137 * irq_can_set_affinity_usr - Check if affinity of a irq can be set from user space
138 * @irq: Interrupt to check
139 *
140 * Like irq_can_set_affinity() above, but additionally checks for the
141 * AFFINITY_MANAGED flag.
142 */
143bool irq_can_set_affinity_usr(unsigned int irq)
144{
145 struct irq_desc *desc = irq_to_desc(irq);
146
147 return __irq_can_set_affinity(desc) &&
148 !irqd_affinity_is_managed(&desc->irq_data);
149}
150
591d2fb0
TG
151/**
152 * irq_set_thread_affinity - Notify irq threads to adjust affinity
153 * @desc: irq descriptor which has affitnity changed
154 *
155 * We just set IRQTF_AFFINITY and delegate the affinity setting
156 * to the interrupt thread itself. We can not call
157 * set_cpus_allowed_ptr() here as we hold desc->lock and this
158 * code can be called from hard interrupt context.
159 */
160void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9 161{
f944b5a7 162 struct irqaction *action;
3aa551c9 163
f944b5a7 164 for_each_action_of_desc(desc, action)
3aa551c9 165 if (action->thread)
591d2fb0 166 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
167}
168
1fa46f1f 169#ifdef CONFIG_GENERIC_PENDING_IRQ
0ef5ca1e 170static inline bool irq_can_move_pcntxt(struct irq_data *data)
1fa46f1f 171{
0ef5ca1e 172 return irqd_can_move_in_process_context(data);
1fa46f1f 173}
0ef5ca1e 174static inline bool irq_move_pending(struct irq_data *data)
1fa46f1f 175{
0ef5ca1e 176 return irqd_is_setaffinity_pending(data);
1fa46f1f
TG
177}
178static inline void
179irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask)
180{
181 cpumask_copy(desc->pending_mask, mask);
182}
183static inline void
184irq_get_pending(struct cpumask *mask, struct irq_desc *desc)
185{
186 cpumask_copy(mask, desc->pending_mask);
187}
188#else
0ef5ca1e 189static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; }
cd22c0e4 190static inline bool irq_move_pending(struct irq_data *data) { return false; }
1fa46f1f
TG
191static inline void
192irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { }
193static inline void
194irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { }
195#endif
196
818b0f3b
JL
197int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
198 bool force)
199{
200 struct irq_desc *desc = irq_data_to_desc(data);
201 struct irq_chip *chip = irq_data_get_irq_chip(data);
202 int ret;
203
01f8fa4f 204 ret = chip->irq_set_affinity(data, mask, force);
818b0f3b
JL
205 switch (ret) {
206 case IRQ_SET_MASK_OK:
2cb62547 207 case IRQ_SET_MASK_OK_DONE:
9df872fa 208 cpumask_copy(desc->irq_common_data.affinity, mask);
818b0f3b
JL
209 case IRQ_SET_MASK_OK_NOCOPY:
210 irq_set_thread_affinity(desc);
211 ret = 0;
212 }
213
214 return ret;
215}
216
01f8fa4f
TG
217int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
218 bool force)
771ee3b0 219{
c2d0c555
DD
220 struct irq_chip *chip = irq_data_get_irq_chip(data);
221 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 222 int ret = 0;
771ee3b0 223
c2d0c555 224 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
225 return -EINVAL;
226
0ef5ca1e 227 if (irq_can_move_pcntxt(data)) {
01f8fa4f 228 ret = irq_do_set_affinity(data, mask, force);
1fa46f1f 229 } else {
c2d0c555 230 irqd_set_move_pending(data);
1fa46f1f 231 irq_copy_pending(desc, mask);
57b150cc 232 }
1fa46f1f 233
cd7eab44
BH
234 if (desc->affinity_notify) {
235 kref_get(&desc->affinity_notify->kref);
236 schedule_work(&desc->affinity_notify->work);
237 }
c2d0c555
DD
238 irqd_set(data, IRQD_AFFINITY_SET);
239
240 return ret;
241}
242
01f8fa4f 243int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
244{
245 struct irq_desc *desc = irq_to_desc(irq);
246 unsigned long flags;
247 int ret;
248
249 if (!desc)
250 return -EINVAL;
251
252 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 253 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 254 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 255 return ret;
771ee3b0
TG
256}
257
e7a297b0
PWJ
258int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
259{
e7a297b0 260 unsigned long flags;
31d9d9b6 261 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
262
263 if (!desc)
264 return -EINVAL;
e7a297b0 265 desc->affinity_hint = m;
02725e74 266 irq_put_desc_unlock(desc, flags);
e2e64a93 267 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
268 if (m)
269 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
270 return 0;
271}
272EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
273
cd7eab44
BH
274static void irq_affinity_notify(struct work_struct *work)
275{
276 struct irq_affinity_notify *notify =
277 container_of(work, struct irq_affinity_notify, work);
278 struct irq_desc *desc = irq_to_desc(notify->irq);
279 cpumask_var_t cpumask;
280 unsigned long flags;
281
1fa46f1f 282 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
283 goto out;
284
285 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 286 if (irq_move_pending(&desc->irq_data))
1fa46f1f 287 irq_get_pending(cpumask, desc);
cd7eab44 288 else
9df872fa 289 cpumask_copy(cpumask, desc->irq_common_data.affinity);
cd7eab44
BH
290 raw_spin_unlock_irqrestore(&desc->lock, flags);
291
292 notify->notify(notify, cpumask);
293
294 free_cpumask_var(cpumask);
295out:
296 kref_put(&notify->kref, notify->release);
297}
298
299/**
300 * irq_set_affinity_notifier - control notification of IRQ affinity changes
301 * @irq: Interrupt for which to enable/disable notification
302 * @notify: Context for notification, or %NULL to disable
303 * notification. Function pointers must be initialised;
304 * the other fields will be initialised by this function.
305 *
306 * Must be called in process context. Notification may only be enabled
307 * after the IRQ is allocated and must be disabled before the IRQ is
308 * freed using free_irq().
309 */
310int
311irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
312{
313 struct irq_desc *desc = irq_to_desc(irq);
314 struct irq_affinity_notify *old_notify;
315 unsigned long flags;
316
317 /* The release function is promised process context */
318 might_sleep();
319
320 if (!desc)
321 return -EINVAL;
322
323 /* Complete initialisation of *notify */
324 if (notify) {
325 notify->irq = irq;
326 kref_init(&notify->kref);
327 INIT_WORK(&notify->work, irq_affinity_notify);
328 }
329
330 raw_spin_lock_irqsave(&desc->lock, flags);
331 old_notify = desc->affinity_notify;
332 desc->affinity_notify = notify;
333 raw_spin_unlock_irqrestore(&desc->lock, flags);
334
335 if (old_notify)
336 kref_put(&old_notify->kref, old_notify->release);
337
338 return 0;
339}
340EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
341
18404756
MK
342#ifndef CONFIG_AUTO_IRQ_AFFINITY
343/*
344 * Generic version of the affinity autoselector.
345 */
a8a98eac 346static int setup_affinity(struct irq_desc *desc, struct cpumask *mask)
18404756 347{
569bda8d 348 struct cpumask *set = irq_default_affinity;
6783011b 349 int node = irq_desc_get_node(desc);
569bda8d 350
b008207c 351 /* Excludes PER_CPU and NO_BALANCE interrupts */
e019c249 352 if (!__irq_can_set_affinity(desc))
18404756
MK
353 return 0;
354
f6d87f4b 355 /*
06ee6d57
TG
356 * Preserve the managed affinity setting and an userspace affinity
357 * setup, but make sure that one of the targets is online.
f6d87f4b 358 */
06ee6d57
TG
359 if (irqd_affinity_is_managed(&desc->irq_data) ||
360 irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
9df872fa 361 if (cpumask_intersects(desc->irq_common_data.affinity,
569bda8d 362 cpu_online_mask))
9df872fa 363 set = desc->irq_common_data.affinity;
0c6f8a8b 364 else
2bdd1055 365 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 366 }
18404756 367
3b8249e7 368 cpumask_and(mask, cpu_online_mask, set);
241fc640
PB
369 if (node != NUMA_NO_NODE) {
370 const struct cpumask *nodemask = cpumask_of_node(node);
371
372 /* make sure at least one of the cpus in nodemask is online */
373 if (cpumask_intersects(mask, nodemask))
374 cpumask_and(mask, mask, nodemask);
375 }
818b0f3b 376 irq_do_set_affinity(&desc->irq_data, mask, false);
18404756
MK
377 return 0;
378}
f6d87f4b 379#else
a8a98eac
JL
380/* Wrapper for ALPHA specific affinity selector magic */
381static inline int setup_affinity(struct irq_desc *d, struct cpumask *mask)
f6d87f4b 382{
a8a98eac 383 return irq_select_affinity(irq_desc_get_irq(d));
f6d87f4b 384}
18404756
MK
385#endif
386
f6d87f4b
TG
387/*
388 * Called when affinity is set via /proc/irq
389 */
3b8249e7 390int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask)
f6d87f4b
TG
391{
392 struct irq_desc *desc = irq_to_desc(irq);
393 unsigned long flags;
394 int ret;
395
239007b8 396 raw_spin_lock_irqsave(&desc->lock, flags);
a8a98eac 397 ret = setup_affinity(desc, mask);
239007b8 398 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
399 return ret;
400}
401
402#else
3b8249e7 403static inline int
a8a98eac 404setup_affinity(struct irq_desc *desc, struct cpumask *mask)
f6d87f4b
TG
405{
406 return 0;
407}
1da177e4
LT
408#endif
409
fcf1ae2f
FW
410/**
411 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
412 * @irq: interrupt number to set affinity
413 * @vcpu_info: vCPU specific data
414 *
415 * This function uses the vCPU specific data to set the vCPU
416 * affinity for an irq. The vCPU specific data is passed from
417 * outside, such as KVM. One example code path is as below:
418 * KVM -> IOMMU -> irq_set_vcpu_affinity().
419 */
420int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
421{
422 unsigned long flags;
423 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
424 struct irq_data *data;
425 struct irq_chip *chip;
426 int ret = -ENOSYS;
427
428 if (!desc)
429 return -EINVAL;
430
431 data = irq_desc_get_irq_data(desc);
432 chip = irq_data_get_irq_chip(data);
433 if (chip && chip->irq_set_vcpu_affinity)
434 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
435 irq_put_desc_unlock(desc, flags);
436
437 return ret;
438}
439EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
440
79ff1cda 441void __disable_irq(struct irq_desc *desc)
0a0c5168 442{
3aae994f 443 if (!desc->depth++)
87923470 444 irq_disable(desc);
0a0c5168
RW
445}
446
02725e74
TG
447static int __disable_irq_nosync(unsigned int irq)
448{
449 unsigned long flags;
31d9d9b6 450 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
451
452 if (!desc)
453 return -EINVAL;
79ff1cda 454 __disable_irq(desc);
02725e74
TG
455 irq_put_desc_busunlock(desc, flags);
456 return 0;
457}
458
1da177e4
LT
459/**
460 * disable_irq_nosync - disable an irq without waiting
461 * @irq: Interrupt to disable
462 *
463 * Disable the selected interrupt line. Disables and Enables are
464 * nested.
465 * Unlike disable_irq(), this function does not ensure existing
466 * instances of the IRQ handler have completed before returning.
467 *
468 * This function may be called from IRQ context.
469 */
470void disable_irq_nosync(unsigned int irq)
471{
02725e74 472 __disable_irq_nosync(irq);
1da177e4 473}
1da177e4
LT
474EXPORT_SYMBOL(disable_irq_nosync);
475
476/**
477 * disable_irq - disable an irq and wait for completion
478 * @irq: Interrupt to disable
479 *
480 * Disable the selected interrupt line. Enables and Disables are
481 * nested.
482 * This function waits for any pending IRQ handlers for this interrupt
483 * to complete before returning. If you use this function while
484 * holding a resource the IRQ handler may need you will deadlock.
485 *
486 * This function may be called - with care - from IRQ context.
487 */
488void disable_irq(unsigned int irq)
489{
02725e74 490 if (!__disable_irq_nosync(irq))
1da177e4
LT
491 synchronize_irq(irq);
492}
1da177e4
LT
493EXPORT_SYMBOL(disable_irq);
494
02cea395
PZ
495/**
496 * disable_hardirq - disables an irq and waits for hardirq completion
497 * @irq: Interrupt to disable
498 *
499 * Disable the selected interrupt line. Enables and Disables are
500 * nested.
501 * This function waits for any pending hard IRQ handlers for this
502 * interrupt to complete before returning. If you use this function while
503 * holding a resource the hard IRQ handler may need you will deadlock.
504 *
505 * When used to optimistically disable an interrupt from atomic context
506 * the return value must be checked.
507 *
508 * Returns: false if a threaded handler is active.
509 *
510 * This function may be called - with care - from IRQ context.
511 */
512bool disable_hardirq(unsigned int irq)
513{
514 if (!__disable_irq_nosync(irq))
515 return synchronize_hardirq(irq);
516
517 return false;
518}
519EXPORT_SYMBOL_GPL(disable_hardirq);
520
79ff1cda 521void __enable_irq(struct irq_desc *desc)
1adb0850
TG
522{
523 switch (desc->depth) {
524 case 0:
0a0c5168 525 err_out:
79ff1cda
JL
526 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
527 irq_desc_get_irq(desc));
1adb0850
TG
528 break;
529 case 1: {
c531e836 530 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 531 goto err_out;
1adb0850 532 /* Prevent probing on this irq: */
1ccb4e61 533 irq_settings_set_noprobe(desc);
3aae994f 534 irq_enable(desc);
0798abeb 535 check_irq_resend(desc);
1adb0850
TG
536 /* fall-through */
537 }
538 default:
539 desc->depth--;
540 }
541}
542
1da177e4
LT
543/**
544 * enable_irq - enable handling of an irq
545 * @irq: Interrupt to enable
546 *
547 * Undoes the effect of one call to disable_irq(). If this
548 * matches the last disable, processing of interrupts on this
549 * IRQ line is re-enabled.
550 *
70aedd24 551 * This function may be called from IRQ context only when
6b8ff312 552 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
553 */
554void enable_irq(unsigned int irq)
555{
1da177e4 556 unsigned long flags;
31d9d9b6 557 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 558
7d94f7ca 559 if (!desc)
c2b5a251 560 return;
50f7c032
TG
561 if (WARN(!desc->irq_data.chip,
562 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 563 goto out;
2656c366 564
79ff1cda 565 __enable_irq(desc);
02725e74
TG
566out:
567 irq_put_desc_busunlock(desc, flags);
1da177e4 568}
1da177e4
LT
569EXPORT_SYMBOL(enable_irq);
570
0c5d1eb7 571static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 572{
08678b08 573 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
574 int ret = -ENXIO;
575
60f96b41
SS
576 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
577 return 0;
578
2f7e99bb
TG
579 if (desc->irq_data.chip->irq_set_wake)
580 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
581
582 return ret;
583}
584
ba9a2331 585/**
a0cd9ca2 586 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
587 * @irq: interrupt to control
588 * @on: enable/disable power management wakeup
589 *
15a647eb
DB
590 * Enable/disable power management wakeup mode, which is
591 * disabled by default. Enables and disables must match,
592 * just as they match for non-wakeup mode support.
593 *
594 * Wakeup mode lets this IRQ wake the system from sleep
595 * states like "suspend to RAM".
ba9a2331 596 */
a0cd9ca2 597int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 598{
ba9a2331 599 unsigned long flags;
31d9d9b6 600 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 601 int ret = 0;
ba9a2331 602
13863a66
JJ
603 if (!desc)
604 return -EINVAL;
605
15a647eb
DB
606 /* wakeup-capable irqs can be shared between drivers that
607 * don't need to have the same sleep mode behaviors.
608 */
15a647eb 609 if (on) {
2db87321
UKK
610 if (desc->wake_depth++ == 0) {
611 ret = set_irq_wake_real(irq, on);
612 if (ret)
613 desc->wake_depth = 0;
614 else
7f94226f 615 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 616 }
15a647eb
DB
617 } else {
618 if (desc->wake_depth == 0) {
7a2c4770 619 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
620 } else if (--desc->wake_depth == 0) {
621 ret = set_irq_wake_real(irq, on);
622 if (ret)
623 desc->wake_depth = 1;
624 else
7f94226f 625 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 626 }
15a647eb 627 }
02725e74 628 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
629 return ret;
630}
a0cd9ca2 631EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 632
1da177e4
LT
633/*
634 * Internal function that tells the architecture code whether a
635 * particular irq has been exclusively allocated or is available
636 * for driver use.
637 */
638int can_request_irq(unsigned int irq, unsigned long irqflags)
639{
cc8c3b78 640 unsigned long flags;
31d9d9b6 641 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 642 int canrequest = 0;
1da177e4 643
7d94f7ca
YL
644 if (!desc)
645 return 0;
646
02725e74 647 if (irq_settings_can_request(desc)) {
2779db8d
BH
648 if (!desc->action ||
649 irqflags & desc->action->flags & IRQF_SHARED)
650 canrequest = 1;
02725e74
TG
651 }
652 irq_put_desc_unlock(desc, flags);
653 return canrequest;
1da177e4
LT
654}
655
a1ff541a 656int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
82736f4d 657{
6b8ff312 658 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 659 int ret, unmask = 0;
82736f4d 660
b2ba2c30 661 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
662 /*
663 * IRQF_TRIGGER_* but the PIC does not support multiple
664 * flow-types?
665 */
a1ff541a
JL
666 pr_debug("No set_type function for IRQ %d (%s)\n",
667 irq_desc_get_irq(desc),
f5d89470 668 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
669 return 0;
670 }
671
876dbd4c 672 flags &= IRQ_TYPE_SENSE_MASK;
d4d5e089
TG
673
674 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 675 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 676 mask_irq(desc);
32f4125e 677 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
678 unmask = 1;
679 }
680
f2b662da 681 /* caller masked out all except trigger mode flags */
b2ba2c30 682 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 683
876dbd4c
TG
684 switch (ret) {
685 case IRQ_SET_MASK_OK:
2cb62547 686 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
687 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
688 irqd_set(&desc->irq_data, flags);
689
690 case IRQ_SET_MASK_OK_NOCOPY:
691 flags = irqd_get_trigger_type(&desc->irq_data);
692 irq_settings_set_trigger_mask(desc, flags);
693 irqd_clear(&desc->irq_data, IRQD_LEVEL);
694 irq_settings_clr_level(desc);
695 if (flags & IRQ_TYPE_LEVEL_MASK) {
696 irq_settings_set_level(desc);
697 irqd_set(&desc->irq_data, IRQD_LEVEL);
698 }
46732475 699
d4d5e089 700 ret = 0;
8fff39e0 701 break;
876dbd4c 702 default:
97fd75b7 703 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
a1ff541a 704 flags, irq_desc_get_irq(desc), chip->irq_set_type);
0c5d1eb7 705 }
d4d5e089
TG
706 if (unmask)
707 unmask_irq(desc);
82736f4d
UKK
708 return ret;
709}
710
293a7a0a
TG
711#ifdef CONFIG_HARDIRQS_SW_RESEND
712int irq_set_parent(int irq, int parent_irq)
713{
714 unsigned long flags;
715 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
716
717 if (!desc)
718 return -EINVAL;
719
720 desc->parent_irq = parent_irq;
721
722 irq_put_desc_unlock(desc, flags);
723 return 0;
724}
725#endif
726
b25c340c
TG
727/*
728 * Default primary interrupt handler for threaded interrupts. Is
729 * assigned as primary handler when request_threaded_irq is called
730 * with handler == NULL. Useful for oneshot interrupts.
731 */
732static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
733{
734 return IRQ_WAKE_THREAD;
735}
736
399b5da2
TG
737/*
738 * Primary handler for nested threaded interrupts. Should never be
739 * called.
740 */
741static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
742{
743 WARN(1, "Primary handler called for nested irq %d\n", irq);
744 return IRQ_NONE;
745}
746
2a1d3ab8
TG
747static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id)
748{
749 WARN(1, "Secondary action handler called for irq %d\n", irq);
750 return IRQ_NONE;
751}
752
3aa551c9
TG
753static int irq_wait_for_interrupt(struct irqaction *action)
754{
550acb19
IY
755 set_current_state(TASK_INTERRUPTIBLE);
756
3aa551c9 757 while (!kthread_should_stop()) {
f48fe81e
TG
758
759 if (test_and_clear_bit(IRQTF_RUNTHREAD,
760 &action->thread_flags)) {
3aa551c9
TG
761 __set_current_state(TASK_RUNNING);
762 return 0;
f48fe81e
TG
763 }
764 schedule();
550acb19 765 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 766 }
550acb19 767 __set_current_state(TASK_RUNNING);
3aa551c9
TG
768 return -1;
769}
770
b25c340c
TG
771/*
772 * Oneshot interrupts keep the irq line masked until the threaded
773 * handler finished. unmask if the interrupt has not been disabled and
774 * is marked MASKED.
775 */
b5faba21 776static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 777 struct irqaction *action)
b25c340c 778{
2a1d3ab8
TG
779 if (!(desc->istate & IRQS_ONESHOT) ||
780 action->handler == irq_forced_secondary_handler)
b5faba21 781 return;
0b1adaa0 782again:
3876ec9e 783 chip_bus_lock(desc);
239007b8 784 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
785
786 /*
787 * Implausible though it may be we need to protect us against
788 * the following scenario:
789 *
790 * The thread is faster done than the hard interrupt handler
791 * on the other CPU. If we unmask the irq line then the
792 * interrupt can come in again and masks the line, leaves due
009b4c3b 793 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
794 *
795 * This also serializes the state of shared oneshot handlers
796 * versus "desc->threads_onehsot |= action->thread_mask;" in
797 * irq_wake_thread(). See the comment there which explains the
798 * serialization.
0b1adaa0 799 */
32f4125e 800 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 801 raw_spin_unlock_irq(&desc->lock);
3876ec9e 802 chip_bus_sync_unlock(desc);
0b1adaa0
TG
803 cpu_relax();
804 goto again;
805 }
806
b5faba21
TG
807 /*
808 * Now check again, whether the thread should run. Otherwise
809 * we would clear the threads_oneshot bit of this thread which
810 * was just set.
811 */
f3f79e38 812 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
813 goto out_unlock;
814
815 desc->threads_oneshot &= ~action->thread_mask;
816
32f4125e
TG
817 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
818 irqd_irq_masked(&desc->irq_data))
328a4978 819 unmask_threaded_irq(desc);
32f4125e 820
b5faba21 821out_unlock:
239007b8 822 raw_spin_unlock_irq(&desc->lock);
3876ec9e 823 chip_bus_sync_unlock(desc);
b25c340c
TG
824}
825
61f38261 826#ifdef CONFIG_SMP
591d2fb0 827/*
b04c644e 828 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
829 */
830static void
831irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
832{
833 cpumask_var_t mask;
04aa530e 834 bool valid = true;
591d2fb0
TG
835
836 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
837 return;
838
839 /*
840 * In case we are out of memory we set IRQTF_AFFINITY again and
841 * try again next time
842 */
843 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
844 set_bit(IRQTF_AFFINITY, &action->thread_flags);
845 return;
846 }
847
239007b8 848 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
849 /*
850 * This code is triggered unconditionally. Check the affinity
851 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
852 */
9df872fa
JL
853 if (desc->irq_common_data.affinity)
854 cpumask_copy(mask, desc->irq_common_data.affinity);
04aa530e
TG
855 else
856 valid = false;
239007b8 857 raw_spin_unlock_irq(&desc->lock);
591d2fb0 858
04aa530e
TG
859 if (valid)
860 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
861 free_cpumask_var(mask);
862}
61f38261
BP
863#else
864static inline void
865irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
866#endif
591d2fb0 867
8d32a307
TG
868/*
869 * Interrupts which are not explicitely requested as threaded
870 * interrupts rely on the implicit bh/preempt disable of the hard irq
871 * context. So we need to disable bh here to avoid deadlocks and other
872 * side effects.
873 */
3a43e05f 874static irqreturn_t
8d32a307
TG
875irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
876{
3a43e05f
SAS
877 irqreturn_t ret;
878
8d32a307 879 local_bh_disable();
3a43e05f 880 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 881 irq_finalize_oneshot(desc, action);
8d32a307 882 local_bh_enable();
3a43e05f 883 return ret;
8d32a307
TG
884}
885
886/*
f788e7bf 887 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
888 * preemtible - many of them need to sleep and wait for slow busses to
889 * complete.
890 */
3a43e05f
SAS
891static irqreturn_t irq_thread_fn(struct irq_desc *desc,
892 struct irqaction *action)
8d32a307 893{
3a43e05f
SAS
894 irqreturn_t ret;
895
896 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 897 irq_finalize_oneshot(desc, action);
3a43e05f 898 return ret;
8d32a307
TG
899}
900
7140ea19
IY
901static void wake_threads_waitq(struct irq_desc *desc)
902{
c685689f 903 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
904 wake_up(&desc->wait_for_threads);
905}
906
67d12145 907static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
908{
909 struct task_struct *tsk = current;
910 struct irq_desc *desc;
911 struct irqaction *action;
912
913 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
914 return;
915
916 action = kthread_data(tsk);
917
fb21affa 918 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 919 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
920
921
922 desc = irq_to_desc(action->irq);
923 /*
924 * If IRQTF_RUNTHREAD is set, we need to decrement
925 * desc->threads_active and wake possible waiters.
926 */
927 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
928 wake_threads_waitq(desc);
929
930 /* Prevent a stale desc->threads_oneshot */
931 irq_finalize_oneshot(desc, action);
932}
933
2a1d3ab8
TG
934static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action)
935{
936 struct irqaction *secondary = action->secondary;
937
938 if (WARN_ON_ONCE(!secondary))
939 return;
940
941 raw_spin_lock_irq(&desc->lock);
942 __irq_wake_thread(desc, secondary);
943 raw_spin_unlock_irq(&desc->lock);
944}
945
3aa551c9
TG
946/*
947 * Interrupt handler thread
948 */
949static int irq_thread(void *data)
950{
67d12145 951 struct callback_head on_exit_work;
3aa551c9
TG
952 struct irqaction *action = data;
953 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
954 irqreturn_t (*handler_fn)(struct irq_desc *desc,
955 struct irqaction *action);
3aa551c9 956
540b60e2 957 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
958 &action->thread_flags))
959 handler_fn = irq_forced_thread_fn;
960 else
961 handler_fn = irq_thread_fn;
962
41f9d29f 963 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 964 task_work_add(current, &on_exit_work, false);
3aa551c9 965
f3de44ed
SM
966 irq_thread_check_affinity(desc, action);
967
3aa551c9 968 while (!irq_wait_for_interrupt(action)) {
7140ea19 969 irqreturn_t action_ret;
3aa551c9 970
591d2fb0
TG
971 irq_thread_check_affinity(desc, action);
972
7140ea19 973 action_ret = handler_fn(desc, action);
1e77d0a1
TG
974 if (action_ret == IRQ_HANDLED)
975 atomic_inc(&desc->threads_handled);
2a1d3ab8
TG
976 if (action_ret == IRQ_WAKE_THREAD)
977 irq_wake_secondary(desc, action);
3aa551c9 978
7140ea19 979 wake_threads_waitq(desc);
3aa551c9
TG
980 }
981
7140ea19
IY
982 /*
983 * This is the regular exit path. __free_irq() is stopping the
984 * thread via kthread_stop() after calling
985 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
986 * oneshot mask bit can be set. We cannot verify that as we
987 * cannot touch the oneshot mask at this point anymore as
988 * __setup_irq() might have given out currents thread_mask
989 * again.
3aa551c9 990 */
4d1d61a6 991 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
992 return 0;
993}
994
a92444c6
TG
995/**
996 * irq_wake_thread - wake the irq thread for the action identified by dev_id
997 * @irq: Interrupt line
998 * @dev_id: Device identity for which the thread should be woken
999 *
1000 */
1001void irq_wake_thread(unsigned int irq, void *dev_id)
1002{
1003 struct irq_desc *desc = irq_to_desc(irq);
1004 struct irqaction *action;
1005 unsigned long flags;
1006
1007 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1008 return;
1009
1010 raw_spin_lock_irqsave(&desc->lock, flags);
f944b5a7 1011 for_each_action_of_desc(desc, action) {
a92444c6
TG
1012 if (action->dev_id == dev_id) {
1013 if (action->thread)
1014 __irq_wake_thread(desc, action);
1015 break;
1016 }
1017 }
1018 raw_spin_unlock_irqrestore(&desc->lock, flags);
1019}
1020EXPORT_SYMBOL_GPL(irq_wake_thread);
1021
2a1d3ab8 1022static int irq_setup_forced_threading(struct irqaction *new)
8d32a307
TG
1023{
1024 if (!force_irqthreads)
2a1d3ab8 1025 return 0;
8d32a307 1026 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
2a1d3ab8 1027 return 0;
8d32a307
TG
1028
1029 new->flags |= IRQF_ONESHOT;
1030
2a1d3ab8
TG
1031 /*
1032 * Handle the case where we have a real primary handler and a
1033 * thread handler. We force thread them as well by creating a
1034 * secondary action.
1035 */
1036 if (new->handler != irq_default_primary_handler && new->thread_fn) {
1037 /* Allocate the secondary action */
1038 new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1039 if (!new->secondary)
1040 return -ENOMEM;
1041 new->secondary->handler = irq_forced_secondary_handler;
1042 new->secondary->thread_fn = new->thread_fn;
1043 new->secondary->dev_id = new->dev_id;
1044 new->secondary->irq = new->irq;
1045 new->secondary->name = new->name;
8d32a307 1046 }
2a1d3ab8
TG
1047 /* Deal with the primary handler */
1048 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
1049 new->thread_fn = new->handler;
1050 new->handler = irq_default_primary_handler;
1051 return 0;
8d32a307
TG
1052}
1053
c1bacbae
TG
1054static int irq_request_resources(struct irq_desc *desc)
1055{
1056 struct irq_data *d = &desc->irq_data;
1057 struct irq_chip *c = d->chip;
1058
1059 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1060}
1061
1062static void irq_release_resources(struct irq_desc *desc)
1063{
1064 struct irq_data *d = &desc->irq_data;
1065 struct irq_chip *c = d->chip;
1066
1067 if (c->irq_release_resources)
1068 c->irq_release_resources(d);
1069}
1070
2a1d3ab8
TG
1071static int
1072setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary)
1073{
1074 struct task_struct *t;
1075 struct sched_param param = {
1076 .sched_priority = MAX_USER_RT_PRIO/2,
1077 };
1078
1079 if (!secondary) {
1080 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1081 new->name);
1082 } else {
1083 t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq,
1084 new->name);
1085 param.sched_priority -= 1;
1086 }
1087
1088 if (IS_ERR(t))
1089 return PTR_ERR(t);
1090
1091 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
1092
1093 /*
1094 * We keep the reference to the task struct even if
1095 * the thread dies to avoid that the interrupt code
1096 * references an already freed task_struct.
1097 */
1098 get_task_struct(t);
1099 new->thread = t;
1100 /*
1101 * Tell the thread to set its affinity. This is
1102 * important for shared interrupt handlers as we do
1103 * not invoke setup_affinity() for the secondary
1104 * handlers as everything is already set up. Even for
1105 * interrupts marked with IRQF_NO_BALANCE this is
1106 * correct as we want the thread to move to the cpu(s)
1107 * on which the requesting code placed the interrupt.
1108 */
1109 set_bit(IRQTF_AFFINITY, &new->thread_flags);
1110 return 0;
1111}
1112
1da177e4
LT
1113/*
1114 * Internal function to register an irqaction - typically used to
1115 * allocate special interrupts that are part of the architecture.
1116 */
d3c60047 1117static int
327ec569 1118__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1119{
f17c7545 1120 struct irqaction *old, **old_ptr;
b5faba21 1121 unsigned long flags, thread_mask = 0;
3b8249e7
TG
1122 int ret, nested, shared = 0;
1123 cpumask_var_t mask;
1da177e4 1124
7d94f7ca 1125 if (!desc)
c2b5a251
MW
1126 return -EINVAL;
1127
6b8ff312 1128 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1129 return -ENOSYS;
b6873807
SAS
1130 if (!try_module_get(desc->owner))
1131 return -ENODEV;
1da177e4 1132
2a1d3ab8
TG
1133 new->irq = irq;
1134
4b357dae
JH
1135 /*
1136 * If the trigger type is not specified by the caller,
1137 * then use the default for this interrupt.
1138 */
1139 if (!(new->flags & IRQF_TRIGGER_MASK))
1140 new->flags |= irqd_get_trigger_type(&desc->irq_data);
1141
3aa551c9 1142 /*
399b5da2
TG
1143 * Check whether the interrupt nests into another interrupt
1144 * thread.
1145 */
1ccb4e61 1146 nested = irq_settings_is_nested_thread(desc);
399b5da2 1147 if (nested) {
b6873807
SAS
1148 if (!new->thread_fn) {
1149 ret = -EINVAL;
1150 goto out_mput;
1151 }
399b5da2
TG
1152 /*
1153 * Replace the primary handler which was provided from
1154 * the driver for non nested interrupt handling by the
1155 * dummy function which warns when called.
1156 */
1157 new->handler = irq_nested_primary_handler;
8d32a307 1158 } else {
2a1d3ab8
TG
1159 if (irq_settings_can_thread(desc)) {
1160 ret = irq_setup_forced_threading(new);
1161 if (ret)
1162 goto out_mput;
1163 }
399b5da2
TG
1164 }
1165
3aa551c9 1166 /*
399b5da2
TG
1167 * Create a handler thread when a thread function is supplied
1168 * and the interrupt does not nest into another interrupt
1169 * thread.
3aa551c9 1170 */
399b5da2 1171 if (new->thread_fn && !nested) {
2a1d3ab8
TG
1172 ret = setup_irq_thread(new, irq, false);
1173 if (ret)
b6873807 1174 goto out_mput;
2a1d3ab8
TG
1175 if (new->secondary) {
1176 ret = setup_irq_thread(new->secondary, irq, true);
1177 if (ret)
1178 goto out_thread;
b6873807 1179 }
3aa551c9
TG
1180 }
1181
3b8249e7
TG
1182 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
1183 ret = -ENOMEM;
1184 goto out_thread;
1185 }
1186
dc9b229a
TG
1187 /*
1188 * Drivers are often written to work w/o knowledge about the
1189 * underlying irq chip implementation, so a request for a
1190 * threaded irq without a primary hard irq context handler
1191 * requires the ONESHOT flag to be set. Some irq chips like
1192 * MSI based interrupts are per se one shot safe. Check the
1193 * chip flags, so we can avoid the unmask dance at the end of
1194 * the threaded handler for those.
1195 */
1196 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1197 new->flags &= ~IRQF_ONESHOT;
1198
1da177e4
LT
1199 /*
1200 * The following block of code has to be executed atomically
1201 */
239007b8 1202 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1203 old_ptr = &desc->action;
1204 old = *old_ptr;
06fcb0c6 1205 if (old) {
e76de9f8
TG
1206 /*
1207 * Can't share interrupts unless both agree to and are
1208 * the same type (level, edge, polarity). So both flag
3cca53b0 1209 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1210 * set the trigger type must match. Also all must
1211 * agree on ONESHOT.
e76de9f8 1212 */
3cca53b0 1213 if (!((old->flags & new->flags) & IRQF_SHARED) ||
9d591edd 1214 ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) ||
f5d89470 1215 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1216 goto mismatch;
1217
f5163427 1218 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1219 if ((old->flags & IRQF_PERCPU) !=
1220 (new->flags & IRQF_PERCPU))
f5163427 1221 goto mismatch;
1da177e4
LT
1222
1223 /* add new interrupt at end of irq queue */
1224 do {
52abb700
TG
1225 /*
1226 * Or all existing action->thread_mask bits,
1227 * so we can find the next zero bit for this
1228 * new action.
1229 */
b5faba21 1230 thread_mask |= old->thread_mask;
f17c7545
IM
1231 old_ptr = &old->next;
1232 old = *old_ptr;
1da177e4
LT
1233 } while (old);
1234 shared = 1;
1235 }
1236
b5faba21 1237 /*
52abb700
TG
1238 * Setup the thread mask for this irqaction for ONESHOT. For
1239 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1240 * conditional in irq_wake_thread().
b5faba21 1241 */
52abb700
TG
1242 if (new->flags & IRQF_ONESHOT) {
1243 /*
1244 * Unlikely to have 32 resp 64 irqs sharing one line,
1245 * but who knows.
1246 */
1247 if (thread_mask == ~0UL) {
1248 ret = -EBUSY;
1249 goto out_mask;
1250 }
1251 /*
1252 * The thread_mask for the action is or'ed to
1253 * desc->thread_active to indicate that the
1254 * IRQF_ONESHOT thread handler has been woken, but not
1255 * yet finished. The bit is cleared when a thread
1256 * completes. When all threads of a shared interrupt
1257 * line have completed desc->threads_active becomes
1258 * zero and the interrupt line is unmasked. See
1259 * handle.c:irq_wake_thread() for further information.
1260 *
1261 * If no thread is woken by primary (hard irq context)
1262 * interrupt handlers, then desc->threads_active is
1263 * also checked for zero to unmask the irq line in the
1264 * affected hard irq flow handlers
1265 * (handle_[fasteoi|level]_irq).
1266 *
1267 * The new action gets the first zero bit of
1268 * thread_mask assigned. See the loop above which or's
1269 * all existing action->thread_mask bits.
1270 */
1271 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1272
dc9b229a
TG
1273 } else if (new->handler == irq_default_primary_handler &&
1274 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1275 /*
1276 * The interrupt was requested with handler = NULL, so
1277 * we use the default primary handler for it. But it
1278 * does not have the oneshot flag set. In combination
1279 * with level interrupts this is deadly, because the
1280 * default primary handler just wakes the thread, then
1281 * the irq lines is reenabled, but the device still
1282 * has the level irq asserted. Rinse and repeat....
1283 *
1284 * While this works for edge type interrupts, we play
1285 * it safe and reject unconditionally because we can't
1286 * say for sure which type this interrupt really
1287 * has. The type flags are unreliable as the
1288 * underlying chip implementation can override them.
1289 */
97fd75b7 1290 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1291 irq);
1292 ret = -EINVAL;
1293 goto out_mask;
b5faba21 1294 }
b5faba21 1295
1da177e4 1296 if (!shared) {
c1bacbae
TG
1297 ret = irq_request_resources(desc);
1298 if (ret) {
1299 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1300 new->name, irq, desc->irq_data.chip->name);
1301 goto out_mask;
1302 }
1303
3aa551c9
TG
1304 init_waitqueue_head(&desc->wait_for_threads);
1305
e76de9f8 1306 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1307 if (new->flags & IRQF_TRIGGER_MASK) {
a1ff541a
JL
1308 ret = __irq_set_trigger(desc,
1309 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1310
3aa551c9 1311 if (ret)
3b8249e7 1312 goto out_mask;
091738a2 1313 }
6a6de9ef 1314
009b4c3b 1315 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1316 IRQS_ONESHOT | IRQS_WAITING);
1317 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1318
a005677b
TG
1319 if (new->flags & IRQF_PERCPU) {
1320 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1321 irq_settings_set_per_cpu(desc);
1322 }
6a58fb3b 1323
b25c340c 1324 if (new->flags & IRQF_ONESHOT)
3d67baec 1325 desc->istate |= IRQS_ONESHOT;
b25c340c 1326
1ccb4e61 1327 if (irq_settings_can_autoenable(desc))
b4bc724e 1328 irq_startup(desc, true);
46999238 1329 else
e76de9f8
TG
1330 /* Undo nested disables: */
1331 desc->depth = 1;
18404756 1332
612e3684 1333 /* Exclude IRQ from balancing if requested */
a005677b
TG
1334 if (new->flags & IRQF_NOBALANCING) {
1335 irq_settings_set_no_balancing(desc);
1336 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1337 }
612e3684 1338
18404756 1339 /* Set default affinity mask once everything is setup */
a8a98eac 1340 setup_affinity(desc, mask);
0c5d1eb7 1341
876dbd4c
TG
1342 } else if (new->flags & IRQF_TRIGGER_MASK) {
1343 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
1344 unsigned int omsk = irq_settings_get_trigger_mask(desc);
1345
1346 if (nmsk != omsk)
1347 /* hope the handler works with current trigger mode */
a395d6a7
JP
1348 pr_warn("irq %d uses trigger mode %u; requested %u\n",
1349 irq, nmsk, omsk);
1da177e4 1350 }
82736f4d 1351
f17c7545 1352 *old_ptr = new;
82736f4d 1353
cab303be
TG
1354 irq_pm_install_action(desc, new);
1355
8528b0f1
LT
1356 /* Reset broken irq detection when installing new handler */
1357 desc->irq_count = 0;
1358 desc->irqs_unhandled = 0;
1adb0850
TG
1359
1360 /*
1361 * Check whether we disabled the irq via the spurious handler
1362 * before. Reenable it and give it another chance.
1363 */
7acdd53e
TG
1364 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1365 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
79ff1cda 1366 __enable_irq(desc);
1adb0850
TG
1367 }
1368
239007b8 1369 raw_spin_unlock_irqrestore(&desc->lock, flags);
1da177e4 1370
69ab8494
TG
1371 /*
1372 * Strictly no need to wake it up, but hung_task complains
1373 * when no hard interrupt wakes the thread up.
1374 */
1375 if (new->thread)
1376 wake_up_process(new->thread);
2a1d3ab8
TG
1377 if (new->secondary)
1378 wake_up_process(new->secondary->thread);
69ab8494 1379
2c6927a3 1380 register_irq_proc(irq, desc);
1da177e4
LT
1381 new->dir = NULL;
1382 register_handler_proc(irq, new);
4f5058c3 1383 free_cpumask_var(mask);
1da177e4
LT
1384
1385 return 0;
f5163427
DS
1386
1387mismatch:
3cca53b0 1388 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1389 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1390 irq, new->flags, new->name, old->flags, old->name);
1391#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1392 dump_stack();
3f050447 1393#endif
f5d89470 1394 }
3aa551c9
TG
1395 ret = -EBUSY;
1396
3b8249e7 1397out_mask:
1c389795 1398 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7
TG
1399 free_cpumask_var(mask);
1400
3aa551c9 1401out_thread:
3aa551c9
TG
1402 if (new->thread) {
1403 struct task_struct *t = new->thread;
1404
1405 new->thread = NULL;
05d74efa 1406 kthread_stop(t);
3aa551c9
TG
1407 put_task_struct(t);
1408 }
2a1d3ab8
TG
1409 if (new->secondary && new->secondary->thread) {
1410 struct task_struct *t = new->secondary->thread;
1411
1412 new->secondary->thread = NULL;
1413 kthread_stop(t);
1414 put_task_struct(t);
1415 }
b6873807
SAS
1416out_mput:
1417 module_put(desc->owner);
3aa551c9 1418 return ret;
1da177e4
LT
1419}
1420
d3c60047
TG
1421/**
1422 * setup_irq - setup an interrupt
1423 * @irq: Interrupt line to setup
1424 * @act: irqaction for the interrupt
1425 *
1426 * Used to statically setup interrupts in the early boot process.
1427 */
1428int setup_irq(unsigned int irq, struct irqaction *act)
1429{
986c011d 1430 int retval;
d3c60047
TG
1431 struct irq_desc *desc = irq_to_desc(irq);
1432
9b5d585d 1433 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
31d9d9b6 1434 return -EINVAL;
be45beb2
JH
1435
1436 retval = irq_chip_pm_get(&desc->irq_data);
1437 if (retval < 0)
1438 return retval;
1439
986c011d
DD
1440 chip_bus_lock(desc);
1441 retval = __setup_irq(irq, desc, act);
1442 chip_bus_sync_unlock(desc);
1443
be45beb2
JH
1444 if (retval)
1445 irq_chip_pm_put(&desc->irq_data);
1446
986c011d 1447 return retval;
d3c60047 1448}
eb53b4e8 1449EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1450
31d9d9b6 1451/*
cbf94f06
MD
1452 * Internal function to unregister an irqaction - used to free
1453 * regular and special interrupts that are part of the architecture.
1da177e4 1454 */
cbf94f06 1455static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1456{
d3c60047 1457 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1458 struct irqaction *action, **action_ptr;
1da177e4
LT
1459 unsigned long flags;
1460
ae88a23b 1461 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1462
7d94f7ca 1463 if (!desc)
f21cfb25 1464 return NULL;
1da177e4 1465
abc7e40c 1466 chip_bus_lock(desc);
239007b8 1467 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1468
1469 /*
1470 * There can be multiple actions per IRQ descriptor, find the right
1471 * one based on the dev_id:
1472 */
f17c7545 1473 action_ptr = &desc->action;
1da177e4 1474 for (;;) {
f17c7545 1475 action = *action_ptr;
1da177e4 1476
ae88a23b
IM
1477 if (!action) {
1478 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1479 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1480 chip_bus_sync_unlock(desc);
f21cfb25 1481 return NULL;
ae88a23b 1482 }
1da177e4 1483
8316e381
IM
1484 if (action->dev_id == dev_id)
1485 break;
f17c7545 1486 action_ptr = &action->next;
ae88a23b 1487 }
dbce706e 1488
ae88a23b 1489 /* Found it - now remove it from the list of entries: */
f17c7545 1490 *action_ptr = action->next;
ae88a23b 1491
cab303be
TG
1492 irq_pm_remove_action(desc, action);
1493
ae88a23b 1494 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1495 if (!desc->action) {
e9849777 1496 irq_settings_clr_disable_unlazy(desc);
46999238 1497 irq_shutdown(desc);
c1bacbae
TG
1498 irq_release_resources(desc);
1499 }
3aa551c9 1500
e7a297b0
PWJ
1501#ifdef CONFIG_SMP
1502 /* make sure affinity_hint is cleaned up */
1503 if (WARN_ON_ONCE(desc->affinity_hint))
1504 desc->affinity_hint = NULL;
1505#endif
1506
239007b8 1507 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1508 chip_bus_sync_unlock(desc);
ae88a23b
IM
1509
1510 unregister_handler_proc(irq, action);
1511
1512 /* Make sure it's not being used on another CPU: */
1513 synchronize_irq(irq);
1da177e4 1514
70edcd77 1515#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1516 /*
1517 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1518 * event to happen even now it's being freed, so let's make sure that
1519 * is so by doing an extra call to the handler ....
1520 *
1521 * ( We do this after actually deregistering it, to make sure that a
1522 * 'real' IRQ doesn't run in * parallel with our fake. )
1523 */
1524 if (action->flags & IRQF_SHARED) {
1525 local_irq_save(flags);
1526 action->handler(irq, dev_id);
1527 local_irq_restore(flags);
1da177e4 1528 }
ae88a23b 1529#endif
2d860ad7
LT
1530
1531 if (action->thread) {
05d74efa 1532 kthread_stop(action->thread);
2d860ad7 1533 put_task_struct(action->thread);
2a1d3ab8
TG
1534 if (action->secondary && action->secondary->thread) {
1535 kthread_stop(action->secondary->thread);
1536 put_task_struct(action->secondary->thread);
1537 }
2d860ad7
LT
1538 }
1539
be45beb2 1540 irq_chip_pm_put(&desc->irq_data);
b6873807 1541 module_put(desc->owner);
2a1d3ab8 1542 kfree(action->secondary);
f21cfb25
MD
1543 return action;
1544}
1545
cbf94f06
MD
1546/**
1547 * remove_irq - free an interrupt
1548 * @irq: Interrupt line to free
1549 * @act: irqaction for the interrupt
1550 *
1551 * Used to remove interrupts statically setup by the early boot process.
1552 */
1553void remove_irq(unsigned int irq, struct irqaction *act)
1554{
31d9d9b6
MZ
1555 struct irq_desc *desc = irq_to_desc(irq);
1556
1557 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1558 __free_irq(irq, act->dev_id);
cbf94f06 1559}
eb53b4e8 1560EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1561
f21cfb25
MD
1562/**
1563 * free_irq - free an interrupt allocated with request_irq
1564 * @irq: Interrupt line to free
1565 * @dev_id: Device identity to free
1566 *
1567 * Remove an interrupt handler. The handler is removed and if the
1568 * interrupt line is no longer in use by any driver it is disabled.
1569 * On a shared IRQ the caller must ensure the interrupt is disabled
1570 * on the card it drives before calling this function. The function
1571 * does not return until any executing interrupts for this IRQ
1572 * have completed.
1573 *
1574 * This function must not be called from interrupt context.
1575 */
1576void free_irq(unsigned int irq, void *dev_id)
1577{
70aedd24
TG
1578 struct irq_desc *desc = irq_to_desc(irq);
1579
31d9d9b6 1580 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
70aedd24
TG
1581 return;
1582
cd7eab44
BH
1583#ifdef CONFIG_SMP
1584 if (WARN_ON(desc->affinity_notify))
1585 desc->affinity_notify = NULL;
1586#endif
1587
cbf94f06 1588 kfree(__free_irq(irq, dev_id));
1da177e4 1589}
1da177e4
LT
1590EXPORT_SYMBOL(free_irq);
1591
1592/**
3aa551c9 1593 * request_threaded_irq - allocate an interrupt line
1da177e4 1594 * @irq: Interrupt line to allocate
3aa551c9
TG
1595 * @handler: Function to be called when the IRQ occurs.
1596 * Primary handler for threaded interrupts
b25c340c
TG
1597 * If NULL and thread_fn != NULL the default
1598 * primary handler is installed
f48fe81e
TG
1599 * @thread_fn: Function called from the irq handler thread
1600 * If NULL, no irq thread is created
1da177e4
LT
1601 * @irqflags: Interrupt type flags
1602 * @devname: An ascii name for the claiming device
1603 * @dev_id: A cookie passed back to the handler function
1604 *
1605 * This call allocates interrupt resources and enables the
1606 * interrupt line and IRQ handling. From the point this
1607 * call is made your handler function may be invoked. Since
1608 * your handler function must clear any interrupt the board
1609 * raises, you must take care both to initialise your hardware
1610 * and to set up the interrupt handler in the right order.
1611 *
3aa551c9 1612 * If you want to set up a threaded irq handler for your device
6d21af4f 1613 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1614 * still called in hard interrupt context and has to check
1615 * whether the interrupt originates from the device. If yes it
1616 * needs to disable the interrupt on the device and return
39a2eddb 1617 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1618 * @thread_fn. This split handler design is necessary to support
1619 * shared interrupts.
1620 *
1da177e4
LT
1621 * Dev_id must be globally unique. Normally the address of the
1622 * device data structure is used as the cookie. Since the handler
1623 * receives this value it makes sense to use it.
1624 *
1625 * If your interrupt is shared you must pass a non NULL dev_id
1626 * as this is required when freeing the interrupt.
1627 *
1628 * Flags:
1629 *
3cca53b0 1630 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1631 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1632 *
1633 */
3aa551c9
TG
1634int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1635 irq_handler_t thread_fn, unsigned long irqflags,
1636 const char *devname, void *dev_id)
1da177e4 1637{
06fcb0c6 1638 struct irqaction *action;
08678b08 1639 struct irq_desc *desc;
d3c60047 1640 int retval;
1da177e4 1641
e237a551
CF
1642 if (irq == IRQ_NOTCONNECTED)
1643 return -ENOTCONN;
1644
1da177e4
LT
1645 /*
1646 * Sanity-check: shared interrupts must pass in a real dev-ID,
1647 * otherwise we'll have trouble later trying to figure out
1648 * which interrupt is which (messes up the interrupt freeing
1649 * logic etc).
17f48034
RW
1650 *
1651 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1652 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 1653 */
17f48034
RW
1654 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1655 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1656 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 1657 return -EINVAL;
7d94f7ca 1658
cb5bc832 1659 desc = irq_to_desc(irq);
7d94f7ca 1660 if (!desc)
1da177e4 1661 return -EINVAL;
7d94f7ca 1662
31d9d9b6
MZ
1663 if (!irq_settings_can_request(desc) ||
1664 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1665 return -EINVAL;
b25c340c
TG
1666
1667 if (!handler) {
1668 if (!thread_fn)
1669 return -EINVAL;
1670 handler = irq_default_primary_handler;
1671 }
1da177e4 1672
45535732 1673 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1674 if (!action)
1675 return -ENOMEM;
1676
1677 action->handler = handler;
3aa551c9 1678 action->thread_fn = thread_fn;
1da177e4 1679 action->flags = irqflags;
1da177e4 1680 action->name = devname;
1da177e4
LT
1681 action->dev_id = dev_id;
1682
be45beb2 1683 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
1684 if (retval < 0) {
1685 kfree(action);
be45beb2 1686 return retval;
4396f46c 1687 }
be45beb2 1688
3876ec9e 1689 chip_bus_lock(desc);
d3c60047 1690 retval = __setup_irq(irq, desc, action);
3876ec9e 1691 chip_bus_sync_unlock(desc);
70aedd24 1692
2a1d3ab8 1693 if (retval) {
be45beb2 1694 irq_chip_pm_put(&desc->irq_data);
2a1d3ab8 1695 kfree(action->secondary);
377bf1e4 1696 kfree(action);
2a1d3ab8 1697 }
377bf1e4 1698
6d83f94d 1699#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1700 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1701 /*
1702 * It's a shared IRQ -- the driver ought to be prepared for it
1703 * to happen immediately, so let's make sure....
377bf1e4
AV
1704 * We disable the irq to make sure that a 'real' IRQ doesn't
1705 * run in parallel with our fake.
a304e1b8 1706 */
59845b1f 1707 unsigned long flags;
a304e1b8 1708
377bf1e4 1709 disable_irq(irq);
59845b1f 1710 local_irq_save(flags);
377bf1e4 1711
59845b1f 1712 handler(irq, dev_id);
377bf1e4 1713
59845b1f 1714 local_irq_restore(flags);
377bf1e4 1715 enable_irq(irq);
a304e1b8
DW
1716 }
1717#endif
1da177e4
LT
1718 return retval;
1719}
3aa551c9 1720EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1721
1722/**
1723 * request_any_context_irq - allocate an interrupt line
1724 * @irq: Interrupt line to allocate
1725 * @handler: Function to be called when the IRQ occurs.
1726 * Threaded handler for threaded interrupts.
1727 * @flags: Interrupt type flags
1728 * @name: An ascii name for the claiming device
1729 * @dev_id: A cookie passed back to the handler function
1730 *
1731 * This call allocates interrupt resources and enables the
1732 * interrupt line and IRQ handling. It selects either a
1733 * hardirq or threaded handling method depending on the
1734 * context.
1735 *
1736 * On failure, it returns a negative value. On success,
1737 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1738 */
1739int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1740 unsigned long flags, const char *name, void *dev_id)
1741{
e237a551 1742 struct irq_desc *desc;
ae731f8d
MZ
1743 int ret;
1744
e237a551
CF
1745 if (irq == IRQ_NOTCONNECTED)
1746 return -ENOTCONN;
1747
1748 desc = irq_to_desc(irq);
ae731f8d
MZ
1749 if (!desc)
1750 return -EINVAL;
1751
1ccb4e61 1752 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1753 ret = request_threaded_irq(irq, NULL, handler,
1754 flags, name, dev_id);
1755 return !ret ? IRQC_IS_NESTED : ret;
1756 }
1757
1758 ret = request_irq(irq, handler, flags, name, dev_id);
1759 return !ret ? IRQC_IS_HARDIRQ : ret;
1760}
1761EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1762
1e7c5fd2 1763void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1764{
1765 unsigned int cpu = smp_processor_id();
1766 unsigned long flags;
1767 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1768
1769 if (!desc)
1770 return;
1771
f35ad083
MZ
1772 /*
1773 * If the trigger type is not specified by the caller, then
1774 * use the default for this interrupt.
1775 */
1e7c5fd2 1776 type &= IRQ_TYPE_SENSE_MASK;
f35ad083
MZ
1777 if (type == IRQ_TYPE_NONE)
1778 type = irqd_get_trigger_type(&desc->irq_data);
1779
1e7c5fd2
MZ
1780 if (type != IRQ_TYPE_NONE) {
1781 int ret;
1782
a1ff541a 1783 ret = __irq_set_trigger(desc, type);
1e7c5fd2
MZ
1784
1785 if (ret) {
32cffdde 1786 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1787 goto out;
1788 }
1789 }
1790
31d9d9b6 1791 irq_percpu_enable(desc, cpu);
1e7c5fd2 1792out:
31d9d9b6
MZ
1793 irq_put_desc_unlock(desc, flags);
1794}
36a5df85 1795EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6 1796
f0cb3220
TP
1797/**
1798 * irq_percpu_is_enabled - Check whether the per cpu irq is enabled
1799 * @irq: Linux irq number to check for
1800 *
1801 * Must be called from a non migratable context. Returns the enable
1802 * state of a per cpu interrupt on the current cpu.
1803 */
1804bool irq_percpu_is_enabled(unsigned int irq)
1805{
1806 unsigned int cpu = smp_processor_id();
1807 struct irq_desc *desc;
1808 unsigned long flags;
1809 bool is_enabled;
1810
1811 desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1812 if (!desc)
1813 return false;
1814
1815 is_enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
1816 irq_put_desc_unlock(desc, flags);
1817
1818 return is_enabled;
1819}
1820EXPORT_SYMBOL_GPL(irq_percpu_is_enabled);
1821
31d9d9b6
MZ
1822void disable_percpu_irq(unsigned int irq)
1823{
1824 unsigned int cpu = smp_processor_id();
1825 unsigned long flags;
1826 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1827
1828 if (!desc)
1829 return;
1830
1831 irq_percpu_disable(desc, cpu);
1832 irq_put_desc_unlock(desc, flags);
1833}
36a5df85 1834EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1835
1836/*
1837 * Internal function to unregister a percpu irqaction.
1838 */
1839static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1840{
1841 struct irq_desc *desc = irq_to_desc(irq);
1842 struct irqaction *action;
1843 unsigned long flags;
1844
1845 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1846
1847 if (!desc)
1848 return NULL;
1849
1850 raw_spin_lock_irqsave(&desc->lock, flags);
1851
1852 action = desc->action;
1853 if (!action || action->percpu_dev_id != dev_id) {
1854 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1855 goto bad;
1856 }
1857
1858 if (!cpumask_empty(desc->percpu_enabled)) {
1859 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1860 irq, cpumask_first(desc->percpu_enabled));
1861 goto bad;
1862 }
1863
1864 /* Found it - now remove it from the list of entries: */
1865 desc->action = NULL;
1866
1867 raw_spin_unlock_irqrestore(&desc->lock, flags);
1868
1869 unregister_handler_proc(irq, action);
1870
be45beb2 1871 irq_chip_pm_put(&desc->irq_data);
31d9d9b6
MZ
1872 module_put(desc->owner);
1873 return action;
1874
1875bad:
1876 raw_spin_unlock_irqrestore(&desc->lock, flags);
1877 return NULL;
1878}
1879
1880/**
1881 * remove_percpu_irq - free a per-cpu interrupt
1882 * @irq: Interrupt line to free
1883 * @act: irqaction for the interrupt
1884 *
1885 * Used to remove interrupts statically setup by the early boot process.
1886 */
1887void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1888{
1889 struct irq_desc *desc = irq_to_desc(irq);
1890
1891 if (desc && irq_settings_is_per_cpu_devid(desc))
1892 __free_percpu_irq(irq, act->percpu_dev_id);
1893}
1894
1895/**
1896 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1897 * @irq: Interrupt line to free
1898 * @dev_id: Device identity to free
1899 *
1900 * Remove a percpu interrupt handler. The handler is removed, but
1901 * the interrupt line is not disabled. This must be done on each
1902 * CPU before calling this function. The function does not return
1903 * until any executing interrupts for this IRQ have completed.
1904 *
1905 * This function must not be called from interrupt context.
1906 */
1907void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1908{
1909 struct irq_desc *desc = irq_to_desc(irq);
1910
1911 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1912 return;
1913
1914 chip_bus_lock(desc);
1915 kfree(__free_percpu_irq(irq, dev_id));
1916 chip_bus_sync_unlock(desc);
1917}
aec2e2ad 1918EXPORT_SYMBOL_GPL(free_percpu_irq);
31d9d9b6
MZ
1919
1920/**
1921 * setup_percpu_irq - setup a per-cpu interrupt
1922 * @irq: Interrupt line to setup
1923 * @act: irqaction for the interrupt
1924 *
1925 * Used to statically setup per-cpu interrupts in the early boot process.
1926 */
1927int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1928{
1929 struct irq_desc *desc = irq_to_desc(irq);
1930 int retval;
1931
1932 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1933 return -EINVAL;
be45beb2
JH
1934
1935 retval = irq_chip_pm_get(&desc->irq_data);
1936 if (retval < 0)
1937 return retval;
1938
31d9d9b6
MZ
1939 chip_bus_lock(desc);
1940 retval = __setup_irq(irq, desc, act);
1941 chip_bus_sync_unlock(desc);
1942
be45beb2
JH
1943 if (retval)
1944 irq_chip_pm_put(&desc->irq_data);
1945
31d9d9b6
MZ
1946 return retval;
1947}
1948
1949/**
1950 * request_percpu_irq - allocate a percpu interrupt line
1951 * @irq: Interrupt line to allocate
1952 * @handler: Function to be called when the IRQ occurs.
1953 * @devname: An ascii name for the claiming device
1954 * @dev_id: A percpu cookie passed back to the handler function
1955 *
a1b7febd
MR
1956 * This call allocates interrupt resources and enables the
1957 * interrupt on the local CPU. If the interrupt is supposed to be
1958 * enabled on other CPUs, it has to be done on each CPU using
1959 * enable_percpu_irq().
31d9d9b6
MZ
1960 *
1961 * Dev_id must be globally unique. It is a per-cpu variable, and
1962 * the handler gets called with the interrupted CPU's instance of
1963 * that variable.
1964 */
1965int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1966 const char *devname, void __percpu *dev_id)
1967{
1968 struct irqaction *action;
1969 struct irq_desc *desc;
1970 int retval;
1971
1972 if (!dev_id)
1973 return -EINVAL;
1974
1975 desc = irq_to_desc(irq);
1976 if (!desc || !irq_settings_can_request(desc) ||
1977 !irq_settings_is_per_cpu_devid(desc))
1978 return -EINVAL;
1979
1980 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1981 if (!action)
1982 return -ENOMEM;
1983
1984 action->handler = handler;
2ed0e645 1985 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
1986 action->name = devname;
1987 action->percpu_dev_id = dev_id;
1988
be45beb2 1989 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
1990 if (retval < 0) {
1991 kfree(action);
be45beb2 1992 return retval;
4396f46c 1993 }
be45beb2 1994
31d9d9b6
MZ
1995 chip_bus_lock(desc);
1996 retval = __setup_irq(irq, desc, action);
1997 chip_bus_sync_unlock(desc);
1998
be45beb2
JH
1999 if (retval) {
2000 irq_chip_pm_put(&desc->irq_data);
31d9d9b6 2001 kfree(action);
be45beb2 2002 }
31d9d9b6
MZ
2003
2004 return retval;
2005}
aec2e2ad 2006EXPORT_SYMBOL_GPL(request_percpu_irq);
1b7047ed
MZ
2007
2008/**
2009 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
2010 * @irq: Interrupt line that is forwarded to a VM
2011 * @which: One of IRQCHIP_STATE_* the caller wants to know about
2012 * @state: a pointer to a boolean where the state is to be storeed
2013 *
2014 * This call snapshots the internal irqchip state of an
2015 * interrupt, returning into @state the bit corresponding to
2016 * stage @which
2017 *
2018 * This function should be called with preemption disabled if the
2019 * interrupt controller has per-cpu registers.
2020 */
2021int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2022 bool *state)
2023{
2024 struct irq_desc *desc;
2025 struct irq_data *data;
2026 struct irq_chip *chip;
2027 unsigned long flags;
2028 int err = -EINVAL;
2029
2030 desc = irq_get_desc_buslock(irq, &flags, 0);
2031 if (!desc)
2032 return err;
2033
2034 data = irq_desc_get_irq_data(desc);
2035
2036 do {
2037 chip = irq_data_get_irq_chip(data);
2038 if (chip->irq_get_irqchip_state)
2039 break;
2040#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2041 data = data->parent_data;
2042#else
2043 data = NULL;
2044#endif
2045 } while (data);
2046
2047 if (data)
2048 err = chip->irq_get_irqchip_state(data, which, state);
2049
2050 irq_put_desc_busunlock(desc, flags);
2051 return err;
2052}
1ee4fb3e 2053EXPORT_SYMBOL_GPL(irq_get_irqchip_state);
1b7047ed
MZ
2054
2055/**
2056 * irq_set_irqchip_state - set the state of a forwarded interrupt.
2057 * @irq: Interrupt line that is forwarded to a VM
2058 * @which: State to be restored (one of IRQCHIP_STATE_*)
2059 * @val: Value corresponding to @which
2060 *
2061 * This call sets the internal irqchip state of an interrupt,
2062 * depending on the value of @which.
2063 *
2064 * This function should be called with preemption disabled if the
2065 * interrupt controller has per-cpu registers.
2066 */
2067int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2068 bool val)
2069{
2070 struct irq_desc *desc;
2071 struct irq_data *data;
2072 struct irq_chip *chip;
2073 unsigned long flags;
2074 int err = -EINVAL;
2075
2076 desc = irq_get_desc_buslock(irq, &flags, 0);
2077 if (!desc)
2078 return err;
2079
2080 data = irq_desc_get_irq_data(desc);
2081
2082 do {
2083 chip = irq_data_get_irq_chip(data);
2084 if (chip->irq_set_irqchip_state)
2085 break;
2086#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2087 data = data->parent_data;
2088#else
2089 data = NULL;
2090#endif
2091 } while (data);
2092
2093 if (data)
2094 err = chip->irq_set_irqchip_state(data, which, val);
2095
2096 irq_put_desc_busunlock(desc, flags);
2097 return err;
2098}
1ee4fb3e 2099EXPORT_SYMBOL_GPL(irq_set_irqchip_state);