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CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
0881e7bd 20#include <linux/sched/task.h>
ae7e81c0 21#include <uapi/linux/sched/types.h>
4d1d61a6 22#include <linux/task_work.h>
1da177e4
LT
23
24#include "internals.h"
25
8d32a307 26#ifdef CONFIG_IRQ_FORCED_THREADING
99939753 27__read_mostly bool force_irqthreads = IS_ENABLED(CONFIG_IRQ_FORCED_THREADING_DEFAULT);
8d32a307
TG
28
29static int __init setup_forced_irqthreads(char *arg)
30{
31 force_irqthreads = true;
32 return 0;
33}
99939753
AW
34static int __init setup_no_irqthreads(char *arg)
35{
36 force_irqthreads = false;
37 return 0;
38}
8d32a307 39early_param("threadirqs", setup_forced_irqthreads);
99939753 40early_param("nothreadirqs", setup_no_irqthreads);
8d32a307
TG
41#endif
42
18258f72 43static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 44{
32f4125e 45 bool inprogress;
1da177e4 46
a98ce5c6
HX
47 do {
48 unsigned long flags;
49
50 /*
51 * Wait until we're out of the critical section. This might
52 * give the wrong answer due to the lack of memory barriers.
53 */
32f4125e 54 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
55 cpu_relax();
56
57 /* Ok, that indicated we're done: double-check carefully. */
239007b8 58 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 59 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 60 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
61
62 /* Oops, that failed? */
32f4125e 63 } while (inprogress);
18258f72
TG
64}
65
66/**
67 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
68 * @irq: interrupt number to wait for
69 *
70 * This function waits for any pending hard IRQ handlers for this
71 * interrupt to complete before returning. If you use this
72 * function while holding a resource the IRQ handler may need you
73 * will deadlock. It does not take associated threaded handlers
74 * into account.
75 *
76 * Do not use this for shutdown scenarios where you must be sure
77 * that all parts (hardirq and threaded handler) have completed.
78 *
02cea395
PZ
79 * Returns: false if a threaded handler is active.
80 *
18258f72
TG
81 * This function may be called - with care - from IRQ context.
82 */
02cea395 83bool synchronize_hardirq(unsigned int irq)
18258f72
TG
84{
85 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 86
02cea395 87 if (desc) {
18258f72 88 __synchronize_hardirq(desc);
02cea395
PZ
89 return !atomic_read(&desc->threads_active);
90 }
91
92 return true;
18258f72
TG
93}
94EXPORT_SYMBOL(synchronize_hardirq);
95
96/**
97 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
98 * @irq: interrupt number to wait for
99 *
100 * This function waits for any pending IRQ handlers for this interrupt
101 * to complete before returning. If you use this function while
102 * holding a resource the IRQ handler may need you will deadlock.
103 *
104 * This function may be called - with care - from IRQ context.
105 */
106void synchronize_irq(unsigned int irq)
107{
108 struct irq_desc *desc = irq_to_desc(irq);
109
110 if (desc) {
111 __synchronize_hardirq(desc);
112 /*
113 * We made sure that no hardirq handler is
114 * running. Now verify that no threaded handlers are
115 * active.
116 */
117 wait_event(desc->wait_for_threads,
118 !atomic_read(&desc->threads_active));
119 }
1da177e4 120}
1da177e4
LT
121EXPORT_SYMBOL(synchronize_irq);
122
3aa551c9
TG
123#ifdef CONFIG_SMP
124cpumask_var_t irq_default_affinity;
125
9c255583 126static bool __irq_can_set_affinity(struct irq_desc *desc)
e019c249
JL
127{
128 if (!desc || !irqd_can_balance(&desc->irq_data) ||
129 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
9c255583
TG
130 return false;
131 return true;
e019c249
JL
132}
133
771ee3b0
TG
134/**
135 * irq_can_set_affinity - Check if the affinity of a given irq can be set
136 * @irq: Interrupt to check
137 *
138 */
139int irq_can_set_affinity(unsigned int irq)
140{
e019c249 141 return __irq_can_set_affinity(irq_to_desc(irq));
771ee3b0
TG
142}
143
9c255583
TG
144/**
145 * irq_can_set_affinity_usr - Check if affinity of a irq can be set from user space
146 * @irq: Interrupt to check
147 *
148 * Like irq_can_set_affinity() above, but additionally checks for the
149 * AFFINITY_MANAGED flag.
150 */
151bool irq_can_set_affinity_usr(unsigned int irq)
152{
153 struct irq_desc *desc = irq_to_desc(irq);
154
155 return __irq_can_set_affinity(desc) &&
156 !irqd_affinity_is_managed(&desc->irq_data);
157}
158
591d2fb0
TG
159/**
160 * irq_set_thread_affinity - Notify irq threads to adjust affinity
161 * @desc: irq descriptor which has affitnity changed
162 *
163 * We just set IRQTF_AFFINITY and delegate the affinity setting
164 * to the interrupt thread itself. We can not call
165 * set_cpus_allowed_ptr() here as we hold desc->lock and this
166 * code can be called from hard interrupt context.
167 */
168void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9 169{
f944b5a7 170 struct irqaction *action;
3aa551c9 171
f944b5a7 172 for_each_action_of_desc(desc, action)
3aa551c9 173 if (action->thread)
591d2fb0 174 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
175}
176
818b0f3b
JL
177int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
178 bool force)
179{
180 struct irq_desc *desc = irq_data_to_desc(data);
181 struct irq_chip *chip = irq_data_get_irq_chip(data);
182 int ret;
183
d738e29e
TG
184 if (!chip || !chip->irq_set_affinity)
185 return -EINVAL;
186
01f8fa4f 187 ret = chip->irq_set_affinity(data, mask, force);
818b0f3b
JL
188 switch (ret) {
189 case IRQ_SET_MASK_OK:
2cb62547 190 case IRQ_SET_MASK_OK_DONE:
9df872fa 191 cpumask_copy(desc->irq_common_data.affinity, mask);
818b0f3b
JL
192 case IRQ_SET_MASK_OK_NOCOPY:
193 irq_set_thread_affinity(desc);
194 ret = 0;
195 }
196
197 return ret;
198}
199
01f8fa4f
TG
200int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
201 bool force)
771ee3b0 202{
c2d0c555
DD
203 struct irq_chip *chip = irq_data_get_irq_chip(data);
204 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 205 int ret = 0;
771ee3b0 206
c2d0c555 207 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
208 return -EINVAL;
209
0ef5ca1e 210 if (irq_can_move_pcntxt(data)) {
01f8fa4f 211 ret = irq_do_set_affinity(data, mask, force);
1fa46f1f 212 } else {
c2d0c555 213 irqd_set_move_pending(data);
1fa46f1f 214 irq_copy_pending(desc, mask);
57b150cc 215 }
1fa46f1f 216
cd7eab44
BH
217 if (desc->affinity_notify) {
218 kref_get(&desc->affinity_notify->kref);
219 schedule_work(&desc->affinity_notify->work);
220 }
c2d0c555
DD
221 irqd_set(data, IRQD_AFFINITY_SET);
222
223 return ret;
224}
225
01f8fa4f 226int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
227{
228 struct irq_desc *desc = irq_to_desc(irq);
229 unsigned long flags;
230 int ret;
231
232 if (!desc)
233 return -EINVAL;
234
235 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 236 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 237 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 238 return ret;
771ee3b0
TG
239}
240
e7a297b0
PWJ
241int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
242{
e7a297b0 243 unsigned long flags;
31d9d9b6 244 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
245
246 if (!desc)
247 return -EINVAL;
e7a297b0 248 desc->affinity_hint = m;
02725e74 249 irq_put_desc_unlock(desc, flags);
e2e64a93 250 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
251 if (m)
252 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
253 return 0;
254}
255EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
256
cd7eab44
BH
257static void irq_affinity_notify(struct work_struct *work)
258{
259 struct irq_affinity_notify *notify =
260 container_of(work, struct irq_affinity_notify, work);
261 struct irq_desc *desc = irq_to_desc(notify->irq);
262 cpumask_var_t cpumask;
263 unsigned long flags;
264
1fa46f1f 265 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
266 goto out;
267
268 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 269 if (irq_move_pending(&desc->irq_data))
1fa46f1f 270 irq_get_pending(cpumask, desc);
cd7eab44 271 else
9df872fa 272 cpumask_copy(cpumask, desc->irq_common_data.affinity);
cd7eab44
BH
273 raw_spin_unlock_irqrestore(&desc->lock, flags);
274
275 notify->notify(notify, cpumask);
276
277 free_cpumask_var(cpumask);
278out:
279 kref_put(&notify->kref, notify->release);
280}
281
282/**
283 * irq_set_affinity_notifier - control notification of IRQ affinity changes
284 * @irq: Interrupt for which to enable/disable notification
285 * @notify: Context for notification, or %NULL to disable
286 * notification. Function pointers must be initialised;
287 * the other fields will be initialised by this function.
288 *
289 * Must be called in process context. Notification may only be enabled
290 * after the IRQ is allocated and must be disabled before the IRQ is
291 * freed using free_irq().
292 */
293int
294irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
295{
296 struct irq_desc *desc = irq_to_desc(irq);
297 struct irq_affinity_notify *old_notify;
298 unsigned long flags;
299
300 /* The release function is promised process context */
301 might_sleep();
302
303 if (!desc)
304 return -EINVAL;
305
306 /* Complete initialisation of *notify */
307 if (notify) {
308 notify->irq = irq;
309 kref_init(&notify->kref);
310 INIT_WORK(&notify->work, irq_affinity_notify);
311 }
312
313 raw_spin_lock_irqsave(&desc->lock, flags);
314 old_notify = desc->affinity_notify;
315 desc->affinity_notify = notify;
316 raw_spin_unlock_irqrestore(&desc->lock, flags);
317
318 if (old_notify)
319 kref_put(&old_notify->kref, old_notify->release);
320
321 return 0;
322}
323EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
324
18404756
MK
325#ifndef CONFIG_AUTO_IRQ_AFFINITY
326/*
327 * Generic version of the affinity autoselector.
328 */
43564bd9 329int irq_setup_affinity(struct irq_desc *desc)
18404756 330{
569bda8d 331 struct cpumask *set = irq_default_affinity;
cba4235e
TG
332 int ret, node = irq_desc_get_node(desc);
333 static DEFINE_RAW_SPINLOCK(mask_lock);
334 static struct cpumask mask;
569bda8d 335
b008207c 336 /* Excludes PER_CPU and NO_BALANCE interrupts */
e019c249 337 if (!__irq_can_set_affinity(desc))
18404756
MK
338 return 0;
339
cba4235e 340 raw_spin_lock(&mask_lock);
f6d87f4b 341 /*
9332ef9d 342 * Preserve the managed affinity setting and a userspace affinity
06ee6d57 343 * setup, but make sure that one of the targets is online.
f6d87f4b 344 */
06ee6d57
TG
345 if (irqd_affinity_is_managed(&desc->irq_data) ||
346 irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
9df872fa 347 if (cpumask_intersects(desc->irq_common_data.affinity,
569bda8d 348 cpu_online_mask))
9df872fa 349 set = desc->irq_common_data.affinity;
0c6f8a8b 350 else
2bdd1055 351 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 352 }
18404756 353
cba4235e 354 cpumask_and(&mask, cpu_online_mask, set);
241fc640
PB
355 if (node != NUMA_NO_NODE) {
356 const struct cpumask *nodemask = cpumask_of_node(node);
357
358 /* make sure at least one of the cpus in nodemask is online */
cba4235e
TG
359 if (cpumask_intersects(&mask, nodemask))
360 cpumask_and(&mask, &mask, nodemask);
241fc640 361 }
cba4235e
TG
362 ret = irq_do_set_affinity(&desc->irq_data, &mask, false);
363 raw_spin_unlock(&mask_lock);
364 return ret;
18404756 365}
f6d87f4b 366#else
a8a98eac 367/* Wrapper for ALPHA specific affinity selector magic */
cba4235e 368int irq_setup_affinity(struct irq_desc *desc)
f6d87f4b 369{
cba4235e 370 return irq_select_affinity(irq_desc_get_irq(desc));
f6d87f4b 371}
18404756
MK
372#endif
373
f6d87f4b 374/*
cba4235e 375 * Called when a bogus affinity is set via /proc/irq
f6d87f4b 376 */
cba4235e 377int irq_select_affinity_usr(unsigned int irq)
f6d87f4b
TG
378{
379 struct irq_desc *desc = irq_to_desc(irq);
380 unsigned long flags;
381 int ret;
382
239007b8 383 raw_spin_lock_irqsave(&desc->lock, flags);
cba4235e 384 ret = irq_setup_affinity(desc);
239007b8 385 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
386 return ret;
387}
1da177e4
LT
388#endif
389
fcf1ae2f
FW
390/**
391 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
392 * @irq: interrupt number to set affinity
393 * @vcpu_info: vCPU specific data
394 *
395 * This function uses the vCPU specific data to set the vCPU
396 * affinity for an irq. The vCPU specific data is passed from
397 * outside, such as KVM. One example code path is as below:
398 * KVM -> IOMMU -> irq_set_vcpu_affinity().
399 */
400int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
401{
402 unsigned long flags;
403 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
404 struct irq_data *data;
405 struct irq_chip *chip;
406 int ret = -ENOSYS;
407
408 if (!desc)
409 return -EINVAL;
410
411 data = irq_desc_get_irq_data(desc);
412 chip = irq_data_get_irq_chip(data);
413 if (chip && chip->irq_set_vcpu_affinity)
414 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
415 irq_put_desc_unlock(desc, flags);
416
417 return ret;
418}
419EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
420
79ff1cda 421void __disable_irq(struct irq_desc *desc)
0a0c5168 422{
3aae994f 423 if (!desc->depth++)
87923470 424 irq_disable(desc);
0a0c5168
RW
425}
426
02725e74
TG
427static int __disable_irq_nosync(unsigned int irq)
428{
429 unsigned long flags;
31d9d9b6 430 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
431
432 if (!desc)
433 return -EINVAL;
79ff1cda 434 __disable_irq(desc);
02725e74
TG
435 irq_put_desc_busunlock(desc, flags);
436 return 0;
437}
438
1da177e4
LT
439/**
440 * disable_irq_nosync - disable an irq without waiting
441 * @irq: Interrupt to disable
442 *
443 * Disable the selected interrupt line. Disables and Enables are
444 * nested.
445 * Unlike disable_irq(), this function does not ensure existing
446 * instances of the IRQ handler have completed before returning.
447 *
448 * This function may be called from IRQ context.
449 */
450void disable_irq_nosync(unsigned int irq)
451{
02725e74 452 __disable_irq_nosync(irq);
1da177e4 453}
1da177e4
LT
454EXPORT_SYMBOL(disable_irq_nosync);
455
456/**
457 * disable_irq - disable an irq and wait for completion
458 * @irq: Interrupt to disable
459 *
460 * Disable the selected interrupt line. Enables and Disables are
461 * nested.
462 * This function waits for any pending IRQ handlers for this interrupt
463 * to complete before returning. If you use this function while
464 * holding a resource the IRQ handler may need you will deadlock.
465 *
466 * This function may be called - with care - from IRQ context.
467 */
468void disable_irq(unsigned int irq)
469{
02725e74 470 if (!__disable_irq_nosync(irq))
1da177e4
LT
471 synchronize_irq(irq);
472}
1da177e4
LT
473EXPORT_SYMBOL(disable_irq);
474
02cea395
PZ
475/**
476 * disable_hardirq - disables an irq and waits for hardirq completion
477 * @irq: Interrupt to disable
478 *
479 * Disable the selected interrupt line. Enables and Disables are
480 * nested.
481 * This function waits for any pending hard IRQ handlers for this
482 * interrupt to complete before returning. If you use this function while
483 * holding a resource the hard IRQ handler may need you will deadlock.
484 *
485 * When used to optimistically disable an interrupt from atomic context
486 * the return value must be checked.
487 *
488 * Returns: false if a threaded handler is active.
489 *
490 * This function may be called - with care - from IRQ context.
491 */
492bool disable_hardirq(unsigned int irq)
493{
494 if (!__disable_irq_nosync(irq))
495 return synchronize_hardirq(irq);
496
497 return false;
498}
499EXPORT_SYMBOL_GPL(disable_hardirq);
500
79ff1cda 501void __enable_irq(struct irq_desc *desc)
1adb0850
TG
502{
503 switch (desc->depth) {
504 case 0:
0a0c5168 505 err_out:
79ff1cda
JL
506 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
507 irq_desc_get_irq(desc));
1adb0850
TG
508 break;
509 case 1: {
c531e836 510 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 511 goto err_out;
1adb0850 512 /* Prevent probing on this irq: */
1ccb4e61 513 irq_settings_set_noprobe(desc);
201d7f47
TG
514 /*
515 * Call irq_startup() not irq_enable() here because the
516 * interrupt might be marked NOAUTOEN. So irq_startup()
517 * needs to be invoked when it gets enabled the first
518 * time. If it was already started up, then irq_startup()
519 * will invoke irq_enable() under the hood.
520 */
4cde9c6b 521 irq_startup(desc, IRQ_RESEND, IRQ_START_COND);
201d7f47 522 break;
1adb0850
TG
523 }
524 default:
525 desc->depth--;
526 }
527}
528
1da177e4
LT
529/**
530 * enable_irq - enable handling of an irq
531 * @irq: Interrupt to enable
532 *
533 * Undoes the effect of one call to disable_irq(). If this
534 * matches the last disable, processing of interrupts on this
535 * IRQ line is re-enabled.
536 *
70aedd24 537 * This function may be called from IRQ context only when
6b8ff312 538 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
539 */
540void enable_irq(unsigned int irq)
541{
1da177e4 542 unsigned long flags;
31d9d9b6 543 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 544
7d94f7ca 545 if (!desc)
c2b5a251 546 return;
50f7c032
TG
547 if (WARN(!desc->irq_data.chip,
548 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 549 goto out;
2656c366 550
79ff1cda 551 __enable_irq(desc);
02725e74
TG
552out:
553 irq_put_desc_busunlock(desc, flags);
1da177e4 554}
1da177e4
LT
555EXPORT_SYMBOL(enable_irq);
556
0c5d1eb7 557static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 558{
08678b08 559 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
560 int ret = -ENXIO;
561
60f96b41
SS
562 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
563 return 0;
564
2f7e99bb
TG
565 if (desc->irq_data.chip->irq_set_wake)
566 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
567
568 return ret;
569}
570
ba9a2331 571/**
a0cd9ca2 572 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
573 * @irq: interrupt to control
574 * @on: enable/disable power management wakeup
575 *
15a647eb
DB
576 * Enable/disable power management wakeup mode, which is
577 * disabled by default. Enables and disables must match,
578 * just as they match for non-wakeup mode support.
579 *
580 * Wakeup mode lets this IRQ wake the system from sleep
581 * states like "suspend to RAM".
ba9a2331 582 */
a0cd9ca2 583int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 584{
ba9a2331 585 unsigned long flags;
31d9d9b6 586 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 587 int ret = 0;
ba9a2331 588
13863a66
JJ
589 if (!desc)
590 return -EINVAL;
591
15a647eb
DB
592 /* wakeup-capable irqs can be shared between drivers that
593 * don't need to have the same sleep mode behaviors.
594 */
15a647eb 595 if (on) {
2db87321
UKK
596 if (desc->wake_depth++ == 0) {
597 ret = set_irq_wake_real(irq, on);
598 if (ret)
599 desc->wake_depth = 0;
600 else
7f94226f 601 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 602 }
15a647eb
DB
603 } else {
604 if (desc->wake_depth == 0) {
7a2c4770 605 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
606 } else if (--desc->wake_depth == 0) {
607 ret = set_irq_wake_real(irq, on);
608 if (ret)
609 desc->wake_depth = 1;
610 else
7f94226f 611 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 612 }
15a647eb 613 }
02725e74 614 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
615 return ret;
616}
a0cd9ca2 617EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 618
1da177e4
LT
619/*
620 * Internal function that tells the architecture code whether a
621 * particular irq has been exclusively allocated or is available
622 * for driver use.
623 */
624int can_request_irq(unsigned int irq, unsigned long irqflags)
625{
cc8c3b78 626 unsigned long flags;
31d9d9b6 627 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 628 int canrequest = 0;
1da177e4 629
7d94f7ca
YL
630 if (!desc)
631 return 0;
632
02725e74 633 if (irq_settings_can_request(desc)) {
2779db8d
BH
634 if (!desc->action ||
635 irqflags & desc->action->flags & IRQF_SHARED)
636 canrequest = 1;
02725e74
TG
637 }
638 irq_put_desc_unlock(desc, flags);
639 return canrequest;
1da177e4
LT
640}
641
a1ff541a 642int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
82736f4d 643{
6b8ff312 644 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 645 int ret, unmask = 0;
82736f4d 646
b2ba2c30 647 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
648 /*
649 * IRQF_TRIGGER_* but the PIC does not support multiple
650 * flow-types?
651 */
a1ff541a
JL
652 pr_debug("No set_type function for IRQ %d (%s)\n",
653 irq_desc_get_irq(desc),
f5d89470 654 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
655 return 0;
656 }
657
d4d5e089 658 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 659 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 660 mask_irq(desc);
32f4125e 661 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
662 unmask = 1;
663 }
664
00b992de
AK
665 /* Mask all flags except trigger mode */
666 flags &= IRQ_TYPE_SENSE_MASK;
b2ba2c30 667 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 668
876dbd4c
TG
669 switch (ret) {
670 case IRQ_SET_MASK_OK:
2cb62547 671 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
672 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
673 irqd_set(&desc->irq_data, flags);
674
675 case IRQ_SET_MASK_OK_NOCOPY:
676 flags = irqd_get_trigger_type(&desc->irq_data);
677 irq_settings_set_trigger_mask(desc, flags);
678 irqd_clear(&desc->irq_data, IRQD_LEVEL);
679 irq_settings_clr_level(desc);
680 if (flags & IRQ_TYPE_LEVEL_MASK) {
681 irq_settings_set_level(desc);
682 irqd_set(&desc->irq_data, IRQD_LEVEL);
683 }
46732475 684
d4d5e089 685 ret = 0;
8fff39e0 686 break;
876dbd4c 687 default:
97fd75b7 688 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
a1ff541a 689 flags, irq_desc_get_irq(desc), chip->irq_set_type);
0c5d1eb7 690 }
d4d5e089
TG
691 if (unmask)
692 unmask_irq(desc);
82736f4d
UKK
693 return ret;
694}
695
293a7a0a
TG
696#ifdef CONFIG_HARDIRQS_SW_RESEND
697int irq_set_parent(int irq, int parent_irq)
698{
699 unsigned long flags;
700 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
701
702 if (!desc)
703 return -EINVAL;
704
705 desc->parent_irq = parent_irq;
706
707 irq_put_desc_unlock(desc, flags);
708 return 0;
709}
3118dac5 710EXPORT_SYMBOL_GPL(irq_set_parent);
293a7a0a
TG
711#endif
712
b25c340c
TG
713/*
714 * Default primary interrupt handler for threaded interrupts. Is
715 * assigned as primary handler when request_threaded_irq is called
716 * with handler == NULL. Useful for oneshot interrupts.
717 */
718static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
719{
720 return IRQ_WAKE_THREAD;
721}
722
399b5da2
TG
723/*
724 * Primary handler for nested threaded interrupts. Should never be
725 * called.
726 */
727static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
728{
729 WARN(1, "Primary handler called for nested irq %d\n", irq);
730 return IRQ_NONE;
731}
732
2a1d3ab8
TG
733static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id)
734{
735 WARN(1, "Secondary action handler called for irq %d\n", irq);
736 return IRQ_NONE;
737}
738
3aa551c9
TG
739static int irq_wait_for_interrupt(struct irqaction *action)
740{
550acb19
IY
741 set_current_state(TASK_INTERRUPTIBLE);
742
3aa551c9 743 while (!kthread_should_stop()) {
f48fe81e
TG
744
745 if (test_and_clear_bit(IRQTF_RUNTHREAD,
746 &action->thread_flags)) {
3aa551c9
TG
747 __set_current_state(TASK_RUNNING);
748 return 0;
f48fe81e
TG
749 }
750 schedule();
550acb19 751 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 752 }
550acb19 753 __set_current_state(TASK_RUNNING);
3aa551c9
TG
754 return -1;
755}
756
b25c340c
TG
757/*
758 * Oneshot interrupts keep the irq line masked until the threaded
759 * handler finished. unmask if the interrupt has not been disabled and
760 * is marked MASKED.
761 */
b5faba21 762static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 763 struct irqaction *action)
b25c340c 764{
2a1d3ab8
TG
765 if (!(desc->istate & IRQS_ONESHOT) ||
766 action->handler == irq_forced_secondary_handler)
b5faba21 767 return;
0b1adaa0 768again:
3876ec9e 769 chip_bus_lock(desc);
239007b8 770 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
771
772 /*
773 * Implausible though it may be we need to protect us against
774 * the following scenario:
775 *
776 * The thread is faster done than the hard interrupt handler
777 * on the other CPU. If we unmask the irq line then the
778 * interrupt can come in again and masks the line, leaves due
009b4c3b 779 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
780 *
781 * This also serializes the state of shared oneshot handlers
782 * versus "desc->threads_onehsot |= action->thread_mask;" in
783 * irq_wake_thread(). See the comment there which explains the
784 * serialization.
0b1adaa0 785 */
32f4125e 786 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 787 raw_spin_unlock_irq(&desc->lock);
3876ec9e 788 chip_bus_sync_unlock(desc);
0b1adaa0
TG
789 cpu_relax();
790 goto again;
791 }
792
b5faba21
TG
793 /*
794 * Now check again, whether the thread should run. Otherwise
795 * we would clear the threads_oneshot bit of this thread which
796 * was just set.
797 */
f3f79e38 798 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
799 goto out_unlock;
800
801 desc->threads_oneshot &= ~action->thread_mask;
802
32f4125e
TG
803 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
804 irqd_irq_masked(&desc->irq_data))
328a4978 805 unmask_threaded_irq(desc);
32f4125e 806
b5faba21 807out_unlock:
239007b8 808 raw_spin_unlock_irq(&desc->lock);
3876ec9e 809 chip_bus_sync_unlock(desc);
b25c340c
TG
810}
811
61f38261 812#ifdef CONFIG_SMP
591d2fb0 813/*
b04c644e 814 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
815 */
816static void
817irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
818{
819 cpumask_var_t mask;
04aa530e 820 bool valid = true;
591d2fb0
TG
821
822 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
823 return;
824
825 /*
826 * In case we are out of memory we set IRQTF_AFFINITY again and
827 * try again next time
828 */
829 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
830 set_bit(IRQTF_AFFINITY, &action->thread_flags);
831 return;
832 }
833
239007b8 834 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
835 /*
836 * This code is triggered unconditionally. Check the affinity
837 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
838 */
d170fe7d 839 if (cpumask_available(desc->irq_common_data.affinity))
9df872fa 840 cpumask_copy(mask, desc->irq_common_data.affinity);
04aa530e
TG
841 else
842 valid = false;
239007b8 843 raw_spin_unlock_irq(&desc->lock);
591d2fb0 844
04aa530e
TG
845 if (valid)
846 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
847 free_cpumask_var(mask);
848}
61f38261
BP
849#else
850static inline void
851irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
852#endif
591d2fb0 853
8d32a307
TG
854/*
855 * Interrupts which are not explicitely requested as threaded
856 * interrupts rely on the implicit bh/preempt disable of the hard irq
857 * context. So we need to disable bh here to avoid deadlocks and other
858 * side effects.
859 */
3a43e05f 860static irqreturn_t
8d32a307
TG
861irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
862{
3a43e05f
SAS
863 irqreturn_t ret;
864
8d32a307 865 local_bh_disable();
3a43e05f 866 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 867 irq_finalize_oneshot(desc, action);
8d32a307 868 local_bh_enable();
3a43e05f 869 return ret;
8d32a307
TG
870}
871
872/*
f788e7bf 873 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
874 * preemtible - many of them need to sleep and wait for slow busses to
875 * complete.
876 */
3a43e05f
SAS
877static irqreturn_t irq_thread_fn(struct irq_desc *desc,
878 struct irqaction *action)
8d32a307 879{
3a43e05f
SAS
880 irqreturn_t ret;
881
882 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 883 irq_finalize_oneshot(desc, action);
3a43e05f 884 return ret;
8d32a307
TG
885}
886
7140ea19
IY
887static void wake_threads_waitq(struct irq_desc *desc)
888{
c685689f 889 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
890 wake_up(&desc->wait_for_threads);
891}
892
67d12145 893static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
894{
895 struct task_struct *tsk = current;
896 struct irq_desc *desc;
897 struct irqaction *action;
898
899 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
900 return;
901
902 action = kthread_data(tsk);
903
fb21affa 904 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 905 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
906
907
908 desc = irq_to_desc(action->irq);
909 /*
910 * If IRQTF_RUNTHREAD is set, we need to decrement
911 * desc->threads_active and wake possible waiters.
912 */
913 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
914 wake_threads_waitq(desc);
915
916 /* Prevent a stale desc->threads_oneshot */
917 irq_finalize_oneshot(desc, action);
918}
919
2a1d3ab8
TG
920static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action)
921{
922 struct irqaction *secondary = action->secondary;
923
924 if (WARN_ON_ONCE(!secondary))
925 return;
926
927 raw_spin_lock_irq(&desc->lock);
928 __irq_wake_thread(desc, secondary);
929 raw_spin_unlock_irq(&desc->lock);
930}
931
3aa551c9
TG
932/*
933 * Interrupt handler thread
934 */
935static int irq_thread(void *data)
936{
67d12145 937 struct callback_head on_exit_work;
3aa551c9
TG
938 struct irqaction *action = data;
939 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
940 irqreturn_t (*handler_fn)(struct irq_desc *desc,
941 struct irqaction *action);
3aa551c9 942
540b60e2 943 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
944 &action->thread_flags))
945 handler_fn = irq_forced_thread_fn;
946 else
947 handler_fn = irq_thread_fn;
948
41f9d29f 949 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 950 task_work_add(current, &on_exit_work, false);
3aa551c9 951
f3de44ed
SM
952 irq_thread_check_affinity(desc, action);
953
3aa551c9 954 while (!irq_wait_for_interrupt(action)) {
7140ea19 955 irqreturn_t action_ret;
3aa551c9 956
591d2fb0
TG
957 irq_thread_check_affinity(desc, action);
958
7140ea19 959 action_ret = handler_fn(desc, action);
1e77d0a1
TG
960 if (action_ret == IRQ_HANDLED)
961 atomic_inc(&desc->threads_handled);
2a1d3ab8
TG
962 if (action_ret == IRQ_WAKE_THREAD)
963 irq_wake_secondary(desc, action);
3aa551c9 964
7140ea19 965 wake_threads_waitq(desc);
3aa551c9
TG
966 }
967
7140ea19
IY
968 /*
969 * This is the regular exit path. __free_irq() is stopping the
970 * thread via kthread_stop() after calling
971 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
972 * oneshot mask bit can be set. We cannot verify that as we
973 * cannot touch the oneshot mask at this point anymore as
974 * __setup_irq() might have given out currents thread_mask
975 * again.
3aa551c9 976 */
4d1d61a6 977 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
978 return 0;
979}
980
a92444c6
TG
981/**
982 * irq_wake_thread - wake the irq thread for the action identified by dev_id
983 * @irq: Interrupt line
984 * @dev_id: Device identity for which the thread should be woken
985 *
986 */
987void irq_wake_thread(unsigned int irq, void *dev_id)
988{
989 struct irq_desc *desc = irq_to_desc(irq);
990 struct irqaction *action;
991 unsigned long flags;
992
993 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
994 return;
995
996 raw_spin_lock_irqsave(&desc->lock, flags);
f944b5a7 997 for_each_action_of_desc(desc, action) {
a92444c6
TG
998 if (action->dev_id == dev_id) {
999 if (action->thread)
1000 __irq_wake_thread(desc, action);
1001 break;
1002 }
1003 }
1004 raw_spin_unlock_irqrestore(&desc->lock, flags);
1005}
1006EXPORT_SYMBOL_GPL(irq_wake_thread);
1007
2a1d3ab8 1008static int irq_setup_forced_threading(struct irqaction *new)
8d32a307
TG
1009{
1010 if (!force_irqthreads)
2a1d3ab8 1011 return 0;
8d32a307 1012 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
2a1d3ab8 1013 return 0;
8d32a307
TG
1014
1015 new->flags |= IRQF_ONESHOT;
1016
2a1d3ab8
TG
1017 /*
1018 * Handle the case where we have a real primary handler and a
1019 * thread handler. We force thread them as well by creating a
1020 * secondary action.
1021 */
1022 if (new->handler != irq_default_primary_handler && new->thread_fn) {
1023 /* Allocate the secondary action */
1024 new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1025 if (!new->secondary)
1026 return -ENOMEM;
1027 new->secondary->handler = irq_forced_secondary_handler;
1028 new->secondary->thread_fn = new->thread_fn;
1029 new->secondary->dev_id = new->dev_id;
1030 new->secondary->irq = new->irq;
1031 new->secondary->name = new->name;
8d32a307 1032 }
2a1d3ab8
TG
1033 /* Deal with the primary handler */
1034 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
1035 new->thread_fn = new->handler;
1036 new->handler = irq_default_primary_handler;
1037 return 0;
8d32a307
TG
1038}
1039
c1bacbae
TG
1040static int irq_request_resources(struct irq_desc *desc)
1041{
1042 struct irq_data *d = &desc->irq_data;
1043 struct irq_chip *c = d->chip;
1044
1045 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1046}
1047
1048static void irq_release_resources(struct irq_desc *desc)
1049{
1050 struct irq_data *d = &desc->irq_data;
1051 struct irq_chip *c = d->chip;
1052
1053 if (c->irq_release_resources)
1054 c->irq_release_resources(d);
1055}
1056
2a1d3ab8
TG
1057static int
1058setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary)
1059{
1060 struct task_struct *t;
1061 struct sched_param param = {
1062 .sched_priority = MAX_USER_RT_PRIO/2,
1063 };
1064
1065 if (!secondary) {
1066 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1067 new->name);
1068 } else {
1069 t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq,
1070 new->name);
1071 param.sched_priority -= 1;
1072 }
1073
1074 if (IS_ERR(t))
1075 return PTR_ERR(t);
1076
1077 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
1078
1079 /*
1080 * We keep the reference to the task struct even if
1081 * the thread dies to avoid that the interrupt code
1082 * references an already freed task_struct.
1083 */
1084 get_task_struct(t);
1085 new->thread = t;
1086 /*
1087 * Tell the thread to set its affinity. This is
1088 * important for shared interrupt handlers as we do
1089 * not invoke setup_affinity() for the secondary
1090 * handlers as everything is already set up. Even for
1091 * interrupts marked with IRQF_NO_BALANCE this is
1092 * correct as we want the thread to move to the cpu(s)
1093 * on which the requesting code placed the interrupt.
1094 */
1095 set_bit(IRQTF_AFFINITY, &new->thread_flags);
1096 return 0;
1097}
1098
1da177e4
LT
1099/*
1100 * Internal function to register an irqaction - typically used to
1101 * allocate special interrupts that are part of the architecture.
19d39a38
TG
1102 *
1103 * Locking rules:
1104 *
1105 * desc->request_mutex Provides serialization against a concurrent free_irq()
1106 * chip_bus_lock Provides serialization for slow bus operations
1107 * desc->lock Provides serialization against hard interrupts
1108 *
1109 * chip_bus_lock and desc->lock are sufficient for all other management and
1110 * interrupt related functions. desc->request_mutex solely serializes
1111 * request/free_irq().
1da177e4 1112 */
d3c60047 1113static int
327ec569 1114__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1115{
f17c7545 1116 struct irqaction *old, **old_ptr;
b5faba21 1117 unsigned long flags, thread_mask = 0;
3b8249e7 1118 int ret, nested, shared = 0;
1da177e4 1119
7d94f7ca 1120 if (!desc)
c2b5a251
MW
1121 return -EINVAL;
1122
6b8ff312 1123 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1124 return -ENOSYS;
b6873807
SAS
1125 if (!try_module_get(desc->owner))
1126 return -ENODEV;
1da177e4 1127
2a1d3ab8
TG
1128 new->irq = irq;
1129
4b357dae
JH
1130 /*
1131 * If the trigger type is not specified by the caller,
1132 * then use the default for this interrupt.
1133 */
1134 if (!(new->flags & IRQF_TRIGGER_MASK))
1135 new->flags |= irqd_get_trigger_type(&desc->irq_data);
1136
3aa551c9 1137 /*
399b5da2
TG
1138 * Check whether the interrupt nests into another interrupt
1139 * thread.
1140 */
1ccb4e61 1141 nested = irq_settings_is_nested_thread(desc);
399b5da2 1142 if (nested) {
b6873807
SAS
1143 if (!new->thread_fn) {
1144 ret = -EINVAL;
1145 goto out_mput;
1146 }
399b5da2
TG
1147 /*
1148 * Replace the primary handler which was provided from
1149 * the driver for non nested interrupt handling by the
1150 * dummy function which warns when called.
1151 */
1152 new->handler = irq_nested_primary_handler;
8d32a307 1153 } else {
2a1d3ab8
TG
1154 if (irq_settings_can_thread(desc)) {
1155 ret = irq_setup_forced_threading(new);
1156 if (ret)
1157 goto out_mput;
1158 }
399b5da2
TG
1159 }
1160
3aa551c9 1161 /*
399b5da2
TG
1162 * Create a handler thread when a thread function is supplied
1163 * and the interrupt does not nest into another interrupt
1164 * thread.
3aa551c9 1165 */
399b5da2 1166 if (new->thread_fn && !nested) {
2a1d3ab8
TG
1167 ret = setup_irq_thread(new, irq, false);
1168 if (ret)
b6873807 1169 goto out_mput;
2a1d3ab8
TG
1170 if (new->secondary) {
1171 ret = setup_irq_thread(new->secondary, irq, true);
1172 if (ret)
1173 goto out_thread;
b6873807 1174 }
3aa551c9
TG
1175 }
1176
dc9b229a
TG
1177 /*
1178 * Drivers are often written to work w/o knowledge about the
1179 * underlying irq chip implementation, so a request for a
1180 * threaded irq without a primary hard irq context handler
1181 * requires the ONESHOT flag to be set. Some irq chips like
1182 * MSI based interrupts are per se one shot safe. Check the
1183 * chip flags, so we can avoid the unmask dance at the end of
1184 * the threaded handler for those.
1185 */
1186 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1187 new->flags &= ~IRQF_ONESHOT;
1188
19d39a38
TG
1189 /*
1190 * Protects against a concurrent __free_irq() call which might wait
1191 * for synchronize_irq() to complete without holding the optional
1192 * chip bus lock and desc->lock.
1193 */
9114014c 1194 mutex_lock(&desc->request_mutex);
19d39a38
TG
1195
1196 /*
1197 * Acquire bus lock as the irq_request_resources() callback below
1198 * might rely on the serialization or the magic power management
1199 * functions which are abusing the irq_bus_lock() callback,
1200 */
1201 chip_bus_lock(desc);
1202
1203 /* First installed action requests resources. */
46e48e25
TG
1204 if (!desc->action) {
1205 ret = irq_request_resources(desc);
1206 if (ret) {
1207 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1208 new->name, irq, desc->irq_data.chip->name);
19d39a38 1209 goto out_bus_unlock;
46e48e25
TG
1210 }
1211 }
9114014c 1212
1da177e4
LT
1213 /*
1214 * The following block of code has to be executed atomically
19d39a38
TG
1215 * protected against a concurrent interrupt and any of the other
1216 * management calls which are not serialized via
1217 * desc->request_mutex or the optional bus lock.
1da177e4 1218 */
239007b8 1219 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1220 old_ptr = &desc->action;
1221 old = *old_ptr;
06fcb0c6 1222 if (old) {
e76de9f8
TG
1223 /*
1224 * Can't share interrupts unless both agree to and are
1225 * the same type (level, edge, polarity). So both flag
3cca53b0 1226 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1227 * set the trigger type must match. Also all must
1228 * agree on ONESHOT.
e76de9f8 1229 */
382bd4de
HG
1230 unsigned int oldtype = irqd_get_trigger_type(&desc->irq_data);
1231
3cca53b0 1232 if (!((old->flags & new->flags) & IRQF_SHARED) ||
382bd4de 1233 (oldtype != (new->flags & IRQF_TRIGGER_MASK)) ||
f5d89470 1234 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1235 goto mismatch;
1236
f5163427 1237 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1238 if ((old->flags & IRQF_PERCPU) !=
1239 (new->flags & IRQF_PERCPU))
f5163427 1240 goto mismatch;
1da177e4
LT
1241
1242 /* add new interrupt at end of irq queue */
1243 do {
52abb700
TG
1244 /*
1245 * Or all existing action->thread_mask bits,
1246 * so we can find the next zero bit for this
1247 * new action.
1248 */
b5faba21 1249 thread_mask |= old->thread_mask;
f17c7545
IM
1250 old_ptr = &old->next;
1251 old = *old_ptr;
1da177e4
LT
1252 } while (old);
1253 shared = 1;
1254 }
1255
b5faba21 1256 /*
52abb700
TG
1257 * Setup the thread mask for this irqaction for ONESHOT. For
1258 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1259 * conditional in irq_wake_thread().
b5faba21 1260 */
52abb700
TG
1261 if (new->flags & IRQF_ONESHOT) {
1262 /*
1263 * Unlikely to have 32 resp 64 irqs sharing one line,
1264 * but who knows.
1265 */
1266 if (thread_mask == ~0UL) {
1267 ret = -EBUSY;
cba4235e 1268 goto out_unlock;
52abb700
TG
1269 }
1270 /*
1271 * The thread_mask for the action is or'ed to
1272 * desc->thread_active to indicate that the
1273 * IRQF_ONESHOT thread handler has been woken, but not
1274 * yet finished. The bit is cleared when a thread
1275 * completes. When all threads of a shared interrupt
1276 * line have completed desc->threads_active becomes
1277 * zero and the interrupt line is unmasked. See
1278 * handle.c:irq_wake_thread() for further information.
1279 *
1280 * If no thread is woken by primary (hard irq context)
1281 * interrupt handlers, then desc->threads_active is
1282 * also checked for zero to unmask the irq line in the
1283 * affected hard irq flow handlers
1284 * (handle_[fasteoi|level]_irq).
1285 *
1286 * The new action gets the first zero bit of
1287 * thread_mask assigned. See the loop above which or's
1288 * all existing action->thread_mask bits.
1289 */
1290 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1291
dc9b229a
TG
1292 } else if (new->handler == irq_default_primary_handler &&
1293 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1294 /*
1295 * The interrupt was requested with handler = NULL, so
1296 * we use the default primary handler for it. But it
1297 * does not have the oneshot flag set. In combination
1298 * with level interrupts this is deadly, because the
1299 * default primary handler just wakes the thread, then
1300 * the irq lines is reenabled, but the device still
1301 * has the level irq asserted. Rinse and repeat....
1302 *
1303 * While this works for edge type interrupts, we play
1304 * it safe and reject unconditionally because we can't
1305 * say for sure which type this interrupt really
1306 * has. The type flags are unreliable as the
1307 * underlying chip implementation can override them.
1308 */
97fd75b7 1309 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1310 irq);
1311 ret = -EINVAL;
cba4235e 1312 goto out_unlock;
b5faba21 1313 }
b5faba21 1314
1da177e4 1315 if (!shared) {
3aa551c9
TG
1316 init_waitqueue_head(&desc->wait_for_threads);
1317
e76de9f8 1318 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1319 if (new->flags & IRQF_TRIGGER_MASK) {
a1ff541a
JL
1320 ret = __irq_set_trigger(desc,
1321 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1322
19d39a38 1323 if (ret)
cba4235e 1324 goto out_unlock;
091738a2 1325 }
6a6de9ef 1326
009b4c3b 1327 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1328 IRQS_ONESHOT | IRQS_WAITING);
1329 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1330
a005677b
TG
1331 if (new->flags & IRQF_PERCPU) {
1332 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1333 irq_settings_set_per_cpu(desc);
1334 }
6a58fb3b 1335
b25c340c 1336 if (new->flags & IRQF_ONESHOT)
3d67baec 1337 desc->istate |= IRQS_ONESHOT;
b25c340c 1338
2e051552
TG
1339 /* Exclude IRQ from balancing if requested */
1340 if (new->flags & IRQF_NOBALANCING) {
1341 irq_settings_set_no_balancing(desc);
1342 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1343 }
1344
04c848d3 1345 if (irq_settings_can_autoenable(desc)) {
4cde9c6b 1346 irq_startup(desc, IRQ_RESEND, IRQ_START_COND);
04c848d3
TG
1347 } else {
1348 /*
1349 * Shared interrupts do not go well with disabling
1350 * auto enable. The sharing interrupt might request
1351 * it while it's still disabled and then wait for
1352 * interrupts forever.
1353 */
1354 WARN_ON_ONCE(new->flags & IRQF_SHARED);
e76de9f8
TG
1355 /* Undo nested disables: */
1356 desc->depth = 1;
04c848d3 1357 }
18404756 1358
876dbd4c
TG
1359 } else if (new->flags & IRQF_TRIGGER_MASK) {
1360 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
7ee7e87d 1361 unsigned int omsk = irqd_get_trigger_type(&desc->irq_data);
876dbd4c
TG
1362
1363 if (nmsk != omsk)
1364 /* hope the handler works with current trigger mode */
a395d6a7 1365 pr_warn("irq %d uses trigger mode %u; requested %u\n",
7ee7e87d 1366 irq, omsk, nmsk);
1da177e4 1367 }
82736f4d 1368
f17c7545 1369 *old_ptr = new;
82736f4d 1370
cab303be
TG
1371 irq_pm_install_action(desc, new);
1372
8528b0f1
LT
1373 /* Reset broken irq detection when installing new handler */
1374 desc->irq_count = 0;
1375 desc->irqs_unhandled = 0;
1adb0850
TG
1376
1377 /*
1378 * Check whether we disabled the irq via the spurious handler
1379 * before. Reenable it and give it another chance.
1380 */
7acdd53e
TG
1381 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1382 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
79ff1cda 1383 __enable_irq(desc);
1adb0850
TG
1384 }
1385
239007b8 1386 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a90795e 1387 chip_bus_sync_unlock(desc);
9114014c 1388 mutex_unlock(&desc->request_mutex);
1da177e4 1389
b2d3d61a
DL
1390 irq_setup_timings(desc, new);
1391
69ab8494
TG
1392 /*
1393 * Strictly no need to wake it up, but hung_task complains
1394 * when no hard interrupt wakes the thread up.
1395 */
1396 if (new->thread)
1397 wake_up_process(new->thread);
2a1d3ab8
TG
1398 if (new->secondary)
1399 wake_up_process(new->secondary->thread);
69ab8494 1400
2c6927a3 1401 register_irq_proc(irq, desc);
087cdfb6 1402 irq_add_debugfs_entry(irq, desc);
1da177e4
LT
1403 new->dir = NULL;
1404 register_handler_proc(irq, new);
1da177e4 1405 return 0;
f5163427
DS
1406
1407mismatch:
3cca53b0 1408 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1409 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1410 irq, new->flags, new->name, old->flags, old->name);
1411#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1412 dump_stack();
3f050447 1413#endif
f5d89470 1414 }
3aa551c9
TG
1415 ret = -EBUSY;
1416
cba4235e 1417out_unlock:
1c389795 1418 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7 1419
46e48e25
TG
1420 if (!desc->action)
1421 irq_release_resources(desc);
19d39a38
TG
1422out_bus_unlock:
1423 chip_bus_sync_unlock(desc);
9114014c
TG
1424 mutex_unlock(&desc->request_mutex);
1425
3aa551c9 1426out_thread:
3aa551c9
TG
1427 if (new->thread) {
1428 struct task_struct *t = new->thread;
1429
1430 new->thread = NULL;
05d74efa 1431 kthread_stop(t);
3aa551c9
TG
1432 put_task_struct(t);
1433 }
2a1d3ab8
TG
1434 if (new->secondary && new->secondary->thread) {
1435 struct task_struct *t = new->secondary->thread;
1436
1437 new->secondary->thread = NULL;
1438 kthread_stop(t);
1439 put_task_struct(t);
1440 }
b6873807
SAS
1441out_mput:
1442 module_put(desc->owner);
3aa551c9 1443 return ret;
1da177e4
LT
1444}
1445
d3c60047
TG
1446/**
1447 * setup_irq - setup an interrupt
1448 * @irq: Interrupt line to setup
1449 * @act: irqaction for the interrupt
1450 *
1451 * Used to statically setup interrupts in the early boot process.
1452 */
1453int setup_irq(unsigned int irq, struct irqaction *act)
1454{
986c011d 1455 int retval;
d3c60047
TG
1456 struct irq_desc *desc = irq_to_desc(irq);
1457
9b5d585d 1458 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
31d9d9b6 1459 return -EINVAL;
be45beb2
JH
1460
1461 retval = irq_chip_pm_get(&desc->irq_data);
1462 if (retval < 0)
1463 return retval;
1464
986c011d 1465 retval = __setup_irq(irq, desc, act);
986c011d 1466
be45beb2
JH
1467 if (retval)
1468 irq_chip_pm_put(&desc->irq_data);
1469
986c011d 1470 return retval;
d3c60047 1471}
eb53b4e8 1472EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1473
31d9d9b6 1474/*
cbf94f06
MD
1475 * Internal function to unregister an irqaction - used to free
1476 * regular and special interrupts that are part of the architecture.
1da177e4 1477 */
cbf94f06 1478static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1479{
d3c60047 1480 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1481 struct irqaction *action, **action_ptr;
1da177e4
LT
1482 unsigned long flags;
1483
ae88a23b 1484 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1485
7d94f7ca 1486 if (!desc)
f21cfb25 1487 return NULL;
1da177e4 1488
9114014c 1489 mutex_lock(&desc->request_mutex);
abc7e40c 1490 chip_bus_lock(desc);
239007b8 1491 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1492
1493 /*
1494 * There can be multiple actions per IRQ descriptor, find the right
1495 * one based on the dev_id:
1496 */
f17c7545 1497 action_ptr = &desc->action;
1da177e4 1498 for (;;) {
f17c7545 1499 action = *action_ptr;
1da177e4 1500
ae88a23b
IM
1501 if (!action) {
1502 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1503 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1504 chip_bus_sync_unlock(desc);
19d39a38 1505 mutex_unlock(&desc->request_mutex);
f21cfb25 1506 return NULL;
ae88a23b 1507 }
1da177e4 1508
8316e381
IM
1509 if (action->dev_id == dev_id)
1510 break;
f17c7545 1511 action_ptr = &action->next;
ae88a23b 1512 }
dbce706e 1513
ae88a23b 1514 /* Found it - now remove it from the list of entries: */
f17c7545 1515 *action_ptr = action->next;
ae88a23b 1516
cab303be
TG
1517 irq_pm_remove_action(desc, action);
1518
ae88a23b 1519 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1520 if (!desc->action) {
e9849777 1521 irq_settings_clr_disable_unlazy(desc);
46999238 1522 irq_shutdown(desc);
c1bacbae 1523 }
3aa551c9 1524
e7a297b0
PWJ
1525#ifdef CONFIG_SMP
1526 /* make sure affinity_hint is cleaned up */
1527 if (WARN_ON_ONCE(desc->affinity_hint))
1528 desc->affinity_hint = NULL;
1529#endif
1530
239007b8 1531 raw_spin_unlock_irqrestore(&desc->lock, flags);
19d39a38
TG
1532 /*
1533 * Drop bus_lock here so the changes which were done in the chip
1534 * callbacks above are synced out to the irq chips which hang
1535 * behind a slow bus (I2C, SPI) before calling synchronize_irq().
1536 *
1537 * Aside of that the bus_lock can also be taken from the threaded
1538 * handler in irq_finalize_oneshot() which results in a deadlock
1539 * because synchronize_irq() would wait forever for the thread to
1540 * complete, which is blocked on the bus lock.
1541 *
1542 * The still held desc->request_mutex() protects against a
1543 * concurrent request_irq() of this irq so the release of resources
1544 * and timing data is properly serialized.
1545 */
abc7e40c 1546 chip_bus_sync_unlock(desc);
ae88a23b
IM
1547
1548 unregister_handler_proc(irq, action);
1549
1550 /* Make sure it's not being used on another CPU: */
1551 synchronize_irq(irq);
1da177e4 1552
70edcd77 1553#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1554 /*
1555 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1556 * event to happen even now it's being freed, so let's make sure that
1557 * is so by doing an extra call to the handler ....
1558 *
1559 * ( We do this after actually deregistering it, to make sure that a
1560 * 'real' IRQ doesn't run in * parallel with our fake. )
1561 */
1562 if (action->flags & IRQF_SHARED) {
1563 local_irq_save(flags);
1564 action->handler(irq, dev_id);
1565 local_irq_restore(flags);
1da177e4 1566 }
ae88a23b 1567#endif
2d860ad7
LT
1568
1569 if (action->thread) {
05d74efa 1570 kthread_stop(action->thread);
2d860ad7 1571 put_task_struct(action->thread);
2a1d3ab8
TG
1572 if (action->secondary && action->secondary->thread) {
1573 kthread_stop(action->secondary->thread);
1574 put_task_struct(action->secondary->thread);
1575 }
2d860ad7
LT
1576 }
1577
19d39a38 1578 /* Last action releases resources */
2343877f 1579 if (!desc->action) {
19d39a38
TG
1580 /*
1581 * Reaquire bus lock as irq_release_resources() might
1582 * require it to deallocate resources over the slow bus.
1583 */
1584 chip_bus_lock(desc);
46e48e25 1585 irq_release_resources(desc);
19d39a38 1586 chip_bus_sync_unlock(desc);
2343877f
TG
1587 irq_remove_timings(desc);
1588 }
46e48e25 1589
9114014c
TG
1590 mutex_unlock(&desc->request_mutex);
1591
be45beb2 1592 irq_chip_pm_put(&desc->irq_data);
b6873807 1593 module_put(desc->owner);
2a1d3ab8 1594 kfree(action->secondary);
f21cfb25
MD
1595 return action;
1596}
1597
cbf94f06
MD
1598/**
1599 * remove_irq - free an interrupt
1600 * @irq: Interrupt line to free
1601 * @act: irqaction for the interrupt
1602 *
1603 * Used to remove interrupts statically setup by the early boot process.
1604 */
1605void remove_irq(unsigned int irq, struct irqaction *act)
1606{
31d9d9b6
MZ
1607 struct irq_desc *desc = irq_to_desc(irq);
1608
1609 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
a7e60e55 1610 __free_irq(irq, act->dev_id);
cbf94f06 1611}
eb53b4e8 1612EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1613
f21cfb25
MD
1614/**
1615 * free_irq - free an interrupt allocated with request_irq
1616 * @irq: Interrupt line to free
1617 * @dev_id: Device identity to free
1618 *
1619 * Remove an interrupt handler. The handler is removed and if the
1620 * interrupt line is no longer in use by any driver it is disabled.
1621 * On a shared IRQ the caller must ensure the interrupt is disabled
1622 * on the card it drives before calling this function. The function
1623 * does not return until any executing interrupts for this IRQ
1624 * have completed.
1625 *
1626 * This function must not be called from interrupt context.
25ce4be7
CH
1627 *
1628 * Returns the devname argument passed to request_irq.
f21cfb25 1629 */
25ce4be7 1630const void *free_irq(unsigned int irq, void *dev_id)
f21cfb25 1631{
70aedd24 1632 struct irq_desc *desc = irq_to_desc(irq);
25ce4be7
CH
1633 struct irqaction *action;
1634 const char *devname;
70aedd24 1635
31d9d9b6 1636 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
25ce4be7 1637 return NULL;
70aedd24 1638
cd7eab44
BH
1639#ifdef CONFIG_SMP
1640 if (WARN_ON(desc->affinity_notify))
1641 desc->affinity_notify = NULL;
1642#endif
1643
25ce4be7
CH
1644 action = __free_irq(irq, dev_id);
1645 devname = action->name;
1646 kfree(action);
1647 return devname;
1da177e4 1648}
1da177e4
LT
1649EXPORT_SYMBOL(free_irq);
1650
1651/**
3aa551c9 1652 * request_threaded_irq - allocate an interrupt line
1da177e4 1653 * @irq: Interrupt line to allocate
3aa551c9
TG
1654 * @handler: Function to be called when the IRQ occurs.
1655 * Primary handler for threaded interrupts
b25c340c
TG
1656 * If NULL and thread_fn != NULL the default
1657 * primary handler is installed
f48fe81e
TG
1658 * @thread_fn: Function called from the irq handler thread
1659 * If NULL, no irq thread is created
1da177e4
LT
1660 * @irqflags: Interrupt type flags
1661 * @devname: An ascii name for the claiming device
1662 * @dev_id: A cookie passed back to the handler function
1663 *
1664 * This call allocates interrupt resources and enables the
1665 * interrupt line and IRQ handling. From the point this
1666 * call is made your handler function may be invoked. Since
1667 * your handler function must clear any interrupt the board
1668 * raises, you must take care both to initialise your hardware
1669 * and to set up the interrupt handler in the right order.
1670 *
3aa551c9 1671 * If you want to set up a threaded irq handler for your device
6d21af4f 1672 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1673 * still called in hard interrupt context and has to check
1674 * whether the interrupt originates from the device. If yes it
1675 * needs to disable the interrupt on the device and return
39a2eddb 1676 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1677 * @thread_fn. This split handler design is necessary to support
1678 * shared interrupts.
1679 *
1da177e4
LT
1680 * Dev_id must be globally unique. Normally the address of the
1681 * device data structure is used as the cookie. Since the handler
1682 * receives this value it makes sense to use it.
1683 *
1684 * If your interrupt is shared you must pass a non NULL dev_id
1685 * as this is required when freeing the interrupt.
1686 *
1687 * Flags:
1688 *
3cca53b0 1689 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1690 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1691 *
1692 */
3aa551c9
TG
1693int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1694 irq_handler_t thread_fn, unsigned long irqflags,
1695 const char *devname, void *dev_id)
1da177e4 1696{
06fcb0c6 1697 struct irqaction *action;
08678b08 1698 struct irq_desc *desc;
d3c60047 1699 int retval;
1da177e4 1700
e237a551
CF
1701 if (irq == IRQ_NOTCONNECTED)
1702 return -ENOTCONN;
1703
1da177e4
LT
1704 /*
1705 * Sanity-check: shared interrupts must pass in a real dev-ID,
1706 * otherwise we'll have trouble later trying to figure out
1707 * which interrupt is which (messes up the interrupt freeing
1708 * logic etc).
17f48034
RW
1709 *
1710 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1711 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 1712 */
17f48034
RW
1713 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1714 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1715 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 1716 return -EINVAL;
7d94f7ca 1717
cb5bc832 1718 desc = irq_to_desc(irq);
7d94f7ca 1719 if (!desc)
1da177e4 1720 return -EINVAL;
7d94f7ca 1721
31d9d9b6
MZ
1722 if (!irq_settings_can_request(desc) ||
1723 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1724 return -EINVAL;
b25c340c
TG
1725
1726 if (!handler) {
1727 if (!thread_fn)
1728 return -EINVAL;
1729 handler = irq_default_primary_handler;
1730 }
1da177e4 1731
45535732 1732 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1733 if (!action)
1734 return -ENOMEM;
1735
1736 action->handler = handler;
3aa551c9 1737 action->thread_fn = thread_fn;
1da177e4 1738 action->flags = irqflags;
1da177e4 1739 action->name = devname;
1da177e4
LT
1740 action->dev_id = dev_id;
1741
be45beb2 1742 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
1743 if (retval < 0) {
1744 kfree(action);
be45beb2 1745 return retval;
4396f46c 1746 }
be45beb2 1747
d3c60047 1748 retval = __setup_irq(irq, desc, action);
70aedd24 1749
2a1d3ab8 1750 if (retval) {
be45beb2 1751 irq_chip_pm_put(&desc->irq_data);
2a1d3ab8 1752 kfree(action->secondary);
377bf1e4 1753 kfree(action);
2a1d3ab8 1754 }
377bf1e4 1755
6d83f94d 1756#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1757 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1758 /*
1759 * It's a shared IRQ -- the driver ought to be prepared for it
1760 * to happen immediately, so let's make sure....
377bf1e4
AV
1761 * We disable the irq to make sure that a 'real' IRQ doesn't
1762 * run in parallel with our fake.
a304e1b8 1763 */
59845b1f 1764 unsigned long flags;
a304e1b8 1765
377bf1e4 1766 disable_irq(irq);
59845b1f 1767 local_irq_save(flags);
377bf1e4 1768
59845b1f 1769 handler(irq, dev_id);
377bf1e4 1770
59845b1f 1771 local_irq_restore(flags);
377bf1e4 1772 enable_irq(irq);
a304e1b8
DW
1773 }
1774#endif
1da177e4
LT
1775 return retval;
1776}
3aa551c9 1777EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1778
1779/**
1780 * request_any_context_irq - allocate an interrupt line
1781 * @irq: Interrupt line to allocate
1782 * @handler: Function to be called when the IRQ occurs.
1783 * Threaded handler for threaded interrupts.
1784 * @flags: Interrupt type flags
1785 * @name: An ascii name for the claiming device
1786 * @dev_id: A cookie passed back to the handler function
1787 *
1788 * This call allocates interrupt resources and enables the
1789 * interrupt line and IRQ handling. It selects either a
1790 * hardirq or threaded handling method depending on the
1791 * context.
1792 *
1793 * On failure, it returns a negative value. On success,
1794 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1795 */
1796int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1797 unsigned long flags, const char *name, void *dev_id)
1798{
e237a551 1799 struct irq_desc *desc;
ae731f8d
MZ
1800 int ret;
1801
e237a551
CF
1802 if (irq == IRQ_NOTCONNECTED)
1803 return -ENOTCONN;
1804
1805 desc = irq_to_desc(irq);
ae731f8d
MZ
1806 if (!desc)
1807 return -EINVAL;
1808
1ccb4e61 1809 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1810 ret = request_threaded_irq(irq, NULL, handler,
1811 flags, name, dev_id);
1812 return !ret ? IRQC_IS_NESTED : ret;
1813 }
1814
1815 ret = request_irq(irq, handler, flags, name, dev_id);
1816 return !ret ? IRQC_IS_HARDIRQ : ret;
1817}
1818EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1819
1e7c5fd2 1820void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1821{
1822 unsigned int cpu = smp_processor_id();
1823 unsigned long flags;
1824 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1825
1826 if (!desc)
1827 return;
1828
f35ad083
MZ
1829 /*
1830 * If the trigger type is not specified by the caller, then
1831 * use the default for this interrupt.
1832 */
1e7c5fd2 1833 type &= IRQ_TYPE_SENSE_MASK;
f35ad083
MZ
1834 if (type == IRQ_TYPE_NONE)
1835 type = irqd_get_trigger_type(&desc->irq_data);
1836
1e7c5fd2
MZ
1837 if (type != IRQ_TYPE_NONE) {
1838 int ret;
1839
a1ff541a 1840 ret = __irq_set_trigger(desc, type);
1e7c5fd2
MZ
1841
1842 if (ret) {
32cffdde 1843 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1844 goto out;
1845 }
1846 }
1847
31d9d9b6 1848 irq_percpu_enable(desc, cpu);
1e7c5fd2 1849out:
31d9d9b6
MZ
1850 irq_put_desc_unlock(desc, flags);
1851}
36a5df85 1852EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6 1853
f0cb3220
TP
1854/**
1855 * irq_percpu_is_enabled - Check whether the per cpu irq is enabled
1856 * @irq: Linux irq number to check for
1857 *
1858 * Must be called from a non migratable context. Returns the enable
1859 * state of a per cpu interrupt on the current cpu.
1860 */
1861bool irq_percpu_is_enabled(unsigned int irq)
1862{
1863 unsigned int cpu = smp_processor_id();
1864 struct irq_desc *desc;
1865 unsigned long flags;
1866 bool is_enabled;
1867
1868 desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1869 if (!desc)
1870 return false;
1871
1872 is_enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
1873 irq_put_desc_unlock(desc, flags);
1874
1875 return is_enabled;
1876}
1877EXPORT_SYMBOL_GPL(irq_percpu_is_enabled);
1878
31d9d9b6
MZ
1879void disable_percpu_irq(unsigned int irq)
1880{
1881 unsigned int cpu = smp_processor_id();
1882 unsigned long flags;
1883 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1884
1885 if (!desc)
1886 return;
1887
1888 irq_percpu_disable(desc, cpu);
1889 irq_put_desc_unlock(desc, flags);
1890}
36a5df85 1891EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1892
1893/*
1894 * Internal function to unregister a percpu irqaction.
1895 */
1896static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1897{
1898 struct irq_desc *desc = irq_to_desc(irq);
1899 struct irqaction *action;
1900 unsigned long flags;
1901
1902 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1903
1904 if (!desc)
1905 return NULL;
1906
1907 raw_spin_lock_irqsave(&desc->lock, flags);
1908
1909 action = desc->action;
1910 if (!action || action->percpu_dev_id != dev_id) {
1911 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1912 goto bad;
1913 }
1914
1915 if (!cpumask_empty(desc->percpu_enabled)) {
1916 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1917 irq, cpumask_first(desc->percpu_enabled));
1918 goto bad;
1919 }
1920
1921 /* Found it - now remove it from the list of entries: */
1922 desc->action = NULL;
1923
1924 raw_spin_unlock_irqrestore(&desc->lock, flags);
1925
1926 unregister_handler_proc(irq, action);
1927
be45beb2 1928 irq_chip_pm_put(&desc->irq_data);
31d9d9b6
MZ
1929 module_put(desc->owner);
1930 return action;
1931
1932bad:
1933 raw_spin_unlock_irqrestore(&desc->lock, flags);
1934 return NULL;
1935}
1936
1937/**
1938 * remove_percpu_irq - free a per-cpu interrupt
1939 * @irq: Interrupt line to free
1940 * @act: irqaction for the interrupt
1941 *
1942 * Used to remove interrupts statically setup by the early boot process.
1943 */
1944void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1945{
1946 struct irq_desc *desc = irq_to_desc(irq);
1947
1948 if (desc && irq_settings_is_per_cpu_devid(desc))
1949 __free_percpu_irq(irq, act->percpu_dev_id);
1950}
1951
1952/**
1953 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1954 * @irq: Interrupt line to free
1955 * @dev_id: Device identity to free
1956 *
1957 * Remove a percpu interrupt handler. The handler is removed, but
1958 * the interrupt line is not disabled. This must be done on each
1959 * CPU before calling this function. The function does not return
1960 * until any executing interrupts for this IRQ have completed.
1961 *
1962 * This function must not be called from interrupt context.
1963 */
1964void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1965{
1966 struct irq_desc *desc = irq_to_desc(irq);
1967
1968 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1969 return;
1970
1971 chip_bus_lock(desc);
1972 kfree(__free_percpu_irq(irq, dev_id));
1973 chip_bus_sync_unlock(desc);
1974}
aec2e2ad 1975EXPORT_SYMBOL_GPL(free_percpu_irq);
31d9d9b6
MZ
1976
1977/**
1978 * setup_percpu_irq - setup a per-cpu interrupt
1979 * @irq: Interrupt line to setup
1980 * @act: irqaction for the interrupt
1981 *
1982 * Used to statically setup per-cpu interrupts in the early boot process.
1983 */
1984int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1985{
1986 struct irq_desc *desc = irq_to_desc(irq);
1987 int retval;
1988
1989 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1990 return -EINVAL;
be45beb2
JH
1991
1992 retval = irq_chip_pm_get(&desc->irq_data);
1993 if (retval < 0)
1994 return retval;
1995
31d9d9b6 1996 retval = __setup_irq(irq, desc, act);
31d9d9b6 1997
be45beb2
JH
1998 if (retval)
1999 irq_chip_pm_put(&desc->irq_data);
2000
31d9d9b6
MZ
2001 return retval;
2002}
2003
2004/**
c80081b9 2005 * __request_percpu_irq - allocate a percpu interrupt line
31d9d9b6
MZ
2006 * @irq: Interrupt line to allocate
2007 * @handler: Function to be called when the IRQ occurs.
c80081b9 2008 * @flags: Interrupt type flags (IRQF_TIMER only)
31d9d9b6
MZ
2009 * @devname: An ascii name for the claiming device
2010 * @dev_id: A percpu cookie passed back to the handler function
2011 *
a1b7febd
MR
2012 * This call allocates interrupt resources and enables the
2013 * interrupt on the local CPU. If the interrupt is supposed to be
2014 * enabled on other CPUs, it has to be done on each CPU using
2015 * enable_percpu_irq().
31d9d9b6
MZ
2016 *
2017 * Dev_id must be globally unique. It is a per-cpu variable, and
2018 * the handler gets called with the interrupted CPU's instance of
2019 * that variable.
2020 */
c80081b9
DL
2021int __request_percpu_irq(unsigned int irq, irq_handler_t handler,
2022 unsigned long flags, const char *devname,
2023 void __percpu *dev_id)
31d9d9b6
MZ
2024{
2025 struct irqaction *action;
2026 struct irq_desc *desc;
2027 int retval;
2028
2029 if (!dev_id)
2030 return -EINVAL;
2031
2032 desc = irq_to_desc(irq);
2033 if (!desc || !irq_settings_can_request(desc) ||
2034 !irq_settings_is_per_cpu_devid(desc))
2035 return -EINVAL;
2036
c80081b9
DL
2037 if (flags && flags != IRQF_TIMER)
2038 return -EINVAL;
2039
31d9d9b6
MZ
2040 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
2041 if (!action)
2042 return -ENOMEM;
2043
2044 action->handler = handler;
c80081b9 2045 action->flags = flags | IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
2046 action->name = devname;
2047 action->percpu_dev_id = dev_id;
2048
be45beb2 2049 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
2050 if (retval < 0) {
2051 kfree(action);
be45beb2 2052 return retval;
4396f46c 2053 }
be45beb2 2054
31d9d9b6 2055 retval = __setup_irq(irq, desc, action);
31d9d9b6 2056
be45beb2
JH
2057 if (retval) {
2058 irq_chip_pm_put(&desc->irq_data);
31d9d9b6 2059 kfree(action);
be45beb2 2060 }
31d9d9b6
MZ
2061
2062 return retval;
2063}
c80081b9 2064EXPORT_SYMBOL_GPL(__request_percpu_irq);
1b7047ed
MZ
2065
2066/**
2067 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
2068 * @irq: Interrupt line that is forwarded to a VM
2069 * @which: One of IRQCHIP_STATE_* the caller wants to know about
2070 * @state: a pointer to a boolean where the state is to be storeed
2071 *
2072 * This call snapshots the internal irqchip state of an
2073 * interrupt, returning into @state the bit corresponding to
2074 * stage @which
2075 *
2076 * This function should be called with preemption disabled if the
2077 * interrupt controller has per-cpu registers.
2078 */
2079int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2080 bool *state)
2081{
2082 struct irq_desc *desc;
2083 struct irq_data *data;
2084 struct irq_chip *chip;
2085 unsigned long flags;
2086 int err = -EINVAL;
2087
2088 desc = irq_get_desc_buslock(irq, &flags, 0);
2089 if (!desc)
2090 return err;
2091
2092 data = irq_desc_get_irq_data(desc);
2093
2094 do {
2095 chip = irq_data_get_irq_chip(data);
2096 if (chip->irq_get_irqchip_state)
2097 break;
2098#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2099 data = data->parent_data;
2100#else
2101 data = NULL;
2102#endif
2103 } while (data);
2104
2105 if (data)
2106 err = chip->irq_get_irqchip_state(data, which, state);
2107
2108 irq_put_desc_busunlock(desc, flags);
2109 return err;
2110}
1ee4fb3e 2111EXPORT_SYMBOL_GPL(irq_get_irqchip_state);
1b7047ed
MZ
2112
2113/**
2114 * irq_set_irqchip_state - set the state of a forwarded interrupt.
2115 * @irq: Interrupt line that is forwarded to a VM
2116 * @which: State to be restored (one of IRQCHIP_STATE_*)
2117 * @val: Value corresponding to @which
2118 *
2119 * This call sets the internal irqchip state of an interrupt,
2120 * depending on the value of @which.
2121 *
2122 * This function should be called with preemption disabled if the
2123 * interrupt controller has per-cpu registers.
2124 */
2125int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2126 bool val)
2127{
2128 struct irq_desc *desc;
2129 struct irq_data *data;
2130 struct irq_chip *chip;
2131 unsigned long flags;
2132 int err = -EINVAL;
2133
2134 desc = irq_get_desc_buslock(irq, &flags, 0);
2135 if (!desc)
2136 return err;
2137
2138 data = irq_desc_get_irq_data(desc);
2139
2140 do {
2141 chip = irq_data_get_irq_chip(data);
2142 if (chip->irq_set_irqchip_state)
2143 break;
2144#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2145 data = data->parent_data;
2146#else
2147 data = NULL;
2148#endif
2149 } while (data);
2150
2151 if (data)
2152 err = chip->irq_set_irqchip_state(data, which, val);
2153
2154 irq_put_desc_busunlock(desc, flags);
2155 return err;
2156}
1ee4fb3e 2157EXPORT_SYMBOL_GPL(irq_set_irqchip_state);