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CommitLineData
52a65ff5 1// SPDX-License-Identifier: GPL-2.0
1da177e4 2/*
a34db9b2
IM
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
5 *
6 * This file contains driver APIs to the irq subsystem.
7 */
8
97fd75b7
AM
9#define pr_fmt(fmt) "genirq: " fmt
10
1da177e4 11#include <linux/irq.h>
3aa551c9 12#include <linux/kthread.h>
1da177e4
LT
13#include <linux/module.h>
14#include <linux/random.h>
15#include <linux/interrupt.h>
4001d8e8 16#include <linux/irqdomain.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
0881e7bd 20#include <linux/sched/task.h>
11ea68f5 21#include <linux/sched/isolation.h>
ae7e81c0 22#include <uapi/linux/sched/types.h>
4d1d61a6 23#include <linux/task_work.h>
1da177e4
LT
24
25#include "internals.h"
26
b6a32bbd 27#if defined(CONFIG_IRQ_FORCED_THREADING) && !defined(CONFIG_PREEMPT_RT)
8d32a307 28__read_mostly bool force_irqthreads;
47b82e88 29EXPORT_SYMBOL_GPL(force_irqthreads);
8d32a307
TG
30
31static int __init setup_forced_irqthreads(char *arg)
32{
33 force_irqthreads = true;
34 return 0;
35}
36early_param("threadirqs", setup_forced_irqthreads);
37#endif
38
62e04686 39static void __synchronize_hardirq(struct irq_desc *desc, bool sync_chip)
1da177e4 40{
62e04686 41 struct irq_data *irqd = irq_desc_get_irq_data(desc);
32f4125e 42 bool inprogress;
1da177e4 43
a98ce5c6
HX
44 do {
45 unsigned long flags;
46
47 /*
48 * Wait until we're out of the critical section. This might
49 * give the wrong answer due to the lack of memory barriers.
50 */
32f4125e 51 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
52 cpu_relax();
53
54 /* Ok, that indicated we're done: double-check carefully. */
239007b8 55 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 56 inprogress = irqd_irq_inprogress(&desc->irq_data);
62e04686
TG
57
58 /*
59 * If requested and supported, check at the chip whether it
60 * is in flight at the hardware level, i.e. already pending
61 * in a CPU and waiting for service and acknowledge.
62 */
63 if (!inprogress && sync_chip) {
64 /*
65 * Ignore the return code. inprogress is only updated
66 * when the chip supports it.
67 */
68 __irq_get_irqchip_state(irqd, IRQCHIP_STATE_ACTIVE,
69 &inprogress);
70 }
239007b8 71 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
72
73 /* Oops, that failed? */
32f4125e 74 } while (inprogress);
18258f72
TG
75}
76
77/**
78 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
79 * @irq: interrupt number to wait for
80 *
81 * This function waits for any pending hard IRQ handlers for this
82 * interrupt to complete before returning. If you use this
83 * function while holding a resource the IRQ handler may need you
84 * will deadlock. It does not take associated threaded handlers
85 * into account.
86 *
87 * Do not use this for shutdown scenarios where you must be sure
88 * that all parts (hardirq and threaded handler) have completed.
89 *
02cea395
PZ
90 * Returns: false if a threaded handler is active.
91 *
18258f72 92 * This function may be called - with care - from IRQ context.
62e04686
TG
93 *
94 * It does not check whether there is an interrupt in flight at the
95 * hardware level, but not serviced yet, as this might deadlock when
96 * called with interrupts disabled and the target CPU of the interrupt
97 * is the current CPU.
18258f72 98 */
02cea395 99bool synchronize_hardirq(unsigned int irq)
18258f72
TG
100{
101 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 102
02cea395 103 if (desc) {
62e04686 104 __synchronize_hardirq(desc, false);
02cea395
PZ
105 return !atomic_read(&desc->threads_active);
106 }
107
108 return true;
18258f72
TG
109}
110EXPORT_SYMBOL(synchronize_hardirq);
111
112/**
113 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
114 * @irq: interrupt number to wait for
115 *
116 * This function waits for any pending IRQ handlers for this interrupt
117 * to complete before returning. If you use this function while
118 * holding a resource the IRQ handler may need you will deadlock.
119 *
1d21f2af
TG
120 * Can only be called from preemptible code as it might sleep when
121 * an interrupt thread is associated to @irq.
62e04686
TG
122 *
123 * It optionally makes sure (when the irq chip supports that method)
124 * that the interrupt is not pending in any CPU and waiting for
125 * service.
18258f72
TG
126 */
127void synchronize_irq(unsigned int irq)
128{
129 struct irq_desc *desc = irq_to_desc(irq);
130
131 if (desc) {
62e04686 132 __synchronize_hardirq(desc, true);
18258f72
TG
133 /*
134 * We made sure that no hardirq handler is
135 * running. Now verify that no threaded handlers are
136 * active.
137 */
138 wait_event(desc->wait_for_threads,
139 !atomic_read(&desc->threads_active));
140 }
1da177e4 141}
1da177e4
LT
142EXPORT_SYMBOL(synchronize_irq);
143
3aa551c9
TG
144#ifdef CONFIG_SMP
145cpumask_var_t irq_default_affinity;
146
9c255583 147static bool __irq_can_set_affinity(struct irq_desc *desc)
e019c249
JL
148{
149 if (!desc || !irqd_can_balance(&desc->irq_data) ||
150 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
9c255583
TG
151 return false;
152 return true;
e019c249
JL
153}
154
771ee3b0
TG
155/**
156 * irq_can_set_affinity - Check if the affinity of a given irq can be set
157 * @irq: Interrupt to check
158 *
159 */
160int irq_can_set_affinity(unsigned int irq)
161{
e019c249 162 return __irq_can_set_affinity(irq_to_desc(irq));
771ee3b0
TG
163}
164
9c255583
TG
165/**
166 * irq_can_set_affinity_usr - Check if affinity of a irq can be set from user space
167 * @irq: Interrupt to check
168 *
169 * Like irq_can_set_affinity() above, but additionally checks for the
170 * AFFINITY_MANAGED flag.
171 */
172bool irq_can_set_affinity_usr(unsigned int irq)
173{
174 struct irq_desc *desc = irq_to_desc(irq);
175
176 return __irq_can_set_affinity(desc) &&
177 !irqd_affinity_is_managed(&desc->irq_data);
178}
179
591d2fb0
TG
180/**
181 * irq_set_thread_affinity - Notify irq threads to adjust affinity
182 * @desc: irq descriptor which has affitnity changed
183 *
184 * We just set IRQTF_AFFINITY and delegate the affinity setting
185 * to the interrupt thread itself. We can not call
186 * set_cpus_allowed_ptr() here as we hold desc->lock and this
187 * code can be called from hard interrupt context.
188 */
189void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9 190{
f944b5a7 191 struct irqaction *action;
3aa551c9 192
f944b5a7 193 for_each_action_of_desc(desc, action)
3aa551c9 194 if (action->thread)
591d2fb0 195 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
196}
197
baedb87d 198#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
19e1d4e9
TG
199static void irq_validate_effective_affinity(struct irq_data *data)
200{
19e1d4e9
TG
201 const struct cpumask *m = irq_data_get_effective_affinity_mask(data);
202 struct irq_chip *chip = irq_data_get_irq_chip(data);
203
204 if (!cpumask_empty(m))
205 return;
206 pr_warn_once("irq_chip %s did not update eff. affinity mask of irq %u\n",
207 chip->name, data->irq);
19e1d4e9
TG
208}
209
baedb87d
TG
210static inline void irq_init_effective_affinity(struct irq_data *data,
211 const struct cpumask *mask)
212{
213 cpumask_copy(irq_data_get_effective_affinity_mask(data), mask);
214}
215#else
216static inline void irq_validate_effective_affinity(struct irq_data *data) { }
217static inline void irq_init_effective_affinity(struct irq_data *data,
218 const struct cpumask *mask) { }
219#endif
220
818b0f3b
JL
221int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
222 bool force)
223{
224 struct irq_desc *desc = irq_data_to_desc(data);
225 struct irq_chip *chip = irq_data_get_irq_chip(data);
226 int ret;
227
e43b3b58
TG
228 if (!chip || !chip->irq_set_affinity)
229 return -EINVAL;
230
11ea68f5
ML
231 /*
232 * If this is a managed interrupt and housekeeping is enabled on
233 * it check whether the requested affinity mask intersects with
234 * a housekeeping CPU. If so, then remove the isolated CPUs from
235 * the mask and just keep the housekeeping CPU(s). This prevents
236 * the affinity setter from routing the interrupt to an isolated
237 * CPU to avoid that I/O submitted from a housekeeping CPU causes
238 * interrupts on an isolated one.
239 *
240 * If the masks do not intersect or include online CPU(s) then
241 * keep the requested mask. The isolated target CPUs are only
242 * receiving interrupts when the I/O operation was submitted
243 * directly from them.
244 *
245 * If all housekeeping CPUs in the affinity mask are offline, the
246 * interrupt will be migrated by the CPU hotplug code once a
247 * housekeeping CPU which belongs to the affinity mask comes
248 * online.
249 */
250 if (irqd_affinity_is_managed(data) &&
251 housekeeping_enabled(HK_FLAG_MANAGED_IRQ)) {
252 const struct cpumask *hk_mask, *prog_mask;
253
254 static DEFINE_RAW_SPINLOCK(tmp_mask_lock);
255 static struct cpumask tmp_mask;
256
257 hk_mask = housekeeping_cpumask(HK_FLAG_MANAGED_IRQ);
258
259 raw_spin_lock(&tmp_mask_lock);
260 cpumask_and(&tmp_mask, mask, hk_mask);
261 if (!cpumask_intersects(&tmp_mask, cpu_online_mask))
262 prog_mask = mask;
263 else
264 prog_mask = &tmp_mask;
265 ret = chip->irq_set_affinity(data, prog_mask, force);
266 raw_spin_unlock(&tmp_mask_lock);
267 } else {
268 ret = chip->irq_set_affinity(data, mask, force);
269 }
818b0f3b
JL
270 switch (ret) {
271 case IRQ_SET_MASK_OK:
2cb62547 272 case IRQ_SET_MASK_OK_DONE:
9df872fa 273 cpumask_copy(desc->irq_common_data.affinity, mask);
df561f66 274 fallthrough;
818b0f3b 275 case IRQ_SET_MASK_OK_NOCOPY:
19e1d4e9 276 irq_validate_effective_affinity(data);
818b0f3b
JL
277 irq_set_thread_affinity(desc);
278 ret = 0;
279 }
280
281 return ret;
282}
283
12f47073
TG
284#ifdef CONFIG_GENERIC_PENDING_IRQ
285static inline int irq_set_affinity_pending(struct irq_data *data,
286 const struct cpumask *dest)
287{
288 struct irq_desc *desc = irq_data_to_desc(data);
289
290 irqd_set_move_pending(data);
291 irq_copy_pending(desc, dest);
292 return 0;
293}
294#else
295static inline int irq_set_affinity_pending(struct irq_data *data,
296 const struct cpumask *dest)
297{
298 return -EBUSY;
299}
300#endif
301
302static int irq_try_set_affinity(struct irq_data *data,
303 const struct cpumask *dest, bool force)
304{
305 int ret = irq_do_set_affinity(data, dest, force);
306
307 /*
308 * In case that the underlying vector management is busy and the
309 * architecture supports the generic pending mechanism then utilize
310 * this to avoid returning an error to user space.
311 */
312 if (ret == -EBUSY && !force)
313 ret = irq_set_affinity_pending(data, dest);
314 return ret;
315}
316
baedb87d
TG
317static bool irq_set_affinity_deactivated(struct irq_data *data,
318 const struct cpumask *mask, bool force)
319{
320 struct irq_desc *desc = irq_data_to_desc(data);
321
322 /*
f0c7baca
TG
323 * Handle irq chips which can handle affinity only in activated
324 * state correctly
325 *
baedb87d
TG
326 * If the interrupt is not yet activated, just store the affinity
327 * mask and do not call the chip driver at all. On activation the
328 * driver has to make sure anyway that the interrupt is in a
329 * useable state so startup works.
330 */
f0c7baca
TG
331 if (!IS_ENABLED(CONFIG_IRQ_DOMAIN_HIERARCHY) ||
332 irqd_is_activated(data) || !irqd_affinity_on_activate(data))
baedb87d
TG
333 return false;
334
335 cpumask_copy(desc->irq_common_data.affinity, mask);
336 irq_init_effective_affinity(data, mask);
337 irqd_set(data, IRQD_AFFINITY_SET);
338 return true;
339}
340
01f8fa4f
TG
341int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
342 bool force)
771ee3b0 343{
c2d0c555
DD
344 struct irq_chip *chip = irq_data_get_irq_chip(data);
345 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 346 int ret = 0;
771ee3b0 347
c2d0c555 348 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
349 return -EINVAL;
350
baedb87d
TG
351 if (irq_set_affinity_deactivated(data, mask, force))
352 return 0;
353
12f47073
TG
354 if (irq_can_move_pcntxt(data) && !irqd_is_setaffinity_pending(data)) {
355 ret = irq_try_set_affinity(data, mask, force);
1fa46f1f 356 } else {
c2d0c555 357 irqd_set_move_pending(data);
1fa46f1f 358 irq_copy_pending(desc, mask);
57b150cc 359 }
1fa46f1f 360
cd7eab44
BH
361 if (desc->affinity_notify) {
362 kref_get(&desc->affinity_notify->kref);
df81dfcf
EC
363 if (!schedule_work(&desc->affinity_notify->work)) {
364 /* Work was already scheduled, drop our extra ref */
365 kref_put(&desc->affinity_notify->kref,
366 desc->affinity_notify->release);
367 }
cd7eab44 368 }
c2d0c555
DD
369 irqd_set(data, IRQD_AFFINITY_SET);
370
371 return ret;
372}
373
1d3aec89
JG
374/**
375 * irq_update_affinity_desc - Update affinity management for an interrupt
376 * @irq: The interrupt number to update
377 * @affinity: Pointer to the affinity descriptor
378 *
379 * This interface can be used to configure the affinity management of
380 * interrupts which have been allocated already.
381 *
382 * There are certain limitations on when it may be used - attempts to use it
383 * for when the kernel is configured for generic IRQ reservation mode (in
384 * config GENERIC_IRQ_RESERVATION_MODE) will fail, as it may conflict with
385 * managed/non-managed interrupt accounting. In addition, attempts to use it on
386 * an interrupt which is already started or which has already been configured
387 * as managed will also fail, as these mean invalid init state or double init.
388 */
389int irq_update_affinity_desc(unsigned int irq,
390 struct irq_affinity_desc *affinity)
391{
392 struct irq_desc *desc;
393 unsigned long flags;
394 bool activated;
395 int ret = 0;
396
397 /*
398 * Supporting this with the reservation scheme used by x86 needs
399 * some more thought. Fail it for now.
400 */
401 if (IS_ENABLED(CONFIG_GENERIC_IRQ_RESERVATION_MODE))
402 return -EOPNOTSUPP;
403
404 desc = irq_get_desc_buslock(irq, &flags, 0);
405 if (!desc)
406 return -EINVAL;
407
408 /* Requires the interrupt to be shut down */
409 if (irqd_is_started(&desc->irq_data)) {
410 ret = -EBUSY;
411 goto out_unlock;
412 }
413
414 /* Interrupts which are already managed cannot be modified */
415 if (irqd_affinity_is_managed(&desc->irq_data)) {
416 ret = -EBUSY;
417 goto out_unlock;
418 }
419
420 /*
421 * Deactivate the interrupt. That's required to undo
422 * anything an earlier activation has established.
423 */
424 activated = irqd_is_activated(&desc->irq_data);
425 if (activated)
426 irq_domain_deactivate_irq(&desc->irq_data);
427
428 if (affinity->is_managed) {
429 irqd_set(&desc->irq_data, IRQD_AFFINITY_MANAGED);
430 irqd_set(&desc->irq_data, IRQD_MANAGED_SHUTDOWN);
431 }
432
433 cpumask_copy(desc->irq_common_data.affinity, &affinity->mask);
434
435 /* Restore the activation state */
436 if (activated)
437 irq_domain_activate_irq(&desc->irq_data, false);
438
439out_unlock:
440 irq_put_desc_busunlock(desc, flags);
441 return ret;
442}
443
01f8fa4f 444int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
445{
446 struct irq_desc *desc = irq_to_desc(irq);
447 unsigned long flags;
448 int ret;
449
450 if (!desc)
451 return -EINVAL;
452
453 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 454 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 455 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 456 return ret;
771ee3b0
TG
457}
458
e7a297b0
PWJ
459int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
460{
e7a297b0 461 unsigned long flags;
31d9d9b6 462 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
463
464 if (!desc)
465 return -EINVAL;
e7a297b0 466 desc->affinity_hint = m;
02725e74 467 irq_put_desc_unlock(desc, flags);
e2e64a93 468 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
469 if (m)
470 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
471 return 0;
472}
473EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
474
cd7eab44
BH
475static void irq_affinity_notify(struct work_struct *work)
476{
477 struct irq_affinity_notify *notify =
478 container_of(work, struct irq_affinity_notify, work);
479 struct irq_desc *desc = irq_to_desc(notify->irq);
480 cpumask_var_t cpumask;
481 unsigned long flags;
482
1fa46f1f 483 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
484 goto out;
485
486 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 487 if (irq_move_pending(&desc->irq_data))
1fa46f1f 488 irq_get_pending(cpumask, desc);
cd7eab44 489 else
9df872fa 490 cpumask_copy(cpumask, desc->irq_common_data.affinity);
cd7eab44
BH
491 raw_spin_unlock_irqrestore(&desc->lock, flags);
492
493 notify->notify(notify, cpumask);
494
495 free_cpumask_var(cpumask);
496out:
497 kref_put(&notify->kref, notify->release);
498}
499
500/**
501 * irq_set_affinity_notifier - control notification of IRQ affinity changes
502 * @irq: Interrupt for which to enable/disable notification
503 * @notify: Context for notification, or %NULL to disable
504 * notification. Function pointers must be initialised;
505 * the other fields will be initialised by this function.
506 *
507 * Must be called in process context. Notification may only be enabled
508 * after the IRQ is allocated and must be disabled before the IRQ is
509 * freed using free_irq().
510 */
511int
512irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
513{
514 struct irq_desc *desc = irq_to_desc(irq);
515 struct irq_affinity_notify *old_notify;
516 unsigned long flags;
517
518 /* The release function is promised process context */
519 might_sleep();
520
b525903c 521 if (!desc || desc->istate & IRQS_NMI)
cd7eab44
BH
522 return -EINVAL;
523
524 /* Complete initialisation of *notify */
525 if (notify) {
526 notify->irq = irq;
527 kref_init(&notify->kref);
528 INIT_WORK(&notify->work, irq_affinity_notify);
529 }
530
531 raw_spin_lock_irqsave(&desc->lock, flags);
532 old_notify = desc->affinity_notify;
533 desc->affinity_notify = notify;
534 raw_spin_unlock_irqrestore(&desc->lock, flags);
535
59c39840 536 if (old_notify) {
df81dfcf
EC
537 if (cancel_work_sync(&old_notify->work)) {
538 /* Pending work had a ref, put that one too */
539 kref_put(&old_notify->kref, old_notify->release);
540 }
cd7eab44 541 kref_put(&old_notify->kref, old_notify->release);
59c39840 542 }
cd7eab44
BH
543
544 return 0;
545}
546EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
547
18404756
MK
548#ifndef CONFIG_AUTO_IRQ_AFFINITY
549/*
550 * Generic version of the affinity autoselector.
551 */
43564bd9 552int irq_setup_affinity(struct irq_desc *desc)
18404756 553{
569bda8d 554 struct cpumask *set = irq_default_affinity;
cba4235e
TG
555 int ret, node = irq_desc_get_node(desc);
556 static DEFINE_RAW_SPINLOCK(mask_lock);
557 static struct cpumask mask;
569bda8d 558
b008207c 559 /* Excludes PER_CPU and NO_BALANCE interrupts */
e019c249 560 if (!__irq_can_set_affinity(desc))
18404756
MK
561 return 0;
562
cba4235e 563 raw_spin_lock(&mask_lock);
f6d87f4b 564 /*
9332ef9d 565 * Preserve the managed affinity setting and a userspace affinity
06ee6d57 566 * setup, but make sure that one of the targets is online.
f6d87f4b 567 */
06ee6d57
TG
568 if (irqd_affinity_is_managed(&desc->irq_data) ||
569 irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
9df872fa 570 if (cpumask_intersects(desc->irq_common_data.affinity,
569bda8d 571 cpu_online_mask))
9df872fa 572 set = desc->irq_common_data.affinity;
0c6f8a8b 573 else
2bdd1055 574 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 575 }
18404756 576
cba4235e 577 cpumask_and(&mask, cpu_online_mask, set);
bddda606
SR
578 if (cpumask_empty(&mask))
579 cpumask_copy(&mask, cpu_online_mask);
580
241fc640
PB
581 if (node != NUMA_NO_NODE) {
582 const struct cpumask *nodemask = cpumask_of_node(node);
583
584 /* make sure at least one of the cpus in nodemask is online */
cba4235e
TG
585 if (cpumask_intersects(&mask, nodemask))
586 cpumask_and(&mask, &mask, nodemask);
241fc640 587 }
cba4235e
TG
588 ret = irq_do_set_affinity(&desc->irq_data, &mask, false);
589 raw_spin_unlock(&mask_lock);
590 return ret;
18404756 591}
f6d87f4b 592#else
a8a98eac 593/* Wrapper for ALPHA specific affinity selector magic */
cba4235e 594int irq_setup_affinity(struct irq_desc *desc)
f6d87f4b 595{
cba4235e 596 return irq_select_affinity(irq_desc_get_irq(desc));
f6d87f4b 597}
cba6437a
TG
598#endif /* CONFIG_AUTO_IRQ_AFFINITY */
599#endif /* CONFIG_SMP */
18404756 600
1da177e4 601
fcf1ae2f
FW
602/**
603 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
604 * @irq: interrupt number to set affinity
250a53d6
CD
605 * @vcpu_info: vCPU specific data or pointer to a percpu array of vCPU
606 * specific data for percpu_devid interrupts
fcf1ae2f
FW
607 *
608 * This function uses the vCPU specific data to set the vCPU
609 * affinity for an irq. The vCPU specific data is passed from
610 * outside, such as KVM. One example code path is as below:
611 * KVM -> IOMMU -> irq_set_vcpu_affinity().
612 */
613int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
614{
615 unsigned long flags;
616 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
617 struct irq_data *data;
618 struct irq_chip *chip;
619 int ret = -ENOSYS;
620
621 if (!desc)
622 return -EINVAL;
623
624 data = irq_desc_get_irq_data(desc);
0abce64a
MZ
625 do {
626 chip = irq_data_get_irq_chip(data);
627 if (chip && chip->irq_set_vcpu_affinity)
628 break;
629#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
630 data = data->parent_data;
631#else
632 data = NULL;
633#endif
634 } while (data);
635
636 if (data)
fcf1ae2f
FW
637 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
638 irq_put_desc_unlock(desc, flags);
639
640 return ret;
641}
642EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
643
79ff1cda 644void __disable_irq(struct irq_desc *desc)
0a0c5168 645{
3aae994f 646 if (!desc->depth++)
87923470 647 irq_disable(desc);
0a0c5168
RW
648}
649
02725e74
TG
650static int __disable_irq_nosync(unsigned int irq)
651{
652 unsigned long flags;
31d9d9b6 653 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
654
655 if (!desc)
656 return -EINVAL;
79ff1cda 657 __disable_irq(desc);
02725e74
TG
658 irq_put_desc_busunlock(desc, flags);
659 return 0;
660}
661
1da177e4
LT
662/**
663 * disable_irq_nosync - disable an irq without waiting
664 * @irq: Interrupt to disable
665 *
666 * Disable the selected interrupt line. Disables and Enables are
667 * nested.
668 * Unlike disable_irq(), this function does not ensure existing
669 * instances of the IRQ handler have completed before returning.
670 *
671 * This function may be called from IRQ context.
672 */
673void disable_irq_nosync(unsigned int irq)
674{
02725e74 675 __disable_irq_nosync(irq);
1da177e4 676}
1da177e4
LT
677EXPORT_SYMBOL(disable_irq_nosync);
678
679/**
680 * disable_irq - disable an irq and wait for completion
681 * @irq: Interrupt to disable
682 *
683 * Disable the selected interrupt line. Enables and Disables are
684 * nested.
685 * This function waits for any pending IRQ handlers for this interrupt
686 * to complete before returning. If you use this function while
687 * holding a resource the IRQ handler may need you will deadlock.
688 *
689 * This function may be called - with care - from IRQ context.
690 */
691void disable_irq(unsigned int irq)
692{
02725e74 693 if (!__disable_irq_nosync(irq))
1da177e4
LT
694 synchronize_irq(irq);
695}
1da177e4
LT
696EXPORT_SYMBOL(disable_irq);
697
02cea395
PZ
698/**
699 * disable_hardirq - disables an irq and waits for hardirq completion
700 * @irq: Interrupt to disable
701 *
702 * Disable the selected interrupt line. Enables and Disables are
703 * nested.
704 * This function waits for any pending hard IRQ handlers for this
705 * interrupt to complete before returning. If you use this function while
706 * holding a resource the hard IRQ handler may need you will deadlock.
707 *
708 * When used to optimistically disable an interrupt from atomic context
709 * the return value must be checked.
710 *
711 * Returns: false if a threaded handler is active.
712 *
713 * This function may be called - with care - from IRQ context.
714 */
715bool disable_hardirq(unsigned int irq)
716{
717 if (!__disable_irq_nosync(irq))
718 return synchronize_hardirq(irq);
719
720 return false;
721}
722EXPORT_SYMBOL_GPL(disable_hardirq);
723
b525903c
JT
724/**
725 * disable_nmi_nosync - disable an nmi without waiting
726 * @irq: Interrupt to disable
727 *
728 * Disable the selected interrupt line. Disables and enables are
729 * nested.
730 * The interrupt to disable must have been requested through request_nmi.
731 * Unlike disable_nmi(), this function does not ensure existing
732 * instances of the IRQ handler have completed before returning.
733 */
734void disable_nmi_nosync(unsigned int irq)
735{
736 disable_irq_nosync(irq);
737}
738
79ff1cda 739void __enable_irq(struct irq_desc *desc)
1adb0850
TG
740{
741 switch (desc->depth) {
742 case 0:
0a0c5168 743 err_out:
79ff1cda
JL
744 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
745 irq_desc_get_irq(desc));
1adb0850
TG
746 break;
747 case 1: {
c531e836 748 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 749 goto err_out;
1adb0850 750 /* Prevent probing on this irq: */
1ccb4e61 751 irq_settings_set_noprobe(desc);
201d7f47
TG
752 /*
753 * Call irq_startup() not irq_enable() here because the
754 * interrupt might be marked NOAUTOEN. So irq_startup()
755 * needs to be invoked when it gets enabled the first
756 * time. If it was already started up, then irq_startup()
757 * will invoke irq_enable() under the hood.
758 */
c942cee4 759 irq_startup(desc, IRQ_RESEND, IRQ_START_FORCE);
201d7f47 760 break;
1adb0850
TG
761 }
762 default:
763 desc->depth--;
764 }
765}
766
1da177e4
LT
767/**
768 * enable_irq - enable handling of an irq
769 * @irq: Interrupt to enable
770 *
771 * Undoes the effect of one call to disable_irq(). If this
772 * matches the last disable, processing of interrupts on this
773 * IRQ line is re-enabled.
774 *
70aedd24 775 * This function may be called from IRQ context only when
6b8ff312 776 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
777 */
778void enable_irq(unsigned int irq)
779{
1da177e4 780 unsigned long flags;
31d9d9b6 781 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 782
7d94f7ca 783 if (!desc)
c2b5a251 784 return;
50f7c032
TG
785 if (WARN(!desc->irq_data.chip,
786 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 787 goto out;
2656c366 788
79ff1cda 789 __enable_irq(desc);
02725e74
TG
790out:
791 irq_put_desc_busunlock(desc, flags);
1da177e4 792}
1da177e4
LT
793EXPORT_SYMBOL(enable_irq);
794
b525903c
JT
795/**
796 * enable_nmi - enable handling of an nmi
797 * @irq: Interrupt to enable
798 *
799 * The interrupt to enable must have been requested through request_nmi.
800 * Undoes the effect of one call to disable_nmi(). If this
801 * matches the last disable, processing of interrupts on this
802 * IRQ line is re-enabled.
803 */
804void enable_nmi(unsigned int irq)
805{
806 enable_irq(irq);
807}
808
0c5d1eb7 809static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 810{
08678b08 811 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
812 int ret = -ENXIO;
813
60f96b41
SS
814 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
815 return 0;
816
2f7e99bb
TG
817 if (desc->irq_data.chip->irq_set_wake)
818 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
819
820 return ret;
821}
822
ba9a2331 823/**
a0cd9ca2 824 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
825 * @irq: interrupt to control
826 * @on: enable/disable power management wakeup
827 *
15a647eb
DB
828 * Enable/disable power management wakeup mode, which is
829 * disabled by default. Enables and disables must match,
830 * just as they match for non-wakeup mode support.
831 *
832 * Wakeup mode lets this IRQ wake the system from sleep
833 * states like "suspend to RAM".
f9f21cea
SB
834 *
835 * Note: irq enable/disable state is completely orthogonal
836 * to the enable/disable state of irq wake. An irq can be
837 * disabled with disable_irq() and still wake the system as
838 * long as the irq has wake enabled. If this does not hold,
839 * then the underlying irq chip and the related driver need
840 * to be investigated.
ba9a2331 841 */
a0cd9ca2 842int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 843{
ba9a2331 844 unsigned long flags;
31d9d9b6 845 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 846 int ret = 0;
ba9a2331 847
13863a66
JJ
848 if (!desc)
849 return -EINVAL;
850
b525903c
JT
851 /* Don't use NMIs as wake up interrupts please */
852 if (desc->istate & IRQS_NMI) {
853 ret = -EINVAL;
854 goto out_unlock;
855 }
856
15a647eb
DB
857 /* wakeup-capable irqs can be shared between drivers that
858 * don't need to have the same sleep mode behaviors.
859 */
15a647eb 860 if (on) {
2db87321
UKK
861 if (desc->wake_depth++ == 0) {
862 ret = set_irq_wake_real(irq, on);
863 if (ret)
864 desc->wake_depth = 0;
865 else
7f94226f 866 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 867 }
15a647eb
DB
868 } else {
869 if (desc->wake_depth == 0) {
7a2c4770 870 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
871 } else if (--desc->wake_depth == 0) {
872 ret = set_irq_wake_real(irq, on);
873 if (ret)
874 desc->wake_depth = 1;
875 else
7f94226f 876 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 877 }
15a647eb 878 }
b525903c
JT
879
880out_unlock:
02725e74 881 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
882 return ret;
883}
a0cd9ca2 884EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 885
1da177e4
LT
886/*
887 * Internal function that tells the architecture code whether a
888 * particular irq has been exclusively allocated or is available
889 * for driver use.
890 */
891int can_request_irq(unsigned int irq, unsigned long irqflags)
892{
cc8c3b78 893 unsigned long flags;
31d9d9b6 894 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 895 int canrequest = 0;
1da177e4 896
7d94f7ca
YL
897 if (!desc)
898 return 0;
899
02725e74 900 if (irq_settings_can_request(desc)) {
2779db8d
BH
901 if (!desc->action ||
902 irqflags & desc->action->flags & IRQF_SHARED)
903 canrequest = 1;
02725e74
TG
904 }
905 irq_put_desc_unlock(desc, flags);
906 return canrequest;
1da177e4
LT
907}
908
a1ff541a 909int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
82736f4d 910{
6b8ff312 911 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 912 int ret, unmask = 0;
82736f4d 913
b2ba2c30 914 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
915 /*
916 * IRQF_TRIGGER_* but the PIC does not support multiple
917 * flow-types?
918 */
a1ff541a
JL
919 pr_debug("No set_type function for IRQ %d (%s)\n",
920 irq_desc_get_irq(desc),
f5d89470 921 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
922 return 0;
923 }
924
d4d5e089 925 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 926 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 927 mask_irq(desc);
32f4125e 928 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
929 unmask = 1;
930 }
931
00b992de
AK
932 /* Mask all flags except trigger mode */
933 flags &= IRQ_TYPE_SENSE_MASK;
b2ba2c30 934 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 935
876dbd4c
TG
936 switch (ret) {
937 case IRQ_SET_MASK_OK:
2cb62547 938 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
939 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
940 irqd_set(&desc->irq_data, flags);
df561f66 941 fallthrough;
876dbd4c
TG
942
943 case IRQ_SET_MASK_OK_NOCOPY:
944 flags = irqd_get_trigger_type(&desc->irq_data);
945 irq_settings_set_trigger_mask(desc, flags);
946 irqd_clear(&desc->irq_data, IRQD_LEVEL);
947 irq_settings_clr_level(desc);
948 if (flags & IRQ_TYPE_LEVEL_MASK) {
949 irq_settings_set_level(desc);
950 irqd_set(&desc->irq_data, IRQD_LEVEL);
951 }
46732475 952
d4d5e089 953 ret = 0;
8fff39e0 954 break;
876dbd4c 955 default:
d75f773c 956 pr_err("Setting trigger mode %lu for irq %u failed (%pS)\n",
a1ff541a 957 flags, irq_desc_get_irq(desc), chip->irq_set_type);
0c5d1eb7 958 }
d4d5e089
TG
959 if (unmask)
960 unmask_irq(desc);
82736f4d
UKK
961 return ret;
962}
963
293a7a0a
TG
964#ifdef CONFIG_HARDIRQS_SW_RESEND
965int irq_set_parent(int irq, int parent_irq)
966{
967 unsigned long flags;
968 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
969
970 if (!desc)
971 return -EINVAL;
972
973 desc->parent_irq = parent_irq;
974
975 irq_put_desc_unlock(desc, flags);
976 return 0;
977}
3118dac5 978EXPORT_SYMBOL_GPL(irq_set_parent);
293a7a0a
TG
979#endif
980
b25c340c
TG
981/*
982 * Default primary interrupt handler for threaded interrupts. Is
983 * assigned as primary handler when request_threaded_irq is called
984 * with handler == NULL. Useful for oneshot interrupts.
985 */
986static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
987{
988 return IRQ_WAKE_THREAD;
989}
990
399b5da2
TG
991/*
992 * Primary handler for nested threaded interrupts. Should never be
993 * called.
994 */
995static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
996{
997 WARN(1, "Primary handler called for nested irq %d\n", irq);
998 return IRQ_NONE;
999}
1000
2a1d3ab8
TG
1001static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id)
1002{
1003 WARN(1, "Secondary action handler called for irq %d\n", irq);
1004 return IRQ_NONE;
1005}
1006
3aa551c9
TG
1007static int irq_wait_for_interrupt(struct irqaction *action)
1008{
519cc865
LW
1009 for (;;) {
1010 set_current_state(TASK_INTERRUPTIBLE);
550acb19 1011
519cc865
LW
1012 if (kthread_should_stop()) {
1013 /* may need to run one last time */
1014 if (test_and_clear_bit(IRQTF_RUNTHREAD,
1015 &action->thread_flags)) {
1016 __set_current_state(TASK_RUNNING);
1017 return 0;
1018 }
1019 __set_current_state(TASK_RUNNING);
1020 return -1;
1021 }
f48fe81e
TG
1022
1023 if (test_and_clear_bit(IRQTF_RUNTHREAD,
1024 &action->thread_flags)) {
3aa551c9
TG
1025 __set_current_state(TASK_RUNNING);
1026 return 0;
f48fe81e
TG
1027 }
1028 schedule();
3aa551c9 1029 }
3aa551c9
TG
1030}
1031
b25c340c
TG
1032/*
1033 * Oneshot interrupts keep the irq line masked until the threaded
1034 * handler finished. unmask if the interrupt has not been disabled and
1035 * is marked MASKED.
1036 */
b5faba21 1037static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 1038 struct irqaction *action)
b25c340c 1039{
2a1d3ab8
TG
1040 if (!(desc->istate & IRQS_ONESHOT) ||
1041 action->handler == irq_forced_secondary_handler)
b5faba21 1042 return;
0b1adaa0 1043again:
3876ec9e 1044 chip_bus_lock(desc);
239007b8 1045 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
1046
1047 /*
1048 * Implausible though it may be we need to protect us against
1049 * the following scenario:
1050 *
1051 * The thread is faster done than the hard interrupt handler
1052 * on the other CPU. If we unmask the irq line then the
1053 * interrupt can come in again and masks the line, leaves due
009b4c3b 1054 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
1055 *
1056 * This also serializes the state of shared oneshot handlers
1057 * versus "desc->threads_onehsot |= action->thread_mask;" in
1058 * irq_wake_thread(). See the comment there which explains the
1059 * serialization.
0b1adaa0 1060 */
32f4125e 1061 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 1062 raw_spin_unlock_irq(&desc->lock);
3876ec9e 1063 chip_bus_sync_unlock(desc);
0b1adaa0
TG
1064 cpu_relax();
1065 goto again;
1066 }
1067
b5faba21
TG
1068 /*
1069 * Now check again, whether the thread should run. Otherwise
1070 * we would clear the threads_oneshot bit of this thread which
1071 * was just set.
1072 */
f3f79e38 1073 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
1074 goto out_unlock;
1075
1076 desc->threads_oneshot &= ~action->thread_mask;
1077
32f4125e
TG
1078 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
1079 irqd_irq_masked(&desc->irq_data))
328a4978 1080 unmask_threaded_irq(desc);
32f4125e 1081
b5faba21 1082out_unlock:
239007b8 1083 raw_spin_unlock_irq(&desc->lock);
3876ec9e 1084 chip_bus_sync_unlock(desc);
b25c340c
TG
1085}
1086
61f38261 1087#ifdef CONFIG_SMP
591d2fb0 1088/*
b04c644e 1089 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
1090 */
1091static void
1092irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
1093{
1094 cpumask_var_t mask;
04aa530e 1095 bool valid = true;
591d2fb0
TG
1096
1097 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
1098 return;
1099
1100 /*
1101 * In case we are out of memory we set IRQTF_AFFINITY again and
1102 * try again next time
1103 */
1104 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
1105 set_bit(IRQTF_AFFINITY, &action->thread_flags);
1106 return;
1107 }
1108
239007b8 1109 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
1110 /*
1111 * This code is triggered unconditionally. Check the affinity
1112 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
1113 */
cbf86999
TG
1114 if (cpumask_available(desc->irq_common_data.affinity)) {
1115 const struct cpumask *m;
1116
1117 m = irq_data_get_effective_affinity_mask(&desc->irq_data);
1118 cpumask_copy(mask, m);
1119 } else {
04aa530e 1120 valid = false;
cbf86999 1121 }
239007b8 1122 raw_spin_unlock_irq(&desc->lock);
591d2fb0 1123
04aa530e
TG
1124 if (valid)
1125 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
1126 free_cpumask_var(mask);
1127}
61f38261
BP
1128#else
1129static inline void
1130irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
1131#endif
591d2fb0 1132
8d32a307 1133/*
c5f48c0a 1134 * Interrupts which are not explicitly requested as threaded
8d32a307
TG
1135 * interrupts rely on the implicit bh/preempt disable of the hard irq
1136 * context. So we need to disable bh here to avoid deadlocks and other
1137 * side effects.
1138 */
3a43e05f 1139static irqreturn_t
8d32a307
TG
1140irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
1141{
3a43e05f
SAS
1142 irqreturn_t ret;
1143
8d32a307 1144 local_bh_disable();
3a43e05f 1145 ret = action->thread_fn(action->irq, action->dev_id);
746a923b
LW
1146 if (ret == IRQ_HANDLED)
1147 atomic_inc(&desc->threads_handled);
1148
f3f79e38 1149 irq_finalize_oneshot(desc, action);
8d32a307 1150 local_bh_enable();
3a43e05f 1151 return ret;
8d32a307
TG
1152}
1153
1154/*
f788e7bf 1155 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
1156 * preemtible - many of them need to sleep and wait for slow busses to
1157 * complete.
1158 */
3a43e05f
SAS
1159static irqreturn_t irq_thread_fn(struct irq_desc *desc,
1160 struct irqaction *action)
8d32a307 1161{
3a43e05f
SAS
1162 irqreturn_t ret;
1163
1164 ret = action->thread_fn(action->irq, action->dev_id);
746a923b
LW
1165 if (ret == IRQ_HANDLED)
1166 atomic_inc(&desc->threads_handled);
1167
f3f79e38 1168 irq_finalize_oneshot(desc, action);
3a43e05f 1169 return ret;
8d32a307
TG
1170}
1171
7140ea19
IY
1172static void wake_threads_waitq(struct irq_desc *desc)
1173{
c685689f 1174 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
1175 wake_up(&desc->wait_for_threads);
1176}
1177
67d12145 1178static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
1179{
1180 struct task_struct *tsk = current;
1181 struct irq_desc *desc;
1182 struct irqaction *action;
1183
1184 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
1185 return;
1186
1187 action = kthread_data(tsk);
1188
fb21affa 1189 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 1190 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
1191
1192
1193 desc = irq_to_desc(action->irq);
1194 /*
1195 * If IRQTF_RUNTHREAD is set, we need to decrement
1196 * desc->threads_active and wake possible waiters.
1197 */
1198 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
1199 wake_threads_waitq(desc);
1200
1201 /* Prevent a stale desc->threads_oneshot */
1202 irq_finalize_oneshot(desc, action);
1203}
1204
2a1d3ab8
TG
1205static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action)
1206{
1207 struct irqaction *secondary = action->secondary;
1208
1209 if (WARN_ON_ONCE(!secondary))
1210 return;
1211
1212 raw_spin_lock_irq(&desc->lock);
1213 __irq_wake_thread(desc, secondary);
1214 raw_spin_unlock_irq(&desc->lock);
1215}
1216
3aa551c9
TG
1217/*
1218 * Interrupt handler thread
1219 */
1220static int irq_thread(void *data)
1221{
67d12145 1222 struct callback_head on_exit_work;
3aa551c9
TG
1223 struct irqaction *action = data;
1224 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
1225 irqreturn_t (*handler_fn)(struct irq_desc *desc,
1226 struct irqaction *action);
3aa551c9 1227
540b60e2 1228 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
1229 &action->thread_flags))
1230 handler_fn = irq_forced_thread_fn;
1231 else
1232 handler_fn = irq_thread_fn;
1233
41f9d29f 1234 init_task_work(&on_exit_work, irq_thread_dtor);
91989c70 1235 task_work_add(current, &on_exit_work, TWA_NONE);
3aa551c9 1236
f3de44ed
SM
1237 irq_thread_check_affinity(desc, action);
1238
3aa551c9 1239 while (!irq_wait_for_interrupt(action)) {
7140ea19 1240 irqreturn_t action_ret;
3aa551c9 1241
591d2fb0
TG
1242 irq_thread_check_affinity(desc, action);
1243
7140ea19 1244 action_ret = handler_fn(desc, action);
2a1d3ab8
TG
1245 if (action_ret == IRQ_WAKE_THREAD)
1246 irq_wake_secondary(desc, action);
3aa551c9 1247
7140ea19 1248 wake_threads_waitq(desc);
3aa551c9
TG
1249 }
1250
7140ea19
IY
1251 /*
1252 * This is the regular exit path. __free_irq() is stopping the
1253 * thread via kthread_stop() after calling
519cc865 1254 * synchronize_hardirq(). So neither IRQTF_RUNTHREAD nor the
836557bd 1255 * oneshot mask bit can be set.
3aa551c9 1256 */
4d1d61a6 1257 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
1258 return 0;
1259}
1260
a92444c6
TG
1261/**
1262 * irq_wake_thread - wake the irq thread for the action identified by dev_id
1263 * @irq: Interrupt line
1264 * @dev_id: Device identity for which the thread should be woken
1265 *
1266 */
1267void irq_wake_thread(unsigned int irq, void *dev_id)
1268{
1269 struct irq_desc *desc = irq_to_desc(irq);
1270 struct irqaction *action;
1271 unsigned long flags;
1272
1273 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1274 return;
1275
1276 raw_spin_lock_irqsave(&desc->lock, flags);
f944b5a7 1277 for_each_action_of_desc(desc, action) {
a92444c6
TG
1278 if (action->dev_id == dev_id) {
1279 if (action->thread)
1280 __irq_wake_thread(desc, action);
1281 break;
1282 }
1283 }
1284 raw_spin_unlock_irqrestore(&desc->lock, flags);
1285}
1286EXPORT_SYMBOL_GPL(irq_wake_thread);
1287
2a1d3ab8 1288static int irq_setup_forced_threading(struct irqaction *new)
8d32a307
TG
1289{
1290 if (!force_irqthreads)
2a1d3ab8 1291 return 0;
8d32a307 1292 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
2a1d3ab8 1293 return 0;
8d32a307 1294
d1f0301b
TG
1295 /*
1296 * No further action required for interrupts which are requested as
1297 * threaded interrupts already
1298 */
1299 if (new->handler == irq_default_primary_handler)
1300 return 0;
1301
8d32a307
TG
1302 new->flags |= IRQF_ONESHOT;
1303
2a1d3ab8
TG
1304 /*
1305 * Handle the case where we have a real primary handler and a
1306 * thread handler. We force thread them as well by creating a
1307 * secondary action.
1308 */
d1f0301b 1309 if (new->handler && new->thread_fn) {
2a1d3ab8
TG
1310 /* Allocate the secondary action */
1311 new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1312 if (!new->secondary)
1313 return -ENOMEM;
1314 new->secondary->handler = irq_forced_secondary_handler;
1315 new->secondary->thread_fn = new->thread_fn;
1316 new->secondary->dev_id = new->dev_id;
1317 new->secondary->irq = new->irq;
1318 new->secondary->name = new->name;
8d32a307 1319 }
2a1d3ab8
TG
1320 /* Deal with the primary handler */
1321 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
1322 new->thread_fn = new->handler;
1323 new->handler = irq_default_primary_handler;
1324 return 0;
8d32a307
TG
1325}
1326
c1bacbae
TG
1327static int irq_request_resources(struct irq_desc *desc)
1328{
1329 struct irq_data *d = &desc->irq_data;
1330 struct irq_chip *c = d->chip;
1331
1332 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1333}
1334
1335static void irq_release_resources(struct irq_desc *desc)
1336{
1337 struct irq_data *d = &desc->irq_data;
1338 struct irq_chip *c = d->chip;
1339
1340 if (c->irq_release_resources)
1341 c->irq_release_resources(d);
1342}
1343
b525903c
JT
1344static bool irq_supports_nmi(struct irq_desc *desc)
1345{
1346 struct irq_data *d = irq_desc_get_irq_data(desc);
1347
1348#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1349 /* Only IRQs directly managed by the root irqchip can be set as NMI */
1350 if (d->parent_data)
1351 return false;
1352#endif
1353 /* Don't support NMIs for chips behind a slow bus */
1354 if (d->chip->irq_bus_lock || d->chip->irq_bus_sync_unlock)
1355 return false;
1356
1357 return d->chip->flags & IRQCHIP_SUPPORTS_NMI;
1358}
1359
1360static int irq_nmi_setup(struct irq_desc *desc)
1361{
1362 struct irq_data *d = irq_desc_get_irq_data(desc);
1363 struct irq_chip *c = d->chip;
1364
1365 return c->irq_nmi_setup ? c->irq_nmi_setup(d) : -EINVAL;
1366}
1367
1368static void irq_nmi_teardown(struct irq_desc *desc)
1369{
1370 struct irq_data *d = irq_desc_get_irq_data(desc);
1371 struct irq_chip *c = d->chip;
1372
1373 if (c->irq_nmi_teardown)
1374 c->irq_nmi_teardown(d);
1375}
1376
2a1d3ab8
TG
1377static int
1378setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary)
1379{
1380 struct task_struct *t;
2a1d3ab8
TG
1381
1382 if (!secondary) {
1383 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1384 new->name);
1385 } else {
1386 t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq,
1387 new->name);
2a1d3ab8
TG
1388 }
1389
1390 if (IS_ERR(t))
1391 return PTR_ERR(t);
1392
7a40798c 1393 sched_set_fifo(t);
2a1d3ab8
TG
1394
1395 /*
1396 * We keep the reference to the task struct even if
1397 * the thread dies to avoid that the interrupt code
1398 * references an already freed task_struct.
1399 */
7b3c92b8 1400 new->thread = get_task_struct(t);
2a1d3ab8
TG
1401 /*
1402 * Tell the thread to set its affinity. This is
1403 * important for shared interrupt handlers as we do
1404 * not invoke setup_affinity() for the secondary
1405 * handlers as everything is already set up. Even for
1406 * interrupts marked with IRQF_NO_BALANCE this is
1407 * correct as we want the thread to move to the cpu(s)
1408 * on which the requesting code placed the interrupt.
1409 */
1410 set_bit(IRQTF_AFFINITY, &new->thread_flags);
1411 return 0;
1412}
1413
1da177e4
LT
1414/*
1415 * Internal function to register an irqaction - typically used to
1416 * allocate special interrupts that are part of the architecture.
19d39a38
TG
1417 *
1418 * Locking rules:
1419 *
1420 * desc->request_mutex Provides serialization against a concurrent free_irq()
1421 * chip_bus_lock Provides serialization for slow bus operations
1422 * desc->lock Provides serialization against hard interrupts
1423 *
1424 * chip_bus_lock and desc->lock are sufficient for all other management and
1425 * interrupt related functions. desc->request_mutex solely serializes
1426 * request/free_irq().
1da177e4 1427 */
d3c60047 1428static int
327ec569 1429__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1430{
f17c7545 1431 struct irqaction *old, **old_ptr;
b5faba21 1432 unsigned long flags, thread_mask = 0;
3b8249e7 1433 int ret, nested, shared = 0;
1da177e4 1434
7d94f7ca 1435 if (!desc)
c2b5a251
MW
1436 return -EINVAL;
1437
6b8ff312 1438 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1439 return -ENOSYS;
b6873807
SAS
1440 if (!try_module_get(desc->owner))
1441 return -ENODEV;
1da177e4 1442
2a1d3ab8
TG
1443 new->irq = irq;
1444
4b357dae
JH
1445 /*
1446 * If the trigger type is not specified by the caller,
1447 * then use the default for this interrupt.
1448 */
1449 if (!(new->flags & IRQF_TRIGGER_MASK))
1450 new->flags |= irqd_get_trigger_type(&desc->irq_data);
1451
3aa551c9 1452 /*
399b5da2
TG
1453 * Check whether the interrupt nests into another interrupt
1454 * thread.
1455 */
1ccb4e61 1456 nested = irq_settings_is_nested_thread(desc);
399b5da2 1457 if (nested) {
b6873807
SAS
1458 if (!new->thread_fn) {
1459 ret = -EINVAL;
1460 goto out_mput;
1461 }
399b5da2
TG
1462 /*
1463 * Replace the primary handler which was provided from
1464 * the driver for non nested interrupt handling by the
1465 * dummy function which warns when called.
1466 */
1467 new->handler = irq_nested_primary_handler;
8d32a307 1468 } else {
2a1d3ab8
TG
1469 if (irq_settings_can_thread(desc)) {
1470 ret = irq_setup_forced_threading(new);
1471 if (ret)
1472 goto out_mput;
1473 }
399b5da2
TG
1474 }
1475
3aa551c9 1476 /*
399b5da2
TG
1477 * Create a handler thread when a thread function is supplied
1478 * and the interrupt does not nest into another interrupt
1479 * thread.
3aa551c9 1480 */
399b5da2 1481 if (new->thread_fn && !nested) {
2a1d3ab8
TG
1482 ret = setup_irq_thread(new, irq, false);
1483 if (ret)
b6873807 1484 goto out_mput;
2a1d3ab8
TG
1485 if (new->secondary) {
1486 ret = setup_irq_thread(new->secondary, irq, true);
1487 if (ret)
1488 goto out_thread;
b6873807 1489 }
3aa551c9
TG
1490 }
1491
dc9b229a
TG
1492 /*
1493 * Drivers are often written to work w/o knowledge about the
1494 * underlying irq chip implementation, so a request for a
1495 * threaded irq without a primary hard irq context handler
1496 * requires the ONESHOT flag to be set. Some irq chips like
1497 * MSI based interrupts are per se one shot safe. Check the
1498 * chip flags, so we can avoid the unmask dance at the end of
1499 * the threaded handler for those.
1500 */
1501 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1502 new->flags &= ~IRQF_ONESHOT;
1503
19d39a38
TG
1504 /*
1505 * Protects against a concurrent __free_irq() call which might wait
519cc865 1506 * for synchronize_hardirq() to complete without holding the optional
836557bd
LW
1507 * chip bus lock and desc->lock. Also protects against handing out
1508 * a recycled oneshot thread_mask bit while it's still in use by
1509 * its previous owner.
19d39a38 1510 */
9114014c 1511 mutex_lock(&desc->request_mutex);
19d39a38
TG
1512
1513 /*
1514 * Acquire bus lock as the irq_request_resources() callback below
1515 * might rely on the serialization or the magic power management
1516 * functions which are abusing the irq_bus_lock() callback,
1517 */
1518 chip_bus_lock(desc);
1519
1520 /* First installed action requests resources. */
46e48e25
TG
1521 if (!desc->action) {
1522 ret = irq_request_resources(desc);
1523 if (ret) {
1524 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1525 new->name, irq, desc->irq_data.chip->name);
19d39a38 1526 goto out_bus_unlock;
46e48e25
TG
1527 }
1528 }
9114014c 1529
1da177e4
LT
1530 /*
1531 * The following block of code has to be executed atomically
19d39a38
TG
1532 * protected against a concurrent interrupt and any of the other
1533 * management calls which are not serialized via
1534 * desc->request_mutex or the optional bus lock.
1da177e4 1535 */
239007b8 1536 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1537 old_ptr = &desc->action;
1538 old = *old_ptr;
06fcb0c6 1539 if (old) {
e76de9f8
TG
1540 /*
1541 * Can't share interrupts unless both agree to and are
1542 * the same type (level, edge, polarity). So both flag
3cca53b0 1543 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1544 * set the trigger type must match. Also all must
1545 * agree on ONESHOT.
b525903c 1546 * Interrupt lines used for NMIs cannot be shared.
e76de9f8 1547 */
4f8413a3
MZ
1548 unsigned int oldtype;
1549
b525903c
JT
1550 if (desc->istate & IRQS_NMI) {
1551 pr_err("Invalid attempt to share NMI for %s (irq %d) on irqchip %s.\n",
1552 new->name, irq, desc->irq_data.chip->name);
1553 ret = -EINVAL;
1554 goto out_unlock;
1555 }
1556
4f8413a3
MZ
1557 /*
1558 * If nobody did set the configuration before, inherit
1559 * the one provided by the requester.
1560 */
1561 if (irqd_trigger_type_was_set(&desc->irq_data)) {
1562 oldtype = irqd_get_trigger_type(&desc->irq_data);
1563 } else {
1564 oldtype = new->flags & IRQF_TRIGGER_MASK;
1565 irqd_set_trigger_type(&desc->irq_data, oldtype);
1566 }
382bd4de 1567
3cca53b0 1568 if (!((old->flags & new->flags) & IRQF_SHARED) ||
382bd4de 1569 (oldtype != (new->flags & IRQF_TRIGGER_MASK)) ||
f5d89470 1570 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1571 goto mismatch;
1572
f5163427 1573 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1574 if ((old->flags & IRQF_PERCPU) !=
1575 (new->flags & IRQF_PERCPU))
f5163427 1576 goto mismatch;
1da177e4
LT
1577
1578 /* add new interrupt at end of irq queue */
1579 do {
52abb700
TG
1580 /*
1581 * Or all existing action->thread_mask bits,
1582 * so we can find the next zero bit for this
1583 * new action.
1584 */
b5faba21 1585 thread_mask |= old->thread_mask;
f17c7545
IM
1586 old_ptr = &old->next;
1587 old = *old_ptr;
1da177e4
LT
1588 } while (old);
1589 shared = 1;
1590 }
1591
b5faba21 1592 /*
52abb700
TG
1593 * Setup the thread mask for this irqaction for ONESHOT. For
1594 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1595 * conditional in irq_wake_thread().
b5faba21 1596 */
52abb700
TG
1597 if (new->flags & IRQF_ONESHOT) {
1598 /*
1599 * Unlikely to have 32 resp 64 irqs sharing one line,
1600 * but who knows.
1601 */
1602 if (thread_mask == ~0UL) {
1603 ret = -EBUSY;
cba4235e 1604 goto out_unlock;
52abb700
TG
1605 }
1606 /*
1607 * The thread_mask for the action is or'ed to
1608 * desc->thread_active to indicate that the
1609 * IRQF_ONESHOT thread handler has been woken, but not
1610 * yet finished. The bit is cleared when a thread
1611 * completes. When all threads of a shared interrupt
1612 * line have completed desc->threads_active becomes
1613 * zero and the interrupt line is unmasked. See
1614 * handle.c:irq_wake_thread() for further information.
1615 *
1616 * If no thread is woken by primary (hard irq context)
1617 * interrupt handlers, then desc->threads_active is
1618 * also checked for zero to unmask the irq line in the
1619 * affected hard irq flow handlers
1620 * (handle_[fasteoi|level]_irq).
1621 *
1622 * The new action gets the first zero bit of
1623 * thread_mask assigned. See the loop above which or's
1624 * all existing action->thread_mask bits.
1625 */
ffc661c9 1626 new->thread_mask = 1UL << ffz(thread_mask);
1c6c6952 1627
dc9b229a
TG
1628 } else if (new->handler == irq_default_primary_handler &&
1629 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1630 /*
1631 * The interrupt was requested with handler = NULL, so
1632 * we use the default primary handler for it. But it
1633 * does not have the oneshot flag set. In combination
1634 * with level interrupts this is deadly, because the
1635 * default primary handler just wakes the thread, then
1636 * the irq lines is reenabled, but the device still
1637 * has the level irq asserted. Rinse and repeat....
1638 *
1639 * While this works for edge type interrupts, we play
1640 * it safe and reject unconditionally because we can't
1641 * say for sure which type this interrupt really
1642 * has. The type flags are unreliable as the
1643 * underlying chip implementation can override them.
1644 */
025af39b
LC
1645 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for %s (irq %d)\n",
1646 new->name, irq);
1c6c6952 1647 ret = -EINVAL;
cba4235e 1648 goto out_unlock;
b5faba21 1649 }
b5faba21 1650
1da177e4 1651 if (!shared) {
3aa551c9
TG
1652 init_waitqueue_head(&desc->wait_for_threads);
1653
e76de9f8 1654 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1655 if (new->flags & IRQF_TRIGGER_MASK) {
a1ff541a
JL
1656 ret = __irq_set_trigger(desc,
1657 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1658
19d39a38 1659 if (ret)
cba4235e 1660 goto out_unlock;
091738a2 1661 }
6a6de9ef 1662
c942cee4
TG
1663 /*
1664 * Activate the interrupt. That activation must happen
1665 * independently of IRQ_NOAUTOEN. request_irq() can fail
1666 * and the callers are supposed to handle
1667 * that. enable_irq() of an interrupt requested with
1668 * IRQ_NOAUTOEN is not supposed to fail. The activation
1669 * keeps it in shutdown mode, it merily associates
1670 * resources if necessary and if that's not possible it
1671 * fails. Interrupts which are in managed shutdown mode
1672 * will simply ignore that activation request.
1673 */
1674 ret = irq_activate(desc);
1675 if (ret)
1676 goto out_unlock;
1677
009b4c3b 1678 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1679 IRQS_ONESHOT | IRQS_WAITING);
1680 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1681
a005677b
TG
1682 if (new->flags & IRQF_PERCPU) {
1683 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1684 irq_settings_set_per_cpu(desc);
1685 }
6a58fb3b 1686
b25c340c 1687 if (new->flags & IRQF_ONESHOT)
3d67baec 1688 desc->istate |= IRQS_ONESHOT;
b25c340c 1689
2e051552
TG
1690 /* Exclude IRQ from balancing if requested */
1691 if (new->flags & IRQF_NOBALANCING) {
1692 irq_settings_set_no_balancing(desc);
1693 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1694 }
1695
04c848d3 1696 if (irq_settings_can_autoenable(desc)) {
4cde9c6b 1697 irq_startup(desc, IRQ_RESEND, IRQ_START_COND);
04c848d3
TG
1698 } else {
1699 /*
1700 * Shared interrupts do not go well with disabling
1701 * auto enable. The sharing interrupt might request
1702 * it while it's still disabled and then wait for
1703 * interrupts forever.
1704 */
1705 WARN_ON_ONCE(new->flags & IRQF_SHARED);
e76de9f8
TG
1706 /* Undo nested disables: */
1707 desc->depth = 1;
04c848d3 1708 }
18404756 1709
876dbd4c
TG
1710 } else if (new->flags & IRQF_TRIGGER_MASK) {
1711 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
7ee7e87d 1712 unsigned int omsk = irqd_get_trigger_type(&desc->irq_data);
876dbd4c
TG
1713
1714 if (nmsk != omsk)
1715 /* hope the handler works with current trigger mode */
a395d6a7 1716 pr_warn("irq %d uses trigger mode %u; requested %u\n",
7ee7e87d 1717 irq, omsk, nmsk);
1da177e4 1718 }
82736f4d 1719
f17c7545 1720 *old_ptr = new;
82736f4d 1721
cab303be
TG
1722 irq_pm_install_action(desc, new);
1723
8528b0f1
LT
1724 /* Reset broken irq detection when installing new handler */
1725 desc->irq_count = 0;
1726 desc->irqs_unhandled = 0;
1adb0850
TG
1727
1728 /*
1729 * Check whether we disabled the irq via the spurious handler
1730 * before. Reenable it and give it another chance.
1731 */
7acdd53e
TG
1732 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1733 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
79ff1cda 1734 __enable_irq(desc);
1adb0850
TG
1735 }
1736
239007b8 1737 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a90795e 1738 chip_bus_sync_unlock(desc);
9114014c 1739 mutex_unlock(&desc->request_mutex);
1da177e4 1740
b2d3d61a
DL
1741 irq_setup_timings(desc, new);
1742
69ab8494
TG
1743 /*
1744 * Strictly no need to wake it up, but hung_task complains
1745 * when no hard interrupt wakes the thread up.
1746 */
1747 if (new->thread)
1748 wake_up_process(new->thread);
2a1d3ab8
TG
1749 if (new->secondary)
1750 wake_up_process(new->secondary->thread);
69ab8494 1751
2c6927a3 1752 register_irq_proc(irq, desc);
1da177e4
LT
1753 new->dir = NULL;
1754 register_handler_proc(irq, new);
1da177e4 1755 return 0;
f5163427
DS
1756
1757mismatch:
3cca53b0 1758 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1759 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1760 irq, new->flags, new->name, old->flags, old->name);
1761#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1762 dump_stack();
3f050447 1763#endif
f5d89470 1764 }
3aa551c9
TG
1765 ret = -EBUSY;
1766
cba4235e 1767out_unlock:
1c389795 1768 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7 1769
46e48e25
TG
1770 if (!desc->action)
1771 irq_release_resources(desc);
19d39a38
TG
1772out_bus_unlock:
1773 chip_bus_sync_unlock(desc);
9114014c
TG
1774 mutex_unlock(&desc->request_mutex);
1775
3aa551c9 1776out_thread:
3aa551c9
TG
1777 if (new->thread) {
1778 struct task_struct *t = new->thread;
1779
1780 new->thread = NULL;
05d74efa 1781 kthread_stop(t);
3aa551c9
TG
1782 put_task_struct(t);
1783 }
2a1d3ab8
TG
1784 if (new->secondary && new->secondary->thread) {
1785 struct task_struct *t = new->secondary->thread;
1786
1787 new->secondary->thread = NULL;
1788 kthread_stop(t);
1789 put_task_struct(t);
1790 }
b6873807
SAS
1791out_mput:
1792 module_put(desc->owner);
3aa551c9 1793 return ret;
1da177e4
LT
1794}
1795
31d9d9b6 1796/*
cbf94f06
MD
1797 * Internal function to unregister an irqaction - used to free
1798 * regular and special interrupts that are part of the architecture.
1da177e4 1799 */
83ac4ca9 1800static struct irqaction *__free_irq(struct irq_desc *desc, void *dev_id)
1da177e4 1801{
83ac4ca9 1802 unsigned irq = desc->irq_data.irq;
f17c7545 1803 struct irqaction *action, **action_ptr;
1da177e4
LT
1804 unsigned long flags;
1805
ae88a23b 1806 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1807
9114014c 1808 mutex_lock(&desc->request_mutex);
abc7e40c 1809 chip_bus_lock(desc);
239007b8 1810 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1811
1812 /*
1813 * There can be multiple actions per IRQ descriptor, find the right
1814 * one based on the dev_id:
1815 */
f17c7545 1816 action_ptr = &desc->action;
1da177e4 1817 for (;;) {
f17c7545 1818 action = *action_ptr;
1da177e4 1819
ae88a23b
IM
1820 if (!action) {
1821 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1822 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1823 chip_bus_sync_unlock(desc);
19d39a38 1824 mutex_unlock(&desc->request_mutex);
f21cfb25 1825 return NULL;
ae88a23b 1826 }
1da177e4 1827
8316e381
IM
1828 if (action->dev_id == dev_id)
1829 break;
f17c7545 1830 action_ptr = &action->next;
ae88a23b 1831 }
dbce706e 1832
ae88a23b 1833 /* Found it - now remove it from the list of entries: */
f17c7545 1834 *action_ptr = action->next;
ae88a23b 1835
cab303be
TG
1836 irq_pm_remove_action(desc, action);
1837
ae88a23b 1838 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1839 if (!desc->action) {
e9849777 1840 irq_settings_clr_disable_unlazy(desc);
4001d8e8 1841 /* Only shutdown. Deactivate after synchronize_hardirq() */
46999238 1842 irq_shutdown(desc);
c1bacbae 1843 }
3aa551c9 1844
e7a297b0
PWJ
1845#ifdef CONFIG_SMP
1846 /* make sure affinity_hint is cleaned up */
1847 if (WARN_ON_ONCE(desc->affinity_hint))
1848 desc->affinity_hint = NULL;
1849#endif
1850
239007b8 1851 raw_spin_unlock_irqrestore(&desc->lock, flags);
19d39a38
TG
1852 /*
1853 * Drop bus_lock here so the changes which were done in the chip
1854 * callbacks above are synced out to the irq chips which hang
519cc865 1855 * behind a slow bus (I2C, SPI) before calling synchronize_hardirq().
19d39a38
TG
1856 *
1857 * Aside of that the bus_lock can also be taken from the threaded
1858 * handler in irq_finalize_oneshot() which results in a deadlock
519cc865 1859 * because kthread_stop() would wait forever for the thread to
19d39a38
TG
1860 * complete, which is blocked on the bus lock.
1861 *
1862 * The still held desc->request_mutex() protects against a
1863 * concurrent request_irq() of this irq so the release of resources
1864 * and timing data is properly serialized.
1865 */
abc7e40c 1866 chip_bus_sync_unlock(desc);
ae88a23b
IM
1867
1868 unregister_handler_proc(irq, action);
1869
62e04686
TG
1870 /*
1871 * Make sure it's not being used on another CPU and if the chip
1872 * supports it also make sure that there is no (not yet serviced)
1873 * interrupt in flight at the hardware level.
1874 */
1875 __synchronize_hardirq(desc, true);
1da177e4 1876
70edcd77 1877#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1878 /*
1879 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1880 * event to happen even now it's being freed, so let's make sure that
1881 * is so by doing an extra call to the handler ....
1882 *
1883 * ( We do this after actually deregistering it, to make sure that a
0a13ec0b 1884 * 'real' IRQ doesn't run in parallel with our fake. )
ae88a23b
IM
1885 */
1886 if (action->flags & IRQF_SHARED) {
1887 local_irq_save(flags);
1888 action->handler(irq, dev_id);
1889 local_irq_restore(flags);
1da177e4 1890 }
ae88a23b 1891#endif
2d860ad7 1892
519cc865
LW
1893 /*
1894 * The action has already been removed above, but the thread writes
1895 * its oneshot mask bit when it completes. Though request_mutex is
1896 * held across this which prevents __setup_irq() from handing out
1897 * the same bit to a newly requested action.
1898 */
2d860ad7 1899 if (action->thread) {
05d74efa 1900 kthread_stop(action->thread);
2d860ad7 1901 put_task_struct(action->thread);
2a1d3ab8
TG
1902 if (action->secondary && action->secondary->thread) {
1903 kthread_stop(action->secondary->thread);
1904 put_task_struct(action->secondary->thread);
1905 }
2d860ad7
LT
1906 }
1907
19d39a38 1908 /* Last action releases resources */
2343877f 1909 if (!desc->action) {
19d39a38
TG
1910 /*
1911 * Reaquire bus lock as irq_release_resources() might
1912 * require it to deallocate resources over the slow bus.
1913 */
1914 chip_bus_lock(desc);
4001d8e8
TG
1915 /*
1916 * There is no interrupt on the fly anymore. Deactivate it
1917 * completely.
1918 */
1919 raw_spin_lock_irqsave(&desc->lock, flags);
1920 irq_domain_deactivate_irq(&desc->irq_data);
1921 raw_spin_unlock_irqrestore(&desc->lock, flags);
1922
46e48e25 1923 irq_release_resources(desc);
19d39a38 1924 chip_bus_sync_unlock(desc);
2343877f
TG
1925 irq_remove_timings(desc);
1926 }
46e48e25 1927
9114014c
TG
1928 mutex_unlock(&desc->request_mutex);
1929
be45beb2 1930 irq_chip_pm_put(&desc->irq_data);
b6873807 1931 module_put(desc->owner);
2a1d3ab8 1932 kfree(action->secondary);
f21cfb25
MD
1933 return action;
1934}
1935
1936/**
1937 * free_irq - free an interrupt allocated with request_irq
1938 * @irq: Interrupt line to free
1939 * @dev_id: Device identity to free
1940 *
1941 * Remove an interrupt handler. The handler is removed and if the
1942 * interrupt line is no longer in use by any driver it is disabled.
1943 * On a shared IRQ the caller must ensure the interrupt is disabled
1944 * on the card it drives before calling this function. The function
1945 * does not return until any executing interrupts for this IRQ
1946 * have completed.
1947 *
1948 * This function must not be called from interrupt context.
25ce4be7
CH
1949 *
1950 * Returns the devname argument passed to request_irq.
f21cfb25 1951 */
25ce4be7 1952const void *free_irq(unsigned int irq, void *dev_id)
f21cfb25 1953{
70aedd24 1954 struct irq_desc *desc = irq_to_desc(irq);
25ce4be7
CH
1955 struct irqaction *action;
1956 const char *devname;
70aedd24 1957
31d9d9b6 1958 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
25ce4be7 1959 return NULL;
70aedd24 1960
cd7eab44
BH
1961#ifdef CONFIG_SMP
1962 if (WARN_ON(desc->affinity_notify))
1963 desc->affinity_notify = NULL;
1964#endif
1965
83ac4ca9 1966 action = __free_irq(desc, dev_id);
2827a418
AM
1967
1968 if (!action)
1969 return NULL;
1970
25ce4be7
CH
1971 devname = action->name;
1972 kfree(action);
1973 return devname;
1da177e4 1974}
1da177e4
LT
1975EXPORT_SYMBOL(free_irq);
1976
b525903c
JT
1977/* This function must be called with desc->lock held */
1978static const void *__cleanup_nmi(unsigned int irq, struct irq_desc *desc)
1979{
1980 const char *devname = NULL;
1981
1982 desc->istate &= ~IRQS_NMI;
1983
1984 if (!WARN_ON(desc->action == NULL)) {
1985 irq_pm_remove_action(desc, desc->action);
1986 devname = desc->action->name;
1987 unregister_handler_proc(irq, desc->action);
1988
1989 kfree(desc->action);
1990 desc->action = NULL;
1991 }
1992
1993 irq_settings_clr_disable_unlazy(desc);
4001d8e8 1994 irq_shutdown_and_deactivate(desc);
b525903c
JT
1995
1996 irq_release_resources(desc);
1997
1998 irq_chip_pm_put(&desc->irq_data);
1999 module_put(desc->owner);
2000
2001 return devname;
2002}
2003
2004const void *free_nmi(unsigned int irq, void *dev_id)
2005{
2006 struct irq_desc *desc = irq_to_desc(irq);
2007 unsigned long flags;
2008 const void *devname;
2009
2010 if (!desc || WARN_ON(!(desc->istate & IRQS_NMI)))
2011 return NULL;
2012
2013 if (WARN_ON(irq_settings_is_per_cpu_devid(desc)))
2014 return NULL;
2015
2016 /* NMI still enabled */
2017 if (WARN_ON(desc->depth == 0))
2018 disable_nmi_nosync(irq);
2019
2020 raw_spin_lock_irqsave(&desc->lock, flags);
2021
2022 irq_nmi_teardown(desc);
2023 devname = __cleanup_nmi(irq, desc);
2024
2025 raw_spin_unlock_irqrestore(&desc->lock, flags);
2026
2027 return devname;
2028}
2029
1da177e4 2030/**
3aa551c9 2031 * request_threaded_irq - allocate an interrupt line
1da177e4 2032 * @irq: Interrupt line to allocate
3aa551c9
TG
2033 * @handler: Function to be called when the IRQ occurs.
2034 * Primary handler for threaded interrupts
b25c340c
TG
2035 * If NULL and thread_fn != NULL the default
2036 * primary handler is installed
f48fe81e
TG
2037 * @thread_fn: Function called from the irq handler thread
2038 * If NULL, no irq thread is created
1da177e4
LT
2039 * @irqflags: Interrupt type flags
2040 * @devname: An ascii name for the claiming device
2041 * @dev_id: A cookie passed back to the handler function
2042 *
2043 * This call allocates interrupt resources and enables the
2044 * interrupt line and IRQ handling. From the point this
2045 * call is made your handler function may be invoked. Since
2046 * your handler function must clear any interrupt the board
2047 * raises, you must take care both to initialise your hardware
2048 * and to set up the interrupt handler in the right order.
2049 *
3aa551c9 2050 * If you want to set up a threaded irq handler for your device
6d21af4f 2051 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
2052 * still called in hard interrupt context and has to check
2053 * whether the interrupt originates from the device. If yes it
2054 * needs to disable the interrupt on the device and return
39a2eddb 2055 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
2056 * @thread_fn. This split handler design is necessary to support
2057 * shared interrupts.
2058 *
1da177e4
LT
2059 * Dev_id must be globally unique. Normally the address of the
2060 * device data structure is used as the cookie. Since the handler
2061 * receives this value it makes sense to use it.
2062 *
2063 * If your interrupt is shared you must pass a non NULL dev_id
2064 * as this is required when freeing the interrupt.
2065 *
2066 * Flags:
2067 *
3cca53b0 2068 * IRQF_SHARED Interrupt is shared
0c5d1eb7 2069 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
2070 *
2071 */
3aa551c9
TG
2072int request_threaded_irq(unsigned int irq, irq_handler_t handler,
2073 irq_handler_t thread_fn, unsigned long irqflags,
2074 const char *devname, void *dev_id)
1da177e4 2075{
06fcb0c6 2076 struct irqaction *action;
08678b08 2077 struct irq_desc *desc;
d3c60047 2078 int retval;
1da177e4 2079
e237a551
CF
2080 if (irq == IRQ_NOTCONNECTED)
2081 return -ENOTCONN;
2082
1da177e4
LT
2083 /*
2084 * Sanity-check: shared interrupts must pass in a real dev-ID,
2085 * otherwise we'll have trouble later trying to figure out
2086 * which interrupt is which (messes up the interrupt freeing
2087 * logic etc).
17f48034
RW
2088 *
2089 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
2090 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 2091 */
17f48034
RW
2092 if (((irqflags & IRQF_SHARED) && !dev_id) ||
2093 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
2094 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 2095 return -EINVAL;
7d94f7ca 2096
cb5bc832 2097 desc = irq_to_desc(irq);
7d94f7ca 2098 if (!desc)
1da177e4 2099 return -EINVAL;
7d94f7ca 2100
31d9d9b6
MZ
2101 if (!irq_settings_can_request(desc) ||
2102 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 2103 return -EINVAL;
b25c340c
TG
2104
2105 if (!handler) {
2106 if (!thread_fn)
2107 return -EINVAL;
2108 handler = irq_default_primary_handler;
2109 }
1da177e4 2110
45535732 2111 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
2112 if (!action)
2113 return -ENOMEM;
2114
2115 action->handler = handler;
3aa551c9 2116 action->thread_fn = thread_fn;
1da177e4 2117 action->flags = irqflags;
1da177e4 2118 action->name = devname;
1da177e4
LT
2119 action->dev_id = dev_id;
2120
be45beb2 2121 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
2122 if (retval < 0) {
2123 kfree(action);
be45beb2 2124 return retval;
4396f46c 2125 }
be45beb2 2126
d3c60047 2127 retval = __setup_irq(irq, desc, action);
70aedd24 2128
2a1d3ab8 2129 if (retval) {
be45beb2 2130 irq_chip_pm_put(&desc->irq_data);
2a1d3ab8 2131 kfree(action->secondary);
377bf1e4 2132 kfree(action);
2a1d3ab8 2133 }
377bf1e4 2134
6d83f94d 2135#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 2136 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
2137 /*
2138 * It's a shared IRQ -- the driver ought to be prepared for it
2139 * to happen immediately, so let's make sure....
377bf1e4
AV
2140 * We disable the irq to make sure that a 'real' IRQ doesn't
2141 * run in parallel with our fake.
a304e1b8 2142 */
59845b1f 2143 unsigned long flags;
a304e1b8 2144
377bf1e4 2145 disable_irq(irq);
59845b1f 2146 local_irq_save(flags);
377bf1e4 2147
59845b1f 2148 handler(irq, dev_id);
377bf1e4 2149
59845b1f 2150 local_irq_restore(flags);
377bf1e4 2151 enable_irq(irq);
a304e1b8
DW
2152 }
2153#endif
1da177e4
LT
2154 return retval;
2155}
3aa551c9 2156EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
2157
2158/**
2159 * request_any_context_irq - allocate an interrupt line
2160 * @irq: Interrupt line to allocate
2161 * @handler: Function to be called when the IRQ occurs.
2162 * Threaded handler for threaded interrupts.
2163 * @flags: Interrupt type flags
2164 * @name: An ascii name for the claiming device
2165 * @dev_id: A cookie passed back to the handler function
2166 *
2167 * This call allocates interrupt resources and enables the
2168 * interrupt line and IRQ handling. It selects either a
2169 * hardirq or threaded handling method depending on the
2170 * context.
2171 *
2172 * On failure, it returns a negative value. On success,
2173 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
2174 */
2175int request_any_context_irq(unsigned int irq, irq_handler_t handler,
2176 unsigned long flags, const char *name, void *dev_id)
2177{
e237a551 2178 struct irq_desc *desc;
ae731f8d
MZ
2179 int ret;
2180
e237a551
CF
2181 if (irq == IRQ_NOTCONNECTED)
2182 return -ENOTCONN;
2183
2184 desc = irq_to_desc(irq);
ae731f8d
MZ
2185 if (!desc)
2186 return -EINVAL;
2187
1ccb4e61 2188 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
2189 ret = request_threaded_irq(irq, NULL, handler,
2190 flags, name, dev_id);
2191 return !ret ? IRQC_IS_NESTED : ret;
2192 }
2193
2194 ret = request_irq(irq, handler, flags, name, dev_id);
2195 return !ret ? IRQC_IS_HARDIRQ : ret;
2196}
2197EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 2198
b525903c
JT
2199/**
2200 * request_nmi - allocate an interrupt line for NMI delivery
2201 * @irq: Interrupt line to allocate
2202 * @handler: Function to be called when the IRQ occurs.
2203 * Threaded handler for threaded interrupts.
2204 * @irqflags: Interrupt type flags
2205 * @name: An ascii name for the claiming device
2206 * @dev_id: A cookie passed back to the handler function
2207 *
2208 * This call allocates interrupt resources and enables the
2209 * interrupt line and IRQ handling. It sets up the IRQ line
2210 * to be handled as an NMI.
2211 *
2212 * An interrupt line delivering NMIs cannot be shared and IRQ handling
2213 * cannot be threaded.
2214 *
2215 * Interrupt lines requested for NMI delivering must produce per cpu
2216 * interrupts and have auto enabling setting disabled.
2217 *
2218 * Dev_id must be globally unique. Normally the address of the
2219 * device data structure is used as the cookie. Since the handler
2220 * receives this value it makes sense to use it.
2221 *
2222 * If the interrupt line cannot be used to deliver NMIs, function
2223 * will fail and return a negative value.
2224 */
2225int request_nmi(unsigned int irq, irq_handler_t handler,
2226 unsigned long irqflags, const char *name, void *dev_id)
2227{
2228 struct irqaction *action;
2229 struct irq_desc *desc;
2230 unsigned long flags;
2231 int retval;
2232
2233 if (irq == IRQ_NOTCONNECTED)
2234 return -ENOTCONN;
2235
2236 /* NMI cannot be shared, used for Polling */
2237 if (irqflags & (IRQF_SHARED | IRQF_COND_SUSPEND | IRQF_IRQPOLL))
2238 return -EINVAL;
2239
2240 if (!(irqflags & IRQF_PERCPU))
2241 return -EINVAL;
2242
2243 if (!handler)
2244 return -EINVAL;
2245
2246 desc = irq_to_desc(irq);
2247
2248 if (!desc || irq_settings_can_autoenable(desc) ||
2249 !irq_settings_can_request(desc) ||
2250 WARN_ON(irq_settings_is_per_cpu_devid(desc)) ||
2251 !irq_supports_nmi(desc))
2252 return -EINVAL;
2253
2254 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
2255 if (!action)
2256 return -ENOMEM;
2257
2258 action->handler = handler;
2259 action->flags = irqflags | IRQF_NO_THREAD | IRQF_NOBALANCING;
2260 action->name = name;
2261 action->dev_id = dev_id;
2262
2263 retval = irq_chip_pm_get(&desc->irq_data);
2264 if (retval < 0)
2265 goto err_out;
2266
2267 retval = __setup_irq(irq, desc, action);
2268 if (retval)
2269 goto err_irq_setup;
2270
2271 raw_spin_lock_irqsave(&desc->lock, flags);
2272
2273 /* Setup NMI state */
2274 desc->istate |= IRQS_NMI;
2275 retval = irq_nmi_setup(desc);
2276 if (retval) {
2277 __cleanup_nmi(irq, desc);
2278 raw_spin_unlock_irqrestore(&desc->lock, flags);
2279 return -EINVAL;
2280 }
2281
2282 raw_spin_unlock_irqrestore(&desc->lock, flags);
2283
2284 return 0;
2285
2286err_irq_setup:
2287 irq_chip_pm_put(&desc->irq_data);
2288err_out:
2289 kfree(action);
2290
2291 return retval;
2292}
2293
1e7c5fd2 2294void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
2295{
2296 unsigned int cpu = smp_processor_id();
2297 unsigned long flags;
2298 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
2299
2300 if (!desc)
2301 return;
2302
f35ad083
MZ
2303 /*
2304 * If the trigger type is not specified by the caller, then
2305 * use the default for this interrupt.
2306 */
1e7c5fd2 2307 type &= IRQ_TYPE_SENSE_MASK;
f35ad083
MZ
2308 if (type == IRQ_TYPE_NONE)
2309 type = irqd_get_trigger_type(&desc->irq_data);
2310
1e7c5fd2
MZ
2311 if (type != IRQ_TYPE_NONE) {
2312 int ret;
2313
a1ff541a 2314 ret = __irq_set_trigger(desc, type);
1e7c5fd2
MZ
2315
2316 if (ret) {
32cffdde 2317 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
2318 goto out;
2319 }
2320 }
2321
31d9d9b6 2322 irq_percpu_enable(desc, cpu);
1e7c5fd2 2323out:
31d9d9b6
MZ
2324 irq_put_desc_unlock(desc, flags);
2325}
36a5df85 2326EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6 2327
4b078c3f
JT
2328void enable_percpu_nmi(unsigned int irq, unsigned int type)
2329{
2330 enable_percpu_irq(irq, type);
2331}
2332
f0cb3220
TP
2333/**
2334 * irq_percpu_is_enabled - Check whether the per cpu irq is enabled
2335 * @irq: Linux irq number to check for
2336 *
2337 * Must be called from a non migratable context. Returns the enable
2338 * state of a per cpu interrupt on the current cpu.
2339 */
2340bool irq_percpu_is_enabled(unsigned int irq)
2341{
2342 unsigned int cpu = smp_processor_id();
2343 struct irq_desc *desc;
2344 unsigned long flags;
2345 bool is_enabled;
2346
2347 desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
2348 if (!desc)
2349 return false;
2350
2351 is_enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
2352 irq_put_desc_unlock(desc, flags);
2353
2354 return is_enabled;
2355}
2356EXPORT_SYMBOL_GPL(irq_percpu_is_enabled);
2357
31d9d9b6
MZ
2358void disable_percpu_irq(unsigned int irq)
2359{
2360 unsigned int cpu = smp_processor_id();
2361 unsigned long flags;
2362 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
2363
2364 if (!desc)
2365 return;
2366
2367 irq_percpu_disable(desc, cpu);
2368 irq_put_desc_unlock(desc, flags);
2369}
36a5df85 2370EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6 2371
4b078c3f
JT
2372void disable_percpu_nmi(unsigned int irq)
2373{
2374 disable_percpu_irq(irq);
2375}
2376
31d9d9b6
MZ
2377/*
2378 * Internal function to unregister a percpu irqaction.
2379 */
2380static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
2381{
2382 struct irq_desc *desc = irq_to_desc(irq);
2383 struct irqaction *action;
2384 unsigned long flags;
2385
2386 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
2387
2388 if (!desc)
2389 return NULL;
2390
2391 raw_spin_lock_irqsave(&desc->lock, flags);
2392
2393 action = desc->action;
2394 if (!action || action->percpu_dev_id != dev_id) {
2395 WARN(1, "Trying to free already-free IRQ %d\n", irq);
2396 goto bad;
2397 }
2398
2399 if (!cpumask_empty(desc->percpu_enabled)) {
2400 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
2401 irq, cpumask_first(desc->percpu_enabled));
2402 goto bad;
2403 }
2404
2405 /* Found it - now remove it from the list of entries: */
2406 desc->action = NULL;
2407
4b078c3f
JT
2408 desc->istate &= ~IRQS_NMI;
2409
31d9d9b6
MZ
2410 raw_spin_unlock_irqrestore(&desc->lock, flags);
2411
2412 unregister_handler_proc(irq, action);
2413
be45beb2 2414 irq_chip_pm_put(&desc->irq_data);
31d9d9b6
MZ
2415 module_put(desc->owner);
2416 return action;
2417
2418bad:
2419 raw_spin_unlock_irqrestore(&desc->lock, flags);
2420 return NULL;
2421}
2422
2423/**
2424 * remove_percpu_irq - free a per-cpu interrupt
2425 * @irq: Interrupt line to free
2426 * @act: irqaction for the interrupt
2427 *
2428 * Used to remove interrupts statically setup by the early boot process.
2429 */
2430void remove_percpu_irq(unsigned int irq, struct irqaction *act)
2431{
2432 struct irq_desc *desc = irq_to_desc(irq);
2433
2434 if (desc && irq_settings_is_per_cpu_devid(desc))
2435 __free_percpu_irq(irq, act->percpu_dev_id);
2436}
2437
2438/**
2439 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
2440 * @irq: Interrupt line to free
2441 * @dev_id: Device identity to free
2442 *
2443 * Remove a percpu interrupt handler. The handler is removed, but
2444 * the interrupt line is not disabled. This must be done on each
2445 * CPU before calling this function. The function does not return
2446 * until any executing interrupts for this IRQ have completed.
2447 *
2448 * This function must not be called from interrupt context.
2449 */
2450void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
2451{
2452 struct irq_desc *desc = irq_to_desc(irq);
2453
2454 if (!desc || !irq_settings_is_per_cpu_devid(desc))
2455 return;
2456
2457 chip_bus_lock(desc);
2458 kfree(__free_percpu_irq(irq, dev_id));
2459 chip_bus_sync_unlock(desc);
2460}
aec2e2ad 2461EXPORT_SYMBOL_GPL(free_percpu_irq);
31d9d9b6 2462
4b078c3f
JT
2463void free_percpu_nmi(unsigned int irq, void __percpu *dev_id)
2464{
2465 struct irq_desc *desc = irq_to_desc(irq);
2466
2467 if (!desc || !irq_settings_is_per_cpu_devid(desc))
2468 return;
2469
2470 if (WARN_ON(!(desc->istate & IRQS_NMI)))
2471 return;
2472
2473 kfree(__free_percpu_irq(irq, dev_id));
2474}
2475
31d9d9b6
MZ
2476/**
2477 * setup_percpu_irq - setup a per-cpu interrupt
2478 * @irq: Interrupt line to setup
2479 * @act: irqaction for the interrupt
2480 *
2481 * Used to statically setup per-cpu interrupts in the early boot process.
2482 */
2483int setup_percpu_irq(unsigned int irq, struct irqaction *act)
2484{
2485 struct irq_desc *desc = irq_to_desc(irq);
2486 int retval;
2487
2488 if (!desc || !irq_settings_is_per_cpu_devid(desc))
2489 return -EINVAL;
be45beb2
JH
2490
2491 retval = irq_chip_pm_get(&desc->irq_data);
2492 if (retval < 0)
2493 return retval;
2494
31d9d9b6 2495 retval = __setup_irq(irq, desc, act);
31d9d9b6 2496
be45beb2
JH
2497 if (retval)
2498 irq_chip_pm_put(&desc->irq_data);
2499
31d9d9b6
MZ
2500 return retval;
2501}
2502
2503/**
c80081b9 2504 * __request_percpu_irq - allocate a percpu interrupt line
31d9d9b6
MZ
2505 * @irq: Interrupt line to allocate
2506 * @handler: Function to be called when the IRQ occurs.
c80081b9 2507 * @flags: Interrupt type flags (IRQF_TIMER only)
31d9d9b6
MZ
2508 * @devname: An ascii name for the claiming device
2509 * @dev_id: A percpu cookie passed back to the handler function
2510 *
a1b7febd
MR
2511 * This call allocates interrupt resources and enables the
2512 * interrupt on the local CPU. If the interrupt is supposed to be
2513 * enabled on other CPUs, it has to be done on each CPU using
2514 * enable_percpu_irq().
31d9d9b6
MZ
2515 *
2516 * Dev_id must be globally unique. It is a per-cpu variable, and
2517 * the handler gets called with the interrupted CPU's instance of
2518 * that variable.
2519 */
c80081b9
DL
2520int __request_percpu_irq(unsigned int irq, irq_handler_t handler,
2521 unsigned long flags, const char *devname,
2522 void __percpu *dev_id)
31d9d9b6
MZ
2523{
2524 struct irqaction *action;
2525 struct irq_desc *desc;
2526 int retval;
2527
2528 if (!dev_id)
2529 return -EINVAL;
2530
2531 desc = irq_to_desc(irq);
2532 if (!desc || !irq_settings_can_request(desc) ||
2533 !irq_settings_is_per_cpu_devid(desc))
2534 return -EINVAL;
2535
c80081b9
DL
2536 if (flags && flags != IRQF_TIMER)
2537 return -EINVAL;
2538
31d9d9b6
MZ
2539 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
2540 if (!action)
2541 return -ENOMEM;
2542
2543 action->handler = handler;
c80081b9 2544 action->flags = flags | IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
2545 action->name = devname;
2546 action->percpu_dev_id = dev_id;
2547
be45beb2 2548 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
2549 if (retval < 0) {
2550 kfree(action);
be45beb2 2551 return retval;
4396f46c 2552 }
be45beb2 2553
31d9d9b6 2554 retval = __setup_irq(irq, desc, action);
31d9d9b6 2555
be45beb2
JH
2556 if (retval) {
2557 irq_chip_pm_put(&desc->irq_data);
31d9d9b6 2558 kfree(action);
be45beb2 2559 }
31d9d9b6
MZ
2560
2561 return retval;
2562}
c80081b9 2563EXPORT_SYMBOL_GPL(__request_percpu_irq);
1b7047ed 2564
4b078c3f
JT
2565/**
2566 * request_percpu_nmi - allocate a percpu interrupt line for NMI delivery
2567 * @irq: Interrupt line to allocate
2568 * @handler: Function to be called when the IRQ occurs.
2569 * @name: An ascii name for the claiming device
2570 * @dev_id: A percpu cookie passed back to the handler function
2571 *
2572 * This call allocates interrupt resources for a per CPU NMI. Per CPU NMIs
a5186694
JT
2573 * have to be setup on each CPU by calling prepare_percpu_nmi() before
2574 * being enabled on the same CPU by using enable_percpu_nmi().
4b078c3f
JT
2575 *
2576 * Dev_id must be globally unique. It is a per-cpu variable, and
2577 * the handler gets called with the interrupted CPU's instance of
2578 * that variable.
2579 *
2580 * Interrupt lines requested for NMI delivering should have auto enabling
2581 * setting disabled.
2582 *
2583 * If the interrupt line cannot be used to deliver NMIs, function
2584 * will fail returning a negative value.
2585 */
2586int request_percpu_nmi(unsigned int irq, irq_handler_t handler,
2587 const char *name, void __percpu *dev_id)
2588{
2589 struct irqaction *action;
2590 struct irq_desc *desc;
2591 unsigned long flags;
2592 int retval;
2593
2594 if (!handler)
2595 return -EINVAL;
2596
2597 desc = irq_to_desc(irq);
2598
2599 if (!desc || !irq_settings_can_request(desc) ||
2600 !irq_settings_is_per_cpu_devid(desc) ||
2601 irq_settings_can_autoenable(desc) ||
2602 !irq_supports_nmi(desc))
2603 return -EINVAL;
2604
2605 /* The line cannot already be NMI */
2606 if (desc->istate & IRQS_NMI)
2607 return -EINVAL;
2608
2609 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
2610 if (!action)
2611 return -ENOMEM;
2612
2613 action->handler = handler;
2614 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND | IRQF_NO_THREAD
2615 | IRQF_NOBALANCING;
2616 action->name = name;
2617 action->percpu_dev_id = dev_id;
2618
2619 retval = irq_chip_pm_get(&desc->irq_data);
2620 if (retval < 0)
2621 goto err_out;
2622
2623 retval = __setup_irq(irq, desc, action);
2624 if (retval)
2625 goto err_irq_setup;
2626
2627 raw_spin_lock_irqsave(&desc->lock, flags);
2628 desc->istate |= IRQS_NMI;
2629 raw_spin_unlock_irqrestore(&desc->lock, flags);
2630
2631 return 0;
2632
2633err_irq_setup:
2634 irq_chip_pm_put(&desc->irq_data);
2635err_out:
2636 kfree(action);
2637
2638 return retval;
2639}
2640
2641/**
2642 * prepare_percpu_nmi - performs CPU local setup for NMI delivery
2643 * @irq: Interrupt line to prepare for NMI delivery
2644 *
2645 * This call prepares an interrupt line to deliver NMI on the current CPU,
2646 * before that interrupt line gets enabled with enable_percpu_nmi().
2647 *
2648 * As a CPU local operation, this should be called from non-preemptible
2649 * context.
2650 *
2651 * If the interrupt line cannot be used to deliver NMIs, function
2652 * will fail returning a negative value.
2653 */
2654int prepare_percpu_nmi(unsigned int irq)
2655{
2656 unsigned long flags;
2657 struct irq_desc *desc;
2658 int ret = 0;
2659
2660 WARN_ON(preemptible());
2661
2662 desc = irq_get_desc_lock(irq, &flags,
2663 IRQ_GET_DESC_CHECK_PERCPU);
2664 if (!desc)
2665 return -EINVAL;
2666
2667 if (WARN(!(desc->istate & IRQS_NMI),
2668 KERN_ERR "prepare_percpu_nmi called for a non-NMI interrupt: irq %u\n",
2669 irq)) {
2670 ret = -EINVAL;
2671 goto out;
2672 }
2673
2674 ret = irq_nmi_setup(desc);
2675 if (ret) {
2676 pr_err("Failed to setup NMI delivery: irq %u\n", irq);
2677 goto out;
2678 }
2679
2680out:
2681 irq_put_desc_unlock(desc, flags);
2682 return ret;
2683}
2684
2685/**
2686 * teardown_percpu_nmi - undoes NMI setup of IRQ line
2687 * @irq: Interrupt line from which CPU local NMI configuration should be
2688 * removed
2689 *
2690 * This call undoes the setup done by prepare_percpu_nmi().
2691 *
2692 * IRQ line should not be enabled for the current CPU.
2693 *
2694 * As a CPU local operation, this should be called from non-preemptible
2695 * context.
2696 */
2697void teardown_percpu_nmi(unsigned int irq)
2698{
2699 unsigned long flags;
2700 struct irq_desc *desc;
2701
2702 WARN_ON(preemptible());
2703
2704 desc = irq_get_desc_lock(irq, &flags,
2705 IRQ_GET_DESC_CHECK_PERCPU);
2706 if (!desc)
2707 return;
2708
2709 if (WARN_ON(!(desc->istate & IRQS_NMI)))
2710 goto out;
2711
2712 irq_nmi_teardown(desc);
2713out:
2714 irq_put_desc_unlock(desc, flags);
2715}
2716
62e04686
TG
2717int __irq_get_irqchip_state(struct irq_data *data, enum irqchip_irq_state which,
2718 bool *state)
2719{
2720 struct irq_chip *chip;
2721 int err = -EINVAL;
2722
2723 do {
2724 chip = irq_data_get_irq_chip(data);
1d0326f3
MV
2725 if (WARN_ON_ONCE(!chip))
2726 return -ENODEV;
62e04686
TG
2727 if (chip->irq_get_irqchip_state)
2728 break;
2729#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2730 data = data->parent_data;
2731#else
2732 data = NULL;
2733#endif
2734 } while (data);
2735
2736 if (data)
2737 err = chip->irq_get_irqchip_state(data, which, state);
2738 return err;
2739}
2740
1b7047ed
MZ
2741/**
2742 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
2743 * @irq: Interrupt line that is forwarded to a VM
2744 * @which: One of IRQCHIP_STATE_* the caller wants to know about
2745 * @state: a pointer to a boolean where the state is to be storeed
2746 *
2747 * This call snapshots the internal irqchip state of an
2748 * interrupt, returning into @state the bit corresponding to
2749 * stage @which
2750 *
2751 * This function should be called with preemption disabled if the
2752 * interrupt controller has per-cpu registers.
2753 */
2754int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2755 bool *state)
2756{
2757 struct irq_desc *desc;
2758 struct irq_data *data;
1b7047ed
MZ
2759 unsigned long flags;
2760 int err = -EINVAL;
2761
2762 desc = irq_get_desc_buslock(irq, &flags, 0);
2763 if (!desc)
2764 return err;
2765
2766 data = irq_desc_get_irq_data(desc);
2767
62e04686 2768 err = __irq_get_irqchip_state(data, which, state);
1b7047ed
MZ
2769
2770 irq_put_desc_busunlock(desc, flags);
2771 return err;
2772}
1ee4fb3e 2773EXPORT_SYMBOL_GPL(irq_get_irqchip_state);
1b7047ed
MZ
2774
2775/**
2776 * irq_set_irqchip_state - set the state of a forwarded interrupt.
2777 * @irq: Interrupt line that is forwarded to a VM
2778 * @which: State to be restored (one of IRQCHIP_STATE_*)
2779 * @val: Value corresponding to @which
2780 *
2781 * This call sets the internal irqchip state of an interrupt,
2782 * depending on the value of @which.
2783 *
2784 * This function should be called with preemption disabled if the
2785 * interrupt controller has per-cpu registers.
2786 */
2787int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2788 bool val)
2789{
2790 struct irq_desc *desc;
2791 struct irq_data *data;
2792 struct irq_chip *chip;
2793 unsigned long flags;
2794 int err = -EINVAL;
2795
2796 desc = irq_get_desc_buslock(irq, &flags, 0);
2797 if (!desc)
2798 return err;
2799
2800 data = irq_desc_get_irq_data(desc);
2801
2802 do {
2803 chip = irq_data_get_irq_chip(data);
f107cee9
GR
2804 if (WARN_ON_ONCE(!chip)) {
2805 err = -ENODEV;
2806 goto out_unlock;
2807 }
1b7047ed
MZ
2808 if (chip->irq_set_irqchip_state)
2809 break;
2810#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2811 data = data->parent_data;
2812#else
2813 data = NULL;
2814#endif
2815 } while (data);
2816
2817 if (data)
2818 err = chip->irq_set_irqchip_state(data, which, val);
2819
f107cee9 2820out_unlock:
1b7047ed
MZ
2821 irq_put_desc_busunlock(desc, flags);
2822 return err;
2823}
1ee4fb3e 2824EXPORT_SYMBOL_GPL(irq_set_irqchip_state);
a313357e
TG
2825
2826/**
2827 * irq_has_action - Check whether an interrupt is requested
2828 * @irq: The linux irq number
2829 *
2830 * Returns: A snapshot of the current state
2831 */
2832bool irq_has_action(unsigned int irq)
2833{
2834 bool res;
2835
2836 rcu_read_lock();
2837 res = irq_desc_has_action(irq_to_desc(irq));
2838 rcu_read_unlock();
2839 return res;
2840}
2841EXPORT_SYMBOL_GPL(irq_has_action);
fdd02963
TG
2842
2843/**
2844 * irq_check_status_bit - Check whether bits in the irq descriptor status are set
2845 * @irq: The linux irq number
2846 * @bitmask: The bitmask to evaluate
2847 *
2848 * Returns: True if one of the bits in @bitmask is set
2849 */
2850bool irq_check_status_bit(unsigned int irq, unsigned int bitmask)
2851{
2852 struct irq_desc *desc;
2853 bool res = false;
2854
2855 rcu_read_lock();
2856 desc = irq_to_desc(irq);
2857 if (desc)
2858 res = !!(desc->status_use_accessors & bitmask);
2859 rcu_read_unlock();
2860 return res;
2861}
ce09ccc5 2862EXPORT_SYMBOL_GPL(irq_check_status_bit);