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genirq: Move bus locking into __setup_irq()
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CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
0881e7bd 20#include <linux/sched/task.h>
ae7e81c0 21#include <uapi/linux/sched/types.h>
4d1d61a6 22#include <linux/task_work.h>
1da177e4
LT
23
24#include "internals.h"
25
8d32a307
TG
26#ifdef CONFIG_IRQ_FORCED_THREADING
27__read_mostly bool force_irqthreads;
28
29static int __init setup_forced_irqthreads(char *arg)
30{
31 force_irqthreads = true;
32 return 0;
33}
34early_param("threadirqs", setup_forced_irqthreads);
35#endif
36
18258f72 37static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 38{
32f4125e 39 bool inprogress;
1da177e4 40
a98ce5c6
HX
41 do {
42 unsigned long flags;
43
44 /*
45 * Wait until we're out of the critical section. This might
46 * give the wrong answer due to the lack of memory barriers.
47 */
32f4125e 48 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
49 cpu_relax();
50
51 /* Ok, that indicated we're done: double-check carefully. */
239007b8 52 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 53 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 54 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
55
56 /* Oops, that failed? */
32f4125e 57 } while (inprogress);
18258f72
TG
58}
59
60/**
61 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
62 * @irq: interrupt number to wait for
63 *
64 * This function waits for any pending hard IRQ handlers for this
65 * interrupt to complete before returning. If you use this
66 * function while holding a resource the IRQ handler may need you
67 * will deadlock. It does not take associated threaded handlers
68 * into account.
69 *
70 * Do not use this for shutdown scenarios where you must be sure
71 * that all parts (hardirq and threaded handler) have completed.
72 *
02cea395
PZ
73 * Returns: false if a threaded handler is active.
74 *
18258f72
TG
75 * This function may be called - with care - from IRQ context.
76 */
02cea395 77bool synchronize_hardirq(unsigned int irq)
18258f72
TG
78{
79 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 80
02cea395 81 if (desc) {
18258f72 82 __synchronize_hardirq(desc);
02cea395
PZ
83 return !atomic_read(&desc->threads_active);
84 }
85
86 return true;
18258f72
TG
87}
88EXPORT_SYMBOL(synchronize_hardirq);
89
90/**
91 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
92 * @irq: interrupt number to wait for
93 *
94 * This function waits for any pending IRQ handlers for this interrupt
95 * to complete before returning. If you use this function while
96 * holding a resource the IRQ handler may need you will deadlock.
97 *
98 * This function may be called - with care - from IRQ context.
99 */
100void synchronize_irq(unsigned int irq)
101{
102 struct irq_desc *desc = irq_to_desc(irq);
103
104 if (desc) {
105 __synchronize_hardirq(desc);
106 /*
107 * We made sure that no hardirq handler is
108 * running. Now verify that no threaded handlers are
109 * active.
110 */
111 wait_event(desc->wait_for_threads,
112 !atomic_read(&desc->threads_active));
113 }
1da177e4 114}
1da177e4
LT
115EXPORT_SYMBOL(synchronize_irq);
116
3aa551c9
TG
117#ifdef CONFIG_SMP
118cpumask_var_t irq_default_affinity;
119
9c255583 120static bool __irq_can_set_affinity(struct irq_desc *desc)
e019c249
JL
121{
122 if (!desc || !irqd_can_balance(&desc->irq_data) ||
123 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
9c255583
TG
124 return false;
125 return true;
e019c249
JL
126}
127
771ee3b0
TG
128/**
129 * irq_can_set_affinity - Check if the affinity of a given irq can be set
130 * @irq: Interrupt to check
131 *
132 */
133int irq_can_set_affinity(unsigned int irq)
134{
e019c249 135 return __irq_can_set_affinity(irq_to_desc(irq));
771ee3b0
TG
136}
137
9c255583
TG
138/**
139 * irq_can_set_affinity_usr - Check if affinity of a irq can be set from user space
140 * @irq: Interrupt to check
141 *
142 * Like irq_can_set_affinity() above, but additionally checks for the
143 * AFFINITY_MANAGED flag.
144 */
145bool irq_can_set_affinity_usr(unsigned int irq)
146{
147 struct irq_desc *desc = irq_to_desc(irq);
148
149 return __irq_can_set_affinity(desc) &&
150 !irqd_affinity_is_managed(&desc->irq_data);
151}
152
591d2fb0
TG
153/**
154 * irq_set_thread_affinity - Notify irq threads to adjust affinity
155 * @desc: irq descriptor which has affitnity changed
156 *
157 * We just set IRQTF_AFFINITY and delegate the affinity setting
158 * to the interrupt thread itself. We can not call
159 * set_cpus_allowed_ptr() here as we hold desc->lock and this
160 * code can be called from hard interrupt context.
161 */
162void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9 163{
f944b5a7 164 struct irqaction *action;
3aa551c9 165
f944b5a7 166 for_each_action_of_desc(desc, action)
3aa551c9 167 if (action->thread)
591d2fb0 168 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
169}
170
818b0f3b
JL
171int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
172 bool force)
173{
174 struct irq_desc *desc = irq_data_to_desc(data);
175 struct irq_chip *chip = irq_data_get_irq_chip(data);
176 int ret;
177
01f8fa4f 178 ret = chip->irq_set_affinity(data, mask, force);
818b0f3b
JL
179 switch (ret) {
180 case IRQ_SET_MASK_OK:
2cb62547 181 case IRQ_SET_MASK_OK_DONE:
9df872fa 182 cpumask_copy(desc->irq_common_data.affinity, mask);
818b0f3b
JL
183 case IRQ_SET_MASK_OK_NOCOPY:
184 irq_set_thread_affinity(desc);
185 ret = 0;
186 }
187
188 return ret;
189}
190
01f8fa4f
TG
191int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
192 bool force)
771ee3b0 193{
c2d0c555
DD
194 struct irq_chip *chip = irq_data_get_irq_chip(data);
195 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 196 int ret = 0;
771ee3b0 197
c2d0c555 198 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
199 return -EINVAL;
200
0ef5ca1e 201 if (irq_can_move_pcntxt(data)) {
01f8fa4f 202 ret = irq_do_set_affinity(data, mask, force);
1fa46f1f 203 } else {
c2d0c555 204 irqd_set_move_pending(data);
1fa46f1f 205 irq_copy_pending(desc, mask);
57b150cc 206 }
1fa46f1f 207
cd7eab44
BH
208 if (desc->affinity_notify) {
209 kref_get(&desc->affinity_notify->kref);
210 schedule_work(&desc->affinity_notify->work);
211 }
c2d0c555
DD
212 irqd_set(data, IRQD_AFFINITY_SET);
213
214 return ret;
215}
216
01f8fa4f 217int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
218{
219 struct irq_desc *desc = irq_to_desc(irq);
220 unsigned long flags;
221 int ret;
222
223 if (!desc)
224 return -EINVAL;
225
226 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 227 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 228 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 229 return ret;
771ee3b0
TG
230}
231
e7a297b0
PWJ
232int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
233{
e7a297b0 234 unsigned long flags;
31d9d9b6 235 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
236
237 if (!desc)
238 return -EINVAL;
e7a297b0 239 desc->affinity_hint = m;
02725e74 240 irq_put_desc_unlock(desc, flags);
e2e64a93 241 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
242 if (m)
243 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
244 return 0;
245}
246EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
247
cd7eab44
BH
248static void irq_affinity_notify(struct work_struct *work)
249{
250 struct irq_affinity_notify *notify =
251 container_of(work, struct irq_affinity_notify, work);
252 struct irq_desc *desc = irq_to_desc(notify->irq);
253 cpumask_var_t cpumask;
254 unsigned long flags;
255
1fa46f1f 256 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
257 goto out;
258
259 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 260 if (irq_move_pending(&desc->irq_data))
1fa46f1f 261 irq_get_pending(cpumask, desc);
cd7eab44 262 else
9df872fa 263 cpumask_copy(cpumask, desc->irq_common_data.affinity);
cd7eab44
BH
264 raw_spin_unlock_irqrestore(&desc->lock, flags);
265
266 notify->notify(notify, cpumask);
267
268 free_cpumask_var(cpumask);
269out:
270 kref_put(&notify->kref, notify->release);
271}
272
273/**
274 * irq_set_affinity_notifier - control notification of IRQ affinity changes
275 * @irq: Interrupt for which to enable/disable notification
276 * @notify: Context for notification, or %NULL to disable
277 * notification. Function pointers must be initialised;
278 * the other fields will be initialised by this function.
279 *
280 * Must be called in process context. Notification may only be enabled
281 * after the IRQ is allocated and must be disabled before the IRQ is
282 * freed using free_irq().
283 */
284int
285irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
286{
287 struct irq_desc *desc = irq_to_desc(irq);
288 struct irq_affinity_notify *old_notify;
289 unsigned long flags;
290
291 /* The release function is promised process context */
292 might_sleep();
293
294 if (!desc)
295 return -EINVAL;
296
297 /* Complete initialisation of *notify */
298 if (notify) {
299 notify->irq = irq;
300 kref_init(&notify->kref);
301 INIT_WORK(&notify->work, irq_affinity_notify);
302 }
303
304 raw_spin_lock_irqsave(&desc->lock, flags);
305 old_notify = desc->affinity_notify;
306 desc->affinity_notify = notify;
307 raw_spin_unlock_irqrestore(&desc->lock, flags);
308
309 if (old_notify)
310 kref_put(&old_notify->kref, old_notify->release);
311
312 return 0;
313}
314EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
315
18404756
MK
316#ifndef CONFIG_AUTO_IRQ_AFFINITY
317/*
318 * Generic version of the affinity autoselector.
319 */
43564bd9 320int irq_setup_affinity(struct irq_desc *desc)
18404756 321{
569bda8d 322 struct cpumask *set = irq_default_affinity;
cba4235e
TG
323 int ret, node = irq_desc_get_node(desc);
324 static DEFINE_RAW_SPINLOCK(mask_lock);
325 static struct cpumask mask;
569bda8d 326
b008207c 327 /* Excludes PER_CPU and NO_BALANCE interrupts */
e019c249 328 if (!__irq_can_set_affinity(desc))
18404756
MK
329 return 0;
330
cba4235e 331 raw_spin_lock(&mask_lock);
f6d87f4b 332 /*
9332ef9d 333 * Preserve the managed affinity setting and a userspace affinity
06ee6d57 334 * setup, but make sure that one of the targets is online.
f6d87f4b 335 */
06ee6d57
TG
336 if (irqd_affinity_is_managed(&desc->irq_data) ||
337 irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
9df872fa 338 if (cpumask_intersects(desc->irq_common_data.affinity,
569bda8d 339 cpu_online_mask))
9df872fa 340 set = desc->irq_common_data.affinity;
0c6f8a8b 341 else
2bdd1055 342 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 343 }
18404756 344
cba4235e 345 cpumask_and(&mask, cpu_online_mask, set);
241fc640
PB
346 if (node != NUMA_NO_NODE) {
347 const struct cpumask *nodemask = cpumask_of_node(node);
348
349 /* make sure at least one of the cpus in nodemask is online */
cba4235e
TG
350 if (cpumask_intersects(&mask, nodemask))
351 cpumask_and(&mask, &mask, nodemask);
241fc640 352 }
cba4235e
TG
353 ret = irq_do_set_affinity(&desc->irq_data, &mask, false);
354 raw_spin_unlock(&mask_lock);
355 return ret;
18404756 356}
f6d87f4b 357#else
a8a98eac 358/* Wrapper for ALPHA specific affinity selector magic */
cba4235e 359int irq_setup_affinity(struct irq_desc *desc)
f6d87f4b 360{
cba4235e 361 return irq_select_affinity(irq_desc_get_irq(desc));
f6d87f4b 362}
18404756
MK
363#endif
364
f6d87f4b 365/*
cba4235e 366 * Called when a bogus affinity is set via /proc/irq
f6d87f4b 367 */
cba4235e 368int irq_select_affinity_usr(unsigned int irq)
f6d87f4b
TG
369{
370 struct irq_desc *desc = irq_to_desc(irq);
371 unsigned long flags;
372 int ret;
373
239007b8 374 raw_spin_lock_irqsave(&desc->lock, flags);
cba4235e 375 ret = irq_setup_affinity(desc);
239007b8 376 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
377 return ret;
378}
1da177e4
LT
379#endif
380
fcf1ae2f
FW
381/**
382 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
383 * @irq: interrupt number to set affinity
384 * @vcpu_info: vCPU specific data
385 *
386 * This function uses the vCPU specific data to set the vCPU
387 * affinity for an irq. The vCPU specific data is passed from
388 * outside, such as KVM. One example code path is as below:
389 * KVM -> IOMMU -> irq_set_vcpu_affinity().
390 */
391int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
392{
393 unsigned long flags;
394 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
395 struct irq_data *data;
396 struct irq_chip *chip;
397 int ret = -ENOSYS;
398
399 if (!desc)
400 return -EINVAL;
401
402 data = irq_desc_get_irq_data(desc);
403 chip = irq_data_get_irq_chip(data);
404 if (chip && chip->irq_set_vcpu_affinity)
405 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
406 irq_put_desc_unlock(desc, flags);
407
408 return ret;
409}
410EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
411
79ff1cda 412void __disable_irq(struct irq_desc *desc)
0a0c5168 413{
3aae994f 414 if (!desc->depth++)
87923470 415 irq_disable(desc);
0a0c5168
RW
416}
417
02725e74
TG
418static int __disable_irq_nosync(unsigned int irq)
419{
420 unsigned long flags;
31d9d9b6 421 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
422
423 if (!desc)
424 return -EINVAL;
79ff1cda 425 __disable_irq(desc);
02725e74
TG
426 irq_put_desc_busunlock(desc, flags);
427 return 0;
428}
429
1da177e4
LT
430/**
431 * disable_irq_nosync - disable an irq without waiting
432 * @irq: Interrupt to disable
433 *
434 * Disable the selected interrupt line. Disables and Enables are
435 * nested.
436 * Unlike disable_irq(), this function does not ensure existing
437 * instances of the IRQ handler have completed before returning.
438 *
439 * This function may be called from IRQ context.
440 */
441void disable_irq_nosync(unsigned int irq)
442{
02725e74 443 __disable_irq_nosync(irq);
1da177e4 444}
1da177e4
LT
445EXPORT_SYMBOL(disable_irq_nosync);
446
447/**
448 * disable_irq - disable an irq and wait for completion
449 * @irq: Interrupt to disable
450 *
451 * Disable the selected interrupt line. Enables and Disables are
452 * nested.
453 * This function waits for any pending IRQ handlers for this interrupt
454 * to complete before returning. If you use this function while
455 * holding a resource the IRQ handler may need you will deadlock.
456 *
457 * This function may be called - with care - from IRQ context.
458 */
459void disable_irq(unsigned int irq)
460{
02725e74 461 if (!__disable_irq_nosync(irq))
1da177e4
LT
462 synchronize_irq(irq);
463}
1da177e4
LT
464EXPORT_SYMBOL(disable_irq);
465
02cea395
PZ
466/**
467 * disable_hardirq - disables an irq and waits for hardirq completion
468 * @irq: Interrupt to disable
469 *
470 * Disable the selected interrupt line. Enables and Disables are
471 * nested.
472 * This function waits for any pending hard IRQ handlers for this
473 * interrupt to complete before returning. If you use this function while
474 * holding a resource the hard IRQ handler may need you will deadlock.
475 *
476 * When used to optimistically disable an interrupt from atomic context
477 * the return value must be checked.
478 *
479 * Returns: false if a threaded handler is active.
480 *
481 * This function may be called - with care - from IRQ context.
482 */
483bool disable_hardirq(unsigned int irq)
484{
485 if (!__disable_irq_nosync(irq))
486 return synchronize_hardirq(irq);
487
488 return false;
489}
490EXPORT_SYMBOL_GPL(disable_hardirq);
491
79ff1cda 492void __enable_irq(struct irq_desc *desc)
1adb0850
TG
493{
494 switch (desc->depth) {
495 case 0:
0a0c5168 496 err_out:
79ff1cda
JL
497 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
498 irq_desc_get_irq(desc));
1adb0850
TG
499 break;
500 case 1: {
c531e836 501 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 502 goto err_out;
1adb0850 503 /* Prevent probing on this irq: */
1ccb4e61 504 irq_settings_set_noprobe(desc);
201d7f47
TG
505 /*
506 * Call irq_startup() not irq_enable() here because the
507 * interrupt might be marked NOAUTOEN. So irq_startup()
508 * needs to be invoked when it gets enabled the first
509 * time. If it was already started up, then irq_startup()
510 * will invoke irq_enable() under the hood.
511 */
4cde9c6b 512 irq_startup(desc, IRQ_RESEND, IRQ_START_COND);
201d7f47 513 break;
1adb0850
TG
514 }
515 default:
516 desc->depth--;
517 }
518}
519
1da177e4
LT
520/**
521 * enable_irq - enable handling of an irq
522 * @irq: Interrupt to enable
523 *
524 * Undoes the effect of one call to disable_irq(). If this
525 * matches the last disable, processing of interrupts on this
526 * IRQ line is re-enabled.
527 *
70aedd24 528 * This function may be called from IRQ context only when
6b8ff312 529 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
530 */
531void enable_irq(unsigned int irq)
532{
1da177e4 533 unsigned long flags;
31d9d9b6 534 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 535
7d94f7ca 536 if (!desc)
c2b5a251 537 return;
50f7c032
TG
538 if (WARN(!desc->irq_data.chip,
539 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 540 goto out;
2656c366 541
79ff1cda 542 __enable_irq(desc);
02725e74
TG
543out:
544 irq_put_desc_busunlock(desc, flags);
1da177e4 545}
1da177e4
LT
546EXPORT_SYMBOL(enable_irq);
547
0c5d1eb7 548static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 549{
08678b08 550 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
551 int ret = -ENXIO;
552
60f96b41
SS
553 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
554 return 0;
555
2f7e99bb
TG
556 if (desc->irq_data.chip->irq_set_wake)
557 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
558
559 return ret;
560}
561
ba9a2331 562/**
a0cd9ca2 563 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
564 * @irq: interrupt to control
565 * @on: enable/disable power management wakeup
566 *
15a647eb
DB
567 * Enable/disable power management wakeup mode, which is
568 * disabled by default. Enables and disables must match,
569 * just as they match for non-wakeup mode support.
570 *
571 * Wakeup mode lets this IRQ wake the system from sleep
572 * states like "suspend to RAM".
ba9a2331 573 */
a0cd9ca2 574int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 575{
ba9a2331 576 unsigned long flags;
31d9d9b6 577 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 578 int ret = 0;
ba9a2331 579
13863a66
JJ
580 if (!desc)
581 return -EINVAL;
582
15a647eb
DB
583 /* wakeup-capable irqs can be shared between drivers that
584 * don't need to have the same sleep mode behaviors.
585 */
15a647eb 586 if (on) {
2db87321
UKK
587 if (desc->wake_depth++ == 0) {
588 ret = set_irq_wake_real(irq, on);
589 if (ret)
590 desc->wake_depth = 0;
591 else
7f94226f 592 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 593 }
15a647eb
DB
594 } else {
595 if (desc->wake_depth == 0) {
7a2c4770 596 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
597 } else if (--desc->wake_depth == 0) {
598 ret = set_irq_wake_real(irq, on);
599 if (ret)
600 desc->wake_depth = 1;
601 else
7f94226f 602 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 603 }
15a647eb 604 }
02725e74 605 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
606 return ret;
607}
a0cd9ca2 608EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 609
1da177e4
LT
610/*
611 * Internal function that tells the architecture code whether a
612 * particular irq has been exclusively allocated or is available
613 * for driver use.
614 */
615int can_request_irq(unsigned int irq, unsigned long irqflags)
616{
cc8c3b78 617 unsigned long flags;
31d9d9b6 618 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 619 int canrequest = 0;
1da177e4 620
7d94f7ca
YL
621 if (!desc)
622 return 0;
623
02725e74 624 if (irq_settings_can_request(desc)) {
2779db8d
BH
625 if (!desc->action ||
626 irqflags & desc->action->flags & IRQF_SHARED)
627 canrequest = 1;
02725e74
TG
628 }
629 irq_put_desc_unlock(desc, flags);
630 return canrequest;
1da177e4
LT
631}
632
a1ff541a 633int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
82736f4d 634{
6b8ff312 635 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 636 int ret, unmask = 0;
82736f4d 637
b2ba2c30 638 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
639 /*
640 * IRQF_TRIGGER_* but the PIC does not support multiple
641 * flow-types?
642 */
a1ff541a
JL
643 pr_debug("No set_type function for IRQ %d (%s)\n",
644 irq_desc_get_irq(desc),
f5d89470 645 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
646 return 0;
647 }
648
d4d5e089 649 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 650 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 651 mask_irq(desc);
32f4125e 652 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
653 unmask = 1;
654 }
655
00b992de
AK
656 /* Mask all flags except trigger mode */
657 flags &= IRQ_TYPE_SENSE_MASK;
b2ba2c30 658 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 659
876dbd4c
TG
660 switch (ret) {
661 case IRQ_SET_MASK_OK:
2cb62547 662 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
663 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
664 irqd_set(&desc->irq_data, flags);
665
666 case IRQ_SET_MASK_OK_NOCOPY:
667 flags = irqd_get_trigger_type(&desc->irq_data);
668 irq_settings_set_trigger_mask(desc, flags);
669 irqd_clear(&desc->irq_data, IRQD_LEVEL);
670 irq_settings_clr_level(desc);
671 if (flags & IRQ_TYPE_LEVEL_MASK) {
672 irq_settings_set_level(desc);
673 irqd_set(&desc->irq_data, IRQD_LEVEL);
674 }
46732475 675
d4d5e089 676 ret = 0;
8fff39e0 677 break;
876dbd4c 678 default:
97fd75b7 679 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
a1ff541a 680 flags, irq_desc_get_irq(desc), chip->irq_set_type);
0c5d1eb7 681 }
d4d5e089
TG
682 if (unmask)
683 unmask_irq(desc);
82736f4d
UKK
684 return ret;
685}
686
293a7a0a
TG
687#ifdef CONFIG_HARDIRQS_SW_RESEND
688int irq_set_parent(int irq, int parent_irq)
689{
690 unsigned long flags;
691 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
692
693 if (!desc)
694 return -EINVAL;
695
696 desc->parent_irq = parent_irq;
697
698 irq_put_desc_unlock(desc, flags);
699 return 0;
700}
3118dac5 701EXPORT_SYMBOL_GPL(irq_set_parent);
293a7a0a
TG
702#endif
703
b25c340c
TG
704/*
705 * Default primary interrupt handler for threaded interrupts. Is
706 * assigned as primary handler when request_threaded_irq is called
707 * with handler == NULL. Useful for oneshot interrupts.
708 */
709static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
710{
711 return IRQ_WAKE_THREAD;
712}
713
399b5da2
TG
714/*
715 * Primary handler for nested threaded interrupts. Should never be
716 * called.
717 */
718static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
719{
720 WARN(1, "Primary handler called for nested irq %d\n", irq);
721 return IRQ_NONE;
722}
723
2a1d3ab8
TG
724static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id)
725{
726 WARN(1, "Secondary action handler called for irq %d\n", irq);
727 return IRQ_NONE;
728}
729
3aa551c9
TG
730static int irq_wait_for_interrupt(struct irqaction *action)
731{
550acb19
IY
732 set_current_state(TASK_INTERRUPTIBLE);
733
3aa551c9 734 while (!kthread_should_stop()) {
f48fe81e
TG
735
736 if (test_and_clear_bit(IRQTF_RUNTHREAD,
737 &action->thread_flags)) {
3aa551c9
TG
738 __set_current_state(TASK_RUNNING);
739 return 0;
f48fe81e
TG
740 }
741 schedule();
550acb19 742 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 743 }
550acb19 744 __set_current_state(TASK_RUNNING);
3aa551c9
TG
745 return -1;
746}
747
b25c340c
TG
748/*
749 * Oneshot interrupts keep the irq line masked until the threaded
750 * handler finished. unmask if the interrupt has not been disabled and
751 * is marked MASKED.
752 */
b5faba21 753static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 754 struct irqaction *action)
b25c340c 755{
2a1d3ab8
TG
756 if (!(desc->istate & IRQS_ONESHOT) ||
757 action->handler == irq_forced_secondary_handler)
b5faba21 758 return;
0b1adaa0 759again:
3876ec9e 760 chip_bus_lock(desc);
239007b8 761 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
762
763 /*
764 * Implausible though it may be we need to protect us against
765 * the following scenario:
766 *
767 * The thread is faster done than the hard interrupt handler
768 * on the other CPU. If we unmask the irq line then the
769 * interrupt can come in again and masks the line, leaves due
009b4c3b 770 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
771 *
772 * This also serializes the state of shared oneshot handlers
773 * versus "desc->threads_onehsot |= action->thread_mask;" in
774 * irq_wake_thread(). See the comment there which explains the
775 * serialization.
0b1adaa0 776 */
32f4125e 777 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 778 raw_spin_unlock_irq(&desc->lock);
3876ec9e 779 chip_bus_sync_unlock(desc);
0b1adaa0
TG
780 cpu_relax();
781 goto again;
782 }
783
b5faba21
TG
784 /*
785 * Now check again, whether the thread should run. Otherwise
786 * we would clear the threads_oneshot bit of this thread which
787 * was just set.
788 */
f3f79e38 789 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
790 goto out_unlock;
791
792 desc->threads_oneshot &= ~action->thread_mask;
793
32f4125e
TG
794 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
795 irqd_irq_masked(&desc->irq_data))
328a4978 796 unmask_threaded_irq(desc);
32f4125e 797
b5faba21 798out_unlock:
239007b8 799 raw_spin_unlock_irq(&desc->lock);
3876ec9e 800 chip_bus_sync_unlock(desc);
b25c340c
TG
801}
802
61f38261 803#ifdef CONFIG_SMP
591d2fb0 804/*
b04c644e 805 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
806 */
807static void
808irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
809{
810 cpumask_var_t mask;
04aa530e 811 bool valid = true;
591d2fb0
TG
812
813 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
814 return;
815
816 /*
817 * In case we are out of memory we set IRQTF_AFFINITY again and
818 * try again next time
819 */
820 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
821 set_bit(IRQTF_AFFINITY, &action->thread_flags);
822 return;
823 }
824
239007b8 825 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
826 /*
827 * This code is triggered unconditionally. Check the affinity
828 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
829 */
d170fe7d 830 if (cpumask_available(desc->irq_common_data.affinity))
9df872fa 831 cpumask_copy(mask, desc->irq_common_data.affinity);
04aa530e
TG
832 else
833 valid = false;
239007b8 834 raw_spin_unlock_irq(&desc->lock);
591d2fb0 835
04aa530e
TG
836 if (valid)
837 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
838 free_cpumask_var(mask);
839}
61f38261
BP
840#else
841static inline void
842irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
843#endif
591d2fb0 844
8d32a307
TG
845/*
846 * Interrupts which are not explicitely requested as threaded
847 * interrupts rely on the implicit bh/preempt disable of the hard irq
848 * context. So we need to disable bh here to avoid deadlocks and other
849 * side effects.
850 */
3a43e05f 851static irqreturn_t
8d32a307
TG
852irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
853{
3a43e05f
SAS
854 irqreturn_t ret;
855
8d32a307 856 local_bh_disable();
3a43e05f 857 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 858 irq_finalize_oneshot(desc, action);
8d32a307 859 local_bh_enable();
3a43e05f 860 return ret;
8d32a307
TG
861}
862
863/*
f788e7bf 864 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
865 * preemtible - many of them need to sleep and wait for slow busses to
866 * complete.
867 */
3a43e05f
SAS
868static irqreturn_t irq_thread_fn(struct irq_desc *desc,
869 struct irqaction *action)
8d32a307 870{
3a43e05f
SAS
871 irqreturn_t ret;
872
873 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 874 irq_finalize_oneshot(desc, action);
3a43e05f 875 return ret;
8d32a307
TG
876}
877
7140ea19
IY
878static void wake_threads_waitq(struct irq_desc *desc)
879{
c685689f 880 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
881 wake_up(&desc->wait_for_threads);
882}
883
67d12145 884static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
885{
886 struct task_struct *tsk = current;
887 struct irq_desc *desc;
888 struct irqaction *action;
889
890 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
891 return;
892
893 action = kthread_data(tsk);
894
fb21affa 895 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 896 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
897
898
899 desc = irq_to_desc(action->irq);
900 /*
901 * If IRQTF_RUNTHREAD is set, we need to decrement
902 * desc->threads_active and wake possible waiters.
903 */
904 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
905 wake_threads_waitq(desc);
906
907 /* Prevent a stale desc->threads_oneshot */
908 irq_finalize_oneshot(desc, action);
909}
910
2a1d3ab8
TG
911static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action)
912{
913 struct irqaction *secondary = action->secondary;
914
915 if (WARN_ON_ONCE(!secondary))
916 return;
917
918 raw_spin_lock_irq(&desc->lock);
919 __irq_wake_thread(desc, secondary);
920 raw_spin_unlock_irq(&desc->lock);
921}
922
3aa551c9
TG
923/*
924 * Interrupt handler thread
925 */
926static int irq_thread(void *data)
927{
67d12145 928 struct callback_head on_exit_work;
3aa551c9
TG
929 struct irqaction *action = data;
930 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
931 irqreturn_t (*handler_fn)(struct irq_desc *desc,
932 struct irqaction *action);
3aa551c9 933
540b60e2 934 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
935 &action->thread_flags))
936 handler_fn = irq_forced_thread_fn;
937 else
938 handler_fn = irq_thread_fn;
939
41f9d29f 940 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 941 task_work_add(current, &on_exit_work, false);
3aa551c9 942
f3de44ed
SM
943 irq_thread_check_affinity(desc, action);
944
3aa551c9 945 while (!irq_wait_for_interrupt(action)) {
7140ea19 946 irqreturn_t action_ret;
3aa551c9 947
591d2fb0
TG
948 irq_thread_check_affinity(desc, action);
949
7140ea19 950 action_ret = handler_fn(desc, action);
1e77d0a1
TG
951 if (action_ret == IRQ_HANDLED)
952 atomic_inc(&desc->threads_handled);
2a1d3ab8
TG
953 if (action_ret == IRQ_WAKE_THREAD)
954 irq_wake_secondary(desc, action);
3aa551c9 955
7140ea19 956 wake_threads_waitq(desc);
3aa551c9
TG
957 }
958
7140ea19
IY
959 /*
960 * This is the regular exit path. __free_irq() is stopping the
961 * thread via kthread_stop() after calling
962 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
963 * oneshot mask bit can be set. We cannot verify that as we
964 * cannot touch the oneshot mask at this point anymore as
965 * __setup_irq() might have given out currents thread_mask
966 * again.
3aa551c9 967 */
4d1d61a6 968 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
969 return 0;
970}
971
a92444c6
TG
972/**
973 * irq_wake_thread - wake the irq thread for the action identified by dev_id
974 * @irq: Interrupt line
975 * @dev_id: Device identity for which the thread should be woken
976 *
977 */
978void irq_wake_thread(unsigned int irq, void *dev_id)
979{
980 struct irq_desc *desc = irq_to_desc(irq);
981 struct irqaction *action;
982 unsigned long flags;
983
984 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
985 return;
986
987 raw_spin_lock_irqsave(&desc->lock, flags);
f944b5a7 988 for_each_action_of_desc(desc, action) {
a92444c6
TG
989 if (action->dev_id == dev_id) {
990 if (action->thread)
991 __irq_wake_thread(desc, action);
992 break;
993 }
994 }
995 raw_spin_unlock_irqrestore(&desc->lock, flags);
996}
997EXPORT_SYMBOL_GPL(irq_wake_thread);
998
2a1d3ab8 999static int irq_setup_forced_threading(struct irqaction *new)
8d32a307
TG
1000{
1001 if (!force_irqthreads)
2a1d3ab8 1002 return 0;
8d32a307 1003 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
2a1d3ab8 1004 return 0;
8d32a307
TG
1005
1006 new->flags |= IRQF_ONESHOT;
1007
2a1d3ab8
TG
1008 /*
1009 * Handle the case where we have a real primary handler and a
1010 * thread handler. We force thread them as well by creating a
1011 * secondary action.
1012 */
1013 if (new->handler != irq_default_primary_handler && new->thread_fn) {
1014 /* Allocate the secondary action */
1015 new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1016 if (!new->secondary)
1017 return -ENOMEM;
1018 new->secondary->handler = irq_forced_secondary_handler;
1019 new->secondary->thread_fn = new->thread_fn;
1020 new->secondary->dev_id = new->dev_id;
1021 new->secondary->irq = new->irq;
1022 new->secondary->name = new->name;
8d32a307 1023 }
2a1d3ab8
TG
1024 /* Deal with the primary handler */
1025 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
1026 new->thread_fn = new->handler;
1027 new->handler = irq_default_primary_handler;
1028 return 0;
8d32a307
TG
1029}
1030
c1bacbae
TG
1031static int irq_request_resources(struct irq_desc *desc)
1032{
1033 struct irq_data *d = &desc->irq_data;
1034 struct irq_chip *c = d->chip;
1035
1036 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1037}
1038
1039static void irq_release_resources(struct irq_desc *desc)
1040{
1041 struct irq_data *d = &desc->irq_data;
1042 struct irq_chip *c = d->chip;
1043
1044 if (c->irq_release_resources)
1045 c->irq_release_resources(d);
1046}
1047
2a1d3ab8
TG
1048static int
1049setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary)
1050{
1051 struct task_struct *t;
1052 struct sched_param param = {
1053 .sched_priority = MAX_USER_RT_PRIO/2,
1054 };
1055
1056 if (!secondary) {
1057 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1058 new->name);
1059 } else {
1060 t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq,
1061 new->name);
1062 param.sched_priority -= 1;
1063 }
1064
1065 if (IS_ERR(t))
1066 return PTR_ERR(t);
1067
1068 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
1069
1070 /*
1071 * We keep the reference to the task struct even if
1072 * the thread dies to avoid that the interrupt code
1073 * references an already freed task_struct.
1074 */
1075 get_task_struct(t);
1076 new->thread = t;
1077 /*
1078 * Tell the thread to set its affinity. This is
1079 * important for shared interrupt handlers as we do
1080 * not invoke setup_affinity() for the secondary
1081 * handlers as everything is already set up. Even for
1082 * interrupts marked with IRQF_NO_BALANCE this is
1083 * correct as we want the thread to move to the cpu(s)
1084 * on which the requesting code placed the interrupt.
1085 */
1086 set_bit(IRQTF_AFFINITY, &new->thread_flags);
1087 return 0;
1088}
1089
1da177e4
LT
1090/*
1091 * Internal function to register an irqaction - typically used to
1092 * allocate special interrupts that are part of the architecture.
1093 */
d3c60047 1094static int
327ec569 1095__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1096{
f17c7545 1097 struct irqaction *old, **old_ptr;
b5faba21 1098 unsigned long flags, thread_mask = 0;
3b8249e7 1099 int ret, nested, shared = 0;
1da177e4 1100
7d94f7ca 1101 if (!desc)
c2b5a251
MW
1102 return -EINVAL;
1103
6b8ff312 1104 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1105 return -ENOSYS;
b6873807
SAS
1106 if (!try_module_get(desc->owner))
1107 return -ENODEV;
1da177e4 1108
2a1d3ab8
TG
1109 new->irq = irq;
1110
4b357dae
JH
1111 /*
1112 * If the trigger type is not specified by the caller,
1113 * then use the default for this interrupt.
1114 */
1115 if (!(new->flags & IRQF_TRIGGER_MASK))
1116 new->flags |= irqd_get_trigger_type(&desc->irq_data);
1117
3aa551c9 1118 /*
399b5da2
TG
1119 * Check whether the interrupt nests into another interrupt
1120 * thread.
1121 */
1ccb4e61 1122 nested = irq_settings_is_nested_thread(desc);
399b5da2 1123 if (nested) {
b6873807
SAS
1124 if (!new->thread_fn) {
1125 ret = -EINVAL;
1126 goto out_mput;
1127 }
399b5da2
TG
1128 /*
1129 * Replace the primary handler which was provided from
1130 * the driver for non nested interrupt handling by the
1131 * dummy function which warns when called.
1132 */
1133 new->handler = irq_nested_primary_handler;
8d32a307 1134 } else {
2a1d3ab8
TG
1135 if (irq_settings_can_thread(desc)) {
1136 ret = irq_setup_forced_threading(new);
1137 if (ret)
1138 goto out_mput;
1139 }
399b5da2
TG
1140 }
1141
3aa551c9 1142 /*
399b5da2
TG
1143 * Create a handler thread when a thread function is supplied
1144 * and the interrupt does not nest into another interrupt
1145 * thread.
3aa551c9 1146 */
399b5da2 1147 if (new->thread_fn && !nested) {
2a1d3ab8
TG
1148 ret = setup_irq_thread(new, irq, false);
1149 if (ret)
b6873807 1150 goto out_mput;
2a1d3ab8
TG
1151 if (new->secondary) {
1152 ret = setup_irq_thread(new->secondary, irq, true);
1153 if (ret)
1154 goto out_thread;
b6873807 1155 }
3aa551c9
TG
1156 }
1157
dc9b229a
TG
1158 /*
1159 * Drivers are often written to work w/o knowledge about the
1160 * underlying irq chip implementation, so a request for a
1161 * threaded irq without a primary hard irq context handler
1162 * requires the ONESHOT flag to be set. Some irq chips like
1163 * MSI based interrupts are per se one shot safe. Check the
1164 * chip flags, so we can avoid the unmask dance at the end of
1165 * the threaded handler for those.
1166 */
1167 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1168 new->flags &= ~IRQF_ONESHOT;
1169
3a90795e
TG
1170 chip_bus_lock(desc);
1171
1da177e4
LT
1172 /*
1173 * The following block of code has to be executed atomically
1174 */
239007b8 1175 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1176 old_ptr = &desc->action;
1177 old = *old_ptr;
06fcb0c6 1178 if (old) {
e76de9f8
TG
1179 /*
1180 * Can't share interrupts unless both agree to and are
1181 * the same type (level, edge, polarity). So both flag
3cca53b0 1182 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1183 * set the trigger type must match. Also all must
1184 * agree on ONESHOT.
e76de9f8 1185 */
382bd4de
HG
1186 unsigned int oldtype = irqd_get_trigger_type(&desc->irq_data);
1187
3cca53b0 1188 if (!((old->flags & new->flags) & IRQF_SHARED) ||
382bd4de 1189 (oldtype != (new->flags & IRQF_TRIGGER_MASK)) ||
f5d89470 1190 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1191 goto mismatch;
1192
f5163427 1193 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1194 if ((old->flags & IRQF_PERCPU) !=
1195 (new->flags & IRQF_PERCPU))
f5163427 1196 goto mismatch;
1da177e4
LT
1197
1198 /* add new interrupt at end of irq queue */
1199 do {
52abb700
TG
1200 /*
1201 * Or all existing action->thread_mask bits,
1202 * so we can find the next zero bit for this
1203 * new action.
1204 */
b5faba21 1205 thread_mask |= old->thread_mask;
f17c7545
IM
1206 old_ptr = &old->next;
1207 old = *old_ptr;
1da177e4
LT
1208 } while (old);
1209 shared = 1;
1210 }
1211
b5faba21 1212 /*
52abb700
TG
1213 * Setup the thread mask for this irqaction for ONESHOT. For
1214 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1215 * conditional in irq_wake_thread().
b5faba21 1216 */
52abb700
TG
1217 if (new->flags & IRQF_ONESHOT) {
1218 /*
1219 * Unlikely to have 32 resp 64 irqs sharing one line,
1220 * but who knows.
1221 */
1222 if (thread_mask == ~0UL) {
1223 ret = -EBUSY;
cba4235e 1224 goto out_unlock;
52abb700
TG
1225 }
1226 /*
1227 * The thread_mask for the action is or'ed to
1228 * desc->thread_active to indicate that the
1229 * IRQF_ONESHOT thread handler has been woken, but not
1230 * yet finished. The bit is cleared when a thread
1231 * completes. When all threads of a shared interrupt
1232 * line have completed desc->threads_active becomes
1233 * zero and the interrupt line is unmasked. See
1234 * handle.c:irq_wake_thread() for further information.
1235 *
1236 * If no thread is woken by primary (hard irq context)
1237 * interrupt handlers, then desc->threads_active is
1238 * also checked for zero to unmask the irq line in the
1239 * affected hard irq flow handlers
1240 * (handle_[fasteoi|level]_irq).
1241 *
1242 * The new action gets the first zero bit of
1243 * thread_mask assigned. See the loop above which or's
1244 * all existing action->thread_mask bits.
1245 */
1246 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1247
dc9b229a
TG
1248 } else if (new->handler == irq_default_primary_handler &&
1249 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1250 /*
1251 * The interrupt was requested with handler = NULL, so
1252 * we use the default primary handler for it. But it
1253 * does not have the oneshot flag set. In combination
1254 * with level interrupts this is deadly, because the
1255 * default primary handler just wakes the thread, then
1256 * the irq lines is reenabled, but the device still
1257 * has the level irq asserted. Rinse and repeat....
1258 *
1259 * While this works for edge type interrupts, we play
1260 * it safe and reject unconditionally because we can't
1261 * say for sure which type this interrupt really
1262 * has. The type flags are unreliable as the
1263 * underlying chip implementation can override them.
1264 */
97fd75b7 1265 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1266 irq);
1267 ret = -EINVAL;
cba4235e 1268 goto out_unlock;
b5faba21 1269 }
b5faba21 1270
1da177e4 1271 if (!shared) {
c1bacbae
TG
1272 ret = irq_request_resources(desc);
1273 if (ret) {
1274 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1275 new->name, irq, desc->irq_data.chip->name);
cba4235e 1276 goto out_unlock;
c1bacbae
TG
1277 }
1278
3aa551c9
TG
1279 init_waitqueue_head(&desc->wait_for_threads);
1280
e76de9f8 1281 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1282 if (new->flags & IRQF_TRIGGER_MASK) {
a1ff541a
JL
1283 ret = __irq_set_trigger(desc,
1284 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1285
fa07ab72
HK
1286 if (ret) {
1287 irq_release_resources(desc);
cba4235e 1288 goto out_unlock;
fa07ab72 1289 }
091738a2 1290 }
6a6de9ef 1291
009b4c3b 1292 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1293 IRQS_ONESHOT | IRQS_WAITING);
1294 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1295
a005677b
TG
1296 if (new->flags & IRQF_PERCPU) {
1297 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1298 irq_settings_set_per_cpu(desc);
1299 }
6a58fb3b 1300
b25c340c 1301 if (new->flags & IRQF_ONESHOT)
3d67baec 1302 desc->istate |= IRQS_ONESHOT;
b25c340c 1303
2e051552
TG
1304 /* Exclude IRQ from balancing if requested */
1305 if (new->flags & IRQF_NOBALANCING) {
1306 irq_settings_set_no_balancing(desc);
1307 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1308 }
1309
04c848d3 1310 if (irq_settings_can_autoenable(desc)) {
4cde9c6b 1311 irq_startup(desc, IRQ_RESEND, IRQ_START_COND);
04c848d3
TG
1312 } else {
1313 /*
1314 * Shared interrupts do not go well with disabling
1315 * auto enable. The sharing interrupt might request
1316 * it while it's still disabled and then wait for
1317 * interrupts forever.
1318 */
1319 WARN_ON_ONCE(new->flags & IRQF_SHARED);
e76de9f8
TG
1320 /* Undo nested disables: */
1321 desc->depth = 1;
04c848d3 1322 }
18404756 1323
876dbd4c
TG
1324 } else if (new->flags & IRQF_TRIGGER_MASK) {
1325 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
7ee7e87d 1326 unsigned int omsk = irqd_get_trigger_type(&desc->irq_data);
876dbd4c
TG
1327
1328 if (nmsk != omsk)
1329 /* hope the handler works with current trigger mode */
a395d6a7 1330 pr_warn("irq %d uses trigger mode %u; requested %u\n",
7ee7e87d 1331 irq, omsk, nmsk);
1da177e4 1332 }
82736f4d 1333
f17c7545 1334 *old_ptr = new;
82736f4d 1335
cab303be
TG
1336 irq_pm_install_action(desc, new);
1337
8528b0f1
LT
1338 /* Reset broken irq detection when installing new handler */
1339 desc->irq_count = 0;
1340 desc->irqs_unhandled = 0;
1adb0850
TG
1341
1342 /*
1343 * Check whether we disabled the irq via the spurious handler
1344 * before. Reenable it and give it another chance.
1345 */
7acdd53e
TG
1346 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1347 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
79ff1cda 1348 __enable_irq(desc);
1adb0850
TG
1349 }
1350
239007b8 1351 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a90795e 1352 chip_bus_sync_unlock(desc);
1da177e4 1353
b2d3d61a
DL
1354 irq_setup_timings(desc, new);
1355
69ab8494
TG
1356 /*
1357 * Strictly no need to wake it up, but hung_task complains
1358 * when no hard interrupt wakes the thread up.
1359 */
1360 if (new->thread)
1361 wake_up_process(new->thread);
2a1d3ab8
TG
1362 if (new->secondary)
1363 wake_up_process(new->secondary->thread);
69ab8494 1364
2c6927a3 1365 register_irq_proc(irq, desc);
087cdfb6 1366 irq_add_debugfs_entry(irq, desc);
1da177e4
LT
1367 new->dir = NULL;
1368 register_handler_proc(irq, new);
1da177e4 1369 return 0;
f5163427
DS
1370
1371mismatch:
3cca53b0 1372 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1373 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1374 irq, new->flags, new->name, old->flags, old->name);
1375#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1376 dump_stack();
3f050447 1377#endif
f5d89470 1378 }
3aa551c9
TG
1379 ret = -EBUSY;
1380
cba4235e 1381out_unlock:
1c389795 1382 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7 1383
3a90795e
TG
1384 chip_bus_sync_unlock(desc);
1385
3aa551c9 1386out_thread:
3aa551c9
TG
1387 if (new->thread) {
1388 struct task_struct *t = new->thread;
1389
1390 new->thread = NULL;
05d74efa 1391 kthread_stop(t);
3aa551c9
TG
1392 put_task_struct(t);
1393 }
2a1d3ab8
TG
1394 if (new->secondary && new->secondary->thread) {
1395 struct task_struct *t = new->secondary->thread;
1396
1397 new->secondary->thread = NULL;
1398 kthread_stop(t);
1399 put_task_struct(t);
1400 }
b6873807
SAS
1401out_mput:
1402 module_put(desc->owner);
3aa551c9 1403 return ret;
1da177e4
LT
1404}
1405
d3c60047
TG
1406/**
1407 * setup_irq - setup an interrupt
1408 * @irq: Interrupt line to setup
1409 * @act: irqaction for the interrupt
1410 *
1411 * Used to statically setup interrupts in the early boot process.
1412 */
1413int setup_irq(unsigned int irq, struct irqaction *act)
1414{
986c011d 1415 int retval;
d3c60047
TG
1416 struct irq_desc *desc = irq_to_desc(irq);
1417
9b5d585d 1418 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
31d9d9b6 1419 return -EINVAL;
be45beb2
JH
1420
1421 retval = irq_chip_pm_get(&desc->irq_data);
1422 if (retval < 0)
1423 return retval;
1424
986c011d 1425 retval = __setup_irq(irq, desc, act);
986c011d 1426
be45beb2
JH
1427 if (retval)
1428 irq_chip_pm_put(&desc->irq_data);
1429
986c011d 1430 return retval;
d3c60047 1431}
eb53b4e8 1432EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1433
31d9d9b6 1434/*
cbf94f06
MD
1435 * Internal function to unregister an irqaction - used to free
1436 * regular and special interrupts that are part of the architecture.
1da177e4 1437 */
cbf94f06 1438static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1439{
d3c60047 1440 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1441 struct irqaction *action, **action_ptr;
1da177e4
LT
1442 unsigned long flags;
1443
ae88a23b 1444 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1445
7d94f7ca 1446 if (!desc)
f21cfb25 1447 return NULL;
1da177e4 1448
abc7e40c 1449 chip_bus_lock(desc);
239007b8 1450 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1451
1452 /*
1453 * There can be multiple actions per IRQ descriptor, find the right
1454 * one based on the dev_id:
1455 */
f17c7545 1456 action_ptr = &desc->action;
1da177e4 1457 for (;;) {
f17c7545 1458 action = *action_ptr;
1da177e4 1459
ae88a23b
IM
1460 if (!action) {
1461 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1462 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1463 chip_bus_sync_unlock(desc);
f21cfb25 1464 return NULL;
ae88a23b 1465 }
1da177e4 1466
8316e381
IM
1467 if (action->dev_id == dev_id)
1468 break;
f17c7545 1469 action_ptr = &action->next;
ae88a23b 1470 }
dbce706e 1471
ae88a23b 1472 /* Found it - now remove it from the list of entries: */
f17c7545 1473 *action_ptr = action->next;
ae88a23b 1474
cab303be
TG
1475 irq_pm_remove_action(desc, action);
1476
ae88a23b 1477 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1478 if (!desc->action) {
e9849777 1479 irq_settings_clr_disable_unlazy(desc);
46999238 1480 irq_shutdown(desc);
c1bacbae 1481 irq_release_resources(desc);
b2d3d61a 1482 irq_remove_timings(desc);
c1bacbae 1483 }
3aa551c9 1484
e7a297b0
PWJ
1485#ifdef CONFIG_SMP
1486 /* make sure affinity_hint is cleaned up */
1487 if (WARN_ON_ONCE(desc->affinity_hint))
1488 desc->affinity_hint = NULL;
1489#endif
1490
239007b8 1491 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1492 chip_bus_sync_unlock(desc);
ae88a23b
IM
1493
1494 unregister_handler_proc(irq, action);
1495
1496 /* Make sure it's not being used on another CPU: */
1497 synchronize_irq(irq);
1da177e4 1498
70edcd77 1499#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1500 /*
1501 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1502 * event to happen even now it's being freed, so let's make sure that
1503 * is so by doing an extra call to the handler ....
1504 *
1505 * ( We do this after actually deregistering it, to make sure that a
1506 * 'real' IRQ doesn't run in * parallel with our fake. )
1507 */
1508 if (action->flags & IRQF_SHARED) {
1509 local_irq_save(flags);
1510 action->handler(irq, dev_id);
1511 local_irq_restore(flags);
1da177e4 1512 }
ae88a23b 1513#endif
2d860ad7
LT
1514
1515 if (action->thread) {
05d74efa 1516 kthread_stop(action->thread);
2d860ad7 1517 put_task_struct(action->thread);
2a1d3ab8
TG
1518 if (action->secondary && action->secondary->thread) {
1519 kthread_stop(action->secondary->thread);
1520 put_task_struct(action->secondary->thread);
1521 }
2d860ad7
LT
1522 }
1523
be45beb2 1524 irq_chip_pm_put(&desc->irq_data);
b6873807 1525 module_put(desc->owner);
2a1d3ab8 1526 kfree(action->secondary);
f21cfb25
MD
1527 return action;
1528}
1529
cbf94f06
MD
1530/**
1531 * remove_irq - free an interrupt
1532 * @irq: Interrupt line to free
1533 * @act: irqaction for the interrupt
1534 *
1535 * Used to remove interrupts statically setup by the early boot process.
1536 */
1537void remove_irq(unsigned int irq, struct irqaction *act)
1538{
31d9d9b6
MZ
1539 struct irq_desc *desc = irq_to_desc(irq);
1540
1541 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
a7e60e55 1542 __free_irq(irq, act->dev_id);
cbf94f06 1543}
eb53b4e8 1544EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1545
f21cfb25
MD
1546/**
1547 * free_irq - free an interrupt allocated with request_irq
1548 * @irq: Interrupt line to free
1549 * @dev_id: Device identity to free
1550 *
1551 * Remove an interrupt handler. The handler is removed and if the
1552 * interrupt line is no longer in use by any driver it is disabled.
1553 * On a shared IRQ the caller must ensure the interrupt is disabled
1554 * on the card it drives before calling this function. The function
1555 * does not return until any executing interrupts for this IRQ
1556 * have completed.
1557 *
1558 * This function must not be called from interrupt context.
25ce4be7
CH
1559 *
1560 * Returns the devname argument passed to request_irq.
f21cfb25 1561 */
25ce4be7 1562const void *free_irq(unsigned int irq, void *dev_id)
f21cfb25 1563{
70aedd24 1564 struct irq_desc *desc = irq_to_desc(irq);
25ce4be7
CH
1565 struct irqaction *action;
1566 const char *devname;
70aedd24 1567
31d9d9b6 1568 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
25ce4be7 1569 return NULL;
70aedd24 1570
cd7eab44
BH
1571#ifdef CONFIG_SMP
1572 if (WARN_ON(desc->affinity_notify))
1573 desc->affinity_notify = NULL;
1574#endif
1575
25ce4be7
CH
1576 action = __free_irq(irq, dev_id);
1577 devname = action->name;
1578 kfree(action);
1579 return devname;
1da177e4 1580}
1da177e4
LT
1581EXPORT_SYMBOL(free_irq);
1582
1583/**
3aa551c9 1584 * request_threaded_irq - allocate an interrupt line
1da177e4 1585 * @irq: Interrupt line to allocate
3aa551c9
TG
1586 * @handler: Function to be called when the IRQ occurs.
1587 * Primary handler for threaded interrupts
b25c340c
TG
1588 * If NULL and thread_fn != NULL the default
1589 * primary handler is installed
f48fe81e
TG
1590 * @thread_fn: Function called from the irq handler thread
1591 * If NULL, no irq thread is created
1da177e4
LT
1592 * @irqflags: Interrupt type flags
1593 * @devname: An ascii name for the claiming device
1594 * @dev_id: A cookie passed back to the handler function
1595 *
1596 * This call allocates interrupt resources and enables the
1597 * interrupt line and IRQ handling. From the point this
1598 * call is made your handler function may be invoked. Since
1599 * your handler function must clear any interrupt the board
1600 * raises, you must take care both to initialise your hardware
1601 * and to set up the interrupt handler in the right order.
1602 *
3aa551c9 1603 * If you want to set up a threaded irq handler for your device
6d21af4f 1604 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1605 * still called in hard interrupt context and has to check
1606 * whether the interrupt originates from the device. If yes it
1607 * needs to disable the interrupt on the device and return
39a2eddb 1608 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1609 * @thread_fn. This split handler design is necessary to support
1610 * shared interrupts.
1611 *
1da177e4
LT
1612 * Dev_id must be globally unique. Normally the address of the
1613 * device data structure is used as the cookie. Since the handler
1614 * receives this value it makes sense to use it.
1615 *
1616 * If your interrupt is shared you must pass a non NULL dev_id
1617 * as this is required when freeing the interrupt.
1618 *
1619 * Flags:
1620 *
3cca53b0 1621 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1622 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1623 *
1624 */
3aa551c9
TG
1625int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1626 irq_handler_t thread_fn, unsigned long irqflags,
1627 const char *devname, void *dev_id)
1da177e4 1628{
06fcb0c6 1629 struct irqaction *action;
08678b08 1630 struct irq_desc *desc;
d3c60047 1631 int retval;
1da177e4 1632
e237a551
CF
1633 if (irq == IRQ_NOTCONNECTED)
1634 return -ENOTCONN;
1635
1da177e4
LT
1636 /*
1637 * Sanity-check: shared interrupts must pass in a real dev-ID,
1638 * otherwise we'll have trouble later trying to figure out
1639 * which interrupt is which (messes up the interrupt freeing
1640 * logic etc).
17f48034
RW
1641 *
1642 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1643 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 1644 */
17f48034
RW
1645 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1646 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1647 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 1648 return -EINVAL;
7d94f7ca 1649
cb5bc832 1650 desc = irq_to_desc(irq);
7d94f7ca 1651 if (!desc)
1da177e4 1652 return -EINVAL;
7d94f7ca 1653
31d9d9b6
MZ
1654 if (!irq_settings_can_request(desc) ||
1655 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1656 return -EINVAL;
b25c340c
TG
1657
1658 if (!handler) {
1659 if (!thread_fn)
1660 return -EINVAL;
1661 handler = irq_default_primary_handler;
1662 }
1da177e4 1663
45535732 1664 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1665 if (!action)
1666 return -ENOMEM;
1667
1668 action->handler = handler;
3aa551c9 1669 action->thread_fn = thread_fn;
1da177e4 1670 action->flags = irqflags;
1da177e4 1671 action->name = devname;
1da177e4
LT
1672 action->dev_id = dev_id;
1673
be45beb2 1674 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
1675 if (retval < 0) {
1676 kfree(action);
be45beb2 1677 return retval;
4396f46c 1678 }
be45beb2 1679
d3c60047 1680 retval = __setup_irq(irq, desc, action);
70aedd24 1681
2a1d3ab8 1682 if (retval) {
be45beb2 1683 irq_chip_pm_put(&desc->irq_data);
2a1d3ab8 1684 kfree(action->secondary);
377bf1e4 1685 kfree(action);
2a1d3ab8 1686 }
377bf1e4 1687
6d83f94d 1688#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1689 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1690 /*
1691 * It's a shared IRQ -- the driver ought to be prepared for it
1692 * to happen immediately, so let's make sure....
377bf1e4
AV
1693 * We disable the irq to make sure that a 'real' IRQ doesn't
1694 * run in parallel with our fake.
a304e1b8 1695 */
59845b1f 1696 unsigned long flags;
a304e1b8 1697
377bf1e4 1698 disable_irq(irq);
59845b1f 1699 local_irq_save(flags);
377bf1e4 1700
59845b1f 1701 handler(irq, dev_id);
377bf1e4 1702
59845b1f 1703 local_irq_restore(flags);
377bf1e4 1704 enable_irq(irq);
a304e1b8
DW
1705 }
1706#endif
1da177e4
LT
1707 return retval;
1708}
3aa551c9 1709EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1710
1711/**
1712 * request_any_context_irq - allocate an interrupt line
1713 * @irq: Interrupt line to allocate
1714 * @handler: Function to be called when the IRQ occurs.
1715 * Threaded handler for threaded interrupts.
1716 * @flags: Interrupt type flags
1717 * @name: An ascii name for the claiming device
1718 * @dev_id: A cookie passed back to the handler function
1719 *
1720 * This call allocates interrupt resources and enables the
1721 * interrupt line and IRQ handling. It selects either a
1722 * hardirq or threaded handling method depending on the
1723 * context.
1724 *
1725 * On failure, it returns a negative value. On success,
1726 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1727 */
1728int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1729 unsigned long flags, const char *name, void *dev_id)
1730{
e237a551 1731 struct irq_desc *desc;
ae731f8d
MZ
1732 int ret;
1733
e237a551
CF
1734 if (irq == IRQ_NOTCONNECTED)
1735 return -ENOTCONN;
1736
1737 desc = irq_to_desc(irq);
ae731f8d
MZ
1738 if (!desc)
1739 return -EINVAL;
1740
1ccb4e61 1741 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1742 ret = request_threaded_irq(irq, NULL, handler,
1743 flags, name, dev_id);
1744 return !ret ? IRQC_IS_NESTED : ret;
1745 }
1746
1747 ret = request_irq(irq, handler, flags, name, dev_id);
1748 return !ret ? IRQC_IS_HARDIRQ : ret;
1749}
1750EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1751
1e7c5fd2 1752void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1753{
1754 unsigned int cpu = smp_processor_id();
1755 unsigned long flags;
1756 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1757
1758 if (!desc)
1759 return;
1760
f35ad083
MZ
1761 /*
1762 * If the trigger type is not specified by the caller, then
1763 * use the default for this interrupt.
1764 */
1e7c5fd2 1765 type &= IRQ_TYPE_SENSE_MASK;
f35ad083
MZ
1766 if (type == IRQ_TYPE_NONE)
1767 type = irqd_get_trigger_type(&desc->irq_data);
1768
1e7c5fd2
MZ
1769 if (type != IRQ_TYPE_NONE) {
1770 int ret;
1771
a1ff541a 1772 ret = __irq_set_trigger(desc, type);
1e7c5fd2
MZ
1773
1774 if (ret) {
32cffdde 1775 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1776 goto out;
1777 }
1778 }
1779
31d9d9b6 1780 irq_percpu_enable(desc, cpu);
1e7c5fd2 1781out:
31d9d9b6
MZ
1782 irq_put_desc_unlock(desc, flags);
1783}
36a5df85 1784EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6 1785
f0cb3220
TP
1786/**
1787 * irq_percpu_is_enabled - Check whether the per cpu irq is enabled
1788 * @irq: Linux irq number to check for
1789 *
1790 * Must be called from a non migratable context. Returns the enable
1791 * state of a per cpu interrupt on the current cpu.
1792 */
1793bool irq_percpu_is_enabled(unsigned int irq)
1794{
1795 unsigned int cpu = smp_processor_id();
1796 struct irq_desc *desc;
1797 unsigned long flags;
1798 bool is_enabled;
1799
1800 desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1801 if (!desc)
1802 return false;
1803
1804 is_enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
1805 irq_put_desc_unlock(desc, flags);
1806
1807 return is_enabled;
1808}
1809EXPORT_SYMBOL_GPL(irq_percpu_is_enabled);
1810
31d9d9b6
MZ
1811void disable_percpu_irq(unsigned int irq)
1812{
1813 unsigned int cpu = smp_processor_id();
1814 unsigned long flags;
1815 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1816
1817 if (!desc)
1818 return;
1819
1820 irq_percpu_disable(desc, cpu);
1821 irq_put_desc_unlock(desc, flags);
1822}
36a5df85 1823EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1824
1825/*
1826 * Internal function to unregister a percpu irqaction.
1827 */
1828static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1829{
1830 struct irq_desc *desc = irq_to_desc(irq);
1831 struct irqaction *action;
1832 unsigned long flags;
1833
1834 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1835
1836 if (!desc)
1837 return NULL;
1838
1839 raw_spin_lock_irqsave(&desc->lock, flags);
1840
1841 action = desc->action;
1842 if (!action || action->percpu_dev_id != dev_id) {
1843 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1844 goto bad;
1845 }
1846
1847 if (!cpumask_empty(desc->percpu_enabled)) {
1848 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1849 irq, cpumask_first(desc->percpu_enabled));
1850 goto bad;
1851 }
1852
1853 /* Found it - now remove it from the list of entries: */
1854 desc->action = NULL;
1855
1856 raw_spin_unlock_irqrestore(&desc->lock, flags);
1857
1858 unregister_handler_proc(irq, action);
1859
be45beb2 1860 irq_chip_pm_put(&desc->irq_data);
31d9d9b6
MZ
1861 module_put(desc->owner);
1862 return action;
1863
1864bad:
1865 raw_spin_unlock_irqrestore(&desc->lock, flags);
1866 return NULL;
1867}
1868
1869/**
1870 * remove_percpu_irq - free a per-cpu interrupt
1871 * @irq: Interrupt line to free
1872 * @act: irqaction for the interrupt
1873 *
1874 * Used to remove interrupts statically setup by the early boot process.
1875 */
1876void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1877{
1878 struct irq_desc *desc = irq_to_desc(irq);
1879
1880 if (desc && irq_settings_is_per_cpu_devid(desc))
1881 __free_percpu_irq(irq, act->percpu_dev_id);
1882}
1883
1884/**
1885 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1886 * @irq: Interrupt line to free
1887 * @dev_id: Device identity to free
1888 *
1889 * Remove a percpu interrupt handler. The handler is removed, but
1890 * the interrupt line is not disabled. This must be done on each
1891 * CPU before calling this function. The function does not return
1892 * until any executing interrupts for this IRQ have completed.
1893 *
1894 * This function must not be called from interrupt context.
1895 */
1896void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1897{
1898 struct irq_desc *desc = irq_to_desc(irq);
1899
1900 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1901 return;
1902
1903 chip_bus_lock(desc);
1904 kfree(__free_percpu_irq(irq, dev_id));
1905 chip_bus_sync_unlock(desc);
1906}
aec2e2ad 1907EXPORT_SYMBOL_GPL(free_percpu_irq);
31d9d9b6
MZ
1908
1909/**
1910 * setup_percpu_irq - setup a per-cpu interrupt
1911 * @irq: Interrupt line to setup
1912 * @act: irqaction for the interrupt
1913 *
1914 * Used to statically setup per-cpu interrupts in the early boot process.
1915 */
1916int setup_percpu_irq(unsigned int irq, struct irqaction *act)
1917{
1918 struct irq_desc *desc = irq_to_desc(irq);
1919 int retval;
1920
1921 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1922 return -EINVAL;
be45beb2
JH
1923
1924 retval = irq_chip_pm_get(&desc->irq_data);
1925 if (retval < 0)
1926 return retval;
1927
31d9d9b6 1928 retval = __setup_irq(irq, desc, act);
31d9d9b6 1929
be45beb2
JH
1930 if (retval)
1931 irq_chip_pm_put(&desc->irq_data);
1932
31d9d9b6
MZ
1933 return retval;
1934}
1935
1936/**
1937 * request_percpu_irq - allocate a percpu interrupt line
1938 * @irq: Interrupt line to allocate
1939 * @handler: Function to be called when the IRQ occurs.
1940 * @devname: An ascii name for the claiming device
1941 * @dev_id: A percpu cookie passed back to the handler function
1942 *
a1b7febd
MR
1943 * This call allocates interrupt resources and enables the
1944 * interrupt on the local CPU. If the interrupt is supposed to be
1945 * enabled on other CPUs, it has to be done on each CPU using
1946 * enable_percpu_irq().
31d9d9b6
MZ
1947 *
1948 * Dev_id must be globally unique. It is a per-cpu variable, and
1949 * the handler gets called with the interrupted CPU's instance of
1950 * that variable.
1951 */
1952int request_percpu_irq(unsigned int irq, irq_handler_t handler,
1953 const char *devname, void __percpu *dev_id)
1954{
1955 struct irqaction *action;
1956 struct irq_desc *desc;
1957 int retval;
1958
1959 if (!dev_id)
1960 return -EINVAL;
1961
1962 desc = irq_to_desc(irq);
1963 if (!desc || !irq_settings_can_request(desc) ||
1964 !irq_settings_is_per_cpu_devid(desc))
1965 return -EINVAL;
1966
1967 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1968 if (!action)
1969 return -ENOMEM;
1970
1971 action->handler = handler;
2ed0e645 1972 action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
1973 action->name = devname;
1974 action->percpu_dev_id = dev_id;
1975
be45beb2 1976 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
1977 if (retval < 0) {
1978 kfree(action);
be45beb2 1979 return retval;
4396f46c 1980 }
be45beb2 1981
31d9d9b6 1982 retval = __setup_irq(irq, desc, action);
31d9d9b6 1983
be45beb2
JH
1984 if (retval) {
1985 irq_chip_pm_put(&desc->irq_data);
31d9d9b6 1986 kfree(action);
be45beb2 1987 }
31d9d9b6
MZ
1988
1989 return retval;
1990}
aec2e2ad 1991EXPORT_SYMBOL_GPL(request_percpu_irq);
1b7047ed
MZ
1992
1993/**
1994 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
1995 * @irq: Interrupt line that is forwarded to a VM
1996 * @which: One of IRQCHIP_STATE_* the caller wants to know about
1997 * @state: a pointer to a boolean where the state is to be storeed
1998 *
1999 * This call snapshots the internal irqchip state of an
2000 * interrupt, returning into @state the bit corresponding to
2001 * stage @which
2002 *
2003 * This function should be called with preemption disabled if the
2004 * interrupt controller has per-cpu registers.
2005 */
2006int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2007 bool *state)
2008{
2009 struct irq_desc *desc;
2010 struct irq_data *data;
2011 struct irq_chip *chip;
2012 unsigned long flags;
2013 int err = -EINVAL;
2014
2015 desc = irq_get_desc_buslock(irq, &flags, 0);
2016 if (!desc)
2017 return err;
2018
2019 data = irq_desc_get_irq_data(desc);
2020
2021 do {
2022 chip = irq_data_get_irq_chip(data);
2023 if (chip->irq_get_irqchip_state)
2024 break;
2025#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2026 data = data->parent_data;
2027#else
2028 data = NULL;
2029#endif
2030 } while (data);
2031
2032 if (data)
2033 err = chip->irq_get_irqchip_state(data, which, state);
2034
2035 irq_put_desc_busunlock(desc, flags);
2036 return err;
2037}
1ee4fb3e 2038EXPORT_SYMBOL_GPL(irq_get_irqchip_state);
1b7047ed
MZ
2039
2040/**
2041 * irq_set_irqchip_state - set the state of a forwarded interrupt.
2042 * @irq: Interrupt line that is forwarded to a VM
2043 * @which: State to be restored (one of IRQCHIP_STATE_*)
2044 * @val: Value corresponding to @which
2045 *
2046 * This call sets the internal irqchip state of an interrupt,
2047 * depending on the value of @which.
2048 *
2049 * This function should be called with preemption disabled if the
2050 * interrupt controller has per-cpu registers.
2051 */
2052int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2053 bool val)
2054{
2055 struct irq_desc *desc;
2056 struct irq_data *data;
2057 struct irq_chip *chip;
2058 unsigned long flags;
2059 int err = -EINVAL;
2060
2061 desc = irq_get_desc_buslock(irq, &flags, 0);
2062 if (!desc)
2063 return err;
2064
2065 data = irq_desc_get_irq_data(desc);
2066
2067 do {
2068 chip = irq_data_get_irq_chip(data);
2069 if (chip->irq_set_irqchip_state)
2070 break;
2071#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2072 data = data->parent_data;
2073#else
2074 data = NULL;
2075#endif
2076 } while (data);
2077
2078 if (data)
2079 err = chip->irq_set_irqchip_state(data, which, val);
2080
2081 irq_put_desc_busunlock(desc, flags);
2082 return err;
2083}
1ee4fb3e 2084EXPORT_SYMBOL_GPL(irq_set_irqchip_state);