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CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
0881e7bd 20#include <linux/sched/task.h>
ae7e81c0 21#include <uapi/linux/sched/types.h>
4d1d61a6 22#include <linux/task_work.h>
1da177e4
LT
23
24#include "internals.h"
25
8d32a307
TG
26#ifdef CONFIG_IRQ_FORCED_THREADING
27__read_mostly bool force_irqthreads;
28
29static int __init setup_forced_irqthreads(char *arg)
30{
31 force_irqthreads = true;
32 return 0;
33}
34early_param("threadirqs", setup_forced_irqthreads);
35#endif
36
18258f72 37static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 38{
32f4125e 39 bool inprogress;
1da177e4 40
a98ce5c6
HX
41 do {
42 unsigned long flags;
43
44 /*
45 * Wait until we're out of the critical section. This might
46 * give the wrong answer due to the lack of memory barriers.
47 */
32f4125e 48 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
49 cpu_relax();
50
51 /* Ok, that indicated we're done: double-check carefully. */
239007b8 52 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 53 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 54 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
55
56 /* Oops, that failed? */
32f4125e 57 } while (inprogress);
18258f72
TG
58}
59
60/**
61 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
62 * @irq: interrupt number to wait for
63 *
64 * This function waits for any pending hard IRQ handlers for this
65 * interrupt to complete before returning. If you use this
66 * function while holding a resource the IRQ handler may need you
67 * will deadlock. It does not take associated threaded handlers
68 * into account.
69 *
70 * Do not use this for shutdown scenarios where you must be sure
71 * that all parts (hardirq and threaded handler) have completed.
72 *
02cea395
PZ
73 * Returns: false if a threaded handler is active.
74 *
18258f72
TG
75 * This function may be called - with care - from IRQ context.
76 */
02cea395 77bool synchronize_hardirq(unsigned int irq)
18258f72
TG
78{
79 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 80
02cea395 81 if (desc) {
18258f72 82 __synchronize_hardirq(desc);
02cea395
PZ
83 return !atomic_read(&desc->threads_active);
84 }
85
86 return true;
18258f72
TG
87}
88EXPORT_SYMBOL(synchronize_hardirq);
89
90/**
91 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
92 * @irq: interrupt number to wait for
93 *
94 * This function waits for any pending IRQ handlers for this interrupt
95 * to complete before returning. If you use this function while
96 * holding a resource the IRQ handler may need you will deadlock.
97 *
98 * This function may be called - with care - from IRQ context.
99 */
100void synchronize_irq(unsigned int irq)
101{
102 struct irq_desc *desc = irq_to_desc(irq);
103
104 if (desc) {
105 __synchronize_hardirq(desc);
106 /*
107 * We made sure that no hardirq handler is
108 * running. Now verify that no threaded handlers are
109 * active.
110 */
111 wait_event(desc->wait_for_threads,
112 !atomic_read(&desc->threads_active));
113 }
1da177e4 114}
1da177e4
LT
115EXPORT_SYMBOL(synchronize_irq);
116
3aa551c9
TG
117#ifdef CONFIG_SMP
118cpumask_var_t irq_default_affinity;
119
9c255583 120static bool __irq_can_set_affinity(struct irq_desc *desc)
e019c249
JL
121{
122 if (!desc || !irqd_can_balance(&desc->irq_data) ||
123 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
9c255583
TG
124 return false;
125 return true;
e019c249
JL
126}
127
771ee3b0
TG
128/**
129 * irq_can_set_affinity - Check if the affinity of a given irq can be set
130 * @irq: Interrupt to check
131 *
132 */
133int irq_can_set_affinity(unsigned int irq)
134{
e019c249 135 return __irq_can_set_affinity(irq_to_desc(irq));
771ee3b0
TG
136}
137
9c255583
TG
138/**
139 * irq_can_set_affinity_usr - Check if affinity of a irq can be set from user space
140 * @irq: Interrupt to check
141 *
142 * Like irq_can_set_affinity() above, but additionally checks for the
143 * AFFINITY_MANAGED flag.
144 */
145bool irq_can_set_affinity_usr(unsigned int irq)
146{
147 struct irq_desc *desc = irq_to_desc(irq);
148
149 return __irq_can_set_affinity(desc) &&
150 !irqd_affinity_is_managed(&desc->irq_data);
151}
152
591d2fb0
TG
153/**
154 * irq_set_thread_affinity - Notify irq threads to adjust affinity
155 * @desc: irq descriptor which has affitnity changed
156 *
157 * We just set IRQTF_AFFINITY and delegate the affinity setting
158 * to the interrupt thread itself. We can not call
159 * set_cpus_allowed_ptr() here as we hold desc->lock and this
160 * code can be called from hard interrupt context.
161 */
162void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9 163{
f944b5a7 164 struct irqaction *action;
3aa551c9 165
f944b5a7 166 for_each_action_of_desc(desc, action)
3aa551c9 167 if (action->thread)
591d2fb0 168 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
169}
170
19e1d4e9
TG
171static void irq_validate_effective_affinity(struct irq_data *data)
172{
173#ifdef CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK
174 const struct cpumask *m = irq_data_get_effective_affinity_mask(data);
175 struct irq_chip *chip = irq_data_get_irq_chip(data);
176
177 if (!cpumask_empty(m))
178 return;
179 pr_warn_once("irq_chip %s did not update eff. affinity mask of irq %u\n",
180 chip->name, data->irq);
181#endif
182}
183
818b0f3b
JL
184int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
185 bool force)
186{
187 struct irq_desc *desc = irq_data_to_desc(data);
188 struct irq_chip *chip = irq_data_get_irq_chip(data);
189 int ret;
190
e43b3b58
TG
191 if (!chip || !chip->irq_set_affinity)
192 return -EINVAL;
193
01f8fa4f 194 ret = chip->irq_set_affinity(data, mask, force);
818b0f3b
JL
195 switch (ret) {
196 case IRQ_SET_MASK_OK:
2cb62547 197 case IRQ_SET_MASK_OK_DONE:
9df872fa 198 cpumask_copy(desc->irq_common_data.affinity, mask);
818b0f3b 199 case IRQ_SET_MASK_OK_NOCOPY:
19e1d4e9 200 irq_validate_effective_affinity(data);
818b0f3b
JL
201 irq_set_thread_affinity(desc);
202 ret = 0;
203 }
204
205 return ret;
206}
207
01f8fa4f
TG
208int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
209 bool force)
771ee3b0 210{
c2d0c555
DD
211 struct irq_chip *chip = irq_data_get_irq_chip(data);
212 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 213 int ret = 0;
771ee3b0 214
c2d0c555 215 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
216 return -EINVAL;
217
0ef5ca1e 218 if (irq_can_move_pcntxt(data)) {
01f8fa4f 219 ret = irq_do_set_affinity(data, mask, force);
1fa46f1f 220 } else {
c2d0c555 221 irqd_set_move_pending(data);
1fa46f1f 222 irq_copy_pending(desc, mask);
57b150cc 223 }
1fa46f1f 224
cd7eab44
BH
225 if (desc->affinity_notify) {
226 kref_get(&desc->affinity_notify->kref);
227 schedule_work(&desc->affinity_notify->work);
228 }
c2d0c555
DD
229 irqd_set(data, IRQD_AFFINITY_SET);
230
231 return ret;
232}
233
01f8fa4f 234int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
235{
236 struct irq_desc *desc = irq_to_desc(irq);
237 unsigned long flags;
238 int ret;
239
240 if (!desc)
241 return -EINVAL;
242
243 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 244 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 245 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 246 return ret;
771ee3b0
TG
247}
248
e7a297b0
PWJ
249int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
250{
e7a297b0 251 unsigned long flags;
31d9d9b6 252 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
253
254 if (!desc)
255 return -EINVAL;
e7a297b0 256 desc->affinity_hint = m;
02725e74 257 irq_put_desc_unlock(desc, flags);
e2e64a93 258 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
259 if (m)
260 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
261 return 0;
262}
263EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
264
cd7eab44
BH
265static void irq_affinity_notify(struct work_struct *work)
266{
267 struct irq_affinity_notify *notify =
268 container_of(work, struct irq_affinity_notify, work);
269 struct irq_desc *desc = irq_to_desc(notify->irq);
270 cpumask_var_t cpumask;
271 unsigned long flags;
272
1fa46f1f 273 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
274 goto out;
275
276 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 277 if (irq_move_pending(&desc->irq_data))
1fa46f1f 278 irq_get_pending(cpumask, desc);
cd7eab44 279 else
9df872fa 280 cpumask_copy(cpumask, desc->irq_common_data.affinity);
cd7eab44
BH
281 raw_spin_unlock_irqrestore(&desc->lock, flags);
282
283 notify->notify(notify, cpumask);
284
285 free_cpumask_var(cpumask);
286out:
287 kref_put(&notify->kref, notify->release);
288}
289
290/**
291 * irq_set_affinity_notifier - control notification of IRQ affinity changes
292 * @irq: Interrupt for which to enable/disable notification
293 * @notify: Context for notification, or %NULL to disable
294 * notification. Function pointers must be initialised;
295 * the other fields will be initialised by this function.
296 *
297 * Must be called in process context. Notification may only be enabled
298 * after the IRQ is allocated and must be disabled before the IRQ is
299 * freed using free_irq().
300 */
301int
302irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
303{
304 struct irq_desc *desc = irq_to_desc(irq);
305 struct irq_affinity_notify *old_notify;
306 unsigned long flags;
307
308 /* The release function is promised process context */
309 might_sleep();
310
311 if (!desc)
312 return -EINVAL;
313
314 /* Complete initialisation of *notify */
315 if (notify) {
316 notify->irq = irq;
317 kref_init(&notify->kref);
318 INIT_WORK(&notify->work, irq_affinity_notify);
319 }
320
321 raw_spin_lock_irqsave(&desc->lock, flags);
322 old_notify = desc->affinity_notify;
323 desc->affinity_notify = notify;
324 raw_spin_unlock_irqrestore(&desc->lock, flags);
325
326 if (old_notify)
327 kref_put(&old_notify->kref, old_notify->release);
328
329 return 0;
330}
331EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
332
18404756
MK
333#ifndef CONFIG_AUTO_IRQ_AFFINITY
334/*
335 * Generic version of the affinity autoselector.
336 */
43564bd9 337int irq_setup_affinity(struct irq_desc *desc)
18404756 338{
569bda8d 339 struct cpumask *set = irq_default_affinity;
cba4235e
TG
340 int ret, node = irq_desc_get_node(desc);
341 static DEFINE_RAW_SPINLOCK(mask_lock);
342 static struct cpumask mask;
569bda8d 343
b008207c 344 /* Excludes PER_CPU and NO_BALANCE interrupts */
e019c249 345 if (!__irq_can_set_affinity(desc))
18404756
MK
346 return 0;
347
cba4235e 348 raw_spin_lock(&mask_lock);
f6d87f4b 349 /*
9332ef9d 350 * Preserve the managed affinity setting and a userspace affinity
06ee6d57 351 * setup, but make sure that one of the targets is online.
f6d87f4b 352 */
06ee6d57
TG
353 if (irqd_affinity_is_managed(&desc->irq_data) ||
354 irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
9df872fa 355 if (cpumask_intersects(desc->irq_common_data.affinity,
569bda8d 356 cpu_online_mask))
9df872fa 357 set = desc->irq_common_data.affinity;
0c6f8a8b 358 else
2bdd1055 359 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 360 }
18404756 361
cba4235e 362 cpumask_and(&mask, cpu_online_mask, set);
241fc640
PB
363 if (node != NUMA_NO_NODE) {
364 const struct cpumask *nodemask = cpumask_of_node(node);
365
366 /* make sure at least one of the cpus in nodemask is online */
cba4235e
TG
367 if (cpumask_intersects(&mask, nodemask))
368 cpumask_and(&mask, &mask, nodemask);
241fc640 369 }
cba4235e
TG
370 ret = irq_do_set_affinity(&desc->irq_data, &mask, false);
371 raw_spin_unlock(&mask_lock);
372 return ret;
18404756 373}
f6d87f4b 374#else
a8a98eac 375/* Wrapper for ALPHA specific affinity selector magic */
cba4235e 376int irq_setup_affinity(struct irq_desc *desc)
f6d87f4b 377{
cba4235e 378 return irq_select_affinity(irq_desc_get_irq(desc));
f6d87f4b 379}
18404756
MK
380#endif
381
f6d87f4b 382/*
cba4235e 383 * Called when a bogus affinity is set via /proc/irq
f6d87f4b 384 */
cba4235e 385int irq_select_affinity_usr(unsigned int irq)
f6d87f4b
TG
386{
387 struct irq_desc *desc = irq_to_desc(irq);
388 unsigned long flags;
389 int ret;
390
239007b8 391 raw_spin_lock_irqsave(&desc->lock, flags);
cba4235e 392 ret = irq_setup_affinity(desc);
239007b8 393 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
394 return ret;
395}
1da177e4
LT
396#endif
397
fcf1ae2f
FW
398/**
399 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
400 * @irq: interrupt number to set affinity
250a53d6
CD
401 * @vcpu_info: vCPU specific data or pointer to a percpu array of vCPU
402 * specific data for percpu_devid interrupts
fcf1ae2f
FW
403 *
404 * This function uses the vCPU specific data to set the vCPU
405 * affinity for an irq. The vCPU specific data is passed from
406 * outside, such as KVM. One example code path is as below:
407 * KVM -> IOMMU -> irq_set_vcpu_affinity().
408 */
409int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
410{
411 unsigned long flags;
412 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
413 struct irq_data *data;
414 struct irq_chip *chip;
415 int ret = -ENOSYS;
416
417 if (!desc)
418 return -EINVAL;
419
420 data = irq_desc_get_irq_data(desc);
0abce64a
MZ
421 do {
422 chip = irq_data_get_irq_chip(data);
423 if (chip && chip->irq_set_vcpu_affinity)
424 break;
425#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
426 data = data->parent_data;
427#else
428 data = NULL;
429#endif
430 } while (data);
431
432 if (data)
fcf1ae2f
FW
433 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
434 irq_put_desc_unlock(desc, flags);
435
436 return ret;
437}
438EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
439
79ff1cda 440void __disable_irq(struct irq_desc *desc)
0a0c5168 441{
3aae994f 442 if (!desc->depth++)
87923470 443 irq_disable(desc);
0a0c5168
RW
444}
445
02725e74
TG
446static int __disable_irq_nosync(unsigned int irq)
447{
448 unsigned long flags;
31d9d9b6 449 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
450
451 if (!desc)
452 return -EINVAL;
79ff1cda 453 __disable_irq(desc);
02725e74
TG
454 irq_put_desc_busunlock(desc, flags);
455 return 0;
456}
457
1da177e4
LT
458/**
459 * disable_irq_nosync - disable an irq without waiting
460 * @irq: Interrupt to disable
461 *
462 * Disable the selected interrupt line. Disables and Enables are
463 * nested.
464 * Unlike disable_irq(), this function does not ensure existing
465 * instances of the IRQ handler have completed before returning.
466 *
467 * This function may be called from IRQ context.
468 */
469void disable_irq_nosync(unsigned int irq)
470{
02725e74 471 __disable_irq_nosync(irq);
1da177e4 472}
1da177e4
LT
473EXPORT_SYMBOL(disable_irq_nosync);
474
475/**
476 * disable_irq - disable an irq and wait for completion
477 * @irq: Interrupt to disable
478 *
479 * Disable the selected interrupt line. Enables and Disables are
480 * nested.
481 * This function waits for any pending IRQ handlers for this interrupt
482 * to complete before returning. If you use this function while
483 * holding a resource the IRQ handler may need you will deadlock.
484 *
485 * This function may be called - with care - from IRQ context.
486 */
487void disable_irq(unsigned int irq)
488{
02725e74 489 if (!__disable_irq_nosync(irq))
1da177e4
LT
490 synchronize_irq(irq);
491}
1da177e4
LT
492EXPORT_SYMBOL(disable_irq);
493
02cea395
PZ
494/**
495 * disable_hardirq - disables an irq and waits for hardirq completion
496 * @irq: Interrupt to disable
497 *
498 * Disable the selected interrupt line. Enables and Disables are
499 * nested.
500 * This function waits for any pending hard IRQ handlers for this
501 * interrupt to complete before returning. If you use this function while
502 * holding a resource the hard IRQ handler may need you will deadlock.
503 *
504 * When used to optimistically disable an interrupt from atomic context
505 * the return value must be checked.
506 *
507 * Returns: false if a threaded handler is active.
508 *
509 * This function may be called - with care - from IRQ context.
510 */
511bool disable_hardirq(unsigned int irq)
512{
513 if (!__disable_irq_nosync(irq))
514 return synchronize_hardirq(irq);
515
516 return false;
517}
518EXPORT_SYMBOL_GPL(disable_hardirq);
519
79ff1cda 520void __enable_irq(struct irq_desc *desc)
1adb0850
TG
521{
522 switch (desc->depth) {
523 case 0:
0a0c5168 524 err_out:
79ff1cda
JL
525 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
526 irq_desc_get_irq(desc));
1adb0850
TG
527 break;
528 case 1: {
c531e836 529 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 530 goto err_out;
1adb0850 531 /* Prevent probing on this irq: */
1ccb4e61 532 irq_settings_set_noprobe(desc);
201d7f47
TG
533 /*
534 * Call irq_startup() not irq_enable() here because the
535 * interrupt might be marked NOAUTOEN. So irq_startup()
536 * needs to be invoked when it gets enabled the first
537 * time. If it was already started up, then irq_startup()
538 * will invoke irq_enable() under the hood.
539 */
c942cee4 540 irq_startup(desc, IRQ_RESEND, IRQ_START_FORCE);
201d7f47 541 break;
1adb0850
TG
542 }
543 default:
544 desc->depth--;
545 }
546}
547
1da177e4
LT
548/**
549 * enable_irq - enable handling of an irq
550 * @irq: Interrupt to enable
551 *
552 * Undoes the effect of one call to disable_irq(). If this
553 * matches the last disable, processing of interrupts on this
554 * IRQ line is re-enabled.
555 *
70aedd24 556 * This function may be called from IRQ context only when
6b8ff312 557 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
558 */
559void enable_irq(unsigned int irq)
560{
1da177e4 561 unsigned long flags;
31d9d9b6 562 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 563
7d94f7ca 564 if (!desc)
c2b5a251 565 return;
50f7c032
TG
566 if (WARN(!desc->irq_data.chip,
567 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 568 goto out;
2656c366 569
79ff1cda 570 __enable_irq(desc);
02725e74
TG
571out:
572 irq_put_desc_busunlock(desc, flags);
1da177e4 573}
1da177e4
LT
574EXPORT_SYMBOL(enable_irq);
575
0c5d1eb7 576static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 577{
08678b08 578 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
579 int ret = -ENXIO;
580
60f96b41
SS
581 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
582 return 0;
583
2f7e99bb
TG
584 if (desc->irq_data.chip->irq_set_wake)
585 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
586
587 return ret;
588}
589
ba9a2331 590/**
a0cd9ca2 591 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
592 * @irq: interrupt to control
593 * @on: enable/disable power management wakeup
594 *
15a647eb
DB
595 * Enable/disable power management wakeup mode, which is
596 * disabled by default. Enables and disables must match,
597 * just as they match for non-wakeup mode support.
598 *
599 * Wakeup mode lets this IRQ wake the system from sleep
600 * states like "suspend to RAM".
ba9a2331 601 */
a0cd9ca2 602int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 603{
ba9a2331 604 unsigned long flags;
31d9d9b6 605 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 606 int ret = 0;
ba9a2331 607
13863a66
JJ
608 if (!desc)
609 return -EINVAL;
610
15a647eb
DB
611 /* wakeup-capable irqs can be shared between drivers that
612 * don't need to have the same sleep mode behaviors.
613 */
15a647eb 614 if (on) {
2db87321
UKK
615 if (desc->wake_depth++ == 0) {
616 ret = set_irq_wake_real(irq, on);
617 if (ret)
618 desc->wake_depth = 0;
619 else
7f94226f 620 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 621 }
15a647eb
DB
622 } else {
623 if (desc->wake_depth == 0) {
7a2c4770 624 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
625 } else if (--desc->wake_depth == 0) {
626 ret = set_irq_wake_real(irq, on);
627 if (ret)
628 desc->wake_depth = 1;
629 else
7f94226f 630 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 631 }
15a647eb 632 }
02725e74 633 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
634 return ret;
635}
a0cd9ca2 636EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 637
1da177e4
LT
638/*
639 * Internal function that tells the architecture code whether a
640 * particular irq has been exclusively allocated or is available
641 * for driver use.
642 */
643int can_request_irq(unsigned int irq, unsigned long irqflags)
644{
cc8c3b78 645 unsigned long flags;
31d9d9b6 646 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 647 int canrequest = 0;
1da177e4 648
7d94f7ca
YL
649 if (!desc)
650 return 0;
651
02725e74 652 if (irq_settings_can_request(desc)) {
2779db8d
BH
653 if (!desc->action ||
654 irqflags & desc->action->flags & IRQF_SHARED)
655 canrequest = 1;
02725e74
TG
656 }
657 irq_put_desc_unlock(desc, flags);
658 return canrequest;
1da177e4
LT
659}
660
a1ff541a 661int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
82736f4d 662{
6b8ff312 663 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 664 int ret, unmask = 0;
82736f4d 665
b2ba2c30 666 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
667 /*
668 * IRQF_TRIGGER_* but the PIC does not support multiple
669 * flow-types?
670 */
a1ff541a
JL
671 pr_debug("No set_type function for IRQ %d (%s)\n",
672 irq_desc_get_irq(desc),
f5d89470 673 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
674 return 0;
675 }
676
d4d5e089 677 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 678 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 679 mask_irq(desc);
32f4125e 680 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
681 unmask = 1;
682 }
683
00b992de
AK
684 /* Mask all flags except trigger mode */
685 flags &= IRQ_TYPE_SENSE_MASK;
b2ba2c30 686 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 687
876dbd4c
TG
688 switch (ret) {
689 case IRQ_SET_MASK_OK:
2cb62547 690 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
691 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
692 irqd_set(&desc->irq_data, flags);
693
694 case IRQ_SET_MASK_OK_NOCOPY:
695 flags = irqd_get_trigger_type(&desc->irq_data);
696 irq_settings_set_trigger_mask(desc, flags);
697 irqd_clear(&desc->irq_data, IRQD_LEVEL);
698 irq_settings_clr_level(desc);
699 if (flags & IRQ_TYPE_LEVEL_MASK) {
700 irq_settings_set_level(desc);
701 irqd_set(&desc->irq_data, IRQD_LEVEL);
702 }
46732475 703
d4d5e089 704 ret = 0;
8fff39e0 705 break;
876dbd4c 706 default:
97fd75b7 707 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
a1ff541a 708 flags, irq_desc_get_irq(desc), chip->irq_set_type);
0c5d1eb7 709 }
d4d5e089
TG
710 if (unmask)
711 unmask_irq(desc);
82736f4d
UKK
712 return ret;
713}
714
293a7a0a
TG
715#ifdef CONFIG_HARDIRQS_SW_RESEND
716int irq_set_parent(int irq, int parent_irq)
717{
718 unsigned long flags;
719 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
720
721 if (!desc)
722 return -EINVAL;
723
724 desc->parent_irq = parent_irq;
725
726 irq_put_desc_unlock(desc, flags);
727 return 0;
728}
3118dac5 729EXPORT_SYMBOL_GPL(irq_set_parent);
293a7a0a
TG
730#endif
731
b25c340c
TG
732/*
733 * Default primary interrupt handler for threaded interrupts. Is
734 * assigned as primary handler when request_threaded_irq is called
735 * with handler == NULL. Useful for oneshot interrupts.
736 */
737static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
738{
739 return IRQ_WAKE_THREAD;
740}
741
399b5da2
TG
742/*
743 * Primary handler for nested threaded interrupts. Should never be
744 * called.
745 */
746static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
747{
748 WARN(1, "Primary handler called for nested irq %d\n", irq);
749 return IRQ_NONE;
750}
751
2a1d3ab8
TG
752static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id)
753{
754 WARN(1, "Secondary action handler called for irq %d\n", irq);
755 return IRQ_NONE;
756}
757
3aa551c9
TG
758static int irq_wait_for_interrupt(struct irqaction *action)
759{
550acb19
IY
760 set_current_state(TASK_INTERRUPTIBLE);
761
3aa551c9 762 while (!kthread_should_stop()) {
f48fe81e
TG
763
764 if (test_and_clear_bit(IRQTF_RUNTHREAD,
765 &action->thread_flags)) {
3aa551c9
TG
766 __set_current_state(TASK_RUNNING);
767 return 0;
f48fe81e
TG
768 }
769 schedule();
550acb19 770 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 771 }
550acb19 772 __set_current_state(TASK_RUNNING);
3aa551c9
TG
773 return -1;
774}
775
b25c340c
TG
776/*
777 * Oneshot interrupts keep the irq line masked until the threaded
778 * handler finished. unmask if the interrupt has not been disabled and
779 * is marked MASKED.
780 */
b5faba21 781static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 782 struct irqaction *action)
b25c340c 783{
2a1d3ab8
TG
784 if (!(desc->istate & IRQS_ONESHOT) ||
785 action->handler == irq_forced_secondary_handler)
b5faba21 786 return;
0b1adaa0 787again:
3876ec9e 788 chip_bus_lock(desc);
239007b8 789 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
790
791 /*
792 * Implausible though it may be we need to protect us against
793 * the following scenario:
794 *
795 * The thread is faster done than the hard interrupt handler
796 * on the other CPU. If we unmask the irq line then the
797 * interrupt can come in again and masks the line, leaves due
009b4c3b 798 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
799 *
800 * This also serializes the state of shared oneshot handlers
801 * versus "desc->threads_onehsot |= action->thread_mask;" in
802 * irq_wake_thread(). See the comment there which explains the
803 * serialization.
0b1adaa0 804 */
32f4125e 805 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 806 raw_spin_unlock_irq(&desc->lock);
3876ec9e 807 chip_bus_sync_unlock(desc);
0b1adaa0
TG
808 cpu_relax();
809 goto again;
810 }
811
b5faba21
TG
812 /*
813 * Now check again, whether the thread should run. Otherwise
814 * we would clear the threads_oneshot bit of this thread which
815 * was just set.
816 */
f3f79e38 817 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
818 goto out_unlock;
819
820 desc->threads_oneshot &= ~action->thread_mask;
821
32f4125e
TG
822 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
823 irqd_irq_masked(&desc->irq_data))
328a4978 824 unmask_threaded_irq(desc);
32f4125e 825
b5faba21 826out_unlock:
239007b8 827 raw_spin_unlock_irq(&desc->lock);
3876ec9e 828 chip_bus_sync_unlock(desc);
b25c340c
TG
829}
830
61f38261 831#ifdef CONFIG_SMP
591d2fb0 832/*
b04c644e 833 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
834 */
835static void
836irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
837{
838 cpumask_var_t mask;
04aa530e 839 bool valid = true;
591d2fb0
TG
840
841 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
842 return;
843
844 /*
845 * In case we are out of memory we set IRQTF_AFFINITY again and
846 * try again next time
847 */
848 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
849 set_bit(IRQTF_AFFINITY, &action->thread_flags);
850 return;
851 }
852
239007b8 853 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
854 /*
855 * This code is triggered unconditionally. Check the affinity
856 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
857 */
d170fe7d 858 if (cpumask_available(desc->irq_common_data.affinity))
9df872fa 859 cpumask_copy(mask, desc->irq_common_data.affinity);
04aa530e
TG
860 else
861 valid = false;
239007b8 862 raw_spin_unlock_irq(&desc->lock);
591d2fb0 863
04aa530e
TG
864 if (valid)
865 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
866 free_cpumask_var(mask);
867}
61f38261
BP
868#else
869static inline void
870irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
871#endif
591d2fb0 872
8d32a307
TG
873/*
874 * Interrupts which are not explicitely requested as threaded
875 * interrupts rely on the implicit bh/preempt disable of the hard irq
876 * context. So we need to disable bh here to avoid deadlocks and other
877 * side effects.
878 */
3a43e05f 879static irqreturn_t
8d32a307
TG
880irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
881{
3a43e05f
SAS
882 irqreturn_t ret;
883
8d32a307 884 local_bh_disable();
3a43e05f 885 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 886 irq_finalize_oneshot(desc, action);
8d32a307 887 local_bh_enable();
3a43e05f 888 return ret;
8d32a307
TG
889}
890
891/*
f788e7bf 892 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
893 * preemtible - many of them need to sleep and wait for slow busses to
894 * complete.
895 */
3a43e05f
SAS
896static irqreturn_t irq_thread_fn(struct irq_desc *desc,
897 struct irqaction *action)
8d32a307 898{
3a43e05f
SAS
899 irqreturn_t ret;
900
901 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 902 irq_finalize_oneshot(desc, action);
3a43e05f 903 return ret;
8d32a307
TG
904}
905
7140ea19
IY
906static void wake_threads_waitq(struct irq_desc *desc)
907{
c685689f 908 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
909 wake_up(&desc->wait_for_threads);
910}
911
67d12145 912static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
913{
914 struct task_struct *tsk = current;
915 struct irq_desc *desc;
916 struct irqaction *action;
917
918 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
919 return;
920
921 action = kthread_data(tsk);
922
fb21affa 923 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 924 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
925
926
927 desc = irq_to_desc(action->irq);
928 /*
929 * If IRQTF_RUNTHREAD is set, we need to decrement
930 * desc->threads_active and wake possible waiters.
931 */
932 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
933 wake_threads_waitq(desc);
934
935 /* Prevent a stale desc->threads_oneshot */
936 irq_finalize_oneshot(desc, action);
937}
938
2a1d3ab8
TG
939static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action)
940{
941 struct irqaction *secondary = action->secondary;
942
943 if (WARN_ON_ONCE(!secondary))
944 return;
945
946 raw_spin_lock_irq(&desc->lock);
947 __irq_wake_thread(desc, secondary);
948 raw_spin_unlock_irq(&desc->lock);
949}
950
3aa551c9
TG
951/*
952 * Interrupt handler thread
953 */
954static int irq_thread(void *data)
955{
67d12145 956 struct callback_head on_exit_work;
3aa551c9
TG
957 struct irqaction *action = data;
958 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
959 irqreturn_t (*handler_fn)(struct irq_desc *desc,
960 struct irqaction *action);
3aa551c9 961
540b60e2 962 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
963 &action->thread_flags))
964 handler_fn = irq_forced_thread_fn;
965 else
966 handler_fn = irq_thread_fn;
967
41f9d29f 968 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 969 task_work_add(current, &on_exit_work, false);
3aa551c9 970
f3de44ed
SM
971 irq_thread_check_affinity(desc, action);
972
3aa551c9 973 while (!irq_wait_for_interrupt(action)) {
7140ea19 974 irqreturn_t action_ret;
3aa551c9 975
591d2fb0
TG
976 irq_thread_check_affinity(desc, action);
977
7140ea19 978 action_ret = handler_fn(desc, action);
1e77d0a1
TG
979 if (action_ret == IRQ_HANDLED)
980 atomic_inc(&desc->threads_handled);
2a1d3ab8
TG
981 if (action_ret == IRQ_WAKE_THREAD)
982 irq_wake_secondary(desc, action);
3aa551c9 983
7140ea19 984 wake_threads_waitq(desc);
3aa551c9
TG
985 }
986
7140ea19
IY
987 /*
988 * This is the regular exit path. __free_irq() is stopping the
989 * thread via kthread_stop() after calling
990 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
991 * oneshot mask bit can be set. We cannot verify that as we
992 * cannot touch the oneshot mask at this point anymore as
993 * __setup_irq() might have given out currents thread_mask
994 * again.
3aa551c9 995 */
4d1d61a6 996 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
997 return 0;
998}
999
a92444c6
TG
1000/**
1001 * irq_wake_thread - wake the irq thread for the action identified by dev_id
1002 * @irq: Interrupt line
1003 * @dev_id: Device identity for which the thread should be woken
1004 *
1005 */
1006void irq_wake_thread(unsigned int irq, void *dev_id)
1007{
1008 struct irq_desc *desc = irq_to_desc(irq);
1009 struct irqaction *action;
1010 unsigned long flags;
1011
1012 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
1013 return;
1014
1015 raw_spin_lock_irqsave(&desc->lock, flags);
f944b5a7 1016 for_each_action_of_desc(desc, action) {
a92444c6
TG
1017 if (action->dev_id == dev_id) {
1018 if (action->thread)
1019 __irq_wake_thread(desc, action);
1020 break;
1021 }
1022 }
1023 raw_spin_unlock_irqrestore(&desc->lock, flags);
1024}
1025EXPORT_SYMBOL_GPL(irq_wake_thread);
1026
2a1d3ab8 1027static int irq_setup_forced_threading(struct irqaction *new)
8d32a307
TG
1028{
1029 if (!force_irqthreads)
2a1d3ab8 1030 return 0;
8d32a307 1031 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
2a1d3ab8 1032 return 0;
8d32a307
TG
1033
1034 new->flags |= IRQF_ONESHOT;
1035
2a1d3ab8
TG
1036 /*
1037 * Handle the case where we have a real primary handler and a
1038 * thread handler. We force thread them as well by creating a
1039 * secondary action.
1040 */
1041 if (new->handler != irq_default_primary_handler && new->thread_fn) {
1042 /* Allocate the secondary action */
1043 new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1044 if (!new->secondary)
1045 return -ENOMEM;
1046 new->secondary->handler = irq_forced_secondary_handler;
1047 new->secondary->thread_fn = new->thread_fn;
1048 new->secondary->dev_id = new->dev_id;
1049 new->secondary->irq = new->irq;
1050 new->secondary->name = new->name;
8d32a307 1051 }
2a1d3ab8
TG
1052 /* Deal with the primary handler */
1053 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
1054 new->thread_fn = new->handler;
1055 new->handler = irq_default_primary_handler;
1056 return 0;
8d32a307
TG
1057}
1058
c1bacbae
TG
1059static int irq_request_resources(struct irq_desc *desc)
1060{
1061 struct irq_data *d = &desc->irq_data;
1062 struct irq_chip *c = d->chip;
1063
1064 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1065}
1066
1067static void irq_release_resources(struct irq_desc *desc)
1068{
1069 struct irq_data *d = &desc->irq_data;
1070 struct irq_chip *c = d->chip;
1071
1072 if (c->irq_release_resources)
1073 c->irq_release_resources(d);
1074}
1075
2a1d3ab8
TG
1076static int
1077setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary)
1078{
1079 struct task_struct *t;
1080 struct sched_param param = {
1081 .sched_priority = MAX_USER_RT_PRIO/2,
1082 };
1083
1084 if (!secondary) {
1085 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1086 new->name);
1087 } else {
1088 t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq,
1089 new->name);
1090 param.sched_priority -= 1;
1091 }
1092
1093 if (IS_ERR(t))
1094 return PTR_ERR(t);
1095
1096 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
1097
1098 /*
1099 * We keep the reference to the task struct even if
1100 * the thread dies to avoid that the interrupt code
1101 * references an already freed task_struct.
1102 */
1103 get_task_struct(t);
1104 new->thread = t;
1105 /*
1106 * Tell the thread to set its affinity. This is
1107 * important for shared interrupt handlers as we do
1108 * not invoke setup_affinity() for the secondary
1109 * handlers as everything is already set up. Even for
1110 * interrupts marked with IRQF_NO_BALANCE this is
1111 * correct as we want the thread to move to the cpu(s)
1112 * on which the requesting code placed the interrupt.
1113 */
1114 set_bit(IRQTF_AFFINITY, &new->thread_flags);
1115 return 0;
1116}
1117
1da177e4
LT
1118/*
1119 * Internal function to register an irqaction - typically used to
1120 * allocate special interrupts that are part of the architecture.
19d39a38
TG
1121 *
1122 * Locking rules:
1123 *
1124 * desc->request_mutex Provides serialization against a concurrent free_irq()
1125 * chip_bus_lock Provides serialization for slow bus operations
1126 * desc->lock Provides serialization against hard interrupts
1127 *
1128 * chip_bus_lock and desc->lock are sufficient for all other management and
1129 * interrupt related functions. desc->request_mutex solely serializes
1130 * request/free_irq().
1da177e4 1131 */
d3c60047 1132static int
327ec569 1133__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1134{
f17c7545 1135 struct irqaction *old, **old_ptr;
b5faba21 1136 unsigned long flags, thread_mask = 0;
3b8249e7 1137 int ret, nested, shared = 0;
1da177e4 1138
7d94f7ca 1139 if (!desc)
c2b5a251
MW
1140 return -EINVAL;
1141
6b8ff312 1142 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1143 return -ENOSYS;
b6873807
SAS
1144 if (!try_module_get(desc->owner))
1145 return -ENODEV;
1da177e4 1146
2a1d3ab8
TG
1147 new->irq = irq;
1148
4b357dae
JH
1149 /*
1150 * If the trigger type is not specified by the caller,
1151 * then use the default for this interrupt.
1152 */
1153 if (!(new->flags & IRQF_TRIGGER_MASK))
1154 new->flags |= irqd_get_trigger_type(&desc->irq_data);
1155
3aa551c9 1156 /*
399b5da2
TG
1157 * Check whether the interrupt nests into another interrupt
1158 * thread.
1159 */
1ccb4e61 1160 nested = irq_settings_is_nested_thread(desc);
399b5da2 1161 if (nested) {
b6873807
SAS
1162 if (!new->thread_fn) {
1163 ret = -EINVAL;
1164 goto out_mput;
1165 }
399b5da2
TG
1166 /*
1167 * Replace the primary handler which was provided from
1168 * the driver for non nested interrupt handling by the
1169 * dummy function which warns when called.
1170 */
1171 new->handler = irq_nested_primary_handler;
8d32a307 1172 } else {
2a1d3ab8
TG
1173 if (irq_settings_can_thread(desc)) {
1174 ret = irq_setup_forced_threading(new);
1175 if (ret)
1176 goto out_mput;
1177 }
399b5da2
TG
1178 }
1179
3aa551c9 1180 /*
399b5da2
TG
1181 * Create a handler thread when a thread function is supplied
1182 * and the interrupt does not nest into another interrupt
1183 * thread.
3aa551c9 1184 */
399b5da2 1185 if (new->thread_fn && !nested) {
2a1d3ab8
TG
1186 ret = setup_irq_thread(new, irq, false);
1187 if (ret)
b6873807 1188 goto out_mput;
2a1d3ab8
TG
1189 if (new->secondary) {
1190 ret = setup_irq_thread(new->secondary, irq, true);
1191 if (ret)
1192 goto out_thread;
b6873807 1193 }
3aa551c9
TG
1194 }
1195
dc9b229a
TG
1196 /*
1197 * Drivers are often written to work w/o knowledge about the
1198 * underlying irq chip implementation, so a request for a
1199 * threaded irq without a primary hard irq context handler
1200 * requires the ONESHOT flag to be set. Some irq chips like
1201 * MSI based interrupts are per se one shot safe. Check the
1202 * chip flags, so we can avoid the unmask dance at the end of
1203 * the threaded handler for those.
1204 */
1205 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1206 new->flags &= ~IRQF_ONESHOT;
1207
19d39a38
TG
1208 /*
1209 * Protects against a concurrent __free_irq() call which might wait
1210 * for synchronize_irq() to complete without holding the optional
1211 * chip bus lock and desc->lock.
1212 */
9114014c 1213 mutex_lock(&desc->request_mutex);
19d39a38
TG
1214
1215 /*
1216 * Acquire bus lock as the irq_request_resources() callback below
1217 * might rely on the serialization or the magic power management
1218 * functions which are abusing the irq_bus_lock() callback,
1219 */
1220 chip_bus_lock(desc);
1221
1222 /* First installed action requests resources. */
46e48e25
TG
1223 if (!desc->action) {
1224 ret = irq_request_resources(desc);
1225 if (ret) {
1226 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1227 new->name, irq, desc->irq_data.chip->name);
19d39a38 1228 goto out_bus_unlock;
46e48e25
TG
1229 }
1230 }
9114014c 1231
1da177e4
LT
1232 /*
1233 * The following block of code has to be executed atomically
19d39a38
TG
1234 * protected against a concurrent interrupt and any of the other
1235 * management calls which are not serialized via
1236 * desc->request_mutex or the optional bus lock.
1da177e4 1237 */
239007b8 1238 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1239 old_ptr = &desc->action;
1240 old = *old_ptr;
06fcb0c6 1241 if (old) {
e76de9f8
TG
1242 /*
1243 * Can't share interrupts unless both agree to and are
1244 * the same type (level, edge, polarity). So both flag
3cca53b0 1245 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1246 * set the trigger type must match. Also all must
1247 * agree on ONESHOT.
e76de9f8 1248 */
4f8413a3
MZ
1249 unsigned int oldtype;
1250
1251 /*
1252 * If nobody did set the configuration before, inherit
1253 * the one provided by the requester.
1254 */
1255 if (irqd_trigger_type_was_set(&desc->irq_data)) {
1256 oldtype = irqd_get_trigger_type(&desc->irq_data);
1257 } else {
1258 oldtype = new->flags & IRQF_TRIGGER_MASK;
1259 irqd_set_trigger_type(&desc->irq_data, oldtype);
1260 }
382bd4de 1261
3cca53b0 1262 if (!((old->flags & new->flags) & IRQF_SHARED) ||
382bd4de 1263 (oldtype != (new->flags & IRQF_TRIGGER_MASK)) ||
f5d89470 1264 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1265 goto mismatch;
1266
f5163427 1267 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1268 if ((old->flags & IRQF_PERCPU) !=
1269 (new->flags & IRQF_PERCPU))
f5163427 1270 goto mismatch;
1da177e4
LT
1271
1272 /* add new interrupt at end of irq queue */
1273 do {
52abb700
TG
1274 /*
1275 * Or all existing action->thread_mask bits,
1276 * so we can find the next zero bit for this
1277 * new action.
1278 */
b5faba21 1279 thread_mask |= old->thread_mask;
f17c7545
IM
1280 old_ptr = &old->next;
1281 old = *old_ptr;
1da177e4
LT
1282 } while (old);
1283 shared = 1;
1284 }
1285
b5faba21 1286 /*
52abb700
TG
1287 * Setup the thread mask for this irqaction for ONESHOT. For
1288 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1289 * conditional in irq_wake_thread().
b5faba21 1290 */
52abb700
TG
1291 if (new->flags & IRQF_ONESHOT) {
1292 /*
1293 * Unlikely to have 32 resp 64 irqs sharing one line,
1294 * but who knows.
1295 */
1296 if (thread_mask == ~0UL) {
1297 ret = -EBUSY;
cba4235e 1298 goto out_unlock;
52abb700
TG
1299 }
1300 /*
1301 * The thread_mask for the action is or'ed to
1302 * desc->thread_active to indicate that the
1303 * IRQF_ONESHOT thread handler has been woken, but not
1304 * yet finished. The bit is cleared when a thread
1305 * completes. When all threads of a shared interrupt
1306 * line have completed desc->threads_active becomes
1307 * zero and the interrupt line is unmasked. See
1308 * handle.c:irq_wake_thread() for further information.
1309 *
1310 * If no thread is woken by primary (hard irq context)
1311 * interrupt handlers, then desc->threads_active is
1312 * also checked for zero to unmask the irq line in the
1313 * affected hard irq flow handlers
1314 * (handle_[fasteoi|level]_irq).
1315 *
1316 * The new action gets the first zero bit of
1317 * thread_mask assigned. See the loop above which or's
1318 * all existing action->thread_mask bits.
1319 */
ffc661c9 1320 new->thread_mask = 1UL << ffz(thread_mask);
1c6c6952 1321
dc9b229a
TG
1322 } else if (new->handler == irq_default_primary_handler &&
1323 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1324 /*
1325 * The interrupt was requested with handler = NULL, so
1326 * we use the default primary handler for it. But it
1327 * does not have the oneshot flag set. In combination
1328 * with level interrupts this is deadly, because the
1329 * default primary handler just wakes the thread, then
1330 * the irq lines is reenabled, but the device still
1331 * has the level irq asserted. Rinse and repeat....
1332 *
1333 * While this works for edge type interrupts, we play
1334 * it safe and reject unconditionally because we can't
1335 * say for sure which type this interrupt really
1336 * has. The type flags are unreliable as the
1337 * underlying chip implementation can override them.
1338 */
97fd75b7 1339 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1340 irq);
1341 ret = -EINVAL;
cba4235e 1342 goto out_unlock;
b5faba21 1343 }
b5faba21 1344
1da177e4 1345 if (!shared) {
3aa551c9
TG
1346 init_waitqueue_head(&desc->wait_for_threads);
1347
e76de9f8 1348 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1349 if (new->flags & IRQF_TRIGGER_MASK) {
a1ff541a
JL
1350 ret = __irq_set_trigger(desc,
1351 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1352
19d39a38 1353 if (ret)
cba4235e 1354 goto out_unlock;
091738a2 1355 }
6a6de9ef 1356
c942cee4
TG
1357 /*
1358 * Activate the interrupt. That activation must happen
1359 * independently of IRQ_NOAUTOEN. request_irq() can fail
1360 * and the callers are supposed to handle
1361 * that. enable_irq() of an interrupt requested with
1362 * IRQ_NOAUTOEN is not supposed to fail. The activation
1363 * keeps it in shutdown mode, it merily associates
1364 * resources if necessary and if that's not possible it
1365 * fails. Interrupts which are in managed shutdown mode
1366 * will simply ignore that activation request.
1367 */
1368 ret = irq_activate(desc);
1369 if (ret)
1370 goto out_unlock;
1371
009b4c3b 1372 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1373 IRQS_ONESHOT | IRQS_WAITING);
1374 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1375
a005677b
TG
1376 if (new->flags & IRQF_PERCPU) {
1377 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1378 irq_settings_set_per_cpu(desc);
1379 }
6a58fb3b 1380
b25c340c 1381 if (new->flags & IRQF_ONESHOT)
3d67baec 1382 desc->istate |= IRQS_ONESHOT;
b25c340c 1383
2e051552
TG
1384 /* Exclude IRQ from balancing if requested */
1385 if (new->flags & IRQF_NOBALANCING) {
1386 irq_settings_set_no_balancing(desc);
1387 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1388 }
1389
04c848d3 1390 if (irq_settings_can_autoenable(desc)) {
4cde9c6b 1391 irq_startup(desc, IRQ_RESEND, IRQ_START_COND);
04c848d3
TG
1392 } else {
1393 /*
1394 * Shared interrupts do not go well with disabling
1395 * auto enable. The sharing interrupt might request
1396 * it while it's still disabled and then wait for
1397 * interrupts forever.
1398 */
1399 WARN_ON_ONCE(new->flags & IRQF_SHARED);
e76de9f8
TG
1400 /* Undo nested disables: */
1401 desc->depth = 1;
04c848d3 1402 }
18404756 1403
876dbd4c
TG
1404 } else if (new->flags & IRQF_TRIGGER_MASK) {
1405 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
7ee7e87d 1406 unsigned int omsk = irqd_get_trigger_type(&desc->irq_data);
876dbd4c
TG
1407
1408 if (nmsk != omsk)
1409 /* hope the handler works with current trigger mode */
a395d6a7 1410 pr_warn("irq %d uses trigger mode %u; requested %u\n",
7ee7e87d 1411 irq, omsk, nmsk);
1da177e4 1412 }
82736f4d 1413
f17c7545 1414 *old_ptr = new;
82736f4d 1415
cab303be
TG
1416 irq_pm_install_action(desc, new);
1417
8528b0f1
LT
1418 /* Reset broken irq detection when installing new handler */
1419 desc->irq_count = 0;
1420 desc->irqs_unhandled = 0;
1adb0850
TG
1421
1422 /*
1423 * Check whether we disabled the irq via the spurious handler
1424 * before. Reenable it and give it another chance.
1425 */
7acdd53e
TG
1426 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1427 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
79ff1cda 1428 __enable_irq(desc);
1adb0850
TG
1429 }
1430
239007b8 1431 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a90795e 1432 chip_bus_sync_unlock(desc);
9114014c 1433 mutex_unlock(&desc->request_mutex);
1da177e4 1434
b2d3d61a
DL
1435 irq_setup_timings(desc, new);
1436
69ab8494
TG
1437 /*
1438 * Strictly no need to wake it up, but hung_task complains
1439 * when no hard interrupt wakes the thread up.
1440 */
1441 if (new->thread)
1442 wake_up_process(new->thread);
2a1d3ab8
TG
1443 if (new->secondary)
1444 wake_up_process(new->secondary->thread);
69ab8494 1445
2c6927a3 1446 register_irq_proc(irq, desc);
1da177e4
LT
1447 new->dir = NULL;
1448 register_handler_proc(irq, new);
1da177e4 1449 return 0;
f5163427
DS
1450
1451mismatch:
3cca53b0 1452 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1453 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1454 irq, new->flags, new->name, old->flags, old->name);
1455#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1456 dump_stack();
3f050447 1457#endif
f5d89470 1458 }
3aa551c9
TG
1459 ret = -EBUSY;
1460
cba4235e 1461out_unlock:
1c389795 1462 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7 1463
46e48e25
TG
1464 if (!desc->action)
1465 irq_release_resources(desc);
19d39a38
TG
1466out_bus_unlock:
1467 chip_bus_sync_unlock(desc);
9114014c
TG
1468 mutex_unlock(&desc->request_mutex);
1469
3aa551c9 1470out_thread:
3aa551c9
TG
1471 if (new->thread) {
1472 struct task_struct *t = new->thread;
1473
1474 new->thread = NULL;
05d74efa 1475 kthread_stop(t);
3aa551c9
TG
1476 put_task_struct(t);
1477 }
2a1d3ab8
TG
1478 if (new->secondary && new->secondary->thread) {
1479 struct task_struct *t = new->secondary->thread;
1480
1481 new->secondary->thread = NULL;
1482 kthread_stop(t);
1483 put_task_struct(t);
1484 }
b6873807
SAS
1485out_mput:
1486 module_put(desc->owner);
3aa551c9 1487 return ret;
1da177e4
LT
1488}
1489
d3c60047
TG
1490/**
1491 * setup_irq - setup an interrupt
1492 * @irq: Interrupt line to setup
1493 * @act: irqaction for the interrupt
1494 *
1495 * Used to statically setup interrupts in the early boot process.
1496 */
1497int setup_irq(unsigned int irq, struct irqaction *act)
1498{
986c011d 1499 int retval;
d3c60047
TG
1500 struct irq_desc *desc = irq_to_desc(irq);
1501
9b5d585d 1502 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
31d9d9b6 1503 return -EINVAL;
be45beb2
JH
1504
1505 retval = irq_chip_pm_get(&desc->irq_data);
1506 if (retval < 0)
1507 return retval;
1508
986c011d 1509 retval = __setup_irq(irq, desc, act);
986c011d 1510
be45beb2
JH
1511 if (retval)
1512 irq_chip_pm_put(&desc->irq_data);
1513
986c011d 1514 return retval;
d3c60047 1515}
eb53b4e8 1516EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1517
31d9d9b6 1518/*
cbf94f06
MD
1519 * Internal function to unregister an irqaction - used to free
1520 * regular and special interrupts that are part of the architecture.
1da177e4 1521 */
cbf94f06 1522static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1523{
d3c60047 1524 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1525 struct irqaction *action, **action_ptr;
1da177e4
LT
1526 unsigned long flags;
1527
ae88a23b 1528 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1529
7d94f7ca 1530 if (!desc)
f21cfb25 1531 return NULL;
1da177e4 1532
9114014c 1533 mutex_lock(&desc->request_mutex);
abc7e40c 1534 chip_bus_lock(desc);
239007b8 1535 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1536
1537 /*
1538 * There can be multiple actions per IRQ descriptor, find the right
1539 * one based on the dev_id:
1540 */
f17c7545 1541 action_ptr = &desc->action;
1da177e4 1542 for (;;) {
f17c7545 1543 action = *action_ptr;
1da177e4 1544
ae88a23b
IM
1545 if (!action) {
1546 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1547 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1548 chip_bus_sync_unlock(desc);
19d39a38 1549 mutex_unlock(&desc->request_mutex);
f21cfb25 1550 return NULL;
ae88a23b 1551 }
1da177e4 1552
8316e381
IM
1553 if (action->dev_id == dev_id)
1554 break;
f17c7545 1555 action_ptr = &action->next;
ae88a23b 1556 }
dbce706e 1557
ae88a23b 1558 /* Found it - now remove it from the list of entries: */
f17c7545 1559 *action_ptr = action->next;
ae88a23b 1560
cab303be
TG
1561 irq_pm_remove_action(desc, action);
1562
ae88a23b 1563 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1564 if (!desc->action) {
e9849777 1565 irq_settings_clr_disable_unlazy(desc);
46999238 1566 irq_shutdown(desc);
c1bacbae 1567 }
3aa551c9 1568
e7a297b0
PWJ
1569#ifdef CONFIG_SMP
1570 /* make sure affinity_hint is cleaned up */
1571 if (WARN_ON_ONCE(desc->affinity_hint))
1572 desc->affinity_hint = NULL;
1573#endif
1574
239007b8 1575 raw_spin_unlock_irqrestore(&desc->lock, flags);
19d39a38
TG
1576 /*
1577 * Drop bus_lock here so the changes which were done in the chip
1578 * callbacks above are synced out to the irq chips which hang
1579 * behind a slow bus (I2C, SPI) before calling synchronize_irq().
1580 *
1581 * Aside of that the bus_lock can also be taken from the threaded
1582 * handler in irq_finalize_oneshot() which results in a deadlock
1583 * because synchronize_irq() would wait forever for the thread to
1584 * complete, which is blocked on the bus lock.
1585 *
1586 * The still held desc->request_mutex() protects against a
1587 * concurrent request_irq() of this irq so the release of resources
1588 * and timing data is properly serialized.
1589 */
abc7e40c 1590 chip_bus_sync_unlock(desc);
ae88a23b
IM
1591
1592 unregister_handler_proc(irq, action);
1593
1594 /* Make sure it's not being used on another CPU: */
1595 synchronize_irq(irq);
1da177e4 1596
70edcd77 1597#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1598 /*
1599 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1600 * event to happen even now it's being freed, so let's make sure that
1601 * is so by doing an extra call to the handler ....
1602 *
1603 * ( We do this after actually deregistering it, to make sure that a
1604 * 'real' IRQ doesn't run in * parallel with our fake. )
1605 */
1606 if (action->flags & IRQF_SHARED) {
1607 local_irq_save(flags);
1608 action->handler(irq, dev_id);
1609 local_irq_restore(flags);
1da177e4 1610 }
ae88a23b 1611#endif
2d860ad7
LT
1612
1613 if (action->thread) {
05d74efa 1614 kthread_stop(action->thread);
2d860ad7 1615 put_task_struct(action->thread);
2a1d3ab8
TG
1616 if (action->secondary && action->secondary->thread) {
1617 kthread_stop(action->secondary->thread);
1618 put_task_struct(action->secondary->thread);
1619 }
2d860ad7
LT
1620 }
1621
19d39a38 1622 /* Last action releases resources */
2343877f 1623 if (!desc->action) {
19d39a38
TG
1624 /*
1625 * Reaquire bus lock as irq_release_resources() might
1626 * require it to deallocate resources over the slow bus.
1627 */
1628 chip_bus_lock(desc);
46e48e25 1629 irq_release_resources(desc);
19d39a38 1630 chip_bus_sync_unlock(desc);
2343877f
TG
1631 irq_remove_timings(desc);
1632 }
46e48e25 1633
9114014c
TG
1634 mutex_unlock(&desc->request_mutex);
1635
be45beb2 1636 irq_chip_pm_put(&desc->irq_data);
b6873807 1637 module_put(desc->owner);
2a1d3ab8 1638 kfree(action->secondary);
f21cfb25
MD
1639 return action;
1640}
1641
cbf94f06
MD
1642/**
1643 * remove_irq - free an interrupt
1644 * @irq: Interrupt line to free
1645 * @act: irqaction for the interrupt
1646 *
1647 * Used to remove interrupts statically setup by the early boot process.
1648 */
1649void remove_irq(unsigned int irq, struct irqaction *act)
1650{
31d9d9b6
MZ
1651 struct irq_desc *desc = irq_to_desc(irq);
1652
1653 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
a7e60e55 1654 __free_irq(irq, act->dev_id);
cbf94f06 1655}
eb53b4e8 1656EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1657
f21cfb25
MD
1658/**
1659 * free_irq - free an interrupt allocated with request_irq
1660 * @irq: Interrupt line to free
1661 * @dev_id: Device identity to free
1662 *
1663 * Remove an interrupt handler. The handler is removed and if the
1664 * interrupt line is no longer in use by any driver it is disabled.
1665 * On a shared IRQ the caller must ensure the interrupt is disabled
1666 * on the card it drives before calling this function. The function
1667 * does not return until any executing interrupts for this IRQ
1668 * have completed.
1669 *
1670 * This function must not be called from interrupt context.
25ce4be7
CH
1671 *
1672 * Returns the devname argument passed to request_irq.
f21cfb25 1673 */
25ce4be7 1674const void *free_irq(unsigned int irq, void *dev_id)
f21cfb25 1675{
70aedd24 1676 struct irq_desc *desc = irq_to_desc(irq);
25ce4be7
CH
1677 struct irqaction *action;
1678 const char *devname;
70aedd24 1679
31d9d9b6 1680 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
25ce4be7 1681 return NULL;
70aedd24 1682
cd7eab44
BH
1683#ifdef CONFIG_SMP
1684 if (WARN_ON(desc->affinity_notify))
1685 desc->affinity_notify = NULL;
1686#endif
1687
25ce4be7 1688 action = __free_irq(irq, dev_id);
2827a418
AM
1689
1690 if (!action)
1691 return NULL;
1692
25ce4be7
CH
1693 devname = action->name;
1694 kfree(action);
1695 return devname;
1da177e4 1696}
1da177e4
LT
1697EXPORT_SYMBOL(free_irq);
1698
1699/**
3aa551c9 1700 * request_threaded_irq - allocate an interrupt line
1da177e4 1701 * @irq: Interrupt line to allocate
3aa551c9
TG
1702 * @handler: Function to be called when the IRQ occurs.
1703 * Primary handler for threaded interrupts
b25c340c
TG
1704 * If NULL and thread_fn != NULL the default
1705 * primary handler is installed
f48fe81e
TG
1706 * @thread_fn: Function called from the irq handler thread
1707 * If NULL, no irq thread is created
1da177e4
LT
1708 * @irqflags: Interrupt type flags
1709 * @devname: An ascii name for the claiming device
1710 * @dev_id: A cookie passed back to the handler function
1711 *
1712 * This call allocates interrupt resources and enables the
1713 * interrupt line and IRQ handling. From the point this
1714 * call is made your handler function may be invoked. Since
1715 * your handler function must clear any interrupt the board
1716 * raises, you must take care both to initialise your hardware
1717 * and to set up the interrupt handler in the right order.
1718 *
3aa551c9 1719 * If you want to set up a threaded irq handler for your device
6d21af4f 1720 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1721 * still called in hard interrupt context and has to check
1722 * whether the interrupt originates from the device. If yes it
1723 * needs to disable the interrupt on the device and return
39a2eddb 1724 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1725 * @thread_fn. This split handler design is necessary to support
1726 * shared interrupts.
1727 *
1da177e4
LT
1728 * Dev_id must be globally unique. Normally the address of the
1729 * device data structure is used as the cookie. Since the handler
1730 * receives this value it makes sense to use it.
1731 *
1732 * If your interrupt is shared you must pass a non NULL dev_id
1733 * as this is required when freeing the interrupt.
1734 *
1735 * Flags:
1736 *
3cca53b0 1737 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1738 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1739 *
1740 */
3aa551c9
TG
1741int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1742 irq_handler_t thread_fn, unsigned long irqflags,
1743 const char *devname, void *dev_id)
1da177e4 1744{
06fcb0c6 1745 struct irqaction *action;
08678b08 1746 struct irq_desc *desc;
d3c60047 1747 int retval;
1da177e4 1748
e237a551
CF
1749 if (irq == IRQ_NOTCONNECTED)
1750 return -ENOTCONN;
1751
1da177e4
LT
1752 /*
1753 * Sanity-check: shared interrupts must pass in a real dev-ID,
1754 * otherwise we'll have trouble later trying to figure out
1755 * which interrupt is which (messes up the interrupt freeing
1756 * logic etc).
17f48034
RW
1757 *
1758 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1759 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 1760 */
17f48034
RW
1761 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1762 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1763 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 1764 return -EINVAL;
7d94f7ca 1765
cb5bc832 1766 desc = irq_to_desc(irq);
7d94f7ca 1767 if (!desc)
1da177e4 1768 return -EINVAL;
7d94f7ca 1769
31d9d9b6
MZ
1770 if (!irq_settings_can_request(desc) ||
1771 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1772 return -EINVAL;
b25c340c
TG
1773
1774 if (!handler) {
1775 if (!thread_fn)
1776 return -EINVAL;
1777 handler = irq_default_primary_handler;
1778 }
1da177e4 1779
45535732 1780 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1781 if (!action)
1782 return -ENOMEM;
1783
1784 action->handler = handler;
3aa551c9 1785 action->thread_fn = thread_fn;
1da177e4 1786 action->flags = irqflags;
1da177e4 1787 action->name = devname;
1da177e4
LT
1788 action->dev_id = dev_id;
1789
be45beb2 1790 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
1791 if (retval < 0) {
1792 kfree(action);
be45beb2 1793 return retval;
4396f46c 1794 }
be45beb2 1795
d3c60047 1796 retval = __setup_irq(irq, desc, action);
70aedd24 1797
2a1d3ab8 1798 if (retval) {
be45beb2 1799 irq_chip_pm_put(&desc->irq_data);
2a1d3ab8 1800 kfree(action->secondary);
377bf1e4 1801 kfree(action);
2a1d3ab8 1802 }
377bf1e4 1803
6d83f94d 1804#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1805 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1806 /*
1807 * It's a shared IRQ -- the driver ought to be prepared for it
1808 * to happen immediately, so let's make sure....
377bf1e4
AV
1809 * We disable the irq to make sure that a 'real' IRQ doesn't
1810 * run in parallel with our fake.
a304e1b8 1811 */
59845b1f 1812 unsigned long flags;
a304e1b8 1813
377bf1e4 1814 disable_irq(irq);
59845b1f 1815 local_irq_save(flags);
377bf1e4 1816
59845b1f 1817 handler(irq, dev_id);
377bf1e4 1818
59845b1f 1819 local_irq_restore(flags);
377bf1e4 1820 enable_irq(irq);
a304e1b8
DW
1821 }
1822#endif
1da177e4
LT
1823 return retval;
1824}
3aa551c9 1825EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1826
1827/**
1828 * request_any_context_irq - allocate an interrupt line
1829 * @irq: Interrupt line to allocate
1830 * @handler: Function to be called when the IRQ occurs.
1831 * Threaded handler for threaded interrupts.
1832 * @flags: Interrupt type flags
1833 * @name: An ascii name for the claiming device
1834 * @dev_id: A cookie passed back to the handler function
1835 *
1836 * This call allocates interrupt resources and enables the
1837 * interrupt line and IRQ handling. It selects either a
1838 * hardirq or threaded handling method depending on the
1839 * context.
1840 *
1841 * On failure, it returns a negative value. On success,
1842 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1843 */
1844int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1845 unsigned long flags, const char *name, void *dev_id)
1846{
e237a551 1847 struct irq_desc *desc;
ae731f8d
MZ
1848 int ret;
1849
e237a551
CF
1850 if (irq == IRQ_NOTCONNECTED)
1851 return -ENOTCONN;
1852
1853 desc = irq_to_desc(irq);
ae731f8d
MZ
1854 if (!desc)
1855 return -EINVAL;
1856
1ccb4e61 1857 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1858 ret = request_threaded_irq(irq, NULL, handler,
1859 flags, name, dev_id);
1860 return !ret ? IRQC_IS_NESTED : ret;
1861 }
1862
1863 ret = request_irq(irq, handler, flags, name, dev_id);
1864 return !ret ? IRQC_IS_HARDIRQ : ret;
1865}
1866EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1867
1e7c5fd2 1868void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1869{
1870 unsigned int cpu = smp_processor_id();
1871 unsigned long flags;
1872 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1873
1874 if (!desc)
1875 return;
1876
f35ad083
MZ
1877 /*
1878 * If the trigger type is not specified by the caller, then
1879 * use the default for this interrupt.
1880 */
1e7c5fd2 1881 type &= IRQ_TYPE_SENSE_MASK;
f35ad083
MZ
1882 if (type == IRQ_TYPE_NONE)
1883 type = irqd_get_trigger_type(&desc->irq_data);
1884
1e7c5fd2
MZ
1885 if (type != IRQ_TYPE_NONE) {
1886 int ret;
1887
a1ff541a 1888 ret = __irq_set_trigger(desc, type);
1e7c5fd2
MZ
1889
1890 if (ret) {
32cffdde 1891 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1892 goto out;
1893 }
1894 }
1895
31d9d9b6 1896 irq_percpu_enable(desc, cpu);
1e7c5fd2 1897out:
31d9d9b6
MZ
1898 irq_put_desc_unlock(desc, flags);
1899}
36a5df85 1900EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6 1901
f0cb3220
TP
1902/**
1903 * irq_percpu_is_enabled - Check whether the per cpu irq is enabled
1904 * @irq: Linux irq number to check for
1905 *
1906 * Must be called from a non migratable context. Returns the enable
1907 * state of a per cpu interrupt on the current cpu.
1908 */
1909bool irq_percpu_is_enabled(unsigned int irq)
1910{
1911 unsigned int cpu = smp_processor_id();
1912 struct irq_desc *desc;
1913 unsigned long flags;
1914 bool is_enabled;
1915
1916 desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1917 if (!desc)
1918 return false;
1919
1920 is_enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
1921 irq_put_desc_unlock(desc, flags);
1922
1923 return is_enabled;
1924}
1925EXPORT_SYMBOL_GPL(irq_percpu_is_enabled);
1926
31d9d9b6
MZ
1927void disable_percpu_irq(unsigned int irq)
1928{
1929 unsigned int cpu = smp_processor_id();
1930 unsigned long flags;
1931 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1932
1933 if (!desc)
1934 return;
1935
1936 irq_percpu_disable(desc, cpu);
1937 irq_put_desc_unlock(desc, flags);
1938}
36a5df85 1939EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1940
1941/*
1942 * Internal function to unregister a percpu irqaction.
1943 */
1944static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1945{
1946 struct irq_desc *desc = irq_to_desc(irq);
1947 struct irqaction *action;
1948 unsigned long flags;
1949
1950 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1951
1952 if (!desc)
1953 return NULL;
1954
1955 raw_spin_lock_irqsave(&desc->lock, flags);
1956
1957 action = desc->action;
1958 if (!action || action->percpu_dev_id != dev_id) {
1959 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1960 goto bad;
1961 }
1962
1963 if (!cpumask_empty(desc->percpu_enabled)) {
1964 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1965 irq, cpumask_first(desc->percpu_enabled));
1966 goto bad;
1967 }
1968
1969 /* Found it - now remove it from the list of entries: */
1970 desc->action = NULL;
1971
1972 raw_spin_unlock_irqrestore(&desc->lock, flags);
1973
1974 unregister_handler_proc(irq, action);
1975
be45beb2 1976 irq_chip_pm_put(&desc->irq_data);
31d9d9b6
MZ
1977 module_put(desc->owner);
1978 return action;
1979
1980bad:
1981 raw_spin_unlock_irqrestore(&desc->lock, flags);
1982 return NULL;
1983}
1984
1985/**
1986 * remove_percpu_irq - free a per-cpu interrupt
1987 * @irq: Interrupt line to free
1988 * @act: irqaction for the interrupt
1989 *
1990 * Used to remove interrupts statically setup by the early boot process.
1991 */
1992void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1993{
1994 struct irq_desc *desc = irq_to_desc(irq);
1995
1996 if (desc && irq_settings_is_per_cpu_devid(desc))
1997 __free_percpu_irq(irq, act->percpu_dev_id);
1998}
1999
2000/**
2001 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
2002 * @irq: Interrupt line to free
2003 * @dev_id: Device identity to free
2004 *
2005 * Remove a percpu interrupt handler. The handler is removed, but
2006 * the interrupt line is not disabled. This must be done on each
2007 * CPU before calling this function. The function does not return
2008 * until any executing interrupts for this IRQ have completed.
2009 *
2010 * This function must not be called from interrupt context.
2011 */
2012void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
2013{
2014 struct irq_desc *desc = irq_to_desc(irq);
2015
2016 if (!desc || !irq_settings_is_per_cpu_devid(desc))
2017 return;
2018
2019 chip_bus_lock(desc);
2020 kfree(__free_percpu_irq(irq, dev_id));
2021 chip_bus_sync_unlock(desc);
2022}
aec2e2ad 2023EXPORT_SYMBOL_GPL(free_percpu_irq);
31d9d9b6
MZ
2024
2025/**
2026 * setup_percpu_irq - setup a per-cpu interrupt
2027 * @irq: Interrupt line to setup
2028 * @act: irqaction for the interrupt
2029 *
2030 * Used to statically setup per-cpu interrupts in the early boot process.
2031 */
2032int setup_percpu_irq(unsigned int irq, struct irqaction *act)
2033{
2034 struct irq_desc *desc = irq_to_desc(irq);
2035 int retval;
2036
2037 if (!desc || !irq_settings_is_per_cpu_devid(desc))
2038 return -EINVAL;
be45beb2
JH
2039
2040 retval = irq_chip_pm_get(&desc->irq_data);
2041 if (retval < 0)
2042 return retval;
2043
31d9d9b6 2044 retval = __setup_irq(irq, desc, act);
31d9d9b6 2045
be45beb2
JH
2046 if (retval)
2047 irq_chip_pm_put(&desc->irq_data);
2048
31d9d9b6
MZ
2049 return retval;
2050}
2051
2052/**
c80081b9 2053 * __request_percpu_irq - allocate a percpu interrupt line
31d9d9b6
MZ
2054 * @irq: Interrupt line to allocate
2055 * @handler: Function to be called when the IRQ occurs.
c80081b9 2056 * @flags: Interrupt type flags (IRQF_TIMER only)
31d9d9b6
MZ
2057 * @devname: An ascii name for the claiming device
2058 * @dev_id: A percpu cookie passed back to the handler function
2059 *
a1b7febd
MR
2060 * This call allocates interrupt resources and enables the
2061 * interrupt on the local CPU. If the interrupt is supposed to be
2062 * enabled on other CPUs, it has to be done on each CPU using
2063 * enable_percpu_irq().
31d9d9b6
MZ
2064 *
2065 * Dev_id must be globally unique. It is a per-cpu variable, and
2066 * the handler gets called with the interrupted CPU's instance of
2067 * that variable.
2068 */
c80081b9
DL
2069int __request_percpu_irq(unsigned int irq, irq_handler_t handler,
2070 unsigned long flags, const char *devname,
2071 void __percpu *dev_id)
31d9d9b6
MZ
2072{
2073 struct irqaction *action;
2074 struct irq_desc *desc;
2075 int retval;
2076
2077 if (!dev_id)
2078 return -EINVAL;
2079
2080 desc = irq_to_desc(irq);
2081 if (!desc || !irq_settings_can_request(desc) ||
2082 !irq_settings_is_per_cpu_devid(desc))
2083 return -EINVAL;
2084
c80081b9
DL
2085 if (flags && flags != IRQF_TIMER)
2086 return -EINVAL;
2087
31d9d9b6
MZ
2088 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
2089 if (!action)
2090 return -ENOMEM;
2091
2092 action->handler = handler;
c80081b9 2093 action->flags = flags | IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
2094 action->name = devname;
2095 action->percpu_dev_id = dev_id;
2096
be45beb2 2097 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
2098 if (retval < 0) {
2099 kfree(action);
be45beb2 2100 return retval;
4396f46c 2101 }
be45beb2 2102
31d9d9b6 2103 retval = __setup_irq(irq, desc, action);
31d9d9b6 2104
be45beb2
JH
2105 if (retval) {
2106 irq_chip_pm_put(&desc->irq_data);
31d9d9b6 2107 kfree(action);
be45beb2 2108 }
31d9d9b6
MZ
2109
2110 return retval;
2111}
c80081b9 2112EXPORT_SYMBOL_GPL(__request_percpu_irq);
1b7047ed
MZ
2113
2114/**
2115 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
2116 * @irq: Interrupt line that is forwarded to a VM
2117 * @which: One of IRQCHIP_STATE_* the caller wants to know about
2118 * @state: a pointer to a boolean where the state is to be storeed
2119 *
2120 * This call snapshots the internal irqchip state of an
2121 * interrupt, returning into @state the bit corresponding to
2122 * stage @which
2123 *
2124 * This function should be called with preemption disabled if the
2125 * interrupt controller has per-cpu registers.
2126 */
2127int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2128 bool *state)
2129{
2130 struct irq_desc *desc;
2131 struct irq_data *data;
2132 struct irq_chip *chip;
2133 unsigned long flags;
2134 int err = -EINVAL;
2135
2136 desc = irq_get_desc_buslock(irq, &flags, 0);
2137 if (!desc)
2138 return err;
2139
2140 data = irq_desc_get_irq_data(desc);
2141
2142 do {
2143 chip = irq_data_get_irq_chip(data);
2144 if (chip->irq_get_irqchip_state)
2145 break;
2146#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2147 data = data->parent_data;
2148#else
2149 data = NULL;
2150#endif
2151 } while (data);
2152
2153 if (data)
2154 err = chip->irq_get_irqchip_state(data, which, state);
2155
2156 irq_put_desc_busunlock(desc, flags);
2157 return err;
2158}
1ee4fb3e 2159EXPORT_SYMBOL_GPL(irq_get_irqchip_state);
1b7047ed
MZ
2160
2161/**
2162 * irq_set_irqchip_state - set the state of a forwarded interrupt.
2163 * @irq: Interrupt line that is forwarded to a VM
2164 * @which: State to be restored (one of IRQCHIP_STATE_*)
2165 * @val: Value corresponding to @which
2166 *
2167 * This call sets the internal irqchip state of an interrupt,
2168 * depending on the value of @which.
2169 *
2170 * This function should be called with preemption disabled if the
2171 * interrupt controller has per-cpu registers.
2172 */
2173int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2174 bool val)
2175{
2176 struct irq_desc *desc;
2177 struct irq_data *data;
2178 struct irq_chip *chip;
2179 unsigned long flags;
2180 int err = -EINVAL;
2181
2182 desc = irq_get_desc_buslock(irq, &flags, 0);
2183 if (!desc)
2184 return err;
2185
2186 data = irq_desc_get_irq_data(desc);
2187
2188 do {
2189 chip = irq_data_get_irq_chip(data);
2190 if (chip->irq_set_irqchip_state)
2191 break;
2192#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2193 data = data->parent_data;
2194#else
2195 data = NULL;
2196#endif
2197 } while (data);
2198
2199 if (data)
2200 err = chip->irq_set_irqchip_state(data, which, val);
2201
2202 irq_put_desc_busunlock(desc, flags);
2203 return err;
2204}
1ee4fb3e 2205EXPORT_SYMBOL_GPL(irq_set_irqchip_state);