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CommitLineData
1da177e4
LT
1/*
2 * linux/kernel/irq/manage.c
3 *
a34db9b2
IM
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006 Thomas Gleixner
1da177e4
LT
6 *
7 * This file contains driver APIs to the irq subsystem.
8 */
9
97fd75b7
AM
10#define pr_fmt(fmt) "genirq: " fmt
11
1da177e4 12#include <linux/irq.h>
3aa551c9 13#include <linux/kthread.h>
1da177e4
LT
14#include <linux/module.h>
15#include <linux/random.h>
16#include <linux/interrupt.h>
1aeb272c 17#include <linux/slab.h>
3aa551c9 18#include <linux/sched.h>
8bd75c77 19#include <linux/sched/rt.h>
0881e7bd 20#include <linux/sched/task.h>
ae7e81c0 21#include <uapi/linux/sched/types.h>
4d1d61a6 22#include <linux/task_work.h>
1da177e4
LT
23
24#include "internals.h"
25
8d32a307
TG
26#ifdef CONFIG_IRQ_FORCED_THREADING
27__read_mostly bool force_irqthreads;
28
29static int __init setup_forced_irqthreads(char *arg)
30{
31 force_irqthreads = true;
32 return 0;
33}
34early_param("threadirqs", setup_forced_irqthreads);
35#endif
36
18258f72 37static void __synchronize_hardirq(struct irq_desc *desc)
1da177e4 38{
32f4125e 39 bool inprogress;
1da177e4 40
a98ce5c6
HX
41 do {
42 unsigned long flags;
43
44 /*
45 * Wait until we're out of the critical section. This might
46 * give the wrong answer due to the lack of memory barriers.
47 */
32f4125e 48 while (irqd_irq_inprogress(&desc->irq_data))
a98ce5c6
HX
49 cpu_relax();
50
51 /* Ok, that indicated we're done: double-check carefully. */
239007b8 52 raw_spin_lock_irqsave(&desc->lock, flags);
32f4125e 53 inprogress = irqd_irq_inprogress(&desc->irq_data);
239007b8 54 raw_spin_unlock_irqrestore(&desc->lock, flags);
a98ce5c6
HX
55
56 /* Oops, that failed? */
32f4125e 57 } while (inprogress);
18258f72
TG
58}
59
60/**
61 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
62 * @irq: interrupt number to wait for
63 *
64 * This function waits for any pending hard IRQ handlers for this
65 * interrupt to complete before returning. If you use this
66 * function while holding a resource the IRQ handler may need you
67 * will deadlock. It does not take associated threaded handlers
68 * into account.
69 *
70 * Do not use this for shutdown scenarios where you must be sure
71 * that all parts (hardirq and threaded handler) have completed.
72 *
02cea395
PZ
73 * Returns: false if a threaded handler is active.
74 *
18258f72
TG
75 * This function may be called - with care - from IRQ context.
76 */
02cea395 77bool synchronize_hardirq(unsigned int irq)
18258f72
TG
78{
79 struct irq_desc *desc = irq_to_desc(irq);
3aa551c9 80
02cea395 81 if (desc) {
18258f72 82 __synchronize_hardirq(desc);
02cea395
PZ
83 return !atomic_read(&desc->threads_active);
84 }
85
86 return true;
18258f72
TG
87}
88EXPORT_SYMBOL(synchronize_hardirq);
89
90/**
91 * synchronize_irq - wait for pending IRQ handlers (on other CPUs)
92 * @irq: interrupt number to wait for
93 *
94 * This function waits for any pending IRQ handlers for this interrupt
95 * to complete before returning. If you use this function while
96 * holding a resource the IRQ handler may need you will deadlock.
97 *
98 * This function may be called - with care - from IRQ context.
99 */
100void synchronize_irq(unsigned int irq)
101{
102 struct irq_desc *desc = irq_to_desc(irq);
103
104 if (desc) {
105 __synchronize_hardirq(desc);
106 /*
107 * We made sure that no hardirq handler is
108 * running. Now verify that no threaded handlers are
109 * active.
110 */
111 wait_event(desc->wait_for_threads,
112 !atomic_read(&desc->threads_active));
113 }
1da177e4 114}
1da177e4
LT
115EXPORT_SYMBOL(synchronize_irq);
116
3aa551c9
TG
117#ifdef CONFIG_SMP
118cpumask_var_t irq_default_affinity;
119
9c255583 120static bool __irq_can_set_affinity(struct irq_desc *desc)
e019c249
JL
121{
122 if (!desc || !irqd_can_balance(&desc->irq_data) ||
123 !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity)
9c255583
TG
124 return false;
125 return true;
e019c249
JL
126}
127
771ee3b0
TG
128/**
129 * irq_can_set_affinity - Check if the affinity of a given irq can be set
130 * @irq: Interrupt to check
131 *
132 */
133int irq_can_set_affinity(unsigned int irq)
134{
e019c249 135 return __irq_can_set_affinity(irq_to_desc(irq));
771ee3b0
TG
136}
137
9c255583
TG
138/**
139 * irq_can_set_affinity_usr - Check if affinity of a irq can be set from user space
140 * @irq: Interrupt to check
141 *
142 * Like irq_can_set_affinity() above, but additionally checks for the
143 * AFFINITY_MANAGED flag.
144 */
145bool irq_can_set_affinity_usr(unsigned int irq)
146{
147 struct irq_desc *desc = irq_to_desc(irq);
148
149 return __irq_can_set_affinity(desc) &&
150 !irqd_affinity_is_managed(&desc->irq_data);
151}
152
591d2fb0
TG
153/**
154 * irq_set_thread_affinity - Notify irq threads to adjust affinity
155 * @desc: irq descriptor which has affitnity changed
156 *
157 * We just set IRQTF_AFFINITY and delegate the affinity setting
158 * to the interrupt thread itself. We can not call
159 * set_cpus_allowed_ptr() here as we hold desc->lock and this
160 * code can be called from hard interrupt context.
161 */
162void irq_set_thread_affinity(struct irq_desc *desc)
3aa551c9 163{
f944b5a7 164 struct irqaction *action;
3aa551c9 165
f944b5a7 166 for_each_action_of_desc(desc, action)
3aa551c9 167 if (action->thread)
591d2fb0 168 set_bit(IRQTF_AFFINITY, &action->thread_flags);
3aa551c9
TG
169}
170
818b0f3b
JL
171int irq_do_set_affinity(struct irq_data *data, const struct cpumask *mask,
172 bool force)
173{
174 struct irq_desc *desc = irq_data_to_desc(data);
175 struct irq_chip *chip = irq_data_get_irq_chip(data);
176 int ret;
177
01f8fa4f 178 ret = chip->irq_set_affinity(data, mask, force);
818b0f3b
JL
179 switch (ret) {
180 case IRQ_SET_MASK_OK:
2cb62547 181 case IRQ_SET_MASK_OK_DONE:
9df872fa 182 cpumask_copy(desc->irq_common_data.affinity, mask);
818b0f3b
JL
183 case IRQ_SET_MASK_OK_NOCOPY:
184 irq_set_thread_affinity(desc);
185 ret = 0;
186 }
187
188 return ret;
189}
190
01f8fa4f
TG
191int irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask,
192 bool force)
771ee3b0 193{
c2d0c555
DD
194 struct irq_chip *chip = irq_data_get_irq_chip(data);
195 struct irq_desc *desc = irq_data_to_desc(data);
1fa46f1f 196 int ret = 0;
771ee3b0 197
c2d0c555 198 if (!chip || !chip->irq_set_affinity)
771ee3b0
TG
199 return -EINVAL;
200
0ef5ca1e 201 if (irq_can_move_pcntxt(data)) {
01f8fa4f 202 ret = irq_do_set_affinity(data, mask, force);
1fa46f1f 203 } else {
c2d0c555 204 irqd_set_move_pending(data);
1fa46f1f 205 irq_copy_pending(desc, mask);
57b150cc 206 }
1fa46f1f 207
cd7eab44
BH
208 if (desc->affinity_notify) {
209 kref_get(&desc->affinity_notify->kref);
210 schedule_work(&desc->affinity_notify->work);
211 }
c2d0c555
DD
212 irqd_set(data, IRQD_AFFINITY_SET);
213
214 return ret;
215}
216
01f8fa4f 217int __irq_set_affinity(unsigned int irq, const struct cpumask *mask, bool force)
c2d0c555
DD
218{
219 struct irq_desc *desc = irq_to_desc(irq);
220 unsigned long flags;
221 int ret;
222
223 if (!desc)
224 return -EINVAL;
225
226 raw_spin_lock_irqsave(&desc->lock, flags);
01f8fa4f 227 ret = irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask, force);
239007b8 228 raw_spin_unlock_irqrestore(&desc->lock, flags);
1fa46f1f 229 return ret;
771ee3b0
TG
230}
231
e7a297b0
PWJ
232int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m)
233{
e7a297b0 234 unsigned long flags;
31d9d9b6 235 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
e7a297b0
PWJ
236
237 if (!desc)
238 return -EINVAL;
e7a297b0 239 desc->affinity_hint = m;
02725e74 240 irq_put_desc_unlock(desc, flags);
e2e64a93 241 /* set the initial affinity to prevent every interrupt being on CPU0 */
4fe7ffb7
JB
242 if (m)
243 __irq_set_affinity(irq, m, false);
e7a297b0
PWJ
244 return 0;
245}
246EXPORT_SYMBOL_GPL(irq_set_affinity_hint);
247
cd7eab44
BH
248static void irq_affinity_notify(struct work_struct *work)
249{
250 struct irq_affinity_notify *notify =
251 container_of(work, struct irq_affinity_notify, work);
252 struct irq_desc *desc = irq_to_desc(notify->irq);
253 cpumask_var_t cpumask;
254 unsigned long flags;
255
1fa46f1f 256 if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL))
cd7eab44
BH
257 goto out;
258
259 raw_spin_lock_irqsave(&desc->lock, flags);
0ef5ca1e 260 if (irq_move_pending(&desc->irq_data))
1fa46f1f 261 irq_get_pending(cpumask, desc);
cd7eab44 262 else
9df872fa 263 cpumask_copy(cpumask, desc->irq_common_data.affinity);
cd7eab44
BH
264 raw_spin_unlock_irqrestore(&desc->lock, flags);
265
266 notify->notify(notify, cpumask);
267
268 free_cpumask_var(cpumask);
269out:
270 kref_put(&notify->kref, notify->release);
271}
272
273/**
274 * irq_set_affinity_notifier - control notification of IRQ affinity changes
275 * @irq: Interrupt for which to enable/disable notification
276 * @notify: Context for notification, or %NULL to disable
277 * notification. Function pointers must be initialised;
278 * the other fields will be initialised by this function.
279 *
280 * Must be called in process context. Notification may only be enabled
281 * after the IRQ is allocated and must be disabled before the IRQ is
282 * freed using free_irq().
283 */
284int
285irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify)
286{
287 struct irq_desc *desc = irq_to_desc(irq);
288 struct irq_affinity_notify *old_notify;
289 unsigned long flags;
290
291 /* The release function is promised process context */
292 might_sleep();
293
294 if (!desc)
295 return -EINVAL;
296
297 /* Complete initialisation of *notify */
298 if (notify) {
299 notify->irq = irq;
300 kref_init(&notify->kref);
301 INIT_WORK(&notify->work, irq_affinity_notify);
302 }
303
304 raw_spin_lock_irqsave(&desc->lock, flags);
305 old_notify = desc->affinity_notify;
306 desc->affinity_notify = notify;
307 raw_spin_unlock_irqrestore(&desc->lock, flags);
308
309 if (old_notify)
310 kref_put(&old_notify->kref, old_notify->release);
311
312 return 0;
313}
314EXPORT_SYMBOL_GPL(irq_set_affinity_notifier);
315
18404756
MK
316#ifndef CONFIG_AUTO_IRQ_AFFINITY
317/*
318 * Generic version of the affinity autoselector.
319 */
43564bd9 320int irq_setup_affinity(struct irq_desc *desc)
18404756 321{
569bda8d 322 struct cpumask *set = irq_default_affinity;
cba4235e
TG
323 int ret, node = irq_desc_get_node(desc);
324 static DEFINE_RAW_SPINLOCK(mask_lock);
325 static struct cpumask mask;
569bda8d 326
b008207c 327 /* Excludes PER_CPU and NO_BALANCE interrupts */
e019c249 328 if (!__irq_can_set_affinity(desc))
18404756
MK
329 return 0;
330
cba4235e 331 raw_spin_lock(&mask_lock);
f6d87f4b 332 /*
9332ef9d 333 * Preserve the managed affinity setting and a userspace affinity
06ee6d57 334 * setup, but make sure that one of the targets is online.
f6d87f4b 335 */
06ee6d57
TG
336 if (irqd_affinity_is_managed(&desc->irq_data) ||
337 irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) {
9df872fa 338 if (cpumask_intersects(desc->irq_common_data.affinity,
569bda8d 339 cpu_online_mask))
9df872fa 340 set = desc->irq_common_data.affinity;
0c6f8a8b 341 else
2bdd1055 342 irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET);
f6d87f4b 343 }
18404756 344
cba4235e 345 cpumask_and(&mask, cpu_online_mask, set);
241fc640
PB
346 if (node != NUMA_NO_NODE) {
347 const struct cpumask *nodemask = cpumask_of_node(node);
348
349 /* make sure at least one of the cpus in nodemask is online */
cba4235e
TG
350 if (cpumask_intersects(&mask, nodemask))
351 cpumask_and(&mask, &mask, nodemask);
241fc640 352 }
cba4235e
TG
353 ret = irq_do_set_affinity(&desc->irq_data, &mask, false);
354 raw_spin_unlock(&mask_lock);
355 return ret;
18404756 356}
f6d87f4b 357#else
a8a98eac 358/* Wrapper for ALPHA specific affinity selector magic */
cba4235e 359int irq_setup_affinity(struct irq_desc *desc)
f6d87f4b 360{
cba4235e 361 return irq_select_affinity(irq_desc_get_irq(desc));
f6d87f4b 362}
18404756
MK
363#endif
364
f6d87f4b 365/*
cba4235e 366 * Called when a bogus affinity is set via /proc/irq
f6d87f4b 367 */
cba4235e 368int irq_select_affinity_usr(unsigned int irq)
f6d87f4b
TG
369{
370 struct irq_desc *desc = irq_to_desc(irq);
371 unsigned long flags;
372 int ret;
373
239007b8 374 raw_spin_lock_irqsave(&desc->lock, flags);
cba4235e 375 ret = irq_setup_affinity(desc);
239007b8 376 raw_spin_unlock_irqrestore(&desc->lock, flags);
f6d87f4b
TG
377 return ret;
378}
1da177e4
LT
379#endif
380
fcf1ae2f
FW
381/**
382 * irq_set_vcpu_affinity - Set vcpu affinity for the interrupt
383 * @irq: interrupt number to set affinity
384 * @vcpu_info: vCPU specific data
385 *
386 * This function uses the vCPU specific data to set the vCPU
387 * affinity for an irq. The vCPU specific data is passed from
388 * outside, such as KVM. One example code path is as below:
389 * KVM -> IOMMU -> irq_set_vcpu_affinity().
390 */
391int irq_set_vcpu_affinity(unsigned int irq, void *vcpu_info)
392{
393 unsigned long flags;
394 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
395 struct irq_data *data;
396 struct irq_chip *chip;
397 int ret = -ENOSYS;
398
399 if (!desc)
400 return -EINVAL;
401
402 data = irq_desc_get_irq_data(desc);
0abce64a
MZ
403 do {
404 chip = irq_data_get_irq_chip(data);
405 if (chip && chip->irq_set_vcpu_affinity)
406 break;
407#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
408 data = data->parent_data;
409#else
410 data = NULL;
411#endif
412 } while (data);
413
414 if (data)
fcf1ae2f
FW
415 ret = chip->irq_set_vcpu_affinity(data, vcpu_info);
416 irq_put_desc_unlock(desc, flags);
417
418 return ret;
419}
420EXPORT_SYMBOL_GPL(irq_set_vcpu_affinity);
421
79ff1cda 422void __disable_irq(struct irq_desc *desc)
0a0c5168 423{
3aae994f 424 if (!desc->depth++)
87923470 425 irq_disable(desc);
0a0c5168
RW
426}
427
02725e74
TG
428static int __disable_irq_nosync(unsigned int irq)
429{
430 unsigned long flags;
31d9d9b6 431 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
02725e74
TG
432
433 if (!desc)
434 return -EINVAL;
79ff1cda 435 __disable_irq(desc);
02725e74
TG
436 irq_put_desc_busunlock(desc, flags);
437 return 0;
438}
439
1da177e4
LT
440/**
441 * disable_irq_nosync - disable an irq without waiting
442 * @irq: Interrupt to disable
443 *
444 * Disable the selected interrupt line. Disables and Enables are
445 * nested.
446 * Unlike disable_irq(), this function does not ensure existing
447 * instances of the IRQ handler have completed before returning.
448 *
449 * This function may be called from IRQ context.
450 */
451void disable_irq_nosync(unsigned int irq)
452{
02725e74 453 __disable_irq_nosync(irq);
1da177e4 454}
1da177e4
LT
455EXPORT_SYMBOL(disable_irq_nosync);
456
457/**
458 * disable_irq - disable an irq and wait for completion
459 * @irq: Interrupt to disable
460 *
461 * Disable the selected interrupt line. Enables and Disables are
462 * nested.
463 * This function waits for any pending IRQ handlers for this interrupt
464 * to complete before returning. If you use this function while
465 * holding a resource the IRQ handler may need you will deadlock.
466 *
467 * This function may be called - with care - from IRQ context.
468 */
469void disable_irq(unsigned int irq)
470{
02725e74 471 if (!__disable_irq_nosync(irq))
1da177e4
LT
472 synchronize_irq(irq);
473}
1da177e4
LT
474EXPORT_SYMBOL(disable_irq);
475
02cea395
PZ
476/**
477 * disable_hardirq - disables an irq and waits for hardirq completion
478 * @irq: Interrupt to disable
479 *
480 * Disable the selected interrupt line. Enables and Disables are
481 * nested.
482 * This function waits for any pending hard IRQ handlers for this
483 * interrupt to complete before returning. If you use this function while
484 * holding a resource the hard IRQ handler may need you will deadlock.
485 *
486 * When used to optimistically disable an interrupt from atomic context
487 * the return value must be checked.
488 *
489 * Returns: false if a threaded handler is active.
490 *
491 * This function may be called - with care - from IRQ context.
492 */
493bool disable_hardirq(unsigned int irq)
494{
495 if (!__disable_irq_nosync(irq))
496 return synchronize_hardirq(irq);
497
498 return false;
499}
500EXPORT_SYMBOL_GPL(disable_hardirq);
501
79ff1cda 502void __enable_irq(struct irq_desc *desc)
1adb0850
TG
503{
504 switch (desc->depth) {
505 case 0:
0a0c5168 506 err_out:
79ff1cda
JL
507 WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n",
508 irq_desc_get_irq(desc));
1adb0850
TG
509 break;
510 case 1: {
c531e836 511 if (desc->istate & IRQS_SUSPENDED)
0a0c5168 512 goto err_out;
1adb0850 513 /* Prevent probing on this irq: */
1ccb4e61 514 irq_settings_set_noprobe(desc);
201d7f47
TG
515 /*
516 * Call irq_startup() not irq_enable() here because the
517 * interrupt might be marked NOAUTOEN. So irq_startup()
518 * needs to be invoked when it gets enabled the first
519 * time. If it was already started up, then irq_startup()
520 * will invoke irq_enable() under the hood.
521 */
c942cee4 522 irq_startup(desc, IRQ_RESEND, IRQ_START_FORCE);
201d7f47 523 break;
1adb0850
TG
524 }
525 default:
526 desc->depth--;
527 }
528}
529
1da177e4
LT
530/**
531 * enable_irq - enable handling of an irq
532 * @irq: Interrupt to enable
533 *
534 * Undoes the effect of one call to disable_irq(). If this
535 * matches the last disable, processing of interrupts on this
536 * IRQ line is re-enabled.
537 *
70aedd24 538 * This function may be called from IRQ context only when
6b8ff312 539 * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL !
1da177e4
LT
540 */
541void enable_irq(unsigned int irq)
542{
1da177e4 543 unsigned long flags;
31d9d9b6 544 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
1da177e4 545
7d94f7ca 546 if (!desc)
c2b5a251 547 return;
50f7c032
TG
548 if (WARN(!desc->irq_data.chip,
549 KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq))
02725e74 550 goto out;
2656c366 551
79ff1cda 552 __enable_irq(desc);
02725e74
TG
553out:
554 irq_put_desc_busunlock(desc, flags);
1da177e4 555}
1da177e4
LT
556EXPORT_SYMBOL(enable_irq);
557
0c5d1eb7 558static int set_irq_wake_real(unsigned int irq, unsigned int on)
2db87321 559{
08678b08 560 struct irq_desc *desc = irq_to_desc(irq);
2db87321
UKK
561 int ret = -ENXIO;
562
60f96b41
SS
563 if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE)
564 return 0;
565
2f7e99bb
TG
566 if (desc->irq_data.chip->irq_set_wake)
567 ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on);
2db87321
UKK
568
569 return ret;
570}
571
ba9a2331 572/**
a0cd9ca2 573 * irq_set_irq_wake - control irq power management wakeup
ba9a2331
TG
574 * @irq: interrupt to control
575 * @on: enable/disable power management wakeup
576 *
15a647eb
DB
577 * Enable/disable power management wakeup mode, which is
578 * disabled by default. Enables and disables must match,
579 * just as they match for non-wakeup mode support.
580 *
581 * Wakeup mode lets this IRQ wake the system from sleep
582 * states like "suspend to RAM".
ba9a2331 583 */
a0cd9ca2 584int irq_set_irq_wake(unsigned int irq, unsigned int on)
ba9a2331 585{
ba9a2331 586 unsigned long flags;
31d9d9b6 587 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
2db87321 588 int ret = 0;
ba9a2331 589
13863a66
JJ
590 if (!desc)
591 return -EINVAL;
592
15a647eb
DB
593 /* wakeup-capable irqs can be shared between drivers that
594 * don't need to have the same sleep mode behaviors.
595 */
15a647eb 596 if (on) {
2db87321
UKK
597 if (desc->wake_depth++ == 0) {
598 ret = set_irq_wake_real(irq, on);
599 if (ret)
600 desc->wake_depth = 0;
601 else
7f94226f 602 irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 603 }
15a647eb
DB
604 } else {
605 if (desc->wake_depth == 0) {
7a2c4770 606 WARN(1, "Unbalanced IRQ %d wake disable\n", irq);
2db87321
UKK
607 } else if (--desc->wake_depth == 0) {
608 ret = set_irq_wake_real(irq, on);
609 if (ret)
610 desc->wake_depth = 1;
611 else
7f94226f 612 irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE);
2db87321 613 }
15a647eb 614 }
02725e74 615 irq_put_desc_busunlock(desc, flags);
ba9a2331
TG
616 return ret;
617}
a0cd9ca2 618EXPORT_SYMBOL(irq_set_irq_wake);
ba9a2331 619
1da177e4
LT
620/*
621 * Internal function that tells the architecture code whether a
622 * particular irq has been exclusively allocated or is available
623 * for driver use.
624 */
625int can_request_irq(unsigned int irq, unsigned long irqflags)
626{
cc8c3b78 627 unsigned long flags;
31d9d9b6 628 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
02725e74 629 int canrequest = 0;
1da177e4 630
7d94f7ca
YL
631 if (!desc)
632 return 0;
633
02725e74 634 if (irq_settings_can_request(desc)) {
2779db8d
BH
635 if (!desc->action ||
636 irqflags & desc->action->flags & IRQF_SHARED)
637 canrequest = 1;
02725e74
TG
638 }
639 irq_put_desc_unlock(desc, flags);
640 return canrequest;
1da177e4
LT
641}
642
a1ff541a 643int __irq_set_trigger(struct irq_desc *desc, unsigned long flags)
82736f4d 644{
6b8ff312 645 struct irq_chip *chip = desc->irq_data.chip;
d4d5e089 646 int ret, unmask = 0;
82736f4d 647
b2ba2c30 648 if (!chip || !chip->irq_set_type) {
82736f4d
UKK
649 /*
650 * IRQF_TRIGGER_* but the PIC does not support multiple
651 * flow-types?
652 */
a1ff541a
JL
653 pr_debug("No set_type function for IRQ %d (%s)\n",
654 irq_desc_get_irq(desc),
f5d89470 655 chip ? (chip->name ? : "unknown") : "unknown");
82736f4d
UKK
656 return 0;
657 }
658
d4d5e089 659 if (chip->flags & IRQCHIP_SET_TYPE_MASKED) {
32f4125e 660 if (!irqd_irq_masked(&desc->irq_data))
d4d5e089 661 mask_irq(desc);
32f4125e 662 if (!irqd_irq_disabled(&desc->irq_data))
d4d5e089
TG
663 unmask = 1;
664 }
665
00b992de
AK
666 /* Mask all flags except trigger mode */
667 flags &= IRQ_TYPE_SENSE_MASK;
b2ba2c30 668 ret = chip->irq_set_type(&desc->irq_data, flags);
82736f4d 669
876dbd4c
TG
670 switch (ret) {
671 case IRQ_SET_MASK_OK:
2cb62547 672 case IRQ_SET_MASK_OK_DONE:
876dbd4c
TG
673 irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK);
674 irqd_set(&desc->irq_data, flags);
675
676 case IRQ_SET_MASK_OK_NOCOPY:
677 flags = irqd_get_trigger_type(&desc->irq_data);
678 irq_settings_set_trigger_mask(desc, flags);
679 irqd_clear(&desc->irq_data, IRQD_LEVEL);
680 irq_settings_clr_level(desc);
681 if (flags & IRQ_TYPE_LEVEL_MASK) {
682 irq_settings_set_level(desc);
683 irqd_set(&desc->irq_data, IRQD_LEVEL);
684 }
46732475 685
d4d5e089 686 ret = 0;
8fff39e0 687 break;
876dbd4c 688 default:
97fd75b7 689 pr_err("Setting trigger mode %lu for irq %u failed (%pF)\n",
a1ff541a 690 flags, irq_desc_get_irq(desc), chip->irq_set_type);
0c5d1eb7 691 }
d4d5e089
TG
692 if (unmask)
693 unmask_irq(desc);
82736f4d
UKK
694 return ret;
695}
696
293a7a0a
TG
697#ifdef CONFIG_HARDIRQS_SW_RESEND
698int irq_set_parent(int irq, int parent_irq)
699{
700 unsigned long flags;
701 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
702
703 if (!desc)
704 return -EINVAL;
705
706 desc->parent_irq = parent_irq;
707
708 irq_put_desc_unlock(desc, flags);
709 return 0;
710}
3118dac5 711EXPORT_SYMBOL_GPL(irq_set_parent);
293a7a0a
TG
712#endif
713
b25c340c
TG
714/*
715 * Default primary interrupt handler for threaded interrupts. Is
716 * assigned as primary handler when request_threaded_irq is called
717 * with handler == NULL. Useful for oneshot interrupts.
718 */
719static irqreturn_t irq_default_primary_handler(int irq, void *dev_id)
720{
721 return IRQ_WAKE_THREAD;
722}
723
399b5da2
TG
724/*
725 * Primary handler for nested threaded interrupts. Should never be
726 * called.
727 */
728static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id)
729{
730 WARN(1, "Primary handler called for nested irq %d\n", irq);
731 return IRQ_NONE;
732}
733
2a1d3ab8
TG
734static irqreturn_t irq_forced_secondary_handler(int irq, void *dev_id)
735{
736 WARN(1, "Secondary action handler called for irq %d\n", irq);
737 return IRQ_NONE;
738}
739
3aa551c9
TG
740static int irq_wait_for_interrupt(struct irqaction *action)
741{
550acb19
IY
742 set_current_state(TASK_INTERRUPTIBLE);
743
3aa551c9 744 while (!kthread_should_stop()) {
f48fe81e
TG
745
746 if (test_and_clear_bit(IRQTF_RUNTHREAD,
747 &action->thread_flags)) {
3aa551c9
TG
748 __set_current_state(TASK_RUNNING);
749 return 0;
f48fe81e
TG
750 }
751 schedule();
550acb19 752 set_current_state(TASK_INTERRUPTIBLE);
3aa551c9 753 }
550acb19 754 __set_current_state(TASK_RUNNING);
3aa551c9
TG
755 return -1;
756}
757
b25c340c
TG
758/*
759 * Oneshot interrupts keep the irq line masked until the threaded
760 * handler finished. unmask if the interrupt has not been disabled and
761 * is marked MASKED.
762 */
b5faba21 763static void irq_finalize_oneshot(struct irq_desc *desc,
f3f79e38 764 struct irqaction *action)
b25c340c 765{
2a1d3ab8
TG
766 if (!(desc->istate & IRQS_ONESHOT) ||
767 action->handler == irq_forced_secondary_handler)
b5faba21 768 return;
0b1adaa0 769again:
3876ec9e 770 chip_bus_lock(desc);
239007b8 771 raw_spin_lock_irq(&desc->lock);
0b1adaa0
TG
772
773 /*
774 * Implausible though it may be we need to protect us against
775 * the following scenario:
776 *
777 * The thread is faster done than the hard interrupt handler
778 * on the other CPU. If we unmask the irq line then the
779 * interrupt can come in again and masks the line, leaves due
009b4c3b 780 * to IRQS_INPROGRESS and the irq line is masked forever.
b5faba21
TG
781 *
782 * This also serializes the state of shared oneshot handlers
783 * versus "desc->threads_onehsot |= action->thread_mask;" in
784 * irq_wake_thread(). See the comment there which explains the
785 * serialization.
0b1adaa0 786 */
32f4125e 787 if (unlikely(irqd_irq_inprogress(&desc->irq_data))) {
0b1adaa0 788 raw_spin_unlock_irq(&desc->lock);
3876ec9e 789 chip_bus_sync_unlock(desc);
0b1adaa0
TG
790 cpu_relax();
791 goto again;
792 }
793
b5faba21
TG
794 /*
795 * Now check again, whether the thread should run. Otherwise
796 * we would clear the threads_oneshot bit of this thread which
797 * was just set.
798 */
f3f79e38 799 if (test_bit(IRQTF_RUNTHREAD, &action->thread_flags))
b5faba21
TG
800 goto out_unlock;
801
802 desc->threads_oneshot &= ~action->thread_mask;
803
32f4125e
TG
804 if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) &&
805 irqd_irq_masked(&desc->irq_data))
328a4978 806 unmask_threaded_irq(desc);
32f4125e 807
b5faba21 808out_unlock:
239007b8 809 raw_spin_unlock_irq(&desc->lock);
3876ec9e 810 chip_bus_sync_unlock(desc);
b25c340c
TG
811}
812
61f38261 813#ifdef CONFIG_SMP
591d2fb0 814/*
b04c644e 815 * Check whether we need to change the affinity of the interrupt thread.
591d2fb0
TG
816 */
817static void
818irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action)
819{
820 cpumask_var_t mask;
04aa530e 821 bool valid = true;
591d2fb0
TG
822
823 if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags))
824 return;
825
826 /*
827 * In case we are out of memory we set IRQTF_AFFINITY again and
828 * try again next time
829 */
830 if (!alloc_cpumask_var(&mask, GFP_KERNEL)) {
831 set_bit(IRQTF_AFFINITY, &action->thread_flags);
832 return;
833 }
834
239007b8 835 raw_spin_lock_irq(&desc->lock);
04aa530e
TG
836 /*
837 * This code is triggered unconditionally. Check the affinity
838 * mask pointer. For CPU_MASK_OFFSTACK=n this is optimized out.
839 */
d170fe7d 840 if (cpumask_available(desc->irq_common_data.affinity))
9df872fa 841 cpumask_copy(mask, desc->irq_common_data.affinity);
04aa530e
TG
842 else
843 valid = false;
239007b8 844 raw_spin_unlock_irq(&desc->lock);
591d2fb0 845
04aa530e
TG
846 if (valid)
847 set_cpus_allowed_ptr(current, mask);
591d2fb0
TG
848 free_cpumask_var(mask);
849}
61f38261
BP
850#else
851static inline void
852irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { }
853#endif
591d2fb0 854
8d32a307
TG
855/*
856 * Interrupts which are not explicitely requested as threaded
857 * interrupts rely on the implicit bh/preempt disable of the hard irq
858 * context. So we need to disable bh here to avoid deadlocks and other
859 * side effects.
860 */
3a43e05f 861static irqreturn_t
8d32a307
TG
862irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action)
863{
3a43e05f
SAS
864 irqreturn_t ret;
865
8d32a307 866 local_bh_disable();
3a43e05f 867 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 868 irq_finalize_oneshot(desc, action);
8d32a307 869 local_bh_enable();
3a43e05f 870 return ret;
8d32a307
TG
871}
872
873/*
f788e7bf 874 * Interrupts explicitly requested as threaded interrupts want to be
8d32a307
TG
875 * preemtible - many of them need to sleep and wait for slow busses to
876 * complete.
877 */
3a43e05f
SAS
878static irqreturn_t irq_thread_fn(struct irq_desc *desc,
879 struct irqaction *action)
8d32a307 880{
3a43e05f
SAS
881 irqreturn_t ret;
882
883 ret = action->thread_fn(action->irq, action->dev_id);
f3f79e38 884 irq_finalize_oneshot(desc, action);
3a43e05f 885 return ret;
8d32a307
TG
886}
887
7140ea19
IY
888static void wake_threads_waitq(struct irq_desc *desc)
889{
c685689f 890 if (atomic_dec_and_test(&desc->threads_active))
7140ea19
IY
891 wake_up(&desc->wait_for_threads);
892}
893
67d12145 894static void irq_thread_dtor(struct callback_head *unused)
4d1d61a6
ON
895{
896 struct task_struct *tsk = current;
897 struct irq_desc *desc;
898 struct irqaction *action;
899
900 if (WARN_ON_ONCE(!(current->flags & PF_EXITING)))
901 return;
902
903 action = kthread_data(tsk);
904
fb21affa 905 pr_err("exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n",
19af395d 906 tsk->comm, tsk->pid, action->irq);
4d1d61a6
ON
907
908
909 desc = irq_to_desc(action->irq);
910 /*
911 * If IRQTF_RUNTHREAD is set, we need to decrement
912 * desc->threads_active and wake possible waiters.
913 */
914 if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags))
915 wake_threads_waitq(desc);
916
917 /* Prevent a stale desc->threads_oneshot */
918 irq_finalize_oneshot(desc, action);
919}
920
2a1d3ab8
TG
921static void irq_wake_secondary(struct irq_desc *desc, struct irqaction *action)
922{
923 struct irqaction *secondary = action->secondary;
924
925 if (WARN_ON_ONCE(!secondary))
926 return;
927
928 raw_spin_lock_irq(&desc->lock);
929 __irq_wake_thread(desc, secondary);
930 raw_spin_unlock_irq(&desc->lock);
931}
932
3aa551c9
TG
933/*
934 * Interrupt handler thread
935 */
936static int irq_thread(void *data)
937{
67d12145 938 struct callback_head on_exit_work;
3aa551c9
TG
939 struct irqaction *action = data;
940 struct irq_desc *desc = irq_to_desc(action->irq);
3a43e05f
SAS
941 irqreturn_t (*handler_fn)(struct irq_desc *desc,
942 struct irqaction *action);
3aa551c9 943
540b60e2 944 if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD,
8d32a307
TG
945 &action->thread_flags))
946 handler_fn = irq_forced_thread_fn;
947 else
948 handler_fn = irq_thread_fn;
949
41f9d29f 950 init_task_work(&on_exit_work, irq_thread_dtor);
4d1d61a6 951 task_work_add(current, &on_exit_work, false);
3aa551c9 952
f3de44ed
SM
953 irq_thread_check_affinity(desc, action);
954
3aa551c9 955 while (!irq_wait_for_interrupt(action)) {
7140ea19 956 irqreturn_t action_ret;
3aa551c9 957
591d2fb0
TG
958 irq_thread_check_affinity(desc, action);
959
7140ea19 960 action_ret = handler_fn(desc, action);
1e77d0a1
TG
961 if (action_ret == IRQ_HANDLED)
962 atomic_inc(&desc->threads_handled);
2a1d3ab8
TG
963 if (action_ret == IRQ_WAKE_THREAD)
964 irq_wake_secondary(desc, action);
3aa551c9 965
7140ea19 966 wake_threads_waitq(desc);
3aa551c9
TG
967 }
968
7140ea19
IY
969 /*
970 * This is the regular exit path. __free_irq() is stopping the
971 * thread via kthread_stop() after calling
972 * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the
e04268b0
TG
973 * oneshot mask bit can be set. We cannot verify that as we
974 * cannot touch the oneshot mask at this point anymore as
975 * __setup_irq() might have given out currents thread_mask
976 * again.
3aa551c9 977 */
4d1d61a6 978 task_work_cancel(current, irq_thread_dtor);
3aa551c9
TG
979 return 0;
980}
981
a92444c6
TG
982/**
983 * irq_wake_thread - wake the irq thread for the action identified by dev_id
984 * @irq: Interrupt line
985 * @dev_id: Device identity for which the thread should be woken
986 *
987 */
988void irq_wake_thread(unsigned int irq, void *dev_id)
989{
990 struct irq_desc *desc = irq_to_desc(irq);
991 struct irqaction *action;
992 unsigned long flags;
993
994 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
995 return;
996
997 raw_spin_lock_irqsave(&desc->lock, flags);
f944b5a7 998 for_each_action_of_desc(desc, action) {
a92444c6
TG
999 if (action->dev_id == dev_id) {
1000 if (action->thread)
1001 __irq_wake_thread(desc, action);
1002 break;
1003 }
1004 }
1005 raw_spin_unlock_irqrestore(&desc->lock, flags);
1006}
1007EXPORT_SYMBOL_GPL(irq_wake_thread);
1008
2a1d3ab8 1009static int irq_setup_forced_threading(struct irqaction *new)
8d32a307
TG
1010{
1011 if (!force_irqthreads)
2a1d3ab8 1012 return 0;
8d32a307 1013 if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT))
2a1d3ab8 1014 return 0;
8d32a307
TG
1015
1016 new->flags |= IRQF_ONESHOT;
1017
2a1d3ab8
TG
1018 /*
1019 * Handle the case where we have a real primary handler and a
1020 * thread handler. We force thread them as well by creating a
1021 * secondary action.
1022 */
1023 if (new->handler != irq_default_primary_handler && new->thread_fn) {
1024 /* Allocate the secondary action */
1025 new->secondary = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1026 if (!new->secondary)
1027 return -ENOMEM;
1028 new->secondary->handler = irq_forced_secondary_handler;
1029 new->secondary->thread_fn = new->thread_fn;
1030 new->secondary->dev_id = new->dev_id;
1031 new->secondary->irq = new->irq;
1032 new->secondary->name = new->name;
8d32a307 1033 }
2a1d3ab8
TG
1034 /* Deal with the primary handler */
1035 set_bit(IRQTF_FORCED_THREAD, &new->thread_flags);
1036 new->thread_fn = new->handler;
1037 new->handler = irq_default_primary_handler;
1038 return 0;
8d32a307
TG
1039}
1040
c1bacbae
TG
1041static int irq_request_resources(struct irq_desc *desc)
1042{
1043 struct irq_data *d = &desc->irq_data;
1044 struct irq_chip *c = d->chip;
1045
1046 return c->irq_request_resources ? c->irq_request_resources(d) : 0;
1047}
1048
1049static void irq_release_resources(struct irq_desc *desc)
1050{
1051 struct irq_data *d = &desc->irq_data;
1052 struct irq_chip *c = d->chip;
1053
1054 if (c->irq_release_resources)
1055 c->irq_release_resources(d);
1056}
1057
2a1d3ab8
TG
1058static int
1059setup_irq_thread(struct irqaction *new, unsigned int irq, bool secondary)
1060{
1061 struct task_struct *t;
1062 struct sched_param param = {
1063 .sched_priority = MAX_USER_RT_PRIO/2,
1064 };
1065
1066 if (!secondary) {
1067 t = kthread_create(irq_thread, new, "irq/%d-%s", irq,
1068 new->name);
1069 } else {
1070 t = kthread_create(irq_thread, new, "irq/%d-s-%s", irq,
1071 new->name);
1072 param.sched_priority -= 1;
1073 }
1074
1075 if (IS_ERR(t))
1076 return PTR_ERR(t);
1077
1078 sched_setscheduler_nocheck(t, SCHED_FIFO, &param);
1079
1080 /*
1081 * We keep the reference to the task struct even if
1082 * the thread dies to avoid that the interrupt code
1083 * references an already freed task_struct.
1084 */
1085 get_task_struct(t);
1086 new->thread = t;
1087 /*
1088 * Tell the thread to set its affinity. This is
1089 * important for shared interrupt handlers as we do
1090 * not invoke setup_affinity() for the secondary
1091 * handlers as everything is already set up. Even for
1092 * interrupts marked with IRQF_NO_BALANCE this is
1093 * correct as we want the thread to move to the cpu(s)
1094 * on which the requesting code placed the interrupt.
1095 */
1096 set_bit(IRQTF_AFFINITY, &new->thread_flags);
1097 return 0;
1098}
1099
1da177e4
LT
1100/*
1101 * Internal function to register an irqaction - typically used to
1102 * allocate special interrupts that are part of the architecture.
19d39a38
TG
1103 *
1104 * Locking rules:
1105 *
1106 * desc->request_mutex Provides serialization against a concurrent free_irq()
1107 * chip_bus_lock Provides serialization for slow bus operations
1108 * desc->lock Provides serialization against hard interrupts
1109 *
1110 * chip_bus_lock and desc->lock are sufficient for all other management and
1111 * interrupt related functions. desc->request_mutex solely serializes
1112 * request/free_irq().
1da177e4 1113 */
d3c60047 1114static int
327ec569 1115__setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new)
1da177e4 1116{
f17c7545 1117 struct irqaction *old, **old_ptr;
b5faba21 1118 unsigned long flags, thread_mask = 0;
3b8249e7 1119 int ret, nested, shared = 0;
1da177e4 1120
7d94f7ca 1121 if (!desc)
c2b5a251
MW
1122 return -EINVAL;
1123
6b8ff312 1124 if (desc->irq_data.chip == &no_irq_chip)
1da177e4 1125 return -ENOSYS;
b6873807
SAS
1126 if (!try_module_get(desc->owner))
1127 return -ENODEV;
1da177e4 1128
2a1d3ab8
TG
1129 new->irq = irq;
1130
4b357dae
JH
1131 /*
1132 * If the trigger type is not specified by the caller,
1133 * then use the default for this interrupt.
1134 */
1135 if (!(new->flags & IRQF_TRIGGER_MASK))
1136 new->flags |= irqd_get_trigger_type(&desc->irq_data);
1137
3aa551c9 1138 /*
399b5da2
TG
1139 * Check whether the interrupt nests into another interrupt
1140 * thread.
1141 */
1ccb4e61 1142 nested = irq_settings_is_nested_thread(desc);
399b5da2 1143 if (nested) {
b6873807
SAS
1144 if (!new->thread_fn) {
1145 ret = -EINVAL;
1146 goto out_mput;
1147 }
399b5da2
TG
1148 /*
1149 * Replace the primary handler which was provided from
1150 * the driver for non nested interrupt handling by the
1151 * dummy function which warns when called.
1152 */
1153 new->handler = irq_nested_primary_handler;
8d32a307 1154 } else {
2a1d3ab8
TG
1155 if (irq_settings_can_thread(desc)) {
1156 ret = irq_setup_forced_threading(new);
1157 if (ret)
1158 goto out_mput;
1159 }
399b5da2
TG
1160 }
1161
3aa551c9 1162 /*
399b5da2
TG
1163 * Create a handler thread when a thread function is supplied
1164 * and the interrupt does not nest into another interrupt
1165 * thread.
3aa551c9 1166 */
399b5da2 1167 if (new->thread_fn && !nested) {
2a1d3ab8
TG
1168 ret = setup_irq_thread(new, irq, false);
1169 if (ret)
b6873807 1170 goto out_mput;
2a1d3ab8
TG
1171 if (new->secondary) {
1172 ret = setup_irq_thread(new->secondary, irq, true);
1173 if (ret)
1174 goto out_thread;
b6873807 1175 }
3aa551c9
TG
1176 }
1177
dc9b229a
TG
1178 /*
1179 * Drivers are often written to work w/o knowledge about the
1180 * underlying irq chip implementation, so a request for a
1181 * threaded irq without a primary hard irq context handler
1182 * requires the ONESHOT flag to be set. Some irq chips like
1183 * MSI based interrupts are per se one shot safe. Check the
1184 * chip flags, so we can avoid the unmask dance at the end of
1185 * the threaded handler for those.
1186 */
1187 if (desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)
1188 new->flags &= ~IRQF_ONESHOT;
1189
19d39a38
TG
1190 /*
1191 * Protects against a concurrent __free_irq() call which might wait
1192 * for synchronize_irq() to complete without holding the optional
1193 * chip bus lock and desc->lock.
1194 */
9114014c 1195 mutex_lock(&desc->request_mutex);
19d39a38
TG
1196
1197 /*
1198 * Acquire bus lock as the irq_request_resources() callback below
1199 * might rely on the serialization or the magic power management
1200 * functions which are abusing the irq_bus_lock() callback,
1201 */
1202 chip_bus_lock(desc);
1203
1204 /* First installed action requests resources. */
46e48e25
TG
1205 if (!desc->action) {
1206 ret = irq_request_resources(desc);
1207 if (ret) {
1208 pr_err("Failed to request resources for %s (irq %d) on irqchip %s\n",
1209 new->name, irq, desc->irq_data.chip->name);
19d39a38 1210 goto out_bus_unlock;
46e48e25
TG
1211 }
1212 }
9114014c 1213
1da177e4
LT
1214 /*
1215 * The following block of code has to be executed atomically
19d39a38
TG
1216 * protected against a concurrent interrupt and any of the other
1217 * management calls which are not serialized via
1218 * desc->request_mutex or the optional bus lock.
1da177e4 1219 */
239007b8 1220 raw_spin_lock_irqsave(&desc->lock, flags);
f17c7545
IM
1221 old_ptr = &desc->action;
1222 old = *old_ptr;
06fcb0c6 1223 if (old) {
e76de9f8
TG
1224 /*
1225 * Can't share interrupts unless both agree to and are
1226 * the same type (level, edge, polarity). So both flag
3cca53b0 1227 * fields must have IRQF_SHARED set and the bits which
9d591edd
TG
1228 * set the trigger type must match. Also all must
1229 * agree on ONESHOT.
e76de9f8 1230 */
382bd4de
HG
1231 unsigned int oldtype = irqd_get_trigger_type(&desc->irq_data);
1232
3cca53b0 1233 if (!((old->flags & new->flags) & IRQF_SHARED) ||
382bd4de 1234 (oldtype != (new->flags & IRQF_TRIGGER_MASK)) ||
f5d89470 1235 ((old->flags ^ new->flags) & IRQF_ONESHOT))
f5163427
DS
1236 goto mismatch;
1237
f5163427 1238 /* All handlers must agree on per-cpuness */
3cca53b0
TG
1239 if ((old->flags & IRQF_PERCPU) !=
1240 (new->flags & IRQF_PERCPU))
f5163427 1241 goto mismatch;
1da177e4
LT
1242
1243 /* add new interrupt at end of irq queue */
1244 do {
52abb700
TG
1245 /*
1246 * Or all existing action->thread_mask bits,
1247 * so we can find the next zero bit for this
1248 * new action.
1249 */
b5faba21 1250 thread_mask |= old->thread_mask;
f17c7545
IM
1251 old_ptr = &old->next;
1252 old = *old_ptr;
1da177e4
LT
1253 } while (old);
1254 shared = 1;
1255 }
1256
b5faba21 1257 /*
52abb700
TG
1258 * Setup the thread mask for this irqaction for ONESHOT. For
1259 * !ONESHOT irqs the thread mask is 0 so we can avoid a
1260 * conditional in irq_wake_thread().
b5faba21 1261 */
52abb700
TG
1262 if (new->flags & IRQF_ONESHOT) {
1263 /*
1264 * Unlikely to have 32 resp 64 irqs sharing one line,
1265 * but who knows.
1266 */
1267 if (thread_mask == ~0UL) {
1268 ret = -EBUSY;
cba4235e 1269 goto out_unlock;
52abb700
TG
1270 }
1271 /*
1272 * The thread_mask for the action is or'ed to
1273 * desc->thread_active to indicate that the
1274 * IRQF_ONESHOT thread handler has been woken, but not
1275 * yet finished. The bit is cleared when a thread
1276 * completes. When all threads of a shared interrupt
1277 * line have completed desc->threads_active becomes
1278 * zero and the interrupt line is unmasked. See
1279 * handle.c:irq_wake_thread() for further information.
1280 *
1281 * If no thread is woken by primary (hard irq context)
1282 * interrupt handlers, then desc->threads_active is
1283 * also checked for zero to unmask the irq line in the
1284 * affected hard irq flow handlers
1285 * (handle_[fasteoi|level]_irq).
1286 *
1287 * The new action gets the first zero bit of
1288 * thread_mask assigned. See the loop above which or's
1289 * all existing action->thread_mask bits.
1290 */
1291 new->thread_mask = 1 << ffz(thread_mask);
1c6c6952 1292
dc9b229a
TG
1293 } else if (new->handler == irq_default_primary_handler &&
1294 !(desc->irq_data.chip->flags & IRQCHIP_ONESHOT_SAFE)) {
1c6c6952
TG
1295 /*
1296 * The interrupt was requested with handler = NULL, so
1297 * we use the default primary handler for it. But it
1298 * does not have the oneshot flag set. In combination
1299 * with level interrupts this is deadly, because the
1300 * default primary handler just wakes the thread, then
1301 * the irq lines is reenabled, but the device still
1302 * has the level irq asserted. Rinse and repeat....
1303 *
1304 * While this works for edge type interrupts, we play
1305 * it safe and reject unconditionally because we can't
1306 * say for sure which type this interrupt really
1307 * has. The type flags are unreliable as the
1308 * underlying chip implementation can override them.
1309 */
97fd75b7 1310 pr_err("Threaded irq requested with handler=NULL and !ONESHOT for irq %d\n",
1c6c6952
TG
1311 irq);
1312 ret = -EINVAL;
cba4235e 1313 goto out_unlock;
b5faba21 1314 }
b5faba21 1315
1da177e4 1316 if (!shared) {
3aa551c9
TG
1317 init_waitqueue_head(&desc->wait_for_threads);
1318
e76de9f8 1319 /* Setup the type (level, edge polarity) if configured: */
3cca53b0 1320 if (new->flags & IRQF_TRIGGER_MASK) {
a1ff541a
JL
1321 ret = __irq_set_trigger(desc,
1322 new->flags & IRQF_TRIGGER_MASK);
82736f4d 1323
19d39a38 1324 if (ret)
cba4235e 1325 goto out_unlock;
091738a2 1326 }
6a6de9ef 1327
c942cee4
TG
1328 /*
1329 * Activate the interrupt. That activation must happen
1330 * independently of IRQ_NOAUTOEN. request_irq() can fail
1331 * and the callers are supposed to handle
1332 * that. enable_irq() of an interrupt requested with
1333 * IRQ_NOAUTOEN is not supposed to fail. The activation
1334 * keeps it in shutdown mode, it merily associates
1335 * resources if necessary and if that's not possible it
1336 * fails. Interrupts which are in managed shutdown mode
1337 * will simply ignore that activation request.
1338 */
1339 ret = irq_activate(desc);
1340 if (ret)
1341 goto out_unlock;
1342
009b4c3b 1343 desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \
32f4125e
TG
1344 IRQS_ONESHOT | IRQS_WAITING);
1345 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
94d39e1f 1346
a005677b
TG
1347 if (new->flags & IRQF_PERCPU) {
1348 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1349 irq_settings_set_per_cpu(desc);
1350 }
6a58fb3b 1351
b25c340c 1352 if (new->flags & IRQF_ONESHOT)
3d67baec 1353 desc->istate |= IRQS_ONESHOT;
b25c340c 1354
2e051552
TG
1355 /* Exclude IRQ from balancing if requested */
1356 if (new->flags & IRQF_NOBALANCING) {
1357 irq_settings_set_no_balancing(desc);
1358 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1359 }
1360
04c848d3 1361 if (irq_settings_can_autoenable(desc)) {
4cde9c6b 1362 irq_startup(desc, IRQ_RESEND, IRQ_START_COND);
04c848d3
TG
1363 } else {
1364 /*
1365 * Shared interrupts do not go well with disabling
1366 * auto enable. The sharing interrupt might request
1367 * it while it's still disabled and then wait for
1368 * interrupts forever.
1369 */
1370 WARN_ON_ONCE(new->flags & IRQF_SHARED);
e76de9f8
TG
1371 /* Undo nested disables: */
1372 desc->depth = 1;
04c848d3 1373 }
18404756 1374
876dbd4c
TG
1375 } else if (new->flags & IRQF_TRIGGER_MASK) {
1376 unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK;
7ee7e87d 1377 unsigned int omsk = irqd_get_trigger_type(&desc->irq_data);
876dbd4c
TG
1378
1379 if (nmsk != omsk)
1380 /* hope the handler works with current trigger mode */
a395d6a7 1381 pr_warn("irq %d uses trigger mode %u; requested %u\n",
7ee7e87d 1382 irq, omsk, nmsk);
1da177e4 1383 }
82736f4d 1384
f17c7545 1385 *old_ptr = new;
82736f4d 1386
cab303be
TG
1387 irq_pm_install_action(desc, new);
1388
8528b0f1
LT
1389 /* Reset broken irq detection when installing new handler */
1390 desc->irq_count = 0;
1391 desc->irqs_unhandled = 0;
1adb0850
TG
1392
1393 /*
1394 * Check whether we disabled the irq via the spurious handler
1395 * before. Reenable it and give it another chance.
1396 */
7acdd53e
TG
1397 if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) {
1398 desc->istate &= ~IRQS_SPURIOUS_DISABLED;
79ff1cda 1399 __enable_irq(desc);
1adb0850
TG
1400 }
1401
239007b8 1402 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a90795e 1403 chip_bus_sync_unlock(desc);
9114014c 1404 mutex_unlock(&desc->request_mutex);
1da177e4 1405
b2d3d61a
DL
1406 irq_setup_timings(desc, new);
1407
69ab8494
TG
1408 /*
1409 * Strictly no need to wake it up, but hung_task complains
1410 * when no hard interrupt wakes the thread up.
1411 */
1412 if (new->thread)
1413 wake_up_process(new->thread);
2a1d3ab8
TG
1414 if (new->secondary)
1415 wake_up_process(new->secondary->thread);
69ab8494 1416
2c6927a3 1417 register_irq_proc(irq, desc);
1da177e4
LT
1418 new->dir = NULL;
1419 register_handler_proc(irq, new);
1da177e4 1420 return 0;
f5163427
DS
1421
1422mismatch:
3cca53b0 1423 if (!(new->flags & IRQF_PROBE_SHARED)) {
97fd75b7 1424 pr_err("Flags mismatch irq %d. %08x (%s) vs. %08x (%s)\n",
f5d89470
TG
1425 irq, new->flags, new->name, old->flags, old->name);
1426#ifdef CONFIG_DEBUG_SHIRQ
13e87ec6 1427 dump_stack();
3f050447 1428#endif
f5d89470 1429 }
3aa551c9
TG
1430 ret = -EBUSY;
1431
cba4235e 1432out_unlock:
1c389795 1433 raw_spin_unlock_irqrestore(&desc->lock, flags);
3b8249e7 1434
46e48e25
TG
1435 if (!desc->action)
1436 irq_release_resources(desc);
19d39a38
TG
1437out_bus_unlock:
1438 chip_bus_sync_unlock(desc);
9114014c
TG
1439 mutex_unlock(&desc->request_mutex);
1440
3aa551c9 1441out_thread:
3aa551c9
TG
1442 if (new->thread) {
1443 struct task_struct *t = new->thread;
1444
1445 new->thread = NULL;
05d74efa 1446 kthread_stop(t);
3aa551c9
TG
1447 put_task_struct(t);
1448 }
2a1d3ab8
TG
1449 if (new->secondary && new->secondary->thread) {
1450 struct task_struct *t = new->secondary->thread;
1451
1452 new->secondary->thread = NULL;
1453 kthread_stop(t);
1454 put_task_struct(t);
1455 }
b6873807
SAS
1456out_mput:
1457 module_put(desc->owner);
3aa551c9 1458 return ret;
1da177e4
LT
1459}
1460
d3c60047
TG
1461/**
1462 * setup_irq - setup an interrupt
1463 * @irq: Interrupt line to setup
1464 * @act: irqaction for the interrupt
1465 *
1466 * Used to statically setup interrupts in the early boot process.
1467 */
1468int setup_irq(unsigned int irq, struct irqaction *act)
1469{
986c011d 1470 int retval;
d3c60047
TG
1471 struct irq_desc *desc = irq_to_desc(irq);
1472
9b5d585d 1473 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
31d9d9b6 1474 return -EINVAL;
be45beb2
JH
1475
1476 retval = irq_chip_pm_get(&desc->irq_data);
1477 if (retval < 0)
1478 return retval;
1479
986c011d 1480 retval = __setup_irq(irq, desc, act);
986c011d 1481
be45beb2
JH
1482 if (retval)
1483 irq_chip_pm_put(&desc->irq_data);
1484
986c011d 1485 return retval;
d3c60047 1486}
eb53b4e8 1487EXPORT_SYMBOL_GPL(setup_irq);
d3c60047 1488
31d9d9b6 1489/*
cbf94f06
MD
1490 * Internal function to unregister an irqaction - used to free
1491 * regular and special interrupts that are part of the architecture.
1da177e4 1492 */
cbf94f06 1493static struct irqaction *__free_irq(unsigned int irq, void *dev_id)
1da177e4 1494{
d3c60047 1495 struct irq_desc *desc = irq_to_desc(irq);
f17c7545 1496 struct irqaction *action, **action_ptr;
1da177e4
LT
1497 unsigned long flags;
1498
ae88a23b 1499 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
7d94f7ca 1500
7d94f7ca 1501 if (!desc)
f21cfb25 1502 return NULL;
1da177e4 1503
9114014c 1504 mutex_lock(&desc->request_mutex);
abc7e40c 1505 chip_bus_lock(desc);
239007b8 1506 raw_spin_lock_irqsave(&desc->lock, flags);
ae88a23b
IM
1507
1508 /*
1509 * There can be multiple actions per IRQ descriptor, find the right
1510 * one based on the dev_id:
1511 */
f17c7545 1512 action_ptr = &desc->action;
1da177e4 1513 for (;;) {
f17c7545 1514 action = *action_ptr;
1da177e4 1515
ae88a23b
IM
1516 if (!action) {
1517 WARN(1, "Trying to free already-free IRQ %d\n", irq);
239007b8 1518 raw_spin_unlock_irqrestore(&desc->lock, flags);
abc7e40c 1519 chip_bus_sync_unlock(desc);
19d39a38 1520 mutex_unlock(&desc->request_mutex);
f21cfb25 1521 return NULL;
ae88a23b 1522 }
1da177e4 1523
8316e381
IM
1524 if (action->dev_id == dev_id)
1525 break;
f17c7545 1526 action_ptr = &action->next;
ae88a23b 1527 }
dbce706e 1528
ae88a23b 1529 /* Found it - now remove it from the list of entries: */
f17c7545 1530 *action_ptr = action->next;
ae88a23b 1531
cab303be
TG
1532 irq_pm_remove_action(desc, action);
1533
ae88a23b 1534 /* If this was the last handler, shut down the IRQ line: */
c1bacbae 1535 if (!desc->action) {
e9849777 1536 irq_settings_clr_disable_unlazy(desc);
46999238 1537 irq_shutdown(desc);
c1bacbae 1538 }
3aa551c9 1539
e7a297b0
PWJ
1540#ifdef CONFIG_SMP
1541 /* make sure affinity_hint is cleaned up */
1542 if (WARN_ON_ONCE(desc->affinity_hint))
1543 desc->affinity_hint = NULL;
1544#endif
1545
239007b8 1546 raw_spin_unlock_irqrestore(&desc->lock, flags);
19d39a38
TG
1547 /*
1548 * Drop bus_lock here so the changes which were done in the chip
1549 * callbacks above are synced out to the irq chips which hang
1550 * behind a slow bus (I2C, SPI) before calling synchronize_irq().
1551 *
1552 * Aside of that the bus_lock can also be taken from the threaded
1553 * handler in irq_finalize_oneshot() which results in a deadlock
1554 * because synchronize_irq() would wait forever for the thread to
1555 * complete, which is blocked on the bus lock.
1556 *
1557 * The still held desc->request_mutex() protects against a
1558 * concurrent request_irq() of this irq so the release of resources
1559 * and timing data is properly serialized.
1560 */
abc7e40c 1561 chip_bus_sync_unlock(desc);
ae88a23b
IM
1562
1563 unregister_handler_proc(irq, action);
1564
1565 /* Make sure it's not being used on another CPU: */
1566 synchronize_irq(irq);
1da177e4 1567
70edcd77 1568#ifdef CONFIG_DEBUG_SHIRQ
ae88a23b
IM
1569 /*
1570 * It's a shared IRQ -- the driver ought to be prepared for an IRQ
1571 * event to happen even now it's being freed, so let's make sure that
1572 * is so by doing an extra call to the handler ....
1573 *
1574 * ( We do this after actually deregistering it, to make sure that a
1575 * 'real' IRQ doesn't run in * parallel with our fake. )
1576 */
1577 if (action->flags & IRQF_SHARED) {
1578 local_irq_save(flags);
1579 action->handler(irq, dev_id);
1580 local_irq_restore(flags);
1da177e4 1581 }
ae88a23b 1582#endif
2d860ad7
LT
1583
1584 if (action->thread) {
05d74efa 1585 kthread_stop(action->thread);
2d860ad7 1586 put_task_struct(action->thread);
2a1d3ab8
TG
1587 if (action->secondary && action->secondary->thread) {
1588 kthread_stop(action->secondary->thread);
1589 put_task_struct(action->secondary->thread);
1590 }
2d860ad7
LT
1591 }
1592
19d39a38 1593 /* Last action releases resources */
2343877f 1594 if (!desc->action) {
19d39a38
TG
1595 /*
1596 * Reaquire bus lock as irq_release_resources() might
1597 * require it to deallocate resources over the slow bus.
1598 */
1599 chip_bus_lock(desc);
46e48e25 1600 irq_release_resources(desc);
19d39a38 1601 chip_bus_sync_unlock(desc);
2343877f
TG
1602 irq_remove_timings(desc);
1603 }
46e48e25 1604
9114014c
TG
1605 mutex_unlock(&desc->request_mutex);
1606
be45beb2 1607 irq_chip_pm_put(&desc->irq_data);
b6873807 1608 module_put(desc->owner);
2a1d3ab8 1609 kfree(action->secondary);
f21cfb25
MD
1610 return action;
1611}
1612
cbf94f06
MD
1613/**
1614 * remove_irq - free an interrupt
1615 * @irq: Interrupt line to free
1616 * @act: irqaction for the interrupt
1617 *
1618 * Used to remove interrupts statically setup by the early boot process.
1619 */
1620void remove_irq(unsigned int irq, struct irqaction *act)
1621{
31d9d9b6
MZ
1622 struct irq_desc *desc = irq_to_desc(irq);
1623
1624 if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc)))
a7e60e55 1625 __free_irq(irq, act->dev_id);
cbf94f06 1626}
eb53b4e8 1627EXPORT_SYMBOL_GPL(remove_irq);
cbf94f06 1628
f21cfb25
MD
1629/**
1630 * free_irq - free an interrupt allocated with request_irq
1631 * @irq: Interrupt line to free
1632 * @dev_id: Device identity to free
1633 *
1634 * Remove an interrupt handler. The handler is removed and if the
1635 * interrupt line is no longer in use by any driver it is disabled.
1636 * On a shared IRQ the caller must ensure the interrupt is disabled
1637 * on the card it drives before calling this function. The function
1638 * does not return until any executing interrupts for this IRQ
1639 * have completed.
1640 *
1641 * This function must not be called from interrupt context.
25ce4be7
CH
1642 *
1643 * Returns the devname argument passed to request_irq.
f21cfb25 1644 */
25ce4be7 1645const void *free_irq(unsigned int irq, void *dev_id)
f21cfb25 1646{
70aedd24 1647 struct irq_desc *desc = irq_to_desc(irq);
25ce4be7
CH
1648 struct irqaction *action;
1649 const char *devname;
70aedd24 1650
31d9d9b6 1651 if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc)))
25ce4be7 1652 return NULL;
70aedd24 1653
cd7eab44
BH
1654#ifdef CONFIG_SMP
1655 if (WARN_ON(desc->affinity_notify))
1656 desc->affinity_notify = NULL;
1657#endif
1658
25ce4be7 1659 action = __free_irq(irq, dev_id);
2827a418
AM
1660
1661 if (!action)
1662 return NULL;
1663
25ce4be7
CH
1664 devname = action->name;
1665 kfree(action);
1666 return devname;
1da177e4 1667}
1da177e4
LT
1668EXPORT_SYMBOL(free_irq);
1669
1670/**
3aa551c9 1671 * request_threaded_irq - allocate an interrupt line
1da177e4 1672 * @irq: Interrupt line to allocate
3aa551c9
TG
1673 * @handler: Function to be called when the IRQ occurs.
1674 * Primary handler for threaded interrupts
b25c340c
TG
1675 * If NULL and thread_fn != NULL the default
1676 * primary handler is installed
f48fe81e
TG
1677 * @thread_fn: Function called from the irq handler thread
1678 * If NULL, no irq thread is created
1da177e4
LT
1679 * @irqflags: Interrupt type flags
1680 * @devname: An ascii name for the claiming device
1681 * @dev_id: A cookie passed back to the handler function
1682 *
1683 * This call allocates interrupt resources and enables the
1684 * interrupt line and IRQ handling. From the point this
1685 * call is made your handler function may be invoked. Since
1686 * your handler function must clear any interrupt the board
1687 * raises, you must take care both to initialise your hardware
1688 * and to set up the interrupt handler in the right order.
1689 *
3aa551c9 1690 * If you want to set up a threaded irq handler for your device
6d21af4f 1691 * then you need to supply @handler and @thread_fn. @handler is
3aa551c9
TG
1692 * still called in hard interrupt context and has to check
1693 * whether the interrupt originates from the device. If yes it
1694 * needs to disable the interrupt on the device and return
39a2eddb 1695 * IRQ_WAKE_THREAD which will wake up the handler thread and run
3aa551c9
TG
1696 * @thread_fn. This split handler design is necessary to support
1697 * shared interrupts.
1698 *
1da177e4
LT
1699 * Dev_id must be globally unique. Normally the address of the
1700 * device data structure is used as the cookie. Since the handler
1701 * receives this value it makes sense to use it.
1702 *
1703 * If your interrupt is shared you must pass a non NULL dev_id
1704 * as this is required when freeing the interrupt.
1705 *
1706 * Flags:
1707 *
3cca53b0 1708 * IRQF_SHARED Interrupt is shared
0c5d1eb7 1709 * IRQF_TRIGGER_* Specify active edge(s) or level
1da177e4
LT
1710 *
1711 */
3aa551c9
TG
1712int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1713 irq_handler_t thread_fn, unsigned long irqflags,
1714 const char *devname, void *dev_id)
1da177e4 1715{
06fcb0c6 1716 struct irqaction *action;
08678b08 1717 struct irq_desc *desc;
d3c60047 1718 int retval;
1da177e4 1719
e237a551
CF
1720 if (irq == IRQ_NOTCONNECTED)
1721 return -ENOTCONN;
1722
1da177e4
LT
1723 /*
1724 * Sanity-check: shared interrupts must pass in a real dev-ID,
1725 * otherwise we'll have trouble later trying to figure out
1726 * which interrupt is which (messes up the interrupt freeing
1727 * logic etc).
17f48034
RW
1728 *
1729 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1730 * it cannot be set along with IRQF_NO_SUSPEND.
1da177e4 1731 */
17f48034
RW
1732 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1733 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1734 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1da177e4 1735 return -EINVAL;
7d94f7ca 1736
cb5bc832 1737 desc = irq_to_desc(irq);
7d94f7ca 1738 if (!desc)
1da177e4 1739 return -EINVAL;
7d94f7ca 1740
31d9d9b6
MZ
1741 if (!irq_settings_can_request(desc) ||
1742 WARN_ON(irq_settings_is_per_cpu_devid(desc)))
6550c775 1743 return -EINVAL;
b25c340c
TG
1744
1745 if (!handler) {
1746 if (!thread_fn)
1747 return -EINVAL;
1748 handler = irq_default_primary_handler;
1749 }
1da177e4 1750
45535732 1751 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
1da177e4
LT
1752 if (!action)
1753 return -ENOMEM;
1754
1755 action->handler = handler;
3aa551c9 1756 action->thread_fn = thread_fn;
1da177e4 1757 action->flags = irqflags;
1da177e4 1758 action->name = devname;
1da177e4
LT
1759 action->dev_id = dev_id;
1760
be45beb2 1761 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
1762 if (retval < 0) {
1763 kfree(action);
be45beb2 1764 return retval;
4396f46c 1765 }
be45beb2 1766
d3c60047 1767 retval = __setup_irq(irq, desc, action);
70aedd24 1768
2a1d3ab8 1769 if (retval) {
be45beb2 1770 irq_chip_pm_put(&desc->irq_data);
2a1d3ab8 1771 kfree(action->secondary);
377bf1e4 1772 kfree(action);
2a1d3ab8 1773 }
377bf1e4 1774
6d83f94d 1775#ifdef CONFIG_DEBUG_SHIRQ_FIXME
6ce51c43 1776 if (!retval && (irqflags & IRQF_SHARED)) {
a304e1b8
DW
1777 /*
1778 * It's a shared IRQ -- the driver ought to be prepared for it
1779 * to happen immediately, so let's make sure....
377bf1e4
AV
1780 * We disable the irq to make sure that a 'real' IRQ doesn't
1781 * run in parallel with our fake.
a304e1b8 1782 */
59845b1f 1783 unsigned long flags;
a304e1b8 1784
377bf1e4 1785 disable_irq(irq);
59845b1f 1786 local_irq_save(flags);
377bf1e4 1787
59845b1f 1788 handler(irq, dev_id);
377bf1e4 1789
59845b1f 1790 local_irq_restore(flags);
377bf1e4 1791 enable_irq(irq);
a304e1b8
DW
1792 }
1793#endif
1da177e4
LT
1794 return retval;
1795}
3aa551c9 1796EXPORT_SYMBOL(request_threaded_irq);
ae731f8d
MZ
1797
1798/**
1799 * request_any_context_irq - allocate an interrupt line
1800 * @irq: Interrupt line to allocate
1801 * @handler: Function to be called when the IRQ occurs.
1802 * Threaded handler for threaded interrupts.
1803 * @flags: Interrupt type flags
1804 * @name: An ascii name for the claiming device
1805 * @dev_id: A cookie passed back to the handler function
1806 *
1807 * This call allocates interrupt resources and enables the
1808 * interrupt line and IRQ handling. It selects either a
1809 * hardirq or threaded handling method depending on the
1810 * context.
1811 *
1812 * On failure, it returns a negative value. On success,
1813 * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED.
1814 */
1815int request_any_context_irq(unsigned int irq, irq_handler_t handler,
1816 unsigned long flags, const char *name, void *dev_id)
1817{
e237a551 1818 struct irq_desc *desc;
ae731f8d
MZ
1819 int ret;
1820
e237a551
CF
1821 if (irq == IRQ_NOTCONNECTED)
1822 return -ENOTCONN;
1823
1824 desc = irq_to_desc(irq);
ae731f8d
MZ
1825 if (!desc)
1826 return -EINVAL;
1827
1ccb4e61 1828 if (irq_settings_is_nested_thread(desc)) {
ae731f8d
MZ
1829 ret = request_threaded_irq(irq, NULL, handler,
1830 flags, name, dev_id);
1831 return !ret ? IRQC_IS_NESTED : ret;
1832 }
1833
1834 ret = request_irq(irq, handler, flags, name, dev_id);
1835 return !ret ? IRQC_IS_HARDIRQ : ret;
1836}
1837EXPORT_SYMBOL_GPL(request_any_context_irq);
31d9d9b6 1838
1e7c5fd2 1839void enable_percpu_irq(unsigned int irq, unsigned int type)
31d9d9b6
MZ
1840{
1841 unsigned int cpu = smp_processor_id();
1842 unsigned long flags;
1843 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1844
1845 if (!desc)
1846 return;
1847
f35ad083
MZ
1848 /*
1849 * If the trigger type is not specified by the caller, then
1850 * use the default for this interrupt.
1851 */
1e7c5fd2 1852 type &= IRQ_TYPE_SENSE_MASK;
f35ad083
MZ
1853 if (type == IRQ_TYPE_NONE)
1854 type = irqd_get_trigger_type(&desc->irq_data);
1855
1e7c5fd2
MZ
1856 if (type != IRQ_TYPE_NONE) {
1857 int ret;
1858
a1ff541a 1859 ret = __irq_set_trigger(desc, type);
1e7c5fd2
MZ
1860
1861 if (ret) {
32cffdde 1862 WARN(1, "failed to set type for IRQ%d\n", irq);
1e7c5fd2
MZ
1863 goto out;
1864 }
1865 }
1866
31d9d9b6 1867 irq_percpu_enable(desc, cpu);
1e7c5fd2 1868out:
31d9d9b6
MZ
1869 irq_put_desc_unlock(desc, flags);
1870}
36a5df85 1871EXPORT_SYMBOL_GPL(enable_percpu_irq);
31d9d9b6 1872
f0cb3220
TP
1873/**
1874 * irq_percpu_is_enabled - Check whether the per cpu irq is enabled
1875 * @irq: Linux irq number to check for
1876 *
1877 * Must be called from a non migratable context. Returns the enable
1878 * state of a per cpu interrupt on the current cpu.
1879 */
1880bool irq_percpu_is_enabled(unsigned int irq)
1881{
1882 unsigned int cpu = smp_processor_id();
1883 struct irq_desc *desc;
1884 unsigned long flags;
1885 bool is_enabled;
1886
1887 desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1888 if (!desc)
1889 return false;
1890
1891 is_enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
1892 irq_put_desc_unlock(desc, flags);
1893
1894 return is_enabled;
1895}
1896EXPORT_SYMBOL_GPL(irq_percpu_is_enabled);
1897
31d9d9b6
MZ
1898void disable_percpu_irq(unsigned int irq)
1899{
1900 unsigned int cpu = smp_processor_id();
1901 unsigned long flags;
1902 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU);
1903
1904 if (!desc)
1905 return;
1906
1907 irq_percpu_disable(desc, cpu);
1908 irq_put_desc_unlock(desc, flags);
1909}
36a5df85 1910EXPORT_SYMBOL_GPL(disable_percpu_irq);
31d9d9b6
MZ
1911
1912/*
1913 * Internal function to unregister a percpu irqaction.
1914 */
1915static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1916{
1917 struct irq_desc *desc = irq_to_desc(irq);
1918 struct irqaction *action;
1919 unsigned long flags;
1920
1921 WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq);
1922
1923 if (!desc)
1924 return NULL;
1925
1926 raw_spin_lock_irqsave(&desc->lock, flags);
1927
1928 action = desc->action;
1929 if (!action || action->percpu_dev_id != dev_id) {
1930 WARN(1, "Trying to free already-free IRQ %d\n", irq);
1931 goto bad;
1932 }
1933
1934 if (!cpumask_empty(desc->percpu_enabled)) {
1935 WARN(1, "percpu IRQ %d still enabled on CPU%d!\n",
1936 irq, cpumask_first(desc->percpu_enabled));
1937 goto bad;
1938 }
1939
1940 /* Found it - now remove it from the list of entries: */
1941 desc->action = NULL;
1942
1943 raw_spin_unlock_irqrestore(&desc->lock, flags);
1944
1945 unregister_handler_proc(irq, action);
1946
be45beb2 1947 irq_chip_pm_put(&desc->irq_data);
31d9d9b6
MZ
1948 module_put(desc->owner);
1949 return action;
1950
1951bad:
1952 raw_spin_unlock_irqrestore(&desc->lock, flags);
1953 return NULL;
1954}
1955
1956/**
1957 * remove_percpu_irq - free a per-cpu interrupt
1958 * @irq: Interrupt line to free
1959 * @act: irqaction for the interrupt
1960 *
1961 * Used to remove interrupts statically setup by the early boot process.
1962 */
1963void remove_percpu_irq(unsigned int irq, struct irqaction *act)
1964{
1965 struct irq_desc *desc = irq_to_desc(irq);
1966
1967 if (desc && irq_settings_is_per_cpu_devid(desc))
1968 __free_percpu_irq(irq, act->percpu_dev_id);
1969}
1970
1971/**
1972 * free_percpu_irq - free an interrupt allocated with request_percpu_irq
1973 * @irq: Interrupt line to free
1974 * @dev_id: Device identity to free
1975 *
1976 * Remove a percpu interrupt handler. The handler is removed, but
1977 * the interrupt line is not disabled. This must be done on each
1978 * CPU before calling this function. The function does not return
1979 * until any executing interrupts for this IRQ have completed.
1980 *
1981 * This function must not be called from interrupt context.
1982 */
1983void free_percpu_irq(unsigned int irq, void __percpu *dev_id)
1984{
1985 struct irq_desc *desc = irq_to_desc(irq);
1986
1987 if (!desc || !irq_settings_is_per_cpu_devid(desc))
1988 return;
1989
1990 chip_bus_lock(desc);
1991 kfree(__free_percpu_irq(irq, dev_id));
1992 chip_bus_sync_unlock(desc);
1993}
aec2e2ad 1994EXPORT_SYMBOL_GPL(free_percpu_irq);
31d9d9b6
MZ
1995
1996/**
1997 * setup_percpu_irq - setup a per-cpu interrupt
1998 * @irq: Interrupt line to setup
1999 * @act: irqaction for the interrupt
2000 *
2001 * Used to statically setup per-cpu interrupts in the early boot process.
2002 */
2003int setup_percpu_irq(unsigned int irq, struct irqaction *act)
2004{
2005 struct irq_desc *desc = irq_to_desc(irq);
2006 int retval;
2007
2008 if (!desc || !irq_settings_is_per_cpu_devid(desc))
2009 return -EINVAL;
be45beb2
JH
2010
2011 retval = irq_chip_pm_get(&desc->irq_data);
2012 if (retval < 0)
2013 return retval;
2014
31d9d9b6 2015 retval = __setup_irq(irq, desc, act);
31d9d9b6 2016
be45beb2
JH
2017 if (retval)
2018 irq_chip_pm_put(&desc->irq_data);
2019
31d9d9b6
MZ
2020 return retval;
2021}
2022
2023/**
c80081b9 2024 * __request_percpu_irq - allocate a percpu interrupt line
31d9d9b6
MZ
2025 * @irq: Interrupt line to allocate
2026 * @handler: Function to be called when the IRQ occurs.
c80081b9 2027 * @flags: Interrupt type flags (IRQF_TIMER only)
31d9d9b6
MZ
2028 * @devname: An ascii name for the claiming device
2029 * @dev_id: A percpu cookie passed back to the handler function
2030 *
a1b7febd
MR
2031 * This call allocates interrupt resources and enables the
2032 * interrupt on the local CPU. If the interrupt is supposed to be
2033 * enabled on other CPUs, it has to be done on each CPU using
2034 * enable_percpu_irq().
31d9d9b6
MZ
2035 *
2036 * Dev_id must be globally unique. It is a per-cpu variable, and
2037 * the handler gets called with the interrupted CPU's instance of
2038 * that variable.
2039 */
c80081b9
DL
2040int __request_percpu_irq(unsigned int irq, irq_handler_t handler,
2041 unsigned long flags, const char *devname,
2042 void __percpu *dev_id)
31d9d9b6
MZ
2043{
2044 struct irqaction *action;
2045 struct irq_desc *desc;
2046 int retval;
2047
2048 if (!dev_id)
2049 return -EINVAL;
2050
2051 desc = irq_to_desc(irq);
2052 if (!desc || !irq_settings_can_request(desc) ||
2053 !irq_settings_is_per_cpu_devid(desc))
2054 return -EINVAL;
2055
c80081b9
DL
2056 if (flags && flags != IRQF_TIMER)
2057 return -EINVAL;
2058
31d9d9b6
MZ
2059 action = kzalloc(sizeof(struct irqaction), GFP_KERNEL);
2060 if (!action)
2061 return -ENOMEM;
2062
2063 action->handler = handler;
c80081b9 2064 action->flags = flags | IRQF_PERCPU | IRQF_NO_SUSPEND;
31d9d9b6
MZ
2065 action->name = devname;
2066 action->percpu_dev_id = dev_id;
2067
be45beb2 2068 retval = irq_chip_pm_get(&desc->irq_data);
4396f46c
SL
2069 if (retval < 0) {
2070 kfree(action);
be45beb2 2071 return retval;
4396f46c 2072 }
be45beb2 2073
31d9d9b6 2074 retval = __setup_irq(irq, desc, action);
31d9d9b6 2075
be45beb2
JH
2076 if (retval) {
2077 irq_chip_pm_put(&desc->irq_data);
31d9d9b6 2078 kfree(action);
be45beb2 2079 }
31d9d9b6
MZ
2080
2081 return retval;
2082}
c80081b9 2083EXPORT_SYMBOL_GPL(__request_percpu_irq);
1b7047ed
MZ
2084
2085/**
2086 * irq_get_irqchip_state - returns the irqchip state of a interrupt.
2087 * @irq: Interrupt line that is forwarded to a VM
2088 * @which: One of IRQCHIP_STATE_* the caller wants to know about
2089 * @state: a pointer to a boolean where the state is to be storeed
2090 *
2091 * This call snapshots the internal irqchip state of an
2092 * interrupt, returning into @state the bit corresponding to
2093 * stage @which
2094 *
2095 * This function should be called with preemption disabled if the
2096 * interrupt controller has per-cpu registers.
2097 */
2098int irq_get_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2099 bool *state)
2100{
2101 struct irq_desc *desc;
2102 struct irq_data *data;
2103 struct irq_chip *chip;
2104 unsigned long flags;
2105 int err = -EINVAL;
2106
2107 desc = irq_get_desc_buslock(irq, &flags, 0);
2108 if (!desc)
2109 return err;
2110
2111 data = irq_desc_get_irq_data(desc);
2112
2113 do {
2114 chip = irq_data_get_irq_chip(data);
2115 if (chip->irq_get_irqchip_state)
2116 break;
2117#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2118 data = data->parent_data;
2119#else
2120 data = NULL;
2121#endif
2122 } while (data);
2123
2124 if (data)
2125 err = chip->irq_get_irqchip_state(data, which, state);
2126
2127 irq_put_desc_busunlock(desc, flags);
2128 return err;
2129}
1ee4fb3e 2130EXPORT_SYMBOL_GPL(irq_get_irqchip_state);
1b7047ed
MZ
2131
2132/**
2133 * irq_set_irqchip_state - set the state of a forwarded interrupt.
2134 * @irq: Interrupt line that is forwarded to a VM
2135 * @which: State to be restored (one of IRQCHIP_STATE_*)
2136 * @val: Value corresponding to @which
2137 *
2138 * This call sets the internal irqchip state of an interrupt,
2139 * depending on the value of @which.
2140 *
2141 * This function should be called with preemption disabled if the
2142 * interrupt controller has per-cpu registers.
2143 */
2144int irq_set_irqchip_state(unsigned int irq, enum irqchip_irq_state which,
2145 bool val)
2146{
2147 struct irq_desc *desc;
2148 struct irq_data *data;
2149 struct irq_chip *chip;
2150 unsigned long flags;
2151 int err = -EINVAL;
2152
2153 desc = irq_get_desc_buslock(irq, &flags, 0);
2154 if (!desc)
2155 return err;
2156
2157 data = irq_desc_get_irq_data(desc);
2158
2159 do {
2160 chip = irq_data_get_irq_chip(data);
2161 if (chip->irq_set_irqchip_state)
2162 break;
2163#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
2164 data = data->parent_data;
2165#else
2166 data = NULL;
2167#endif
2168 } while (data);
2169
2170 if (data)
2171 err = chip->irq_set_irqchip_state(data, which, val);
2172
2173 irq_put_desc_busunlock(desc, flags);
2174 return err;
2175}
1ee4fb3e 2176EXPORT_SYMBOL_GPL(irq_set_irqchip_state);