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1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/manage.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
6 | * |
7 | * This file contains driver APIs to the irq subsystem. | |
8 | */ | |
9 | ||
10 | #include <linux/irq.h> | |
3aa551c9 | 11 | #include <linux/kthread.h> |
1da177e4 LT |
12 | #include <linux/module.h> |
13 | #include <linux/random.h> | |
14 | #include <linux/interrupt.h> | |
1aeb272c | 15 | #include <linux/slab.h> |
3aa551c9 | 16 | #include <linux/sched.h> |
1da177e4 LT |
17 | |
18 | #include "internals.h" | |
19 | ||
1da177e4 LT |
20 | /** |
21 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
1e5d5331 | 22 | * @irq: interrupt number to wait for |
1da177e4 LT |
23 | * |
24 | * This function waits for any pending IRQ handlers for this interrupt | |
25 | * to complete before returning. If you use this function while | |
26 | * holding a resource the IRQ handler may need you will deadlock. | |
27 | * | |
28 | * This function may be called - with care - from IRQ context. | |
29 | */ | |
30 | void synchronize_irq(unsigned int irq) | |
31 | { | |
cb5bc832 | 32 | struct irq_desc *desc = irq_to_desc(irq); |
a98ce5c6 | 33 | unsigned int status; |
1da177e4 | 34 | |
7d94f7ca | 35 | if (!desc) |
c2b5a251 MW |
36 | return; |
37 | ||
a98ce5c6 HX |
38 | do { |
39 | unsigned long flags; | |
40 | ||
41 | /* | |
42 | * Wait until we're out of the critical section. This might | |
43 | * give the wrong answer due to the lack of memory barriers. | |
44 | */ | |
45 | while (desc->status & IRQ_INPROGRESS) | |
46 | cpu_relax(); | |
47 | ||
48 | /* Ok, that indicated we're done: double-check carefully. */ | |
239007b8 | 49 | raw_spin_lock_irqsave(&desc->lock, flags); |
a98ce5c6 | 50 | status = desc->status; |
239007b8 | 51 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
a98ce5c6 HX |
52 | |
53 | /* Oops, that failed? */ | |
54 | } while (status & IRQ_INPROGRESS); | |
3aa551c9 TG |
55 | |
56 | /* | |
57 | * We made sure that no hardirq handler is running. Now verify | |
58 | * that no threaded handlers are active. | |
59 | */ | |
60 | wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active)); | |
1da177e4 | 61 | } |
1da177e4 LT |
62 | EXPORT_SYMBOL(synchronize_irq); |
63 | ||
3aa551c9 TG |
64 | #ifdef CONFIG_SMP |
65 | cpumask_var_t irq_default_affinity; | |
66 | ||
771ee3b0 TG |
67 | /** |
68 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
69 | * @irq: Interrupt to check | |
70 | * | |
71 | */ | |
72 | int irq_can_set_affinity(unsigned int irq) | |
73 | { | |
08678b08 | 74 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 TG |
75 | |
76 | if (CHECK_IRQ_PER_CPU(desc->status) || !desc->chip || | |
77 | !desc->chip->set_affinity) | |
78 | return 0; | |
79 | ||
80 | return 1; | |
81 | } | |
82 | ||
591d2fb0 TG |
83 | /** |
84 | * irq_set_thread_affinity - Notify irq threads to adjust affinity | |
85 | * @desc: irq descriptor which has affitnity changed | |
86 | * | |
87 | * We just set IRQTF_AFFINITY and delegate the affinity setting | |
88 | * to the interrupt thread itself. We can not call | |
89 | * set_cpus_allowed_ptr() here as we hold desc->lock and this | |
90 | * code can be called from hard interrupt context. | |
91 | */ | |
92 | void irq_set_thread_affinity(struct irq_desc *desc) | |
3aa551c9 TG |
93 | { |
94 | struct irqaction *action = desc->action; | |
95 | ||
96 | while (action) { | |
97 | if (action->thread) | |
591d2fb0 | 98 | set_bit(IRQTF_AFFINITY, &action->thread_flags); |
3aa551c9 TG |
99 | action = action->next; |
100 | } | |
101 | } | |
102 | ||
771ee3b0 TG |
103 | /** |
104 | * irq_set_affinity - Set the irq affinity of a given irq | |
105 | * @irq: Interrupt to set affinity | |
106 | * @cpumask: cpumask | |
107 | * | |
108 | */ | |
0de26520 | 109 | int irq_set_affinity(unsigned int irq, const struct cpumask *cpumask) |
771ee3b0 | 110 | { |
08678b08 | 111 | struct irq_desc *desc = irq_to_desc(irq); |
f6d87f4b | 112 | unsigned long flags; |
771ee3b0 TG |
113 | |
114 | if (!desc->chip->set_affinity) | |
115 | return -EINVAL; | |
116 | ||
239007b8 | 117 | raw_spin_lock_irqsave(&desc->lock, flags); |
f6d87f4b | 118 | |
771ee3b0 | 119 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
57b150cc YL |
120 | if (desc->status & IRQ_MOVE_PCNTXT) { |
121 | if (!desc->chip->set_affinity(irq, cpumask)) { | |
122 | cpumask_copy(desc->affinity, cpumask); | |
591d2fb0 | 123 | irq_set_thread_affinity(desc); |
57b150cc YL |
124 | } |
125 | } | |
6ec3cfec | 126 | else { |
f6d87f4b | 127 | desc->status |= IRQ_MOVE_PENDING; |
7f7ace0c | 128 | cpumask_copy(desc->pending_mask, cpumask); |
f6d87f4b | 129 | } |
771ee3b0 | 130 | #else |
57b150cc YL |
131 | if (!desc->chip->set_affinity(irq, cpumask)) { |
132 | cpumask_copy(desc->affinity, cpumask); | |
591d2fb0 | 133 | irq_set_thread_affinity(desc); |
57b150cc | 134 | } |
771ee3b0 | 135 | #endif |
f6d87f4b | 136 | desc->status |= IRQ_AFFINITY_SET; |
239007b8 | 137 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
771ee3b0 TG |
138 | return 0; |
139 | } | |
140 | ||
18404756 MK |
141 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
142 | /* | |
143 | * Generic version of the affinity autoselector. | |
144 | */ | |
548c8933 | 145 | static int setup_affinity(unsigned int irq, struct irq_desc *desc) |
18404756 | 146 | { |
18404756 MK |
147 | if (!irq_can_set_affinity(irq)) |
148 | return 0; | |
149 | ||
f6d87f4b TG |
150 | /* |
151 | * Preserve an userspace affinity setup, but make sure that | |
152 | * one of the targets is online. | |
153 | */ | |
612e3684 | 154 | if (desc->status & (IRQ_AFFINITY_SET | IRQ_NO_BALANCING)) { |
7f7ace0c | 155 | if (cpumask_any_and(desc->affinity, cpu_online_mask) |
0de26520 RR |
156 | < nr_cpu_ids) |
157 | goto set_affinity; | |
f6d87f4b TG |
158 | else |
159 | desc->status &= ~IRQ_AFFINITY_SET; | |
160 | } | |
161 | ||
7f7ace0c | 162 | cpumask_and(desc->affinity, cpu_online_mask, irq_default_affinity); |
0de26520 | 163 | set_affinity: |
7f7ace0c | 164 | desc->chip->set_affinity(irq, desc->affinity); |
18404756 | 165 | |
18404756 MK |
166 | return 0; |
167 | } | |
f6d87f4b | 168 | #else |
548c8933 | 169 | static inline int setup_affinity(unsigned int irq, struct irq_desc *d) |
f6d87f4b TG |
170 | { |
171 | return irq_select_affinity(irq); | |
172 | } | |
18404756 MK |
173 | #endif |
174 | ||
f6d87f4b TG |
175 | /* |
176 | * Called when affinity is set via /proc/irq | |
177 | */ | |
178 | int irq_select_affinity_usr(unsigned int irq) | |
179 | { | |
180 | struct irq_desc *desc = irq_to_desc(irq); | |
181 | unsigned long flags; | |
182 | int ret; | |
183 | ||
239007b8 | 184 | raw_spin_lock_irqsave(&desc->lock, flags); |
548c8933 | 185 | ret = setup_affinity(irq, desc); |
3aa551c9 | 186 | if (!ret) |
591d2fb0 | 187 | irq_set_thread_affinity(desc); |
239007b8 | 188 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
f6d87f4b TG |
189 | |
190 | return ret; | |
191 | } | |
192 | ||
193 | #else | |
548c8933 | 194 | static inline int setup_affinity(unsigned int irq, struct irq_desc *desc) |
f6d87f4b TG |
195 | { |
196 | return 0; | |
197 | } | |
1da177e4 LT |
198 | #endif |
199 | ||
0a0c5168 RW |
200 | void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend) |
201 | { | |
202 | if (suspend) { | |
203 | if (!desc->action || (desc->action->flags & IRQF_TIMER)) | |
204 | return; | |
205 | desc->status |= IRQ_SUSPENDED; | |
206 | } | |
207 | ||
208 | if (!desc->depth++) { | |
209 | desc->status |= IRQ_DISABLED; | |
210 | desc->chip->disable(irq); | |
211 | } | |
212 | } | |
213 | ||
1da177e4 LT |
214 | /** |
215 | * disable_irq_nosync - disable an irq without waiting | |
216 | * @irq: Interrupt to disable | |
217 | * | |
218 | * Disable the selected interrupt line. Disables and Enables are | |
219 | * nested. | |
220 | * Unlike disable_irq(), this function does not ensure existing | |
221 | * instances of the IRQ handler have completed before returning. | |
222 | * | |
223 | * This function may be called from IRQ context. | |
224 | */ | |
225 | void disable_irq_nosync(unsigned int irq) | |
226 | { | |
d3c60047 | 227 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
228 | unsigned long flags; |
229 | ||
7d94f7ca | 230 | if (!desc) |
c2b5a251 MW |
231 | return; |
232 | ||
70aedd24 | 233 | chip_bus_lock(irq, desc); |
239007b8 | 234 | raw_spin_lock_irqsave(&desc->lock, flags); |
0a0c5168 | 235 | __disable_irq(desc, irq, false); |
239007b8 | 236 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
70aedd24 | 237 | chip_bus_sync_unlock(irq, desc); |
1da177e4 | 238 | } |
1da177e4 LT |
239 | EXPORT_SYMBOL(disable_irq_nosync); |
240 | ||
241 | /** | |
242 | * disable_irq - disable an irq and wait for completion | |
243 | * @irq: Interrupt to disable | |
244 | * | |
245 | * Disable the selected interrupt line. Enables and Disables are | |
246 | * nested. | |
247 | * This function waits for any pending IRQ handlers for this interrupt | |
248 | * to complete before returning. If you use this function while | |
249 | * holding a resource the IRQ handler may need you will deadlock. | |
250 | * | |
251 | * This function may be called - with care - from IRQ context. | |
252 | */ | |
253 | void disable_irq(unsigned int irq) | |
254 | { | |
d3c60047 | 255 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 | 256 | |
7d94f7ca | 257 | if (!desc) |
c2b5a251 MW |
258 | return; |
259 | ||
1da177e4 LT |
260 | disable_irq_nosync(irq); |
261 | if (desc->action) | |
262 | synchronize_irq(irq); | |
263 | } | |
1da177e4 LT |
264 | EXPORT_SYMBOL(disable_irq); |
265 | ||
0a0c5168 | 266 | void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume) |
1adb0850 | 267 | { |
0a0c5168 RW |
268 | if (resume) |
269 | desc->status &= ~IRQ_SUSPENDED; | |
270 | ||
1adb0850 TG |
271 | switch (desc->depth) { |
272 | case 0: | |
0a0c5168 | 273 | err_out: |
b8c512f6 | 274 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq); |
1adb0850 TG |
275 | break; |
276 | case 1: { | |
277 | unsigned int status = desc->status & ~IRQ_DISABLED; | |
278 | ||
0a0c5168 RW |
279 | if (desc->status & IRQ_SUSPENDED) |
280 | goto err_out; | |
1adb0850 TG |
281 | /* Prevent probing on this irq: */ |
282 | desc->status = status | IRQ_NOPROBE; | |
283 | check_irq_resend(desc, irq); | |
284 | /* fall-through */ | |
285 | } | |
286 | default: | |
287 | desc->depth--; | |
288 | } | |
289 | } | |
290 | ||
1da177e4 LT |
291 | /** |
292 | * enable_irq - enable handling of an irq | |
293 | * @irq: Interrupt to enable | |
294 | * | |
295 | * Undoes the effect of one call to disable_irq(). If this | |
296 | * matches the last disable, processing of interrupts on this | |
297 | * IRQ line is re-enabled. | |
298 | * | |
70aedd24 TG |
299 | * This function may be called from IRQ context only when |
300 | * desc->chip->bus_lock and desc->chip->bus_sync_unlock are NULL ! | |
1da177e4 LT |
301 | */ |
302 | void enable_irq(unsigned int irq) | |
303 | { | |
d3c60047 | 304 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 LT |
305 | unsigned long flags; |
306 | ||
7d94f7ca | 307 | if (!desc) |
c2b5a251 MW |
308 | return; |
309 | ||
70aedd24 | 310 | chip_bus_lock(irq, desc); |
239007b8 | 311 | raw_spin_lock_irqsave(&desc->lock, flags); |
0a0c5168 | 312 | __enable_irq(desc, irq, false); |
239007b8 | 313 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
70aedd24 | 314 | chip_bus_sync_unlock(irq, desc); |
1da177e4 | 315 | } |
1da177e4 LT |
316 | EXPORT_SYMBOL(enable_irq); |
317 | ||
0c5d1eb7 | 318 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
2db87321 | 319 | { |
08678b08 | 320 | struct irq_desc *desc = irq_to_desc(irq); |
2db87321 UKK |
321 | int ret = -ENXIO; |
322 | ||
323 | if (desc->chip->set_wake) | |
324 | ret = desc->chip->set_wake(irq, on); | |
325 | ||
326 | return ret; | |
327 | } | |
328 | ||
ba9a2331 TG |
329 | /** |
330 | * set_irq_wake - control irq power management wakeup | |
331 | * @irq: interrupt to control | |
332 | * @on: enable/disable power management wakeup | |
333 | * | |
15a647eb DB |
334 | * Enable/disable power management wakeup mode, which is |
335 | * disabled by default. Enables and disables must match, | |
336 | * just as they match for non-wakeup mode support. | |
337 | * | |
338 | * Wakeup mode lets this IRQ wake the system from sleep | |
339 | * states like "suspend to RAM". | |
ba9a2331 TG |
340 | */ |
341 | int set_irq_wake(unsigned int irq, unsigned int on) | |
342 | { | |
08678b08 | 343 | struct irq_desc *desc = irq_to_desc(irq); |
ba9a2331 | 344 | unsigned long flags; |
2db87321 | 345 | int ret = 0; |
ba9a2331 | 346 | |
15a647eb DB |
347 | /* wakeup-capable irqs can be shared between drivers that |
348 | * don't need to have the same sleep mode behaviors. | |
349 | */ | |
239007b8 | 350 | raw_spin_lock_irqsave(&desc->lock, flags); |
15a647eb | 351 | if (on) { |
2db87321 UKK |
352 | if (desc->wake_depth++ == 0) { |
353 | ret = set_irq_wake_real(irq, on); | |
354 | if (ret) | |
355 | desc->wake_depth = 0; | |
356 | else | |
357 | desc->status |= IRQ_WAKEUP; | |
358 | } | |
15a647eb DB |
359 | } else { |
360 | if (desc->wake_depth == 0) { | |
7a2c4770 | 361 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
2db87321 UKK |
362 | } else if (--desc->wake_depth == 0) { |
363 | ret = set_irq_wake_real(irq, on); | |
364 | if (ret) | |
365 | desc->wake_depth = 1; | |
366 | else | |
367 | desc->status &= ~IRQ_WAKEUP; | |
368 | } | |
15a647eb | 369 | } |
2db87321 | 370 | |
239007b8 | 371 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
ba9a2331 TG |
372 | return ret; |
373 | } | |
374 | EXPORT_SYMBOL(set_irq_wake); | |
375 | ||
1da177e4 LT |
376 | /* |
377 | * Internal function that tells the architecture code whether a | |
378 | * particular irq has been exclusively allocated or is available | |
379 | * for driver use. | |
380 | */ | |
381 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
382 | { | |
d3c60047 | 383 | struct irq_desc *desc = irq_to_desc(irq); |
1da177e4 | 384 | struct irqaction *action; |
cc8c3b78 | 385 | unsigned long flags; |
1da177e4 | 386 | |
7d94f7ca YL |
387 | if (!desc) |
388 | return 0; | |
389 | ||
390 | if (desc->status & IRQ_NOREQUEST) | |
1da177e4 LT |
391 | return 0; |
392 | ||
cc8c3b78 | 393 | raw_spin_lock_irqsave(&desc->lock, flags); |
08678b08 | 394 | action = desc->action; |
1da177e4 | 395 | if (action) |
3cca53b0 | 396 | if (irqflags & action->flags & IRQF_SHARED) |
1da177e4 LT |
397 | action = NULL; |
398 | ||
cc8c3b78 TG |
399 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
400 | ||
1da177e4 LT |
401 | return !action; |
402 | } | |
403 | ||
6a6de9ef TG |
404 | void compat_irq_chip_set_default_handler(struct irq_desc *desc) |
405 | { | |
406 | /* | |
407 | * If the architecture still has not overriden | |
408 | * the flow handler then zap the default. This | |
409 | * should catch incorrect flow-type setting. | |
410 | */ | |
411 | if (desc->handle_irq == &handle_bad_irq) | |
412 | desc->handle_irq = NULL; | |
413 | } | |
414 | ||
0c5d1eb7 | 415 | int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
82736f4d UKK |
416 | unsigned long flags) |
417 | { | |
418 | int ret; | |
0c5d1eb7 | 419 | struct irq_chip *chip = desc->chip; |
82736f4d UKK |
420 | |
421 | if (!chip || !chip->set_type) { | |
422 | /* | |
423 | * IRQF_TRIGGER_* but the PIC does not support multiple | |
424 | * flow-types? | |
425 | */ | |
3ff68a6a | 426 | pr_debug("No set_type function for IRQ %d (%s)\n", irq, |
82736f4d UKK |
427 | chip ? (chip->name ? : "unknown") : "unknown"); |
428 | return 0; | |
429 | } | |
430 | ||
f2b662da DB |
431 | /* caller masked out all except trigger mode flags */ |
432 | ret = chip->set_type(irq, flags); | |
82736f4d UKK |
433 | |
434 | if (ret) | |
c69ad71b | 435 | pr_err("setting trigger mode %d for irq %u failed (%pF)\n", |
f2b662da | 436 | (int)flags, irq, chip->set_type); |
0c5d1eb7 | 437 | else { |
f2b662da DB |
438 | if (flags & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) |
439 | flags |= IRQ_LEVEL; | |
0c5d1eb7 | 440 | /* note that IRQF_TRIGGER_MASK == IRQ_TYPE_SENSE_MASK */ |
f2b662da DB |
441 | desc->status &= ~(IRQ_LEVEL | IRQ_TYPE_SENSE_MASK); |
442 | desc->status |= flags; | |
0c5d1eb7 | 443 | } |
82736f4d UKK |
444 | |
445 | return ret; | |
446 | } | |
447 | ||
b25c340c TG |
448 | /* |
449 | * Default primary interrupt handler for threaded interrupts. Is | |
450 | * assigned as primary handler when request_threaded_irq is called | |
451 | * with handler == NULL. Useful for oneshot interrupts. | |
452 | */ | |
453 | static irqreturn_t irq_default_primary_handler(int irq, void *dev_id) | |
454 | { | |
455 | return IRQ_WAKE_THREAD; | |
456 | } | |
457 | ||
399b5da2 TG |
458 | /* |
459 | * Primary handler for nested threaded interrupts. Should never be | |
460 | * called. | |
461 | */ | |
462 | static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id) | |
463 | { | |
464 | WARN(1, "Primary handler called for nested irq %d\n", irq); | |
465 | return IRQ_NONE; | |
466 | } | |
467 | ||
3aa551c9 TG |
468 | static int irq_wait_for_interrupt(struct irqaction *action) |
469 | { | |
470 | while (!kthread_should_stop()) { | |
471 | set_current_state(TASK_INTERRUPTIBLE); | |
f48fe81e TG |
472 | |
473 | if (test_and_clear_bit(IRQTF_RUNTHREAD, | |
474 | &action->thread_flags)) { | |
3aa551c9 TG |
475 | __set_current_state(TASK_RUNNING); |
476 | return 0; | |
f48fe81e TG |
477 | } |
478 | schedule(); | |
3aa551c9 TG |
479 | } |
480 | return -1; | |
481 | } | |
482 | ||
b25c340c TG |
483 | /* |
484 | * Oneshot interrupts keep the irq line masked until the threaded | |
485 | * handler finished. unmask if the interrupt has not been disabled and | |
486 | * is marked MASKED. | |
487 | */ | |
488 | static void irq_finalize_oneshot(unsigned int irq, struct irq_desc *desc) | |
489 | { | |
0b1adaa0 | 490 | again: |
70aedd24 | 491 | chip_bus_lock(irq, desc); |
239007b8 | 492 | raw_spin_lock_irq(&desc->lock); |
0b1adaa0 TG |
493 | |
494 | /* | |
495 | * Implausible though it may be we need to protect us against | |
496 | * the following scenario: | |
497 | * | |
498 | * The thread is faster done than the hard interrupt handler | |
499 | * on the other CPU. If we unmask the irq line then the | |
500 | * interrupt can come in again and masks the line, leaves due | |
501 | * to IRQ_INPROGRESS and the irq line is masked forever. | |
502 | */ | |
503 | if (unlikely(desc->status & IRQ_INPROGRESS)) { | |
504 | raw_spin_unlock_irq(&desc->lock); | |
505 | chip_bus_sync_unlock(irq, desc); | |
506 | cpu_relax(); | |
507 | goto again; | |
508 | } | |
509 | ||
b25c340c TG |
510 | if (!(desc->status & IRQ_DISABLED) && (desc->status & IRQ_MASKED)) { |
511 | desc->status &= ~IRQ_MASKED; | |
512 | desc->chip->unmask(irq); | |
513 | } | |
239007b8 | 514 | raw_spin_unlock_irq(&desc->lock); |
70aedd24 | 515 | chip_bus_sync_unlock(irq, desc); |
b25c340c TG |
516 | } |
517 | ||
61f38261 | 518 | #ifdef CONFIG_SMP |
591d2fb0 TG |
519 | /* |
520 | * Check whether we need to change the affinity of the interrupt thread. | |
521 | */ | |
522 | static void | |
523 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) | |
524 | { | |
525 | cpumask_var_t mask; | |
526 | ||
527 | if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags)) | |
528 | return; | |
529 | ||
530 | /* | |
531 | * In case we are out of memory we set IRQTF_AFFINITY again and | |
532 | * try again next time | |
533 | */ | |
534 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { | |
535 | set_bit(IRQTF_AFFINITY, &action->thread_flags); | |
536 | return; | |
537 | } | |
538 | ||
239007b8 | 539 | raw_spin_lock_irq(&desc->lock); |
591d2fb0 | 540 | cpumask_copy(mask, desc->affinity); |
239007b8 | 541 | raw_spin_unlock_irq(&desc->lock); |
591d2fb0 TG |
542 | |
543 | set_cpus_allowed_ptr(current, mask); | |
544 | free_cpumask_var(mask); | |
545 | } | |
61f38261 BP |
546 | #else |
547 | static inline void | |
548 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { } | |
549 | #endif | |
591d2fb0 | 550 | |
3aa551c9 TG |
551 | /* |
552 | * Interrupt handler thread | |
553 | */ | |
554 | static int irq_thread(void *data) | |
555 | { | |
556 | struct sched_param param = { .sched_priority = MAX_USER_RT_PRIO/2, }; | |
557 | struct irqaction *action = data; | |
558 | struct irq_desc *desc = irq_to_desc(action->irq); | |
b25c340c | 559 | int wake, oneshot = desc->status & IRQ_ONESHOT; |
3aa551c9 TG |
560 | |
561 | sched_setscheduler(current, SCHED_FIFO, ¶m); | |
562 | current->irqaction = action; | |
563 | ||
564 | while (!irq_wait_for_interrupt(action)) { | |
565 | ||
591d2fb0 TG |
566 | irq_thread_check_affinity(desc, action); |
567 | ||
3aa551c9 TG |
568 | atomic_inc(&desc->threads_active); |
569 | ||
239007b8 | 570 | raw_spin_lock_irq(&desc->lock); |
3aa551c9 TG |
571 | if (unlikely(desc->status & IRQ_DISABLED)) { |
572 | /* | |
573 | * CHECKME: We might need a dedicated | |
574 | * IRQ_THREAD_PENDING flag here, which | |
575 | * retriggers the thread in check_irq_resend() | |
576 | * but AFAICT IRQ_PENDING should be fine as it | |
577 | * retriggers the interrupt itself --- tglx | |
578 | */ | |
579 | desc->status |= IRQ_PENDING; | |
239007b8 | 580 | raw_spin_unlock_irq(&desc->lock); |
3aa551c9 | 581 | } else { |
239007b8 | 582 | raw_spin_unlock_irq(&desc->lock); |
3aa551c9 TG |
583 | |
584 | action->thread_fn(action->irq, action->dev_id); | |
b25c340c TG |
585 | |
586 | if (oneshot) | |
587 | irq_finalize_oneshot(action->irq, desc); | |
3aa551c9 TG |
588 | } |
589 | ||
590 | wake = atomic_dec_and_test(&desc->threads_active); | |
591 | ||
592 | if (wake && waitqueue_active(&desc->wait_for_threads)) | |
593 | wake_up(&desc->wait_for_threads); | |
594 | } | |
595 | ||
596 | /* | |
597 | * Clear irqaction. Otherwise exit_irq_thread() would make | |
598 | * fuzz about an active irq thread going into nirvana. | |
599 | */ | |
600 | current->irqaction = NULL; | |
601 | return 0; | |
602 | } | |
603 | ||
604 | /* | |
605 | * Called from do_exit() | |
606 | */ | |
607 | void exit_irq_thread(void) | |
608 | { | |
609 | struct task_struct *tsk = current; | |
610 | ||
611 | if (!tsk->irqaction) | |
612 | return; | |
613 | ||
614 | printk(KERN_ERR | |
615 | "exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n", | |
616 | tsk->comm ? tsk->comm : "", tsk->pid, tsk->irqaction->irq); | |
617 | ||
618 | /* | |
619 | * Set the THREAD DIED flag to prevent further wakeups of the | |
620 | * soon to be gone threaded handler. | |
621 | */ | |
622 | set_bit(IRQTF_DIED, &tsk->irqaction->flags); | |
623 | } | |
624 | ||
1da177e4 LT |
625 | /* |
626 | * Internal function to register an irqaction - typically used to | |
627 | * allocate special interrupts that are part of the architecture. | |
628 | */ | |
d3c60047 | 629 | static int |
327ec569 | 630 | __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) |
1da177e4 | 631 | { |
f17c7545 | 632 | struct irqaction *old, **old_ptr; |
8b126b77 | 633 | const char *old_name = NULL; |
1da177e4 | 634 | unsigned long flags; |
399b5da2 | 635 | int nested, shared = 0; |
82736f4d | 636 | int ret; |
1da177e4 | 637 | |
7d94f7ca | 638 | if (!desc) |
c2b5a251 MW |
639 | return -EINVAL; |
640 | ||
f1c2662c | 641 | if (desc->chip == &no_irq_chip) |
1da177e4 LT |
642 | return -ENOSYS; |
643 | /* | |
644 | * Some drivers like serial.c use request_irq() heavily, | |
645 | * so we have to be careful not to interfere with a | |
646 | * running system. | |
647 | */ | |
3cca53b0 | 648 | if (new->flags & IRQF_SAMPLE_RANDOM) { |
1da177e4 LT |
649 | /* |
650 | * This function might sleep, we want to call it first, | |
651 | * outside of the atomic block. | |
652 | * Yes, this might clear the entropy pool if the wrong | |
653 | * driver is attempted to be loaded, without actually | |
654 | * installing a new handler, but is this really a problem, | |
655 | * only the sysadmin is able to do this. | |
656 | */ | |
657 | rand_initialize_irq(irq); | |
658 | } | |
659 | ||
b25c340c TG |
660 | /* Oneshot interrupts are not allowed with shared */ |
661 | if ((new->flags & IRQF_ONESHOT) && (new->flags & IRQF_SHARED)) | |
662 | return -EINVAL; | |
663 | ||
3aa551c9 | 664 | /* |
399b5da2 TG |
665 | * Check whether the interrupt nests into another interrupt |
666 | * thread. | |
667 | */ | |
668 | nested = desc->status & IRQ_NESTED_THREAD; | |
669 | if (nested) { | |
670 | if (!new->thread_fn) | |
671 | return -EINVAL; | |
672 | /* | |
673 | * Replace the primary handler which was provided from | |
674 | * the driver for non nested interrupt handling by the | |
675 | * dummy function which warns when called. | |
676 | */ | |
677 | new->handler = irq_nested_primary_handler; | |
678 | } | |
679 | ||
3aa551c9 | 680 | /* |
399b5da2 TG |
681 | * Create a handler thread when a thread function is supplied |
682 | * and the interrupt does not nest into another interrupt | |
683 | * thread. | |
3aa551c9 | 684 | */ |
399b5da2 | 685 | if (new->thread_fn && !nested) { |
3aa551c9 TG |
686 | struct task_struct *t; |
687 | ||
688 | t = kthread_create(irq_thread, new, "irq/%d-%s", irq, | |
689 | new->name); | |
690 | if (IS_ERR(t)) | |
691 | return PTR_ERR(t); | |
692 | /* | |
693 | * We keep the reference to the task struct even if | |
694 | * the thread dies to avoid that the interrupt code | |
695 | * references an already freed task_struct. | |
696 | */ | |
697 | get_task_struct(t); | |
698 | new->thread = t; | |
3aa551c9 TG |
699 | } |
700 | ||
1da177e4 LT |
701 | /* |
702 | * The following block of code has to be executed atomically | |
703 | */ | |
239007b8 | 704 | raw_spin_lock_irqsave(&desc->lock, flags); |
f17c7545 IM |
705 | old_ptr = &desc->action; |
706 | old = *old_ptr; | |
06fcb0c6 | 707 | if (old) { |
e76de9f8 TG |
708 | /* |
709 | * Can't share interrupts unless both agree to and are | |
710 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 711 | * fields must have IRQF_SHARED set and the bits which |
e76de9f8 TG |
712 | * set the trigger type must match. |
713 | */ | |
3cca53b0 | 714 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
8b126b77 AM |
715 | ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) { |
716 | old_name = old->name; | |
f5163427 | 717 | goto mismatch; |
8b126b77 | 718 | } |
f5163427 | 719 | |
284c6680 | 720 | #if defined(CONFIG_IRQ_PER_CPU) |
f5163427 | 721 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
722 | if ((old->flags & IRQF_PERCPU) != |
723 | (new->flags & IRQF_PERCPU)) | |
f5163427 DS |
724 | goto mismatch; |
725 | #endif | |
1da177e4 LT |
726 | |
727 | /* add new interrupt at end of irq queue */ | |
728 | do { | |
f17c7545 IM |
729 | old_ptr = &old->next; |
730 | old = *old_ptr; | |
1da177e4 LT |
731 | } while (old); |
732 | shared = 1; | |
733 | } | |
734 | ||
1da177e4 | 735 | if (!shared) { |
6a6de9ef | 736 | irq_chip_set_defaults(desc->chip); |
e76de9f8 | 737 | |
3aa551c9 TG |
738 | init_waitqueue_head(&desc->wait_for_threads); |
739 | ||
e76de9f8 | 740 | /* Setup the type (level, edge polarity) if configured: */ |
3cca53b0 | 741 | if (new->flags & IRQF_TRIGGER_MASK) { |
f2b662da DB |
742 | ret = __irq_set_trigger(desc, irq, |
743 | new->flags & IRQF_TRIGGER_MASK); | |
82736f4d | 744 | |
3aa551c9 TG |
745 | if (ret) |
746 | goto out_thread; | |
e76de9f8 TG |
747 | } else |
748 | compat_irq_chip_set_default_handler(desc); | |
82736f4d UKK |
749 | #if defined(CONFIG_IRQ_PER_CPU) |
750 | if (new->flags & IRQF_PERCPU) | |
751 | desc->status |= IRQ_PER_CPU; | |
752 | #endif | |
6a6de9ef | 753 | |
b25c340c | 754 | desc->status &= ~(IRQ_AUTODETECT | IRQ_WAITING | IRQ_ONESHOT | |
1adb0850 | 755 | IRQ_INPROGRESS | IRQ_SPURIOUS_DISABLED); |
94d39e1f | 756 | |
b25c340c TG |
757 | if (new->flags & IRQF_ONESHOT) |
758 | desc->status |= IRQ_ONESHOT; | |
759 | ||
94d39e1f TG |
760 | if (!(desc->status & IRQ_NOAUTOEN)) { |
761 | desc->depth = 0; | |
762 | desc->status &= ~IRQ_DISABLED; | |
7e6e178a | 763 | desc->chip->startup(irq); |
e76de9f8 TG |
764 | } else |
765 | /* Undo nested disables: */ | |
766 | desc->depth = 1; | |
18404756 | 767 | |
612e3684 TG |
768 | /* Exclude IRQ from balancing if requested */ |
769 | if (new->flags & IRQF_NOBALANCING) | |
770 | desc->status |= IRQ_NO_BALANCING; | |
771 | ||
18404756 | 772 | /* Set default affinity mask once everything is setup */ |
548c8933 | 773 | setup_affinity(irq, desc); |
0c5d1eb7 DB |
774 | |
775 | } else if ((new->flags & IRQF_TRIGGER_MASK) | |
776 | && (new->flags & IRQF_TRIGGER_MASK) | |
777 | != (desc->status & IRQ_TYPE_SENSE_MASK)) { | |
778 | /* hope the handler works with the actual trigger mode... */ | |
779 | pr_warning("IRQ %d uses trigger mode %d; requested %d\n", | |
780 | irq, (int)(desc->status & IRQ_TYPE_SENSE_MASK), | |
781 | (int)(new->flags & IRQF_TRIGGER_MASK)); | |
1da177e4 | 782 | } |
82736f4d | 783 | |
69ab8494 | 784 | new->irq = irq; |
f17c7545 | 785 | *old_ptr = new; |
82736f4d | 786 | |
8528b0f1 LT |
787 | /* Reset broken irq detection when installing new handler */ |
788 | desc->irq_count = 0; | |
789 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
790 | |
791 | /* | |
792 | * Check whether we disabled the irq via the spurious handler | |
793 | * before. Reenable it and give it another chance. | |
794 | */ | |
795 | if (shared && (desc->status & IRQ_SPURIOUS_DISABLED)) { | |
796 | desc->status &= ~IRQ_SPURIOUS_DISABLED; | |
0a0c5168 | 797 | __enable_irq(desc, irq, false); |
1adb0850 TG |
798 | } |
799 | ||
239007b8 | 800 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 801 | |
69ab8494 TG |
802 | /* |
803 | * Strictly no need to wake it up, but hung_task complains | |
804 | * when no hard interrupt wakes the thread up. | |
805 | */ | |
806 | if (new->thread) | |
807 | wake_up_process(new->thread); | |
808 | ||
2c6927a3 | 809 | register_irq_proc(irq, desc); |
1da177e4 LT |
810 | new->dir = NULL; |
811 | register_handler_proc(irq, new); | |
812 | ||
813 | return 0; | |
f5163427 DS |
814 | |
815 | mismatch: | |
3f050447 | 816 | #ifdef CONFIG_DEBUG_SHIRQ |
3cca53b0 | 817 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
e8c4b9d0 | 818 | printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq); |
8b126b77 AM |
819 | if (old_name) |
820 | printk(KERN_ERR "current handler: %s\n", old_name); | |
13e87ec6 AM |
821 | dump_stack(); |
822 | } | |
3f050447 | 823 | #endif |
3aa551c9 TG |
824 | ret = -EBUSY; |
825 | ||
826 | out_thread: | |
239007b8 | 827 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3aa551c9 TG |
828 | if (new->thread) { |
829 | struct task_struct *t = new->thread; | |
830 | ||
831 | new->thread = NULL; | |
832 | if (likely(!test_bit(IRQTF_DIED, &new->thread_flags))) | |
833 | kthread_stop(t); | |
834 | put_task_struct(t); | |
835 | } | |
836 | return ret; | |
1da177e4 LT |
837 | } |
838 | ||
d3c60047 TG |
839 | /** |
840 | * setup_irq - setup an interrupt | |
841 | * @irq: Interrupt line to setup | |
842 | * @act: irqaction for the interrupt | |
843 | * | |
844 | * Used to statically setup interrupts in the early boot process. | |
845 | */ | |
846 | int setup_irq(unsigned int irq, struct irqaction *act) | |
847 | { | |
848 | struct irq_desc *desc = irq_to_desc(irq); | |
849 | ||
850 | return __setup_irq(irq, desc, act); | |
851 | } | |
eb53b4e8 | 852 | EXPORT_SYMBOL_GPL(setup_irq); |
d3c60047 | 853 | |
cbf94f06 MD |
854 | /* |
855 | * Internal function to unregister an irqaction - used to free | |
856 | * regular and special interrupts that are part of the architecture. | |
1da177e4 | 857 | */ |
cbf94f06 | 858 | static struct irqaction *__free_irq(unsigned int irq, void *dev_id) |
1da177e4 | 859 | { |
d3c60047 | 860 | struct irq_desc *desc = irq_to_desc(irq); |
f17c7545 | 861 | struct irqaction *action, **action_ptr; |
1da177e4 LT |
862 | unsigned long flags; |
863 | ||
ae88a23b | 864 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); |
7d94f7ca | 865 | |
7d94f7ca | 866 | if (!desc) |
f21cfb25 | 867 | return NULL; |
1da177e4 | 868 | |
239007b8 | 869 | raw_spin_lock_irqsave(&desc->lock, flags); |
ae88a23b IM |
870 | |
871 | /* | |
872 | * There can be multiple actions per IRQ descriptor, find the right | |
873 | * one based on the dev_id: | |
874 | */ | |
f17c7545 | 875 | action_ptr = &desc->action; |
1da177e4 | 876 | for (;;) { |
f17c7545 | 877 | action = *action_ptr; |
1da177e4 | 878 | |
ae88a23b IM |
879 | if (!action) { |
880 | WARN(1, "Trying to free already-free IRQ %d\n", irq); | |
239007b8 | 881 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 882 | |
f21cfb25 | 883 | return NULL; |
ae88a23b | 884 | } |
1da177e4 | 885 | |
8316e381 IM |
886 | if (action->dev_id == dev_id) |
887 | break; | |
f17c7545 | 888 | action_ptr = &action->next; |
ae88a23b | 889 | } |
dbce706e | 890 | |
ae88a23b | 891 | /* Found it - now remove it from the list of entries: */ |
f17c7545 | 892 | *action_ptr = action->next; |
ae88a23b IM |
893 | |
894 | /* Currently used only by UML, might disappear one day: */ | |
b77d6adc | 895 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
ae88a23b IM |
896 | if (desc->chip->release) |
897 | desc->chip->release(irq, dev_id); | |
b77d6adc | 898 | #endif |
dbce706e | 899 | |
ae88a23b IM |
900 | /* If this was the last handler, shut down the IRQ line: */ |
901 | if (!desc->action) { | |
902 | desc->status |= IRQ_DISABLED; | |
903 | if (desc->chip->shutdown) | |
904 | desc->chip->shutdown(irq); | |
905 | else | |
906 | desc->chip->disable(irq); | |
907 | } | |
3aa551c9 | 908 | |
239007b8 | 909 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
ae88a23b IM |
910 | |
911 | unregister_handler_proc(irq, action); | |
912 | ||
913 | /* Make sure it's not being used on another CPU: */ | |
914 | synchronize_irq(irq); | |
1da177e4 | 915 | |
70edcd77 | 916 | #ifdef CONFIG_DEBUG_SHIRQ |
ae88a23b IM |
917 | /* |
918 | * It's a shared IRQ -- the driver ought to be prepared for an IRQ | |
919 | * event to happen even now it's being freed, so let's make sure that | |
920 | * is so by doing an extra call to the handler .... | |
921 | * | |
922 | * ( We do this after actually deregistering it, to make sure that a | |
923 | * 'real' IRQ doesn't run in * parallel with our fake. ) | |
924 | */ | |
925 | if (action->flags & IRQF_SHARED) { | |
926 | local_irq_save(flags); | |
927 | action->handler(irq, dev_id); | |
928 | local_irq_restore(flags); | |
1da177e4 | 929 | } |
ae88a23b | 930 | #endif |
2d860ad7 LT |
931 | |
932 | if (action->thread) { | |
933 | if (!test_bit(IRQTF_DIED, &action->thread_flags)) | |
934 | kthread_stop(action->thread); | |
935 | put_task_struct(action->thread); | |
936 | } | |
937 | ||
f21cfb25 MD |
938 | return action; |
939 | } | |
940 | ||
cbf94f06 MD |
941 | /** |
942 | * remove_irq - free an interrupt | |
943 | * @irq: Interrupt line to free | |
944 | * @act: irqaction for the interrupt | |
945 | * | |
946 | * Used to remove interrupts statically setup by the early boot process. | |
947 | */ | |
948 | void remove_irq(unsigned int irq, struct irqaction *act) | |
949 | { | |
950 | __free_irq(irq, act->dev_id); | |
951 | } | |
eb53b4e8 | 952 | EXPORT_SYMBOL_GPL(remove_irq); |
cbf94f06 | 953 | |
f21cfb25 MD |
954 | /** |
955 | * free_irq - free an interrupt allocated with request_irq | |
956 | * @irq: Interrupt line to free | |
957 | * @dev_id: Device identity to free | |
958 | * | |
959 | * Remove an interrupt handler. The handler is removed and if the | |
960 | * interrupt line is no longer in use by any driver it is disabled. | |
961 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
962 | * on the card it drives before calling this function. The function | |
963 | * does not return until any executing interrupts for this IRQ | |
964 | * have completed. | |
965 | * | |
966 | * This function must not be called from interrupt context. | |
967 | */ | |
968 | void free_irq(unsigned int irq, void *dev_id) | |
969 | { | |
70aedd24 TG |
970 | struct irq_desc *desc = irq_to_desc(irq); |
971 | ||
972 | if (!desc) | |
973 | return; | |
974 | ||
975 | chip_bus_lock(irq, desc); | |
cbf94f06 | 976 | kfree(__free_irq(irq, dev_id)); |
70aedd24 | 977 | chip_bus_sync_unlock(irq, desc); |
1da177e4 | 978 | } |
1da177e4 LT |
979 | EXPORT_SYMBOL(free_irq); |
980 | ||
981 | /** | |
3aa551c9 | 982 | * request_threaded_irq - allocate an interrupt line |
1da177e4 | 983 | * @irq: Interrupt line to allocate |
3aa551c9 TG |
984 | * @handler: Function to be called when the IRQ occurs. |
985 | * Primary handler for threaded interrupts | |
b25c340c TG |
986 | * If NULL and thread_fn != NULL the default |
987 | * primary handler is installed | |
f48fe81e TG |
988 | * @thread_fn: Function called from the irq handler thread |
989 | * If NULL, no irq thread is created | |
1da177e4 LT |
990 | * @irqflags: Interrupt type flags |
991 | * @devname: An ascii name for the claiming device | |
992 | * @dev_id: A cookie passed back to the handler function | |
993 | * | |
994 | * This call allocates interrupt resources and enables the | |
995 | * interrupt line and IRQ handling. From the point this | |
996 | * call is made your handler function may be invoked. Since | |
997 | * your handler function must clear any interrupt the board | |
998 | * raises, you must take care both to initialise your hardware | |
999 | * and to set up the interrupt handler in the right order. | |
1000 | * | |
3aa551c9 TG |
1001 | * If you want to set up a threaded irq handler for your device |
1002 | * then you need to supply @handler and @thread_fn. @handler ist | |
1003 | * still called in hard interrupt context and has to check | |
1004 | * whether the interrupt originates from the device. If yes it | |
1005 | * needs to disable the interrupt on the device and return | |
39a2eddb | 1006 | * IRQ_WAKE_THREAD which will wake up the handler thread and run |
3aa551c9 TG |
1007 | * @thread_fn. This split handler design is necessary to support |
1008 | * shared interrupts. | |
1009 | * | |
1da177e4 LT |
1010 | * Dev_id must be globally unique. Normally the address of the |
1011 | * device data structure is used as the cookie. Since the handler | |
1012 | * receives this value it makes sense to use it. | |
1013 | * | |
1014 | * If your interrupt is shared you must pass a non NULL dev_id | |
1015 | * as this is required when freeing the interrupt. | |
1016 | * | |
1017 | * Flags: | |
1018 | * | |
3cca53b0 | 1019 | * IRQF_SHARED Interrupt is shared |
3cca53b0 | 1020 | * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy |
0c5d1eb7 | 1021 | * IRQF_TRIGGER_* Specify active edge(s) or level |
1da177e4 LT |
1022 | * |
1023 | */ | |
3aa551c9 TG |
1024 | int request_threaded_irq(unsigned int irq, irq_handler_t handler, |
1025 | irq_handler_t thread_fn, unsigned long irqflags, | |
1026 | const char *devname, void *dev_id) | |
1da177e4 | 1027 | { |
06fcb0c6 | 1028 | struct irqaction *action; |
08678b08 | 1029 | struct irq_desc *desc; |
d3c60047 | 1030 | int retval; |
1da177e4 LT |
1031 | |
1032 | /* | |
1033 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
1034 | * otherwise we'll have trouble later trying to figure out | |
1035 | * which interrupt is which (messes up the interrupt freeing | |
1036 | * logic etc). | |
1037 | */ | |
3cca53b0 | 1038 | if ((irqflags & IRQF_SHARED) && !dev_id) |
1da177e4 | 1039 | return -EINVAL; |
7d94f7ca | 1040 | |
cb5bc832 | 1041 | desc = irq_to_desc(irq); |
7d94f7ca | 1042 | if (!desc) |
1da177e4 | 1043 | return -EINVAL; |
7d94f7ca | 1044 | |
08678b08 | 1045 | if (desc->status & IRQ_NOREQUEST) |
6550c775 | 1046 | return -EINVAL; |
b25c340c TG |
1047 | |
1048 | if (!handler) { | |
1049 | if (!thread_fn) | |
1050 | return -EINVAL; | |
1051 | handler = irq_default_primary_handler; | |
1052 | } | |
1da177e4 | 1053 | |
45535732 | 1054 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
1da177e4 LT |
1055 | if (!action) |
1056 | return -ENOMEM; | |
1057 | ||
1058 | action->handler = handler; | |
3aa551c9 | 1059 | action->thread_fn = thread_fn; |
1da177e4 | 1060 | action->flags = irqflags; |
1da177e4 | 1061 | action->name = devname; |
1da177e4 LT |
1062 | action->dev_id = dev_id; |
1063 | ||
70aedd24 | 1064 | chip_bus_lock(irq, desc); |
d3c60047 | 1065 | retval = __setup_irq(irq, desc, action); |
70aedd24 TG |
1066 | chip_bus_sync_unlock(irq, desc); |
1067 | ||
377bf1e4 AV |
1068 | if (retval) |
1069 | kfree(action); | |
1070 | ||
a304e1b8 | 1071 | #ifdef CONFIG_DEBUG_SHIRQ |
6ce51c43 | 1072 | if (!retval && (irqflags & IRQF_SHARED)) { |
a304e1b8 DW |
1073 | /* |
1074 | * It's a shared IRQ -- the driver ought to be prepared for it | |
1075 | * to happen immediately, so let's make sure.... | |
377bf1e4 AV |
1076 | * We disable the irq to make sure that a 'real' IRQ doesn't |
1077 | * run in parallel with our fake. | |
a304e1b8 | 1078 | */ |
59845b1f | 1079 | unsigned long flags; |
a304e1b8 | 1080 | |
377bf1e4 | 1081 | disable_irq(irq); |
59845b1f | 1082 | local_irq_save(flags); |
377bf1e4 | 1083 | |
59845b1f | 1084 | handler(irq, dev_id); |
377bf1e4 | 1085 | |
59845b1f | 1086 | local_irq_restore(flags); |
377bf1e4 | 1087 | enable_irq(irq); |
a304e1b8 DW |
1088 | } |
1089 | #endif | |
1da177e4 LT |
1090 | return retval; |
1091 | } | |
3aa551c9 | 1092 | EXPORT_SYMBOL(request_threaded_irq); |
ae731f8d MZ |
1093 | |
1094 | /** | |
1095 | * request_any_context_irq - allocate an interrupt line | |
1096 | * @irq: Interrupt line to allocate | |
1097 | * @handler: Function to be called when the IRQ occurs. | |
1098 | * Threaded handler for threaded interrupts. | |
1099 | * @flags: Interrupt type flags | |
1100 | * @name: An ascii name for the claiming device | |
1101 | * @dev_id: A cookie passed back to the handler function | |
1102 | * | |
1103 | * This call allocates interrupt resources and enables the | |
1104 | * interrupt line and IRQ handling. It selects either a | |
1105 | * hardirq or threaded handling method depending on the | |
1106 | * context. | |
1107 | * | |
1108 | * On failure, it returns a negative value. On success, | |
1109 | * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED. | |
1110 | */ | |
1111 | int request_any_context_irq(unsigned int irq, irq_handler_t handler, | |
1112 | unsigned long flags, const char *name, void *dev_id) | |
1113 | { | |
1114 | struct irq_desc *desc = irq_to_desc(irq); | |
1115 | int ret; | |
1116 | ||
1117 | if (!desc) | |
1118 | return -EINVAL; | |
1119 | ||
1120 | if (desc->status & IRQ_NESTED_THREAD) { | |
1121 | ret = request_threaded_irq(irq, NULL, handler, | |
1122 | flags, name, dev_id); | |
1123 | return !ret ? IRQC_IS_NESTED : ret; | |
1124 | } | |
1125 | ||
1126 | ret = request_irq(irq, handler, flags, name, dev_id); | |
1127 | return !ret ? IRQC_IS_HARDIRQ : ret; | |
1128 | } | |
1129 | EXPORT_SYMBOL_GPL(request_any_context_irq); |