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1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/manage.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
6 | * |
7 | * This file contains driver APIs to the irq subsystem. | |
8 | */ | |
9 | ||
10 | #include <linux/irq.h> | |
3aa551c9 | 11 | #include <linux/kthread.h> |
1da177e4 LT |
12 | #include <linux/module.h> |
13 | #include <linux/random.h> | |
14 | #include <linux/interrupt.h> | |
1aeb272c | 15 | #include <linux/slab.h> |
3aa551c9 | 16 | #include <linux/sched.h> |
1da177e4 LT |
17 | |
18 | #include "internals.h" | |
19 | ||
8d32a307 TG |
20 | #ifdef CONFIG_IRQ_FORCED_THREADING |
21 | __read_mostly bool force_irqthreads; | |
22 | ||
23 | static int __init setup_forced_irqthreads(char *arg) | |
24 | { | |
25 | force_irqthreads = true; | |
26 | return 0; | |
27 | } | |
28 | early_param("threadirqs", setup_forced_irqthreads); | |
29 | #endif | |
30 | ||
1da177e4 LT |
31 | /** |
32 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
1e5d5331 | 33 | * @irq: interrupt number to wait for |
1da177e4 LT |
34 | * |
35 | * This function waits for any pending IRQ handlers for this interrupt | |
36 | * to complete before returning. If you use this function while | |
37 | * holding a resource the IRQ handler may need you will deadlock. | |
38 | * | |
39 | * This function may be called - with care - from IRQ context. | |
40 | */ | |
41 | void synchronize_irq(unsigned int irq) | |
42 | { | |
cb5bc832 | 43 | struct irq_desc *desc = irq_to_desc(irq); |
32f4125e | 44 | bool inprogress; |
1da177e4 | 45 | |
7d94f7ca | 46 | if (!desc) |
c2b5a251 MW |
47 | return; |
48 | ||
a98ce5c6 HX |
49 | do { |
50 | unsigned long flags; | |
51 | ||
52 | /* | |
53 | * Wait until we're out of the critical section. This might | |
54 | * give the wrong answer due to the lack of memory barriers. | |
55 | */ | |
32f4125e | 56 | while (irqd_irq_inprogress(&desc->irq_data)) |
a98ce5c6 HX |
57 | cpu_relax(); |
58 | ||
59 | /* Ok, that indicated we're done: double-check carefully. */ | |
239007b8 | 60 | raw_spin_lock_irqsave(&desc->lock, flags); |
32f4125e | 61 | inprogress = irqd_irq_inprogress(&desc->irq_data); |
239007b8 | 62 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
a98ce5c6 HX |
63 | |
64 | /* Oops, that failed? */ | |
32f4125e | 65 | } while (inprogress); |
3aa551c9 TG |
66 | |
67 | /* | |
68 | * We made sure that no hardirq handler is running. Now verify | |
69 | * that no threaded handlers are active. | |
70 | */ | |
71 | wait_event(desc->wait_for_threads, !atomic_read(&desc->threads_active)); | |
1da177e4 | 72 | } |
1da177e4 LT |
73 | EXPORT_SYMBOL(synchronize_irq); |
74 | ||
3aa551c9 TG |
75 | #ifdef CONFIG_SMP |
76 | cpumask_var_t irq_default_affinity; | |
77 | ||
771ee3b0 TG |
78 | /** |
79 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
80 | * @irq: Interrupt to check | |
81 | * | |
82 | */ | |
83 | int irq_can_set_affinity(unsigned int irq) | |
84 | { | |
08678b08 | 85 | struct irq_desc *desc = irq_to_desc(irq); |
771ee3b0 | 86 | |
bce43032 TG |
87 | if (!desc || !irqd_can_balance(&desc->irq_data) || |
88 | !desc->irq_data.chip || !desc->irq_data.chip->irq_set_affinity) | |
771ee3b0 TG |
89 | return 0; |
90 | ||
91 | return 1; | |
92 | } | |
93 | ||
591d2fb0 TG |
94 | /** |
95 | * irq_set_thread_affinity - Notify irq threads to adjust affinity | |
96 | * @desc: irq descriptor which has affitnity changed | |
97 | * | |
98 | * We just set IRQTF_AFFINITY and delegate the affinity setting | |
99 | * to the interrupt thread itself. We can not call | |
100 | * set_cpus_allowed_ptr() here as we hold desc->lock and this | |
101 | * code can be called from hard interrupt context. | |
102 | */ | |
103 | void irq_set_thread_affinity(struct irq_desc *desc) | |
3aa551c9 TG |
104 | { |
105 | struct irqaction *action = desc->action; | |
106 | ||
107 | while (action) { | |
108 | if (action->thread) | |
591d2fb0 | 109 | set_bit(IRQTF_AFFINITY, &action->thread_flags); |
3aa551c9 TG |
110 | action = action->next; |
111 | } | |
112 | } | |
113 | ||
1fa46f1f | 114 | #ifdef CONFIG_GENERIC_PENDING_IRQ |
0ef5ca1e | 115 | static inline bool irq_can_move_pcntxt(struct irq_data *data) |
1fa46f1f | 116 | { |
0ef5ca1e | 117 | return irqd_can_move_in_process_context(data); |
1fa46f1f | 118 | } |
0ef5ca1e | 119 | static inline bool irq_move_pending(struct irq_data *data) |
1fa46f1f | 120 | { |
0ef5ca1e | 121 | return irqd_is_setaffinity_pending(data); |
1fa46f1f TG |
122 | } |
123 | static inline void | |
124 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) | |
125 | { | |
126 | cpumask_copy(desc->pending_mask, mask); | |
127 | } | |
128 | static inline void | |
129 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) | |
130 | { | |
131 | cpumask_copy(mask, desc->pending_mask); | |
132 | } | |
133 | #else | |
0ef5ca1e | 134 | static inline bool irq_can_move_pcntxt(struct irq_data *data) { return true; } |
cd22c0e4 | 135 | static inline bool irq_move_pending(struct irq_data *data) { return false; } |
1fa46f1f TG |
136 | static inline void |
137 | irq_copy_pending(struct irq_desc *desc, const struct cpumask *mask) { } | |
138 | static inline void | |
139 | irq_get_pending(struct cpumask *mask, struct irq_desc *desc) { } | |
140 | #endif | |
141 | ||
c2d0c555 | 142 | int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *mask) |
771ee3b0 | 143 | { |
c2d0c555 DD |
144 | struct irq_chip *chip = irq_data_get_irq_chip(data); |
145 | struct irq_desc *desc = irq_data_to_desc(data); | |
1fa46f1f | 146 | int ret = 0; |
771ee3b0 | 147 | |
c2d0c555 | 148 | if (!chip || !chip->irq_set_affinity) |
771ee3b0 TG |
149 | return -EINVAL; |
150 | ||
0ef5ca1e | 151 | if (irq_can_move_pcntxt(data)) { |
c2d0c555 | 152 | ret = chip->irq_set_affinity(data, mask, false); |
3b8249e7 TG |
153 | switch (ret) { |
154 | case IRQ_SET_MASK_OK: | |
c2d0c555 | 155 | cpumask_copy(data->affinity, mask); |
3b8249e7 | 156 | case IRQ_SET_MASK_OK_NOCOPY: |
591d2fb0 | 157 | irq_set_thread_affinity(desc); |
3b8249e7 | 158 | ret = 0; |
57b150cc | 159 | } |
1fa46f1f | 160 | } else { |
c2d0c555 | 161 | irqd_set_move_pending(data); |
1fa46f1f | 162 | irq_copy_pending(desc, mask); |
57b150cc | 163 | } |
1fa46f1f | 164 | |
cd7eab44 BH |
165 | if (desc->affinity_notify) { |
166 | kref_get(&desc->affinity_notify->kref); | |
167 | schedule_work(&desc->affinity_notify->work); | |
168 | } | |
c2d0c555 DD |
169 | irqd_set(data, IRQD_AFFINITY_SET); |
170 | ||
171 | return ret; | |
172 | } | |
173 | ||
174 | /** | |
175 | * irq_set_affinity - Set the irq affinity of a given irq | |
176 | * @irq: Interrupt to set affinity | |
30398bf6 | 177 | * @mask: cpumask |
c2d0c555 DD |
178 | * |
179 | */ | |
180 | int irq_set_affinity(unsigned int irq, const struct cpumask *mask) | |
181 | { | |
182 | struct irq_desc *desc = irq_to_desc(irq); | |
183 | unsigned long flags; | |
184 | int ret; | |
185 | ||
186 | if (!desc) | |
187 | return -EINVAL; | |
188 | ||
189 | raw_spin_lock_irqsave(&desc->lock, flags); | |
190 | ret = __irq_set_affinity_locked(irq_desc_get_irq_data(desc), mask); | |
239007b8 | 191 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1fa46f1f | 192 | return ret; |
771ee3b0 TG |
193 | } |
194 | ||
e7a297b0 PWJ |
195 | int irq_set_affinity_hint(unsigned int irq, const struct cpumask *m) |
196 | { | |
e7a297b0 | 197 | unsigned long flags; |
31d9d9b6 | 198 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); |
e7a297b0 PWJ |
199 | |
200 | if (!desc) | |
201 | return -EINVAL; | |
e7a297b0 | 202 | desc->affinity_hint = m; |
02725e74 | 203 | irq_put_desc_unlock(desc, flags); |
e7a297b0 PWJ |
204 | return 0; |
205 | } | |
206 | EXPORT_SYMBOL_GPL(irq_set_affinity_hint); | |
207 | ||
cd7eab44 BH |
208 | static void irq_affinity_notify(struct work_struct *work) |
209 | { | |
210 | struct irq_affinity_notify *notify = | |
211 | container_of(work, struct irq_affinity_notify, work); | |
212 | struct irq_desc *desc = irq_to_desc(notify->irq); | |
213 | cpumask_var_t cpumask; | |
214 | unsigned long flags; | |
215 | ||
1fa46f1f | 216 | if (!desc || !alloc_cpumask_var(&cpumask, GFP_KERNEL)) |
cd7eab44 BH |
217 | goto out; |
218 | ||
219 | raw_spin_lock_irqsave(&desc->lock, flags); | |
0ef5ca1e | 220 | if (irq_move_pending(&desc->irq_data)) |
1fa46f1f | 221 | irq_get_pending(cpumask, desc); |
cd7eab44 | 222 | else |
1fb0ef31 | 223 | cpumask_copy(cpumask, desc->irq_data.affinity); |
cd7eab44 BH |
224 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
225 | ||
226 | notify->notify(notify, cpumask); | |
227 | ||
228 | free_cpumask_var(cpumask); | |
229 | out: | |
230 | kref_put(¬ify->kref, notify->release); | |
231 | } | |
232 | ||
233 | /** | |
234 | * irq_set_affinity_notifier - control notification of IRQ affinity changes | |
235 | * @irq: Interrupt for which to enable/disable notification | |
236 | * @notify: Context for notification, or %NULL to disable | |
237 | * notification. Function pointers must be initialised; | |
238 | * the other fields will be initialised by this function. | |
239 | * | |
240 | * Must be called in process context. Notification may only be enabled | |
241 | * after the IRQ is allocated and must be disabled before the IRQ is | |
242 | * freed using free_irq(). | |
243 | */ | |
244 | int | |
245 | irq_set_affinity_notifier(unsigned int irq, struct irq_affinity_notify *notify) | |
246 | { | |
247 | struct irq_desc *desc = irq_to_desc(irq); | |
248 | struct irq_affinity_notify *old_notify; | |
249 | unsigned long flags; | |
250 | ||
251 | /* The release function is promised process context */ | |
252 | might_sleep(); | |
253 | ||
254 | if (!desc) | |
255 | return -EINVAL; | |
256 | ||
257 | /* Complete initialisation of *notify */ | |
258 | if (notify) { | |
259 | notify->irq = irq; | |
260 | kref_init(¬ify->kref); | |
261 | INIT_WORK(¬ify->work, irq_affinity_notify); | |
262 | } | |
263 | ||
264 | raw_spin_lock_irqsave(&desc->lock, flags); | |
265 | old_notify = desc->affinity_notify; | |
266 | desc->affinity_notify = notify; | |
267 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
268 | ||
269 | if (old_notify) | |
270 | kref_put(&old_notify->kref, old_notify->release); | |
271 | ||
272 | return 0; | |
273 | } | |
274 | EXPORT_SYMBOL_GPL(irq_set_affinity_notifier); | |
275 | ||
18404756 MK |
276 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
277 | /* | |
278 | * Generic version of the affinity autoselector. | |
279 | */ | |
3b8249e7 TG |
280 | static int |
281 | setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask) | |
18404756 | 282 | { |
35e857cb | 283 | struct irq_chip *chip = irq_desc_get_chip(desc); |
569bda8d | 284 | struct cpumask *set = irq_default_affinity; |
3b8249e7 | 285 | int ret; |
569bda8d | 286 | |
b008207c | 287 | /* Excludes PER_CPU and NO_BALANCE interrupts */ |
18404756 MK |
288 | if (!irq_can_set_affinity(irq)) |
289 | return 0; | |
290 | ||
f6d87f4b TG |
291 | /* |
292 | * Preserve an userspace affinity setup, but make sure that | |
293 | * one of the targets is online. | |
294 | */ | |
2bdd1055 | 295 | if (irqd_has_set(&desc->irq_data, IRQD_AFFINITY_SET)) { |
569bda8d TG |
296 | if (cpumask_intersects(desc->irq_data.affinity, |
297 | cpu_online_mask)) | |
298 | set = desc->irq_data.affinity; | |
0c6f8a8b | 299 | else |
2bdd1055 | 300 | irqd_clear(&desc->irq_data, IRQD_AFFINITY_SET); |
f6d87f4b | 301 | } |
18404756 | 302 | |
3b8249e7 TG |
303 | cpumask_and(mask, cpu_online_mask, set); |
304 | ret = chip->irq_set_affinity(&desc->irq_data, mask, false); | |
305 | switch (ret) { | |
306 | case IRQ_SET_MASK_OK: | |
307 | cpumask_copy(desc->irq_data.affinity, mask); | |
308 | case IRQ_SET_MASK_OK_NOCOPY: | |
309 | irq_set_thread_affinity(desc); | |
310 | } | |
18404756 MK |
311 | return 0; |
312 | } | |
f6d87f4b | 313 | #else |
3b8249e7 TG |
314 | static inline int |
315 | setup_affinity(unsigned int irq, struct irq_desc *d, struct cpumask *mask) | |
f6d87f4b TG |
316 | { |
317 | return irq_select_affinity(irq); | |
318 | } | |
18404756 MK |
319 | #endif |
320 | ||
f6d87f4b TG |
321 | /* |
322 | * Called when affinity is set via /proc/irq | |
323 | */ | |
3b8249e7 | 324 | int irq_select_affinity_usr(unsigned int irq, struct cpumask *mask) |
f6d87f4b TG |
325 | { |
326 | struct irq_desc *desc = irq_to_desc(irq); | |
327 | unsigned long flags; | |
328 | int ret; | |
329 | ||
239007b8 | 330 | raw_spin_lock_irqsave(&desc->lock, flags); |
3b8249e7 | 331 | ret = setup_affinity(irq, desc, mask); |
239007b8 | 332 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
f6d87f4b TG |
333 | return ret; |
334 | } | |
335 | ||
336 | #else | |
3b8249e7 TG |
337 | static inline int |
338 | setup_affinity(unsigned int irq, struct irq_desc *desc, struct cpumask *mask) | |
f6d87f4b TG |
339 | { |
340 | return 0; | |
341 | } | |
1da177e4 LT |
342 | #endif |
343 | ||
0a0c5168 RW |
344 | void __disable_irq(struct irq_desc *desc, unsigned int irq, bool suspend) |
345 | { | |
346 | if (suspend) { | |
685fd0b4 | 347 | if (!desc->action || (desc->action->flags & IRQF_NO_SUSPEND)) |
0a0c5168 | 348 | return; |
c531e836 | 349 | desc->istate |= IRQS_SUSPENDED; |
0a0c5168 RW |
350 | } |
351 | ||
3aae994f | 352 | if (!desc->depth++) |
87923470 | 353 | irq_disable(desc); |
0a0c5168 RW |
354 | } |
355 | ||
02725e74 TG |
356 | static int __disable_irq_nosync(unsigned int irq) |
357 | { | |
358 | unsigned long flags; | |
31d9d9b6 | 359 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); |
02725e74 TG |
360 | |
361 | if (!desc) | |
362 | return -EINVAL; | |
363 | __disable_irq(desc, irq, false); | |
364 | irq_put_desc_busunlock(desc, flags); | |
365 | return 0; | |
366 | } | |
367 | ||
1da177e4 LT |
368 | /** |
369 | * disable_irq_nosync - disable an irq without waiting | |
370 | * @irq: Interrupt to disable | |
371 | * | |
372 | * Disable the selected interrupt line. Disables and Enables are | |
373 | * nested. | |
374 | * Unlike disable_irq(), this function does not ensure existing | |
375 | * instances of the IRQ handler have completed before returning. | |
376 | * | |
377 | * This function may be called from IRQ context. | |
378 | */ | |
379 | void disable_irq_nosync(unsigned int irq) | |
380 | { | |
02725e74 | 381 | __disable_irq_nosync(irq); |
1da177e4 | 382 | } |
1da177e4 LT |
383 | EXPORT_SYMBOL(disable_irq_nosync); |
384 | ||
385 | /** | |
386 | * disable_irq - disable an irq and wait for completion | |
387 | * @irq: Interrupt to disable | |
388 | * | |
389 | * Disable the selected interrupt line. Enables and Disables are | |
390 | * nested. | |
391 | * This function waits for any pending IRQ handlers for this interrupt | |
392 | * to complete before returning. If you use this function while | |
393 | * holding a resource the IRQ handler may need you will deadlock. | |
394 | * | |
395 | * This function may be called - with care - from IRQ context. | |
396 | */ | |
397 | void disable_irq(unsigned int irq) | |
398 | { | |
02725e74 | 399 | if (!__disable_irq_nosync(irq)) |
1da177e4 LT |
400 | synchronize_irq(irq); |
401 | } | |
1da177e4 LT |
402 | EXPORT_SYMBOL(disable_irq); |
403 | ||
0a0c5168 | 404 | void __enable_irq(struct irq_desc *desc, unsigned int irq, bool resume) |
1adb0850 | 405 | { |
dc5f219e | 406 | if (resume) { |
c531e836 | 407 | if (!(desc->istate & IRQS_SUSPENDED)) { |
dc5f219e TG |
408 | if (!desc->action) |
409 | return; | |
410 | if (!(desc->action->flags & IRQF_FORCE_RESUME)) | |
411 | return; | |
412 | /* Pretend that it got disabled ! */ | |
413 | desc->depth++; | |
414 | } | |
c531e836 | 415 | desc->istate &= ~IRQS_SUSPENDED; |
dc5f219e | 416 | } |
0a0c5168 | 417 | |
1adb0850 TG |
418 | switch (desc->depth) { |
419 | case 0: | |
0a0c5168 | 420 | err_out: |
b8c512f6 | 421 | WARN(1, KERN_WARNING "Unbalanced enable for IRQ %d\n", irq); |
1adb0850 TG |
422 | break; |
423 | case 1: { | |
c531e836 | 424 | if (desc->istate & IRQS_SUSPENDED) |
0a0c5168 | 425 | goto err_out; |
1adb0850 | 426 | /* Prevent probing on this irq: */ |
1ccb4e61 | 427 | irq_settings_set_noprobe(desc); |
3aae994f | 428 | irq_enable(desc); |
1adb0850 TG |
429 | check_irq_resend(desc, irq); |
430 | /* fall-through */ | |
431 | } | |
432 | default: | |
433 | desc->depth--; | |
434 | } | |
435 | } | |
436 | ||
1da177e4 LT |
437 | /** |
438 | * enable_irq - enable handling of an irq | |
439 | * @irq: Interrupt to enable | |
440 | * | |
441 | * Undoes the effect of one call to disable_irq(). If this | |
442 | * matches the last disable, processing of interrupts on this | |
443 | * IRQ line is re-enabled. | |
444 | * | |
70aedd24 | 445 | * This function may be called from IRQ context only when |
6b8ff312 | 446 | * desc->irq_data.chip->bus_lock and desc->chip->bus_sync_unlock are NULL ! |
1da177e4 LT |
447 | */ |
448 | void enable_irq(unsigned int irq) | |
449 | { | |
1da177e4 | 450 | unsigned long flags; |
31d9d9b6 | 451 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); |
1da177e4 | 452 | |
7d94f7ca | 453 | if (!desc) |
c2b5a251 | 454 | return; |
50f7c032 TG |
455 | if (WARN(!desc->irq_data.chip, |
456 | KERN_ERR "enable_irq before setup/request_irq: irq %u\n", irq)) | |
02725e74 | 457 | goto out; |
2656c366 | 458 | |
0a0c5168 | 459 | __enable_irq(desc, irq, false); |
02725e74 TG |
460 | out: |
461 | irq_put_desc_busunlock(desc, flags); | |
1da177e4 | 462 | } |
1da177e4 LT |
463 | EXPORT_SYMBOL(enable_irq); |
464 | ||
0c5d1eb7 | 465 | static int set_irq_wake_real(unsigned int irq, unsigned int on) |
2db87321 | 466 | { |
08678b08 | 467 | struct irq_desc *desc = irq_to_desc(irq); |
2db87321 UKK |
468 | int ret = -ENXIO; |
469 | ||
60f96b41 SS |
470 | if (irq_desc_get_chip(desc)->flags & IRQCHIP_SKIP_SET_WAKE) |
471 | return 0; | |
472 | ||
2f7e99bb TG |
473 | if (desc->irq_data.chip->irq_set_wake) |
474 | ret = desc->irq_data.chip->irq_set_wake(&desc->irq_data, on); | |
2db87321 UKK |
475 | |
476 | return ret; | |
477 | } | |
478 | ||
ba9a2331 | 479 | /** |
a0cd9ca2 | 480 | * irq_set_irq_wake - control irq power management wakeup |
ba9a2331 TG |
481 | * @irq: interrupt to control |
482 | * @on: enable/disable power management wakeup | |
483 | * | |
15a647eb DB |
484 | * Enable/disable power management wakeup mode, which is |
485 | * disabled by default. Enables and disables must match, | |
486 | * just as they match for non-wakeup mode support. | |
487 | * | |
488 | * Wakeup mode lets this IRQ wake the system from sleep | |
489 | * states like "suspend to RAM". | |
ba9a2331 | 490 | */ |
a0cd9ca2 | 491 | int irq_set_irq_wake(unsigned int irq, unsigned int on) |
ba9a2331 | 492 | { |
ba9a2331 | 493 | unsigned long flags; |
31d9d9b6 | 494 | struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL); |
2db87321 | 495 | int ret = 0; |
ba9a2331 | 496 | |
13863a66 JJ |
497 | if (!desc) |
498 | return -EINVAL; | |
499 | ||
15a647eb DB |
500 | /* wakeup-capable irqs can be shared between drivers that |
501 | * don't need to have the same sleep mode behaviors. | |
502 | */ | |
15a647eb | 503 | if (on) { |
2db87321 UKK |
504 | if (desc->wake_depth++ == 0) { |
505 | ret = set_irq_wake_real(irq, on); | |
506 | if (ret) | |
507 | desc->wake_depth = 0; | |
508 | else | |
7f94226f | 509 | irqd_set(&desc->irq_data, IRQD_WAKEUP_STATE); |
2db87321 | 510 | } |
15a647eb DB |
511 | } else { |
512 | if (desc->wake_depth == 0) { | |
7a2c4770 | 513 | WARN(1, "Unbalanced IRQ %d wake disable\n", irq); |
2db87321 UKK |
514 | } else if (--desc->wake_depth == 0) { |
515 | ret = set_irq_wake_real(irq, on); | |
516 | if (ret) | |
517 | desc->wake_depth = 1; | |
518 | else | |
7f94226f | 519 | irqd_clear(&desc->irq_data, IRQD_WAKEUP_STATE); |
2db87321 | 520 | } |
15a647eb | 521 | } |
02725e74 | 522 | irq_put_desc_busunlock(desc, flags); |
ba9a2331 TG |
523 | return ret; |
524 | } | |
a0cd9ca2 | 525 | EXPORT_SYMBOL(irq_set_irq_wake); |
ba9a2331 | 526 | |
1da177e4 LT |
527 | /* |
528 | * Internal function that tells the architecture code whether a | |
529 | * particular irq has been exclusively allocated or is available | |
530 | * for driver use. | |
531 | */ | |
532 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
533 | { | |
cc8c3b78 | 534 | unsigned long flags; |
31d9d9b6 | 535 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0); |
02725e74 | 536 | int canrequest = 0; |
1da177e4 | 537 | |
7d94f7ca YL |
538 | if (!desc) |
539 | return 0; | |
540 | ||
02725e74 TG |
541 | if (irq_settings_can_request(desc)) { |
542 | if (desc->action) | |
543 | if (irqflags & desc->action->flags & IRQF_SHARED) | |
544 | canrequest =1; | |
545 | } | |
546 | irq_put_desc_unlock(desc, flags); | |
547 | return canrequest; | |
1da177e4 LT |
548 | } |
549 | ||
0c5d1eb7 | 550 | int __irq_set_trigger(struct irq_desc *desc, unsigned int irq, |
b2ba2c30 | 551 | unsigned long flags) |
82736f4d | 552 | { |
6b8ff312 | 553 | struct irq_chip *chip = desc->irq_data.chip; |
d4d5e089 | 554 | int ret, unmask = 0; |
82736f4d | 555 | |
b2ba2c30 | 556 | if (!chip || !chip->irq_set_type) { |
82736f4d UKK |
557 | /* |
558 | * IRQF_TRIGGER_* but the PIC does not support multiple | |
559 | * flow-types? | |
560 | */ | |
3ff68a6a | 561 | pr_debug("No set_type function for IRQ %d (%s)\n", irq, |
82736f4d UKK |
562 | chip ? (chip->name ? : "unknown") : "unknown"); |
563 | return 0; | |
564 | } | |
565 | ||
876dbd4c | 566 | flags &= IRQ_TYPE_SENSE_MASK; |
d4d5e089 TG |
567 | |
568 | if (chip->flags & IRQCHIP_SET_TYPE_MASKED) { | |
32f4125e | 569 | if (!irqd_irq_masked(&desc->irq_data)) |
d4d5e089 | 570 | mask_irq(desc); |
32f4125e | 571 | if (!irqd_irq_disabled(&desc->irq_data)) |
d4d5e089 TG |
572 | unmask = 1; |
573 | } | |
574 | ||
f2b662da | 575 | /* caller masked out all except trigger mode flags */ |
b2ba2c30 | 576 | ret = chip->irq_set_type(&desc->irq_data, flags); |
82736f4d | 577 | |
876dbd4c TG |
578 | switch (ret) { |
579 | case IRQ_SET_MASK_OK: | |
580 | irqd_clear(&desc->irq_data, IRQD_TRIGGER_MASK); | |
581 | irqd_set(&desc->irq_data, flags); | |
582 | ||
583 | case IRQ_SET_MASK_OK_NOCOPY: | |
584 | flags = irqd_get_trigger_type(&desc->irq_data); | |
585 | irq_settings_set_trigger_mask(desc, flags); | |
586 | irqd_clear(&desc->irq_data, IRQD_LEVEL); | |
587 | irq_settings_clr_level(desc); | |
588 | if (flags & IRQ_TYPE_LEVEL_MASK) { | |
589 | irq_settings_set_level(desc); | |
590 | irqd_set(&desc->irq_data, IRQD_LEVEL); | |
591 | } | |
46732475 | 592 | |
d4d5e089 | 593 | ret = 0; |
8fff39e0 | 594 | break; |
876dbd4c TG |
595 | default: |
596 | pr_err("setting trigger mode %lu for irq %u failed (%pF)\n", | |
597 | flags, irq, chip->irq_set_type); | |
0c5d1eb7 | 598 | } |
d4d5e089 TG |
599 | if (unmask) |
600 | unmask_irq(desc); | |
82736f4d UKK |
601 | return ret; |
602 | } | |
603 | ||
b25c340c TG |
604 | /* |
605 | * Default primary interrupt handler for threaded interrupts. Is | |
606 | * assigned as primary handler when request_threaded_irq is called | |
607 | * with handler == NULL. Useful for oneshot interrupts. | |
608 | */ | |
609 | static irqreturn_t irq_default_primary_handler(int irq, void *dev_id) | |
610 | { | |
611 | return IRQ_WAKE_THREAD; | |
612 | } | |
613 | ||
399b5da2 TG |
614 | /* |
615 | * Primary handler for nested threaded interrupts. Should never be | |
616 | * called. | |
617 | */ | |
618 | static irqreturn_t irq_nested_primary_handler(int irq, void *dev_id) | |
619 | { | |
620 | WARN(1, "Primary handler called for nested irq %d\n", irq); | |
621 | return IRQ_NONE; | |
622 | } | |
623 | ||
3aa551c9 TG |
624 | static int irq_wait_for_interrupt(struct irqaction *action) |
625 | { | |
550acb19 IY |
626 | set_current_state(TASK_INTERRUPTIBLE); |
627 | ||
3aa551c9 | 628 | while (!kthread_should_stop()) { |
f48fe81e TG |
629 | |
630 | if (test_and_clear_bit(IRQTF_RUNTHREAD, | |
631 | &action->thread_flags)) { | |
3aa551c9 TG |
632 | __set_current_state(TASK_RUNNING); |
633 | return 0; | |
f48fe81e TG |
634 | } |
635 | schedule(); | |
550acb19 | 636 | set_current_state(TASK_INTERRUPTIBLE); |
3aa551c9 | 637 | } |
550acb19 | 638 | __set_current_state(TASK_RUNNING); |
3aa551c9 TG |
639 | return -1; |
640 | } | |
641 | ||
b25c340c TG |
642 | /* |
643 | * Oneshot interrupts keep the irq line masked until the threaded | |
644 | * handler finished. unmask if the interrupt has not been disabled and | |
645 | * is marked MASKED. | |
646 | */ | |
b5faba21 TG |
647 | static void irq_finalize_oneshot(struct irq_desc *desc, |
648 | struct irqaction *action, bool force) | |
b25c340c | 649 | { |
b5faba21 TG |
650 | if (!(desc->istate & IRQS_ONESHOT)) |
651 | return; | |
0b1adaa0 | 652 | again: |
3876ec9e | 653 | chip_bus_lock(desc); |
239007b8 | 654 | raw_spin_lock_irq(&desc->lock); |
0b1adaa0 TG |
655 | |
656 | /* | |
657 | * Implausible though it may be we need to protect us against | |
658 | * the following scenario: | |
659 | * | |
660 | * The thread is faster done than the hard interrupt handler | |
661 | * on the other CPU. If we unmask the irq line then the | |
662 | * interrupt can come in again and masks the line, leaves due | |
009b4c3b | 663 | * to IRQS_INPROGRESS and the irq line is masked forever. |
b5faba21 TG |
664 | * |
665 | * This also serializes the state of shared oneshot handlers | |
666 | * versus "desc->threads_onehsot |= action->thread_mask;" in | |
667 | * irq_wake_thread(). See the comment there which explains the | |
668 | * serialization. | |
0b1adaa0 | 669 | */ |
32f4125e | 670 | if (unlikely(irqd_irq_inprogress(&desc->irq_data))) { |
0b1adaa0 | 671 | raw_spin_unlock_irq(&desc->lock); |
3876ec9e | 672 | chip_bus_sync_unlock(desc); |
0b1adaa0 TG |
673 | cpu_relax(); |
674 | goto again; | |
675 | } | |
676 | ||
b5faba21 TG |
677 | /* |
678 | * Now check again, whether the thread should run. Otherwise | |
679 | * we would clear the threads_oneshot bit of this thread which | |
680 | * was just set. | |
681 | */ | |
682 | if (!force && test_bit(IRQTF_RUNTHREAD, &action->thread_flags)) | |
683 | goto out_unlock; | |
684 | ||
685 | desc->threads_oneshot &= ~action->thread_mask; | |
686 | ||
32f4125e TG |
687 | if (!desc->threads_oneshot && !irqd_irq_disabled(&desc->irq_data) && |
688 | irqd_irq_masked(&desc->irq_data)) | |
689 | unmask_irq(desc); | |
690 | ||
b5faba21 | 691 | out_unlock: |
239007b8 | 692 | raw_spin_unlock_irq(&desc->lock); |
3876ec9e | 693 | chip_bus_sync_unlock(desc); |
b25c340c TG |
694 | } |
695 | ||
61f38261 | 696 | #ifdef CONFIG_SMP |
591d2fb0 | 697 | /* |
d4d5e089 | 698 | * Check whether we need to chasnge the affinity of the interrupt thread. |
591d2fb0 TG |
699 | */ |
700 | static void | |
701 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) | |
702 | { | |
703 | cpumask_var_t mask; | |
704 | ||
705 | if (!test_and_clear_bit(IRQTF_AFFINITY, &action->thread_flags)) | |
706 | return; | |
707 | ||
708 | /* | |
709 | * In case we are out of memory we set IRQTF_AFFINITY again and | |
710 | * try again next time | |
711 | */ | |
712 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { | |
713 | set_bit(IRQTF_AFFINITY, &action->thread_flags); | |
714 | return; | |
715 | } | |
716 | ||
239007b8 | 717 | raw_spin_lock_irq(&desc->lock); |
6b8ff312 | 718 | cpumask_copy(mask, desc->irq_data.affinity); |
239007b8 | 719 | raw_spin_unlock_irq(&desc->lock); |
591d2fb0 TG |
720 | |
721 | set_cpus_allowed_ptr(current, mask); | |
722 | free_cpumask_var(mask); | |
723 | } | |
61f38261 BP |
724 | #else |
725 | static inline void | |
726 | irq_thread_check_affinity(struct irq_desc *desc, struct irqaction *action) { } | |
727 | #endif | |
591d2fb0 | 728 | |
8d32a307 TG |
729 | /* |
730 | * Interrupts which are not explicitely requested as threaded | |
731 | * interrupts rely on the implicit bh/preempt disable of the hard irq | |
732 | * context. So we need to disable bh here to avoid deadlocks and other | |
733 | * side effects. | |
734 | */ | |
3a43e05f | 735 | static irqreturn_t |
8d32a307 TG |
736 | irq_forced_thread_fn(struct irq_desc *desc, struct irqaction *action) |
737 | { | |
3a43e05f SAS |
738 | irqreturn_t ret; |
739 | ||
8d32a307 | 740 | local_bh_disable(); |
3a43e05f | 741 | ret = action->thread_fn(action->irq, action->dev_id); |
8d32a307 TG |
742 | irq_finalize_oneshot(desc, action, false); |
743 | local_bh_enable(); | |
3a43e05f | 744 | return ret; |
8d32a307 TG |
745 | } |
746 | ||
747 | /* | |
748 | * Interrupts explicitely requested as threaded interupts want to be | |
749 | * preemtible - many of them need to sleep and wait for slow busses to | |
750 | * complete. | |
751 | */ | |
3a43e05f SAS |
752 | static irqreturn_t irq_thread_fn(struct irq_desc *desc, |
753 | struct irqaction *action) | |
8d32a307 | 754 | { |
3a43e05f SAS |
755 | irqreturn_t ret; |
756 | ||
757 | ret = action->thread_fn(action->irq, action->dev_id); | |
8d32a307 | 758 | irq_finalize_oneshot(desc, action, false); |
3a43e05f | 759 | return ret; |
8d32a307 TG |
760 | } |
761 | ||
7140ea19 IY |
762 | static void wake_threads_waitq(struct irq_desc *desc) |
763 | { | |
764 | if (atomic_dec_and_test(&desc->threads_active) && | |
765 | waitqueue_active(&desc->wait_for_threads)) | |
766 | wake_up(&desc->wait_for_threads); | |
767 | } | |
768 | ||
3aa551c9 TG |
769 | /* |
770 | * Interrupt handler thread | |
771 | */ | |
772 | static int irq_thread(void *data) | |
773 | { | |
c9b5f501 | 774 | static const struct sched_param param = { |
fe7de49f KM |
775 | .sched_priority = MAX_USER_RT_PRIO/2, |
776 | }; | |
3aa551c9 TG |
777 | struct irqaction *action = data; |
778 | struct irq_desc *desc = irq_to_desc(action->irq); | |
3a43e05f SAS |
779 | irqreturn_t (*handler_fn)(struct irq_desc *desc, |
780 | struct irqaction *action); | |
3aa551c9 | 781 | |
540b60e2 | 782 | if (force_irqthreads && test_bit(IRQTF_FORCED_THREAD, |
8d32a307 TG |
783 | &action->thread_flags)) |
784 | handler_fn = irq_forced_thread_fn; | |
785 | else | |
786 | handler_fn = irq_thread_fn; | |
787 | ||
3aa551c9 | 788 | sched_setscheduler(current, SCHED_FIFO, ¶m); |
4bcdf1d0 | 789 | current->irq_thread = 1; |
3aa551c9 TG |
790 | |
791 | while (!irq_wait_for_interrupt(action)) { | |
7140ea19 | 792 | irqreturn_t action_ret; |
3aa551c9 | 793 | |
591d2fb0 TG |
794 | irq_thread_check_affinity(desc, action); |
795 | ||
7140ea19 IY |
796 | action_ret = handler_fn(desc, action); |
797 | if (!noirqdebug) | |
798 | note_interrupt(action->irq, desc, action_ret); | |
3aa551c9 | 799 | |
7140ea19 | 800 | wake_threads_waitq(desc); |
3aa551c9 TG |
801 | } |
802 | ||
7140ea19 IY |
803 | /* |
804 | * This is the regular exit path. __free_irq() is stopping the | |
805 | * thread via kthread_stop() after calling | |
806 | * synchronize_irq(). So neither IRQTF_RUNTHREAD nor the | |
e04268b0 TG |
807 | * oneshot mask bit can be set. We cannot verify that as we |
808 | * cannot touch the oneshot mask at this point anymore as | |
809 | * __setup_irq() might have given out currents thread_mask | |
810 | * again. | |
7140ea19 | 811 | * |
4bcdf1d0 | 812 | * Clear irq_thread. Otherwise exit_irq_thread() would make |
3aa551c9 TG |
813 | * fuzz about an active irq thread going into nirvana. |
814 | */ | |
4bcdf1d0 | 815 | current->irq_thread = 0; |
3aa551c9 TG |
816 | return 0; |
817 | } | |
818 | ||
819 | /* | |
820 | * Called from do_exit() | |
821 | */ | |
822 | void exit_irq_thread(void) | |
823 | { | |
824 | struct task_struct *tsk = current; | |
b5faba21 | 825 | struct irq_desc *desc; |
4bcdf1d0 | 826 | struct irqaction *action; |
3aa551c9 | 827 | |
4bcdf1d0 | 828 | if (!tsk->irq_thread) |
3aa551c9 TG |
829 | return; |
830 | ||
4bcdf1d0 AG |
831 | action = kthread_data(tsk); |
832 | ||
3aa551c9 TG |
833 | printk(KERN_ERR |
834 | "exiting task \"%s\" (%d) is an active IRQ thread (irq %d)\n", | |
4bcdf1d0 | 835 | tsk->comm ? tsk->comm : "", tsk->pid, action->irq); |
3aa551c9 | 836 | |
4bcdf1d0 | 837 | desc = irq_to_desc(action->irq); |
b5faba21 | 838 | |
7140ea19 IY |
839 | /* |
840 | * If IRQTF_RUNTHREAD is set, we need to decrement | |
841 | * desc->threads_active and wake possible waiters. | |
842 | */ | |
843 | if (test_and_clear_bit(IRQTF_RUNTHREAD, &action->thread_flags)) | |
844 | wake_threads_waitq(desc); | |
845 | ||
5234ffb9 | 846 | /* Prevent a stale desc->threads_oneshot */ |
4bcdf1d0 | 847 | irq_finalize_oneshot(desc, action, true); |
3aa551c9 TG |
848 | } |
849 | ||
8d32a307 TG |
850 | static void irq_setup_forced_threading(struct irqaction *new) |
851 | { | |
852 | if (!force_irqthreads) | |
853 | return; | |
854 | if (new->flags & (IRQF_NO_THREAD | IRQF_PERCPU | IRQF_ONESHOT)) | |
855 | return; | |
856 | ||
857 | new->flags |= IRQF_ONESHOT; | |
858 | ||
859 | if (!new->thread_fn) { | |
860 | set_bit(IRQTF_FORCED_THREAD, &new->thread_flags); | |
861 | new->thread_fn = new->handler; | |
862 | new->handler = irq_default_primary_handler; | |
863 | } | |
864 | } | |
865 | ||
1da177e4 LT |
866 | /* |
867 | * Internal function to register an irqaction - typically used to | |
868 | * allocate special interrupts that are part of the architecture. | |
869 | */ | |
d3c60047 | 870 | static int |
327ec569 | 871 | __setup_irq(unsigned int irq, struct irq_desc *desc, struct irqaction *new) |
1da177e4 | 872 | { |
f17c7545 | 873 | struct irqaction *old, **old_ptr; |
8b126b77 | 874 | const char *old_name = NULL; |
b5faba21 | 875 | unsigned long flags, thread_mask = 0; |
3b8249e7 TG |
876 | int ret, nested, shared = 0; |
877 | cpumask_var_t mask; | |
1da177e4 | 878 | |
7d94f7ca | 879 | if (!desc) |
c2b5a251 MW |
880 | return -EINVAL; |
881 | ||
6b8ff312 | 882 | if (desc->irq_data.chip == &no_irq_chip) |
1da177e4 | 883 | return -ENOSYS; |
b6873807 SAS |
884 | if (!try_module_get(desc->owner)) |
885 | return -ENODEV; | |
1da177e4 LT |
886 | /* |
887 | * Some drivers like serial.c use request_irq() heavily, | |
888 | * so we have to be careful not to interfere with a | |
889 | * running system. | |
890 | */ | |
3cca53b0 | 891 | if (new->flags & IRQF_SAMPLE_RANDOM) { |
1da177e4 LT |
892 | /* |
893 | * This function might sleep, we want to call it first, | |
894 | * outside of the atomic block. | |
895 | * Yes, this might clear the entropy pool if the wrong | |
896 | * driver is attempted to be loaded, without actually | |
897 | * installing a new handler, but is this really a problem, | |
898 | * only the sysadmin is able to do this. | |
899 | */ | |
900 | rand_initialize_irq(irq); | |
901 | } | |
902 | ||
3aa551c9 | 903 | /* |
399b5da2 TG |
904 | * Check whether the interrupt nests into another interrupt |
905 | * thread. | |
906 | */ | |
1ccb4e61 | 907 | nested = irq_settings_is_nested_thread(desc); |
399b5da2 | 908 | if (nested) { |
b6873807 SAS |
909 | if (!new->thread_fn) { |
910 | ret = -EINVAL; | |
911 | goto out_mput; | |
912 | } | |
399b5da2 TG |
913 | /* |
914 | * Replace the primary handler which was provided from | |
915 | * the driver for non nested interrupt handling by the | |
916 | * dummy function which warns when called. | |
917 | */ | |
918 | new->handler = irq_nested_primary_handler; | |
8d32a307 | 919 | } else { |
7f1b1244 PM |
920 | if (irq_settings_can_thread(desc)) |
921 | irq_setup_forced_threading(new); | |
399b5da2 TG |
922 | } |
923 | ||
3aa551c9 | 924 | /* |
399b5da2 TG |
925 | * Create a handler thread when a thread function is supplied |
926 | * and the interrupt does not nest into another interrupt | |
927 | * thread. | |
3aa551c9 | 928 | */ |
399b5da2 | 929 | if (new->thread_fn && !nested) { |
3aa551c9 TG |
930 | struct task_struct *t; |
931 | ||
932 | t = kthread_create(irq_thread, new, "irq/%d-%s", irq, | |
933 | new->name); | |
b6873807 SAS |
934 | if (IS_ERR(t)) { |
935 | ret = PTR_ERR(t); | |
936 | goto out_mput; | |
937 | } | |
3aa551c9 TG |
938 | /* |
939 | * We keep the reference to the task struct even if | |
940 | * the thread dies to avoid that the interrupt code | |
941 | * references an already freed task_struct. | |
942 | */ | |
943 | get_task_struct(t); | |
944 | new->thread = t; | |
3aa551c9 TG |
945 | } |
946 | ||
3b8249e7 TG |
947 | if (!alloc_cpumask_var(&mask, GFP_KERNEL)) { |
948 | ret = -ENOMEM; | |
949 | goto out_thread; | |
950 | } | |
951 | ||
1da177e4 LT |
952 | /* |
953 | * The following block of code has to be executed atomically | |
954 | */ | |
239007b8 | 955 | raw_spin_lock_irqsave(&desc->lock, flags); |
f17c7545 IM |
956 | old_ptr = &desc->action; |
957 | old = *old_ptr; | |
06fcb0c6 | 958 | if (old) { |
e76de9f8 TG |
959 | /* |
960 | * Can't share interrupts unless both agree to and are | |
961 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 962 | * fields must have IRQF_SHARED set and the bits which |
9d591edd TG |
963 | * set the trigger type must match. Also all must |
964 | * agree on ONESHOT. | |
e76de9f8 | 965 | */ |
3cca53b0 | 966 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
9d591edd TG |
967 | ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK) || |
968 | ((old->flags ^ new->flags) & IRQF_ONESHOT)) { | |
8b126b77 | 969 | old_name = old->name; |
f5163427 | 970 | goto mismatch; |
8b126b77 | 971 | } |
f5163427 | 972 | |
f5163427 | 973 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
974 | if ((old->flags & IRQF_PERCPU) != |
975 | (new->flags & IRQF_PERCPU)) | |
f5163427 | 976 | goto mismatch; |
1da177e4 LT |
977 | |
978 | /* add new interrupt at end of irq queue */ | |
979 | do { | |
52abb700 TG |
980 | /* |
981 | * Or all existing action->thread_mask bits, | |
982 | * so we can find the next zero bit for this | |
983 | * new action. | |
984 | */ | |
b5faba21 | 985 | thread_mask |= old->thread_mask; |
f17c7545 IM |
986 | old_ptr = &old->next; |
987 | old = *old_ptr; | |
1da177e4 LT |
988 | } while (old); |
989 | shared = 1; | |
990 | } | |
991 | ||
b5faba21 | 992 | /* |
52abb700 TG |
993 | * Setup the thread mask for this irqaction for ONESHOT. For |
994 | * !ONESHOT irqs the thread mask is 0 so we can avoid a | |
995 | * conditional in irq_wake_thread(). | |
b5faba21 | 996 | */ |
52abb700 TG |
997 | if (new->flags & IRQF_ONESHOT) { |
998 | /* | |
999 | * Unlikely to have 32 resp 64 irqs sharing one line, | |
1000 | * but who knows. | |
1001 | */ | |
1002 | if (thread_mask == ~0UL) { | |
1003 | ret = -EBUSY; | |
1004 | goto out_mask; | |
1005 | } | |
1006 | /* | |
1007 | * The thread_mask for the action is or'ed to | |
1008 | * desc->thread_active to indicate that the | |
1009 | * IRQF_ONESHOT thread handler has been woken, but not | |
1010 | * yet finished. The bit is cleared when a thread | |
1011 | * completes. When all threads of a shared interrupt | |
1012 | * line have completed desc->threads_active becomes | |
1013 | * zero and the interrupt line is unmasked. See | |
1014 | * handle.c:irq_wake_thread() for further information. | |
1015 | * | |
1016 | * If no thread is woken by primary (hard irq context) | |
1017 | * interrupt handlers, then desc->threads_active is | |
1018 | * also checked for zero to unmask the irq line in the | |
1019 | * affected hard irq flow handlers | |
1020 | * (handle_[fasteoi|level]_irq). | |
1021 | * | |
1022 | * The new action gets the first zero bit of | |
1023 | * thread_mask assigned. See the loop above which or's | |
1024 | * all existing action->thread_mask bits. | |
1025 | */ | |
1026 | new->thread_mask = 1 << ffz(thread_mask); | |
b5faba21 | 1027 | } |
b5faba21 | 1028 | |
1da177e4 | 1029 | if (!shared) { |
3aa551c9 TG |
1030 | init_waitqueue_head(&desc->wait_for_threads); |
1031 | ||
e76de9f8 | 1032 | /* Setup the type (level, edge polarity) if configured: */ |
3cca53b0 | 1033 | if (new->flags & IRQF_TRIGGER_MASK) { |
f2b662da DB |
1034 | ret = __irq_set_trigger(desc, irq, |
1035 | new->flags & IRQF_TRIGGER_MASK); | |
82736f4d | 1036 | |
3aa551c9 | 1037 | if (ret) |
3b8249e7 | 1038 | goto out_mask; |
091738a2 | 1039 | } |
6a6de9ef | 1040 | |
009b4c3b | 1041 | desc->istate &= ~(IRQS_AUTODETECT | IRQS_SPURIOUS_DISABLED | \ |
32f4125e TG |
1042 | IRQS_ONESHOT | IRQS_WAITING); |
1043 | irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS); | |
94d39e1f | 1044 | |
a005677b TG |
1045 | if (new->flags & IRQF_PERCPU) { |
1046 | irqd_set(&desc->irq_data, IRQD_PER_CPU); | |
1047 | irq_settings_set_per_cpu(desc); | |
1048 | } | |
6a58fb3b | 1049 | |
b25c340c | 1050 | if (new->flags & IRQF_ONESHOT) |
3d67baec | 1051 | desc->istate |= IRQS_ONESHOT; |
b25c340c | 1052 | |
1ccb4e61 | 1053 | if (irq_settings_can_autoenable(desc)) |
b4bc724e | 1054 | irq_startup(desc, true); |
46999238 | 1055 | else |
e76de9f8 TG |
1056 | /* Undo nested disables: */ |
1057 | desc->depth = 1; | |
18404756 | 1058 | |
612e3684 | 1059 | /* Exclude IRQ from balancing if requested */ |
a005677b TG |
1060 | if (new->flags & IRQF_NOBALANCING) { |
1061 | irq_settings_set_no_balancing(desc); | |
1062 | irqd_set(&desc->irq_data, IRQD_NO_BALANCING); | |
1063 | } | |
612e3684 | 1064 | |
18404756 | 1065 | /* Set default affinity mask once everything is setup */ |
3b8249e7 | 1066 | setup_affinity(irq, desc, mask); |
0c5d1eb7 | 1067 | |
876dbd4c TG |
1068 | } else if (new->flags & IRQF_TRIGGER_MASK) { |
1069 | unsigned int nmsk = new->flags & IRQF_TRIGGER_MASK; | |
1070 | unsigned int omsk = irq_settings_get_trigger_mask(desc); | |
1071 | ||
1072 | if (nmsk != omsk) | |
1073 | /* hope the handler works with current trigger mode */ | |
1074 | pr_warning("IRQ %d uses trigger mode %u; requested %u\n", | |
1075 | irq, nmsk, omsk); | |
1da177e4 | 1076 | } |
82736f4d | 1077 | |
69ab8494 | 1078 | new->irq = irq; |
f17c7545 | 1079 | *old_ptr = new; |
82736f4d | 1080 | |
8528b0f1 LT |
1081 | /* Reset broken irq detection when installing new handler */ |
1082 | desc->irq_count = 0; | |
1083 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
1084 | |
1085 | /* | |
1086 | * Check whether we disabled the irq via the spurious handler | |
1087 | * before. Reenable it and give it another chance. | |
1088 | */ | |
7acdd53e TG |
1089 | if (shared && (desc->istate & IRQS_SPURIOUS_DISABLED)) { |
1090 | desc->istate &= ~IRQS_SPURIOUS_DISABLED; | |
0a0c5168 | 1091 | __enable_irq(desc, irq, false); |
1adb0850 TG |
1092 | } |
1093 | ||
239007b8 | 1094 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 1095 | |
69ab8494 TG |
1096 | /* |
1097 | * Strictly no need to wake it up, but hung_task complains | |
1098 | * when no hard interrupt wakes the thread up. | |
1099 | */ | |
1100 | if (new->thread) | |
1101 | wake_up_process(new->thread); | |
1102 | ||
2c6927a3 | 1103 | register_irq_proc(irq, desc); |
1da177e4 LT |
1104 | new->dir = NULL; |
1105 | register_handler_proc(irq, new); | |
4f5058c3 | 1106 | free_cpumask_var(mask); |
1da177e4 LT |
1107 | |
1108 | return 0; | |
f5163427 DS |
1109 | |
1110 | mismatch: | |
3f050447 | 1111 | #ifdef CONFIG_DEBUG_SHIRQ |
3cca53b0 | 1112 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
e8c4b9d0 | 1113 | printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq); |
8b126b77 AM |
1114 | if (old_name) |
1115 | printk(KERN_ERR "current handler: %s\n", old_name); | |
13e87ec6 AM |
1116 | dump_stack(); |
1117 | } | |
3f050447 | 1118 | #endif |
3aa551c9 TG |
1119 | ret = -EBUSY; |
1120 | ||
3b8249e7 | 1121 | out_mask: |
1c389795 | 1122 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
3b8249e7 TG |
1123 | free_cpumask_var(mask); |
1124 | ||
3aa551c9 | 1125 | out_thread: |
3aa551c9 TG |
1126 | if (new->thread) { |
1127 | struct task_struct *t = new->thread; | |
1128 | ||
1129 | new->thread = NULL; | |
05d74efa | 1130 | kthread_stop(t); |
3aa551c9 TG |
1131 | put_task_struct(t); |
1132 | } | |
b6873807 SAS |
1133 | out_mput: |
1134 | module_put(desc->owner); | |
3aa551c9 | 1135 | return ret; |
1da177e4 LT |
1136 | } |
1137 | ||
d3c60047 TG |
1138 | /** |
1139 | * setup_irq - setup an interrupt | |
1140 | * @irq: Interrupt line to setup | |
1141 | * @act: irqaction for the interrupt | |
1142 | * | |
1143 | * Used to statically setup interrupts in the early boot process. | |
1144 | */ | |
1145 | int setup_irq(unsigned int irq, struct irqaction *act) | |
1146 | { | |
986c011d | 1147 | int retval; |
d3c60047 TG |
1148 | struct irq_desc *desc = irq_to_desc(irq); |
1149 | ||
31d9d9b6 MZ |
1150 | if (WARN_ON(irq_settings_is_per_cpu_devid(desc))) |
1151 | return -EINVAL; | |
986c011d DD |
1152 | chip_bus_lock(desc); |
1153 | retval = __setup_irq(irq, desc, act); | |
1154 | chip_bus_sync_unlock(desc); | |
1155 | ||
1156 | return retval; | |
d3c60047 | 1157 | } |
eb53b4e8 | 1158 | EXPORT_SYMBOL_GPL(setup_irq); |
d3c60047 | 1159 | |
31d9d9b6 | 1160 | /* |
cbf94f06 MD |
1161 | * Internal function to unregister an irqaction - used to free |
1162 | * regular and special interrupts that are part of the architecture. | |
1da177e4 | 1163 | */ |
cbf94f06 | 1164 | static struct irqaction *__free_irq(unsigned int irq, void *dev_id) |
1da177e4 | 1165 | { |
d3c60047 | 1166 | struct irq_desc *desc = irq_to_desc(irq); |
f17c7545 | 1167 | struct irqaction *action, **action_ptr; |
1da177e4 LT |
1168 | unsigned long flags; |
1169 | ||
ae88a23b | 1170 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); |
7d94f7ca | 1171 | |
7d94f7ca | 1172 | if (!desc) |
f21cfb25 | 1173 | return NULL; |
1da177e4 | 1174 | |
239007b8 | 1175 | raw_spin_lock_irqsave(&desc->lock, flags); |
ae88a23b IM |
1176 | |
1177 | /* | |
1178 | * There can be multiple actions per IRQ descriptor, find the right | |
1179 | * one based on the dev_id: | |
1180 | */ | |
f17c7545 | 1181 | action_ptr = &desc->action; |
1da177e4 | 1182 | for (;;) { |
f17c7545 | 1183 | action = *action_ptr; |
1da177e4 | 1184 | |
ae88a23b IM |
1185 | if (!action) { |
1186 | WARN(1, "Trying to free already-free IRQ %d\n", irq); | |
239007b8 | 1187 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 | 1188 | |
f21cfb25 | 1189 | return NULL; |
ae88a23b | 1190 | } |
1da177e4 | 1191 | |
8316e381 IM |
1192 | if (action->dev_id == dev_id) |
1193 | break; | |
f17c7545 | 1194 | action_ptr = &action->next; |
ae88a23b | 1195 | } |
dbce706e | 1196 | |
ae88a23b | 1197 | /* Found it - now remove it from the list of entries: */ |
f17c7545 | 1198 | *action_ptr = action->next; |
ae88a23b IM |
1199 | |
1200 | /* Currently used only by UML, might disappear one day: */ | |
b77d6adc | 1201 | #ifdef CONFIG_IRQ_RELEASE_METHOD |
6b8ff312 TG |
1202 | if (desc->irq_data.chip->release) |
1203 | desc->irq_data.chip->release(irq, dev_id); | |
b77d6adc | 1204 | #endif |
dbce706e | 1205 | |
ae88a23b | 1206 | /* If this was the last handler, shut down the IRQ line: */ |
46999238 TG |
1207 | if (!desc->action) |
1208 | irq_shutdown(desc); | |
3aa551c9 | 1209 | |
e7a297b0 PWJ |
1210 | #ifdef CONFIG_SMP |
1211 | /* make sure affinity_hint is cleaned up */ | |
1212 | if (WARN_ON_ONCE(desc->affinity_hint)) | |
1213 | desc->affinity_hint = NULL; | |
1214 | #endif | |
1215 | ||
239007b8 | 1216 | raw_spin_unlock_irqrestore(&desc->lock, flags); |
ae88a23b IM |
1217 | |
1218 | unregister_handler_proc(irq, action); | |
1219 | ||
1220 | /* Make sure it's not being used on another CPU: */ | |
1221 | synchronize_irq(irq); | |
1da177e4 | 1222 | |
70edcd77 | 1223 | #ifdef CONFIG_DEBUG_SHIRQ |
ae88a23b IM |
1224 | /* |
1225 | * It's a shared IRQ -- the driver ought to be prepared for an IRQ | |
1226 | * event to happen even now it's being freed, so let's make sure that | |
1227 | * is so by doing an extra call to the handler .... | |
1228 | * | |
1229 | * ( We do this after actually deregistering it, to make sure that a | |
1230 | * 'real' IRQ doesn't run in * parallel with our fake. ) | |
1231 | */ | |
1232 | if (action->flags & IRQF_SHARED) { | |
1233 | local_irq_save(flags); | |
1234 | action->handler(irq, dev_id); | |
1235 | local_irq_restore(flags); | |
1da177e4 | 1236 | } |
ae88a23b | 1237 | #endif |
2d860ad7 LT |
1238 | |
1239 | if (action->thread) { | |
05d74efa | 1240 | kthread_stop(action->thread); |
2d860ad7 LT |
1241 | put_task_struct(action->thread); |
1242 | } | |
1243 | ||
b6873807 | 1244 | module_put(desc->owner); |
f21cfb25 MD |
1245 | return action; |
1246 | } | |
1247 | ||
cbf94f06 MD |
1248 | /** |
1249 | * remove_irq - free an interrupt | |
1250 | * @irq: Interrupt line to free | |
1251 | * @act: irqaction for the interrupt | |
1252 | * | |
1253 | * Used to remove interrupts statically setup by the early boot process. | |
1254 | */ | |
1255 | void remove_irq(unsigned int irq, struct irqaction *act) | |
1256 | { | |
31d9d9b6 MZ |
1257 | struct irq_desc *desc = irq_to_desc(irq); |
1258 | ||
1259 | if (desc && !WARN_ON(irq_settings_is_per_cpu_devid(desc))) | |
1260 | __free_irq(irq, act->dev_id); | |
cbf94f06 | 1261 | } |
eb53b4e8 | 1262 | EXPORT_SYMBOL_GPL(remove_irq); |
cbf94f06 | 1263 | |
f21cfb25 MD |
1264 | /** |
1265 | * free_irq - free an interrupt allocated with request_irq | |
1266 | * @irq: Interrupt line to free | |
1267 | * @dev_id: Device identity to free | |
1268 | * | |
1269 | * Remove an interrupt handler. The handler is removed and if the | |
1270 | * interrupt line is no longer in use by any driver it is disabled. | |
1271 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
1272 | * on the card it drives before calling this function. The function | |
1273 | * does not return until any executing interrupts for this IRQ | |
1274 | * have completed. | |
1275 | * | |
1276 | * This function must not be called from interrupt context. | |
1277 | */ | |
1278 | void free_irq(unsigned int irq, void *dev_id) | |
1279 | { | |
70aedd24 TG |
1280 | struct irq_desc *desc = irq_to_desc(irq); |
1281 | ||
31d9d9b6 | 1282 | if (!desc || WARN_ON(irq_settings_is_per_cpu_devid(desc))) |
70aedd24 TG |
1283 | return; |
1284 | ||
cd7eab44 BH |
1285 | #ifdef CONFIG_SMP |
1286 | if (WARN_ON(desc->affinity_notify)) | |
1287 | desc->affinity_notify = NULL; | |
1288 | #endif | |
1289 | ||
3876ec9e | 1290 | chip_bus_lock(desc); |
cbf94f06 | 1291 | kfree(__free_irq(irq, dev_id)); |
3876ec9e | 1292 | chip_bus_sync_unlock(desc); |
1da177e4 | 1293 | } |
1da177e4 LT |
1294 | EXPORT_SYMBOL(free_irq); |
1295 | ||
1296 | /** | |
3aa551c9 | 1297 | * request_threaded_irq - allocate an interrupt line |
1da177e4 | 1298 | * @irq: Interrupt line to allocate |
3aa551c9 TG |
1299 | * @handler: Function to be called when the IRQ occurs. |
1300 | * Primary handler for threaded interrupts | |
b25c340c TG |
1301 | * If NULL and thread_fn != NULL the default |
1302 | * primary handler is installed | |
f48fe81e TG |
1303 | * @thread_fn: Function called from the irq handler thread |
1304 | * If NULL, no irq thread is created | |
1da177e4 LT |
1305 | * @irqflags: Interrupt type flags |
1306 | * @devname: An ascii name for the claiming device | |
1307 | * @dev_id: A cookie passed back to the handler function | |
1308 | * | |
1309 | * This call allocates interrupt resources and enables the | |
1310 | * interrupt line and IRQ handling. From the point this | |
1311 | * call is made your handler function may be invoked. Since | |
1312 | * your handler function must clear any interrupt the board | |
1313 | * raises, you must take care both to initialise your hardware | |
1314 | * and to set up the interrupt handler in the right order. | |
1315 | * | |
3aa551c9 | 1316 | * If you want to set up a threaded irq handler for your device |
6d21af4f | 1317 | * then you need to supply @handler and @thread_fn. @handler is |
3aa551c9 TG |
1318 | * still called in hard interrupt context and has to check |
1319 | * whether the interrupt originates from the device. If yes it | |
1320 | * needs to disable the interrupt on the device and return | |
39a2eddb | 1321 | * IRQ_WAKE_THREAD which will wake up the handler thread and run |
3aa551c9 TG |
1322 | * @thread_fn. This split handler design is necessary to support |
1323 | * shared interrupts. | |
1324 | * | |
1da177e4 LT |
1325 | * Dev_id must be globally unique. Normally the address of the |
1326 | * device data structure is used as the cookie. Since the handler | |
1327 | * receives this value it makes sense to use it. | |
1328 | * | |
1329 | * If your interrupt is shared you must pass a non NULL dev_id | |
1330 | * as this is required when freeing the interrupt. | |
1331 | * | |
1332 | * Flags: | |
1333 | * | |
3cca53b0 | 1334 | * IRQF_SHARED Interrupt is shared |
3cca53b0 | 1335 | * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy |
0c5d1eb7 | 1336 | * IRQF_TRIGGER_* Specify active edge(s) or level |
1da177e4 LT |
1337 | * |
1338 | */ | |
3aa551c9 TG |
1339 | int request_threaded_irq(unsigned int irq, irq_handler_t handler, |
1340 | irq_handler_t thread_fn, unsigned long irqflags, | |
1341 | const char *devname, void *dev_id) | |
1da177e4 | 1342 | { |
06fcb0c6 | 1343 | struct irqaction *action; |
08678b08 | 1344 | struct irq_desc *desc; |
d3c60047 | 1345 | int retval; |
1da177e4 LT |
1346 | |
1347 | /* | |
1348 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
1349 | * otherwise we'll have trouble later trying to figure out | |
1350 | * which interrupt is which (messes up the interrupt freeing | |
1351 | * logic etc). | |
1352 | */ | |
3cca53b0 | 1353 | if ((irqflags & IRQF_SHARED) && !dev_id) |
1da177e4 | 1354 | return -EINVAL; |
7d94f7ca | 1355 | |
cb5bc832 | 1356 | desc = irq_to_desc(irq); |
7d94f7ca | 1357 | if (!desc) |
1da177e4 | 1358 | return -EINVAL; |
7d94f7ca | 1359 | |
31d9d9b6 MZ |
1360 | if (!irq_settings_can_request(desc) || |
1361 | WARN_ON(irq_settings_is_per_cpu_devid(desc))) | |
6550c775 | 1362 | return -EINVAL; |
b25c340c TG |
1363 | |
1364 | if (!handler) { | |
1365 | if (!thread_fn) | |
1366 | return -EINVAL; | |
1367 | handler = irq_default_primary_handler; | |
1368 | } | |
1da177e4 | 1369 | |
45535732 | 1370 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); |
1da177e4 LT |
1371 | if (!action) |
1372 | return -ENOMEM; | |
1373 | ||
1374 | action->handler = handler; | |
3aa551c9 | 1375 | action->thread_fn = thread_fn; |
1da177e4 | 1376 | action->flags = irqflags; |
1da177e4 | 1377 | action->name = devname; |
1da177e4 LT |
1378 | action->dev_id = dev_id; |
1379 | ||
3876ec9e | 1380 | chip_bus_lock(desc); |
d3c60047 | 1381 | retval = __setup_irq(irq, desc, action); |
3876ec9e | 1382 | chip_bus_sync_unlock(desc); |
70aedd24 | 1383 | |
377bf1e4 AV |
1384 | if (retval) |
1385 | kfree(action); | |
1386 | ||
6d83f94d | 1387 | #ifdef CONFIG_DEBUG_SHIRQ_FIXME |
6ce51c43 | 1388 | if (!retval && (irqflags & IRQF_SHARED)) { |
a304e1b8 DW |
1389 | /* |
1390 | * It's a shared IRQ -- the driver ought to be prepared for it | |
1391 | * to happen immediately, so let's make sure.... | |
377bf1e4 AV |
1392 | * We disable the irq to make sure that a 'real' IRQ doesn't |
1393 | * run in parallel with our fake. | |
a304e1b8 | 1394 | */ |
59845b1f | 1395 | unsigned long flags; |
a304e1b8 | 1396 | |
377bf1e4 | 1397 | disable_irq(irq); |
59845b1f | 1398 | local_irq_save(flags); |
377bf1e4 | 1399 | |
59845b1f | 1400 | handler(irq, dev_id); |
377bf1e4 | 1401 | |
59845b1f | 1402 | local_irq_restore(flags); |
377bf1e4 | 1403 | enable_irq(irq); |
a304e1b8 DW |
1404 | } |
1405 | #endif | |
1da177e4 LT |
1406 | return retval; |
1407 | } | |
3aa551c9 | 1408 | EXPORT_SYMBOL(request_threaded_irq); |
ae731f8d MZ |
1409 | |
1410 | /** | |
1411 | * request_any_context_irq - allocate an interrupt line | |
1412 | * @irq: Interrupt line to allocate | |
1413 | * @handler: Function to be called when the IRQ occurs. | |
1414 | * Threaded handler for threaded interrupts. | |
1415 | * @flags: Interrupt type flags | |
1416 | * @name: An ascii name for the claiming device | |
1417 | * @dev_id: A cookie passed back to the handler function | |
1418 | * | |
1419 | * This call allocates interrupt resources and enables the | |
1420 | * interrupt line and IRQ handling. It selects either a | |
1421 | * hardirq or threaded handling method depending on the | |
1422 | * context. | |
1423 | * | |
1424 | * On failure, it returns a negative value. On success, | |
1425 | * it returns either IRQC_IS_HARDIRQ or IRQC_IS_NESTED. | |
1426 | */ | |
1427 | int request_any_context_irq(unsigned int irq, irq_handler_t handler, | |
1428 | unsigned long flags, const char *name, void *dev_id) | |
1429 | { | |
1430 | struct irq_desc *desc = irq_to_desc(irq); | |
1431 | int ret; | |
1432 | ||
1433 | if (!desc) | |
1434 | return -EINVAL; | |
1435 | ||
1ccb4e61 | 1436 | if (irq_settings_is_nested_thread(desc)) { |
ae731f8d MZ |
1437 | ret = request_threaded_irq(irq, NULL, handler, |
1438 | flags, name, dev_id); | |
1439 | return !ret ? IRQC_IS_NESTED : ret; | |
1440 | } | |
1441 | ||
1442 | ret = request_irq(irq, handler, flags, name, dev_id); | |
1443 | return !ret ? IRQC_IS_HARDIRQ : ret; | |
1444 | } | |
1445 | EXPORT_SYMBOL_GPL(request_any_context_irq); | |
31d9d9b6 | 1446 | |
1e7c5fd2 | 1447 | void enable_percpu_irq(unsigned int irq, unsigned int type) |
31d9d9b6 MZ |
1448 | { |
1449 | unsigned int cpu = smp_processor_id(); | |
1450 | unsigned long flags; | |
1451 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU); | |
1452 | ||
1453 | if (!desc) | |
1454 | return; | |
1455 | ||
1e7c5fd2 MZ |
1456 | type &= IRQ_TYPE_SENSE_MASK; |
1457 | if (type != IRQ_TYPE_NONE) { | |
1458 | int ret; | |
1459 | ||
1460 | ret = __irq_set_trigger(desc, irq, type); | |
1461 | ||
1462 | if (ret) { | |
32cffdde | 1463 | WARN(1, "failed to set type for IRQ%d\n", irq); |
1e7c5fd2 MZ |
1464 | goto out; |
1465 | } | |
1466 | } | |
1467 | ||
31d9d9b6 | 1468 | irq_percpu_enable(desc, cpu); |
1e7c5fd2 | 1469 | out: |
31d9d9b6 MZ |
1470 | irq_put_desc_unlock(desc, flags); |
1471 | } | |
1472 | ||
1473 | void disable_percpu_irq(unsigned int irq) | |
1474 | { | |
1475 | unsigned int cpu = smp_processor_id(); | |
1476 | unsigned long flags; | |
1477 | struct irq_desc *desc = irq_get_desc_lock(irq, &flags, IRQ_GET_DESC_CHECK_PERCPU); | |
1478 | ||
1479 | if (!desc) | |
1480 | return; | |
1481 | ||
1482 | irq_percpu_disable(desc, cpu); | |
1483 | irq_put_desc_unlock(desc, flags); | |
1484 | } | |
1485 | ||
1486 | /* | |
1487 | * Internal function to unregister a percpu irqaction. | |
1488 | */ | |
1489 | static struct irqaction *__free_percpu_irq(unsigned int irq, void __percpu *dev_id) | |
1490 | { | |
1491 | struct irq_desc *desc = irq_to_desc(irq); | |
1492 | struct irqaction *action; | |
1493 | unsigned long flags; | |
1494 | ||
1495 | WARN(in_interrupt(), "Trying to free IRQ %d from IRQ context!\n", irq); | |
1496 | ||
1497 | if (!desc) | |
1498 | return NULL; | |
1499 | ||
1500 | raw_spin_lock_irqsave(&desc->lock, flags); | |
1501 | ||
1502 | action = desc->action; | |
1503 | if (!action || action->percpu_dev_id != dev_id) { | |
1504 | WARN(1, "Trying to free already-free IRQ %d\n", irq); | |
1505 | goto bad; | |
1506 | } | |
1507 | ||
1508 | if (!cpumask_empty(desc->percpu_enabled)) { | |
1509 | WARN(1, "percpu IRQ %d still enabled on CPU%d!\n", | |
1510 | irq, cpumask_first(desc->percpu_enabled)); | |
1511 | goto bad; | |
1512 | } | |
1513 | ||
1514 | /* Found it - now remove it from the list of entries: */ | |
1515 | desc->action = NULL; | |
1516 | ||
1517 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
1518 | ||
1519 | unregister_handler_proc(irq, action); | |
1520 | ||
1521 | module_put(desc->owner); | |
1522 | return action; | |
1523 | ||
1524 | bad: | |
1525 | raw_spin_unlock_irqrestore(&desc->lock, flags); | |
1526 | return NULL; | |
1527 | } | |
1528 | ||
1529 | /** | |
1530 | * remove_percpu_irq - free a per-cpu interrupt | |
1531 | * @irq: Interrupt line to free | |
1532 | * @act: irqaction for the interrupt | |
1533 | * | |
1534 | * Used to remove interrupts statically setup by the early boot process. | |
1535 | */ | |
1536 | void remove_percpu_irq(unsigned int irq, struct irqaction *act) | |
1537 | { | |
1538 | struct irq_desc *desc = irq_to_desc(irq); | |
1539 | ||
1540 | if (desc && irq_settings_is_per_cpu_devid(desc)) | |
1541 | __free_percpu_irq(irq, act->percpu_dev_id); | |
1542 | } | |
1543 | ||
1544 | /** | |
1545 | * free_percpu_irq - free an interrupt allocated with request_percpu_irq | |
1546 | * @irq: Interrupt line to free | |
1547 | * @dev_id: Device identity to free | |
1548 | * | |
1549 | * Remove a percpu interrupt handler. The handler is removed, but | |
1550 | * the interrupt line is not disabled. This must be done on each | |
1551 | * CPU before calling this function. The function does not return | |
1552 | * until any executing interrupts for this IRQ have completed. | |
1553 | * | |
1554 | * This function must not be called from interrupt context. | |
1555 | */ | |
1556 | void free_percpu_irq(unsigned int irq, void __percpu *dev_id) | |
1557 | { | |
1558 | struct irq_desc *desc = irq_to_desc(irq); | |
1559 | ||
1560 | if (!desc || !irq_settings_is_per_cpu_devid(desc)) | |
1561 | return; | |
1562 | ||
1563 | chip_bus_lock(desc); | |
1564 | kfree(__free_percpu_irq(irq, dev_id)); | |
1565 | chip_bus_sync_unlock(desc); | |
1566 | } | |
1567 | ||
1568 | /** | |
1569 | * setup_percpu_irq - setup a per-cpu interrupt | |
1570 | * @irq: Interrupt line to setup | |
1571 | * @act: irqaction for the interrupt | |
1572 | * | |
1573 | * Used to statically setup per-cpu interrupts in the early boot process. | |
1574 | */ | |
1575 | int setup_percpu_irq(unsigned int irq, struct irqaction *act) | |
1576 | { | |
1577 | struct irq_desc *desc = irq_to_desc(irq); | |
1578 | int retval; | |
1579 | ||
1580 | if (!desc || !irq_settings_is_per_cpu_devid(desc)) | |
1581 | return -EINVAL; | |
1582 | chip_bus_lock(desc); | |
1583 | retval = __setup_irq(irq, desc, act); | |
1584 | chip_bus_sync_unlock(desc); | |
1585 | ||
1586 | return retval; | |
1587 | } | |
1588 | ||
1589 | /** | |
1590 | * request_percpu_irq - allocate a percpu interrupt line | |
1591 | * @irq: Interrupt line to allocate | |
1592 | * @handler: Function to be called when the IRQ occurs. | |
1593 | * @devname: An ascii name for the claiming device | |
1594 | * @dev_id: A percpu cookie passed back to the handler function | |
1595 | * | |
1596 | * This call allocates interrupt resources, but doesn't | |
1597 | * automatically enable the interrupt. It has to be done on each | |
1598 | * CPU using enable_percpu_irq(). | |
1599 | * | |
1600 | * Dev_id must be globally unique. It is a per-cpu variable, and | |
1601 | * the handler gets called with the interrupted CPU's instance of | |
1602 | * that variable. | |
1603 | */ | |
1604 | int request_percpu_irq(unsigned int irq, irq_handler_t handler, | |
1605 | const char *devname, void __percpu *dev_id) | |
1606 | { | |
1607 | struct irqaction *action; | |
1608 | struct irq_desc *desc; | |
1609 | int retval; | |
1610 | ||
1611 | if (!dev_id) | |
1612 | return -EINVAL; | |
1613 | ||
1614 | desc = irq_to_desc(irq); | |
1615 | if (!desc || !irq_settings_can_request(desc) || | |
1616 | !irq_settings_is_per_cpu_devid(desc)) | |
1617 | return -EINVAL; | |
1618 | ||
1619 | action = kzalloc(sizeof(struct irqaction), GFP_KERNEL); | |
1620 | if (!action) | |
1621 | return -ENOMEM; | |
1622 | ||
1623 | action->handler = handler; | |
2ed0e645 | 1624 | action->flags = IRQF_PERCPU | IRQF_NO_SUSPEND; |
31d9d9b6 MZ |
1625 | action->name = devname; |
1626 | action->percpu_dev_id = dev_id; | |
1627 | ||
1628 | chip_bus_lock(desc); | |
1629 | retval = __setup_irq(irq, desc, action); | |
1630 | chip_bus_sync_unlock(desc); | |
1631 | ||
1632 | if (retval) | |
1633 | kfree(action); | |
1634 | ||
1635 | return retval; | |
1636 | } |