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1da177e4 LT |
1 | /* |
2 | * linux/kernel/irq/manage.c | |
3 | * | |
a34db9b2 IM |
4 | * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar |
5 | * Copyright (C) 2005-2006 Thomas Gleixner | |
1da177e4 LT |
6 | * |
7 | * This file contains driver APIs to the irq subsystem. | |
8 | */ | |
9 | ||
10 | #include <linux/irq.h> | |
11 | #include <linux/module.h> | |
12 | #include <linux/random.h> | |
13 | #include <linux/interrupt.h> | |
1aeb272c | 14 | #include <linux/slab.h> |
1da177e4 LT |
15 | |
16 | #include "internals.h" | |
17 | ||
18 | #ifdef CONFIG_SMP | |
19 | ||
18404756 MK |
20 | cpumask_t irq_default_affinity = CPU_MASK_ALL; |
21 | ||
1da177e4 LT |
22 | /** |
23 | * synchronize_irq - wait for pending IRQ handlers (on other CPUs) | |
1e5d5331 | 24 | * @irq: interrupt number to wait for |
1da177e4 LT |
25 | * |
26 | * This function waits for any pending IRQ handlers for this interrupt | |
27 | * to complete before returning. If you use this function while | |
28 | * holding a resource the IRQ handler may need you will deadlock. | |
29 | * | |
30 | * This function may be called - with care - from IRQ context. | |
31 | */ | |
32 | void synchronize_irq(unsigned int irq) | |
33 | { | |
34 | struct irq_desc *desc = irq_desc + irq; | |
a98ce5c6 | 35 | unsigned int status; |
1da177e4 | 36 | |
c2b5a251 MW |
37 | if (irq >= NR_IRQS) |
38 | return; | |
39 | ||
a98ce5c6 HX |
40 | do { |
41 | unsigned long flags; | |
42 | ||
43 | /* | |
44 | * Wait until we're out of the critical section. This might | |
45 | * give the wrong answer due to the lack of memory barriers. | |
46 | */ | |
47 | while (desc->status & IRQ_INPROGRESS) | |
48 | cpu_relax(); | |
49 | ||
50 | /* Ok, that indicated we're done: double-check carefully. */ | |
51 | spin_lock_irqsave(&desc->lock, flags); | |
52 | status = desc->status; | |
53 | spin_unlock_irqrestore(&desc->lock, flags); | |
54 | ||
55 | /* Oops, that failed? */ | |
56 | } while (status & IRQ_INPROGRESS); | |
1da177e4 | 57 | } |
1da177e4 LT |
58 | EXPORT_SYMBOL(synchronize_irq); |
59 | ||
771ee3b0 TG |
60 | /** |
61 | * irq_can_set_affinity - Check if the affinity of a given irq can be set | |
62 | * @irq: Interrupt to check | |
63 | * | |
64 | */ | |
65 | int irq_can_set_affinity(unsigned int irq) | |
66 | { | |
67 | struct irq_desc *desc = irq_desc + irq; | |
68 | ||
69 | if (CHECK_IRQ_PER_CPU(desc->status) || !desc->chip || | |
70 | !desc->chip->set_affinity) | |
71 | return 0; | |
72 | ||
73 | return 1; | |
74 | } | |
75 | ||
76 | /** | |
77 | * irq_set_affinity - Set the irq affinity of a given irq | |
78 | * @irq: Interrupt to set affinity | |
79 | * @cpumask: cpumask | |
80 | * | |
81 | */ | |
82 | int irq_set_affinity(unsigned int irq, cpumask_t cpumask) | |
83 | { | |
84 | struct irq_desc *desc = irq_desc + irq; | |
85 | ||
86 | if (!desc->chip->set_affinity) | |
87 | return -EINVAL; | |
88 | ||
89 | set_balance_irq_affinity(irq, cpumask); | |
90 | ||
91 | #ifdef CONFIG_GENERIC_PENDING_IRQ | |
92 | set_pending_irq(irq, cpumask); | |
93 | #else | |
94 | desc->affinity = cpumask; | |
95 | desc->chip->set_affinity(irq, cpumask); | |
96 | #endif | |
97 | return 0; | |
98 | } | |
99 | ||
18404756 MK |
100 | #ifndef CONFIG_AUTO_IRQ_AFFINITY |
101 | /* | |
102 | * Generic version of the affinity autoselector. | |
103 | */ | |
104 | int irq_select_affinity(unsigned int irq) | |
105 | { | |
106 | cpumask_t mask; | |
107 | ||
108 | if (!irq_can_set_affinity(irq)) | |
109 | return 0; | |
110 | ||
111 | cpus_and(mask, cpu_online_map, irq_default_affinity); | |
112 | ||
113 | irq_desc[irq].affinity = mask; | |
114 | irq_desc[irq].chip->set_affinity(irq, mask); | |
115 | ||
116 | set_balance_irq_affinity(irq, mask); | |
117 | return 0; | |
118 | } | |
119 | #endif | |
120 | ||
1da177e4 LT |
121 | #endif |
122 | ||
123 | /** | |
124 | * disable_irq_nosync - disable an irq without waiting | |
125 | * @irq: Interrupt to disable | |
126 | * | |
127 | * Disable the selected interrupt line. Disables and Enables are | |
128 | * nested. | |
129 | * Unlike disable_irq(), this function does not ensure existing | |
130 | * instances of the IRQ handler have completed before returning. | |
131 | * | |
132 | * This function may be called from IRQ context. | |
133 | */ | |
134 | void disable_irq_nosync(unsigned int irq) | |
135 | { | |
34ffdb72 | 136 | struct irq_desc *desc = irq_desc + irq; |
1da177e4 LT |
137 | unsigned long flags; |
138 | ||
c2b5a251 MW |
139 | if (irq >= NR_IRQS) |
140 | return; | |
141 | ||
1da177e4 LT |
142 | spin_lock_irqsave(&desc->lock, flags); |
143 | if (!desc->depth++) { | |
144 | desc->status |= IRQ_DISABLED; | |
d1bef4ed | 145 | desc->chip->disable(irq); |
1da177e4 LT |
146 | } |
147 | spin_unlock_irqrestore(&desc->lock, flags); | |
148 | } | |
1da177e4 LT |
149 | EXPORT_SYMBOL(disable_irq_nosync); |
150 | ||
151 | /** | |
152 | * disable_irq - disable an irq and wait for completion | |
153 | * @irq: Interrupt to disable | |
154 | * | |
155 | * Disable the selected interrupt line. Enables and Disables are | |
156 | * nested. | |
157 | * This function waits for any pending IRQ handlers for this interrupt | |
158 | * to complete before returning. If you use this function while | |
159 | * holding a resource the IRQ handler may need you will deadlock. | |
160 | * | |
161 | * This function may be called - with care - from IRQ context. | |
162 | */ | |
163 | void disable_irq(unsigned int irq) | |
164 | { | |
34ffdb72 | 165 | struct irq_desc *desc = irq_desc + irq; |
1da177e4 | 166 | |
c2b5a251 MW |
167 | if (irq >= NR_IRQS) |
168 | return; | |
169 | ||
1da177e4 LT |
170 | disable_irq_nosync(irq); |
171 | if (desc->action) | |
172 | synchronize_irq(irq); | |
173 | } | |
1da177e4 LT |
174 | EXPORT_SYMBOL(disable_irq); |
175 | ||
1adb0850 TG |
176 | static void __enable_irq(struct irq_desc *desc, unsigned int irq) |
177 | { | |
178 | switch (desc->depth) { | |
179 | case 0: | |
180 | printk(KERN_WARNING "Unbalanced enable for IRQ %d\n", irq); | |
181 | WARN_ON(1); | |
182 | break; | |
183 | case 1: { | |
184 | unsigned int status = desc->status & ~IRQ_DISABLED; | |
185 | ||
186 | /* Prevent probing on this irq: */ | |
187 | desc->status = status | IRQ_NOPROBE; | |
188 | check_irq_resend(desc, irq); | |
189 | /* fall-through */ | |
190 | } | |
191 | default: | |
192 | desc->depth--; | |
193 | } | |
194 | } | |
195 | ||
1da177e4 LT |
196 | /** |
197 | * enable_irq - enable handling of an irq | |
198 | * @irq: Interrupt to enable | |
199 | * | |
200 | * Undoes the effect of one call to disable_irq(). If this | |
201 | * matches the last disable, processing of interrupts on this | |
202 | * IRQ line is re-enabled. | |
203 | * | |
204 | * This function may be called from IRQ context. | |
205 | */ | |
206 | void enable_irq(unsigned int irq) | |
207 | { | |
34ffdb72 | 208 | struct irq_desc *desc = irq_desc + irq; |
1da177e4 LT |
209 | unsigned long flags; |
210 | ||
c2b5a251 MW |
211 | if (irq >= NR_IRQS) |
212 | return; | |
213 | ||
1da177e4 | 214 | spin_lock_irqsave(&desc->lock, flags); |
1adb0850 | 215 | __enable_irq(desc, irq); |
1da177e4 LT |
216 | spin_unlock_irqrestore(&desc->lock, flags); |
217 | } | |
1da177e4 LT |
218 | EXPORT_SYMBOL(enable_irq); |
219 | ||
ba9a2331 TG |
220 | /** |
221 | * set_irq_wake - control irq power management wakeup | |
222 | * @irq: interrupt to control | |
223 | * @on: enable/disable power management wakeup | |
224 | * | |
15a647eb DB |
225 | * Enable/disable power management wakeup mode, which is |
226 | * disabled by default. Enables and disables must match, | |
227 | * just as they match for non-wakeup mode support. | |
228 | * | |
229 | * Wakeup mode lets this IRQ wake the system from sleep | |
230 | * states like "suspend to RAM". | |
ba9a2331 TG |
231 | */ |
232 | int set_irq_wake(unsigned int irq, unsigned int on) | |
233 | { | |
234 | struct irq_desc *desc = irq_desc + irq; | |
235 | unsigned long flags; | |
236 | int ret = -ENXIO; | |
15a647eb | 237 | int (*set_wake)(unsigned, unsigned) = desc->chip->set_wake; |
ba9a2331 | 238 | |
15a647eb DB |
239 | /* wakeup-capable irqs can be shared between drivers that |
240 | * don't need to have the same sleep mode behaviors. | |
241 | */ | |
ba9a2331 | 242 | spin_lock_irqsave(&desc->lock, flags); |
15a647eb DB |
243 | if (on) { |
244 | if (desc->wake_depth++ == 0) | |
245 | desc->status |= IRQ_WAKEUP; | |
246 | else | |
247 | set_wake = NULL; | |
248 | } else { | |
249 | if (desc->wake_depth == 0) { | |
250 | printk(KERN_WARNING "Unbalanced IRQ %d " | |
251 | "wake disable\n", irq); | |
252 | WARN_ON(1); | |
253 | } else if (--desc->wake_depth == 0) | |
254 | desc->status &= ~IRQ_WAKEUP; | |
255 | else | |
256 | set_wake = NULL; | |
257 | } | |
258 | if (set_wake) | |
ba9a2331 TG |
259 | ret = desc->chip->set_wake(irq, on); |
260 | spin_unlock_irqrestore(&desc->lock, flags); | |
261 | return ret; | |
262 | } | |
263 | EXPORT_SYMBOL(set_irq_wake); | |
264 | ||
1da177e4 LT |
265 | /* |
266 | * Internal function that tells the architecture code whether a | |
267 | * particular irq has been exclusively allocated or is available | |
268 | * for driver use. | |
269 | */ | |
270 | int can_request_irq(unsigned int irq, unsigned long irqflags) | |
271 | { | |
272 | struct irqaction *action; | |
273 | ||
6550c775 | 274 | if (irq >= NR_IRQS || irq_desc[irq].status & IRQ_NOREQUEST) |
1da177e4 LT |
275 | return 0; |
276 | ||
277 | action = irq_desc[irq].action; | |
278 | if (action) | |
3cca53b0 | 279 | if (irqflags & action->flags & IRQF_SHARED) |
1da177e4 LT |
280 | action = NULL; |
281 | ||
282 | return !action; | |
283 | } | |
284 | ||
6a6de9ef TG |
285 | void compat_irq_chip_set_default_handler(struct irq_desc *desc) |
286 | { | |
287 | /* | |
288 | * If the architecture still has not overriden | |
289 | * the flow handler then zap the default. This | |
290 | * should catch incorrect flow-type setting. | |
291 | */ | |
292 | if (desc->handle_irq == &handle_bad_irq) | |
293 | desc->handle_irq = NULL; | |
294 | } | |
295 | ||
1da177e4 LT |
296 | /* |
297 | * Internal function to register an irqaction - typically used to | |
298 | * allocate special interrupts that are part of the architecture. | |
299 | */ | |
06fcb0c6 | 300 | int setup_irq(unsigned int irq, struct irqaction *new) |
1da177e4 LT |
301 | { |
302 | struct irq_desc *desc = irq_desc + irq; | |
303 | struct irqaction *old, **p; | |
8b126b77 | 304 | const char *old_name = NULL; |
1da177e4 LT |
305 | unsigned long flags; |
306 | int shared = 0; | |
307 | ||
c2b5a251 MW |
308 | if (irq >= NR_IRQS) |
309 | return -EINVAL; | |
310 | ||
f1c2662c | 311 | if (desc->chip == &no_irq_chip) |
1da177e4 LT |
312 | return -ENOSYS; |
313 | /* | |
314 | * Some drivers like serial.c use request_irq() heavily, | |
315 | * so we have to be careful not to interfere with a | |
316 | * running system. | |
317 | */ | |
3cca53b0 | 318 | if (new->flags & IRQF_SAMPLE_RANDOM) { |
1da177e4 LT |
319 | /* |
320 | * This function might sleep, we want to call it first, | |
321 | * outside of the atomic block. | |
322 | * Yes, this might clear the entropy pool if the wrong | |
323 | * driver is attempted to be loaded, without actually | |
324 | * installing a new handler, but is this really a problem, | |
325 | * only the sysadmin is able to do this. | |
326 | */ | |
327 | rand_initialize_irq(irq); | |
328 | } | |
329 | ||
330 | /* | |
331 | * The following block of code has to be executed atomically | |
332 | */ | |
06fcb0c6 | 333 | spin_lock_irqsave(&desc->lock, flags); |
1da177e4 | 334 | p = &desc->action; |
06fcb0c6 IM |
335 | old = *p; |
336 | if (old) { | |
e76de9f8 TG |
337 | /* |
338 | * Can't share interrupts unless both agree to and are | |
339 | * the same type (level, edge, polarity). So both flag | |
3cca53b0 | 340 | * fields must have IRQF_SHARED set and the bits which |
e76de9f8 TG |
341 | * set the trigger type must match. |
342 | */ | |
3cca53b0 | 343 | if (!((old->flags & new->flags) & IRQF_SHARED) || |
8b126b77 AM |
344 | ((old->flags ^ new->flags) & IRQF_TRIGGER_MASK)) { |
345 | old_name = old->name; | |
f5163427 | 346 | goto mismatch; |
8b126b77 | 347 | } |
f5163427 | 348 | |
284c6680 | 349 | #if defined(CONFIG_IRQ_PER_CPU) |
f5163427 | 350 | /* All handlers must agree on per-cpuness */ |
3cca53b0 TG |
351 | if ((old->flags & IRQF_PERCPU) != |
352 | (new->flags & IRQF_PERCPU)) | |
f5163427 DS |
353 | goto mismatch; |
354 | #endif | |
1da177e4 LT |
355 | |
356 | /* add new interrupt at end of irq queue */ | |
357 | do { | |
358 | p = &old->next; | |
359 | old = *p; | |
360 | } while (old); | |
361 | shared = 1; | |
362 | } | |
363 | ||
364 | *p = new; | |
f75d222b | 365 | |
950f4427 TG |
366 | /* Exclude IRQ from balancing */ |
367 | if (new->flags & IRQF_NOBALANCING) | |
368 | desc->status |= IRQ_NO_BALANCING; | |
369 | ||
1da177e4 | 370 | if (!shared) { |
6a6de9ef | 371 | irq_chip_set_defaults(desc->chip); |
e76de9f8 | 372 | |
f75d222b AD |
373 | #if defined(CONFIG_IRQ_PER_CPU) |
374 | if (new->flags & IRQF_PERCPU) | |
375 | desc->status |= IRQ_PER_CPU; | |
376 | #endif | |
377 | ||
e76de9f8 | 378 | /* Setup the type (level, edge polarity) if configured: */ |
3cca53b0 | 379 | if (new->flags & IRQF_TRIGGER_MASK) { |
48627d8d | 380 | if (desc->chip->set_type) |
e76de9f8 | 381 | desc->chip->set_type(irq, |
3cca53b0 | 382 | new->flags & IRQF_TRIGGER_MASK); |
e76de9f8 TG |
383 | else |
384 | /* | |
3cca53b0 | 385 | * IRQF_TRIGGER_* but the PIC does not support |
e76de9f8 TG |
386 | * multiple flow-types? |
387 | */ | |
3cca53b0 | 388 | printk(KERN_WARNING "No IRQF_TRIGGER set_type " |
e8c4b9d0 | 389 | "function for IRQ %d (%s)\n", irq, |
48627d8d | 390 | desc->chip->name); |
e76de9f8 TG |
391 | } else |
392 | compat_irq_chip_set_default_handler(desc); | |
6a6de9ef | 393 | |
94d39e1f | 394 | desc->status &= ~(IRQ_AUTODETECT | IRQ_WAITING | |
1adb0850 | 395 | IRQ_INPROGRESS | IRQ_SPURIOUS_DISABLED); |
94d39e1f TG |
396 | |
397 | if (!(desc->status & IRQ_NOAUTOEN)) { | |
398 | desc->depth = 0; | |
399 | desc->status &= ~IRQ_DISABLED; | |
400 | if (desc->chip->startup) | |
401 | desc->chip->startup(irq); | |
402 | else | |
403 | desc->chip->enable(irq); | |
e76de9f8 TG |
404 | } else |
405 | /* Undo nested disables: */ | |
406 | desc->depth = 1; | |
18404756 MK |
407 | |
408 | /* Set default affinity mask once everything is setup */ | |
409 | irq_select_affinity(irq); | |
1da177e4 | 410 | } |
8528b0f1 LT |
411 | /* Reset broken irq detection when installing new handler */ |
412 | desc->irq_count = 0; | |
413 | desc->irqs_unhandled = 0; | |
1adb0850 TG |
414 | |
415 | /* | |
416 | * Check whether we disabled the irq via the spurious handler | |
417 | * before. Reenable it and give it another chance. | |
418 | */ | |
419 | if (shared && (desc->status & IRQ_SPURIOUS_DISABLED)) { | |
420 | desc->status &= ~IRQ_SPURIOUS_DISABLED; | |
421 | __enable_irq(desc, irq); | |
422 | } | |
423 | ||
06fcb0c6 | 424 | spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
425 | |
426 | new->irq = irq; | |
427 | register_irq_proc(irq); | |
428 | new->dir = NULL; | |
429 | register_handler_proc(irq, new); | |
430 | ||
431 | return 0; | |
f5163427 DS |
432 | |
433 | mismatch: | |
3f050447 | 434 | #ifdef CONFIG_DEBUG_SHIRQ |
3cca53b0 | 435 | if (!(new->flags & IRQF_PROBE_SHARED)) { |
e8c4b9d0 | 436 | printk(KERN_ERR "IRQ handler type mismatch for IRQ %d\n", irq); |
8b126b77 AM |
437 | if (old_name) |
438 | printk(KERN_ERR "current handler: %s\n", old_name); | |
13e87ec6 AM |
439 | dump_stack(); |
440 | } | |
3f050447 | 441 | #endif |
8b126b77 | 442 | spin_unlock_irqrestore(&desc->lock, flags); |
f5163427 | 443 | return -EBUSY; |
1da177e4 LT |
444 | } |
445 | ||
446 | /** | |
447 | * free_irq - free an interrupt | |
448 | * @irq: Interrupt line to free | |
449 | * @dev_id: Device identity to free | |
450 | * | |
451 | * Remove an interrupt handler. The handler is removed and if the | |
452 | * interrupt line is no longer in use by any driver it is disabled. | |
453 | * On a shared IRQ the caller must ensure the interrupt is disabled | |
454 | * on the card it drives before calling this function. The function | |
455 | * does not return until any executing interrupts for this IRQ | |
456 | * have completed. | |
457 | * | |
458 | * This function must not be called from interrupt context. | |
459 | */ | |
460 | void free_irq(unsigned int irq, void *dev_id) | |
461 | { | |
462 | struct irq_desc *desc; | |
463 | struct irqaction **p; | |
464 | unsigned long flags; | |
465 | ||
cd7b24bb | 466 | WARN_ON(in_interrupt()); |
1da177e4 LT |
467 | if (irq >= NR_IRQS) |
468 | return; | |
469 | ||
470 | desc = irq_desc + irq; | |
06fcb0c6 | 471 | spin_lock_irqsave(&desc->lock, flags); |
1da177e4 LT |
472 | p = &desc->action; |
473 | for (;;) { | |
06fcb0c6 | 474 | struct irqaction *action = *p; |
1da177e4 LT |
475 | |
476 | if (action) { | |
477 | struct irqaction **pp = p; | |
478 | ||
479 | p = &action->next; | |
480 | if (action->dev_id != dev_id) | |
481 | continue; | |
482 | ||
483 | /* Found it - now remove it from the list of entries */ | |
484 | *pp = action->next; | |
dbce706e | 485 | |
b77d6adc PBG |
486 | /* Currently used only by UML, might disappear one day.*/ |
487 | #ifdef CONFIG_IRQ_RELEASE_METHOD | |
d1bef4ed IM |
488 | if (desc->chip->release) |
489 | desc->chip->release(irq, dev_id); | |
b77d6adc | 490 | #endif |
dbce706e | 491 | |
1da177e4 LT |
492 | if (!desc->action) { |
493 | desc->status |= IRQ_DISABLED; | |
d1bef4ed IM |
494 | if (desc->chip->shutdown) |
495 | desc->chip->shutdown(irq); | |
1da177e4 | 496 | else |
d1bef4ed | 497 | desc->chip->disable(irq); |
1da177e4 | 498 | } |
06fcb0c6 | 499 | spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
500 | unregister_handler_proc(irq, action); |
501 | ||
502 | /* Make sure it's not being used on another CPU */ | |
503 | synchronize_irq(irq); | |
1d99493b DW |
504 | #ifdef CONFIG_DEBUG_SHIRQ |
505 | /* | |
506 | * It's a shared IRQ -- the driver ought to be | |
507 | * prepared for it to happen even now it's | |
508 | * being freed, so let's make sure.... We do | |
509 | * this after actually deregistering it, to | |
510 | * make sure that a 'real' IRQ doesn't run in | |
511 | * parallel with our fake | |
512 | */ | |
513 | if (action->flags & IRQF_SHARED) { | |
514 | local_irq_save(flags); | |
515 | action->handler(irq, dev_id); | |
516 | local_irq_restore(flags); | |
517 | } | |
518 | #endif | |
1da177e4 LT |
519 | kfree(action); |
520 | return; | |
521 | } | |
e8c4b9d0 | 522 | printk(KERN_ERR "Trying to free already-free IRQ %d\n", irq); |
70edcd77 IM |
523 | #ifdef CONFIG_DEBUG_SHIRQ |
524 | dump_stack(); | |
525 | #endif | |
06fcb0c6 | 526 | spin_unlock_irqrestore(&desc->lock, flags); |
1da177e4 LT |
527 | return; |
528 | } | |
529 | } | |
1da177e4 LT |
530 | EXPORT_SYMBOL(free_irq); |
531 | ||
532 | /** | |
533 | * request_irq - allocate an interrupt line | |
534 | * @irq: Interrupt line to allocate | |
535 | * @handler: Function to be called when the IRQ occurs | |
536 | * @irqflags: Interrupt type flags | |
537 | * @devname: An ascii name for the claiming device | |
538 | * @dev_id: A cookie passed back to the handler function | |
539 | * | |
540 | * This call allocates interrupt resources and enables the | |
541 | * interrupt line and IRQ handling. From the point this | |
542 | * call is made your handler function may be invoked. Since | |
543 | * your handler function must clear any interrupt the board | |
544 | * raises, you must take care both to initialise your hardware | |
545 | * and to set up the interrupt handler in the right order. | |
546 | * | |
547 | * Dev_id must be globally unique. Normally the address of the | |
548 | * device data structure is used as the cookie. Since the handler | |
549 | * receives this value it makes sense to use it. | |
550 | * | |
551 | * If your interrupt is shared you must pass a non NULL dev_id | |
552 | * as this is required when freeing the interrupt. | |
553 | * | |
554 | * Flags: | |
555 | * | |
3cca53b0 TG |
556 | * IRQF_SHARED Interrupt is shared |
557 | * IRQF_DISABLED Disable local interrupts while processing | |
558 | * IRQF_SAMPLE_RANDOM The interrupt can be used for entropy | |
1da177e4 LT |
559 | * |
560 | */ | |
da482792 | 561 | int request_irq(unsigned int irq, irq_handler_t handler, |
06fcb0c6 | 562 | unsigned long irqflags, const char *devname, void *dev_id) |
1da177e4 | 563 | { |
06fcb0c6 | 564 | struct irqaction *action; |
1da177e4 LT |
565 | int retval; |
566 | ||
fbb9ce95 IM |
567 | #ifdef CONFIG_LOCKDEP |
568 | /* | |
569 | * Lockdep wants atomic interrupt handlers: | |
570 | */ | |
38515e90 | 571 | irqflags |= IRQF_DISABLED; |
fbb9ce95 | 572 | #endif |
1da177e4 LT |
573 | /* |
574 | * Sanity-check: shared interrupts must pass in a real dev-ID, | |
575 | * otherwise we'll have trouble later trying to figure out | |
576 | * which interrupt is which (messes up the interrupt freeing | |
577 | * logic etc). | |
578 | */ | |
3cca53b0 | 579 | if ((irqflags & IRQF_SHARED) && !dev_id) |
1da177e4 LT |
580 | return -EINVAL; |
581 | if (irq >= NR_IRQS) | |
582 | return -EINVAL; | |
6550c775 TG |
583 | if (irq_desc[irq].status & IRQ_NOREQUEST) |
584 | return -EINVAL; | |
1da177e4 LT |
585 | if (!handler) |
586 | return -EINVAL; | |
587 | ||
588 | action = kmalloc(sizeof(struct irqaction), GFP_ATOMIC); | |
589 | if (!action) | |
590 | return -ENOMEM; | |
591 | ||
592 | action->handler = handler; | |
593 | action->flags = irqflags; | |
594 | cpus_clear(action->mask); | |
595 | action->name = devname; | |
596 | action->next = NULL; | |
597 | action->dev_id = dev_id; | |
598 | ||
a304e1b8 DW |
599 | #ifdef CONFIG_DEBUG_SHIRQ |
600 | if (irqflags & IRQF_SHARED) { | |
601 | /* | |
602 | * It's a shared IRQ -- the driver ought to be prepared for it | |
603 | * to happen immediately, so let's make sure.... | |
604 | * We do this before actually registering it, to make sure that | |
605 | * a 'real' IRQ doesn't run in parallel with our fake | |
606 | */ | |
59845b1f | 607 | unsigned long flags; |
a304e1b8 | 608 | |
59845b1f JP |
609 | local_irq_save(flags); |
610 | handler(irq, dev_id); | |
611 | local_irq_restore(flags); | |
a304e1b8 DW |
612 | } |
613 | #endif | |
614 | ||
1da177e4 LT |
615 | retval = setup_irq(irq, action); |
616 | if (retval) | |
617 | kfree(action); | |
618 | ||
619 | return retval; | |
620 | } | |
1da177e4 | 621 | EXPORT_SYMBOL(request_irq); |